Display panel and manufacturing method therefor, and display apparatus

Abstract

Provided are a display panel and a manufacturing method therefor, and a display apparatus. In the display panel, connecting electrodes are located on an insulating layer and are electrically connected to a pixel circuit; first electrodes of light-emitting elements are located on the insulating layer; a separation structure comprises a first separation part; a pixel defining layer comprises first openings each configured to expose at least a portion of a connecting electrode; second electrodes of the light-emitting elements are disposed on the pixel defining layer and are connected to the connecting electrodes by means of the first openings of the pixel defining layer; and the pixel defining layer further comprises second openings each configured to expose at least a portion of a first electrode of a light-emitting element to define a light-emitting region of the light-emitting element. The display panel comprises a display region and a gate-driver-on-array region, wherein the gate-driver-on-array region is located on one side of the display region, and the boundaries of the display region and the gate-driver-on-array region extend in a first direction. The connecting electrodes extend in the first direction. The space can be saved on as much as possible while the effective contact area is increased, thereby improving an aperture ratio.

Description

Display panel, manufacturing method thereof, and display device

[0001] Cross-reference to related applications

[0002] This patent application claims priority to Chinese Patent Application No. 202411336832.0, filed on September 24, 2024, the disclosure of which is hereby incorporated by reference in its entirety as part of the disclosure of the present disclosure. TECHNICAL FIELD

[0003] At least one embodiment of the present disclosure relates to a display panel, a manufacturing method thereof, and a display device. BACKGROUND

[0004] An inverted Organic Light-Emitting Diode (OLED) can solve the temperature rise problem of a full N-type pixel circuit caused by a floating source, but if the cathode-common-emitting layer (for example, R / G / B)-common-anode of an OLED device is completely reversed in sequence to make an inverted device, not only most of the device materials need to be replaced, but also the evaporation sequence is reversed, which may involve line modification, so the cost will be very high.

[0005] Recently, the use and application of display devices have been diversified. As the customer group pursues thinner and lighter display devices, their use range has gradually expanded. As OLED technology gradually enters the field of medium-sized display panels, the N-type metal-oxide-semiconductor (NMOS) internal compensation pixel circuit of a thin-film transistor (TFT) with a full oxide such as indium gallium zinc oxide (IGZO) channel is a relatively ideal choice for medium and large-sized display panels. SUMMARY

[0006] At least one embodiment of the present disclosure relates to a display panel, a manufacturing method thereof, and a display device, which is conducive to improving the connection stability of the connecting electrode and the second electrode, can increase the effective contact area while saving space as much as possible, and improve the aperture ratio.

[0007] Embodiments of the present disclosure provide a display panel, comprising: a substrate substrate; a pixel circuit located on the substrate substrate; an insulating layer located on the pixel circuit; a connection electrode located on the insulating layer and electrically connected with the pixel circuit; a first electrode of a light emitting element located on the insulating layer; a separation structure comprising a first separation part; a pixel defining layer comprising a first opening configured to expose at least part of the connection electrode; and a second electrode of the light emitting element disposed on the pixel defining layer and connected with the connection electrode through the first opening of the pixel defining layer, wherein the pixel defining layer further comprises a second opening configured to expose at least part of the first electrode of the light emitting element to define a light emitting area of the light emitting element, wherein the display panel comprises a display area and a gate driving region on an array, the gate driving region on the array is located on one side of the display area, a boundary of the display area and the gate driving region on the array extends along a first direction, and the connection electrode extends along the first direction.

[0008] For example, in the display panel provided by the embodiments of the present disclosure, the connection electrode extends along a straight line and has a strip shape, an arc shape, a curve shape, or comprises a plurality of portions each extending along a different straight line and having a strip shape.

[0009] For example, in the display panel provided by the embodiments of the present disclosure, the length of the connection electrode in its extending direction is greater than or equal to the length of the light emitting area close to the connection electrode in the extending direction.

[0010] For example, in the display panel provided by the embodiments of the present disclosure, each light emitting area corresponds to one connection electrode, and in the connection electrodes corresponding to the light emitting areas located in the same column, the connection electrodes are arranged alternately or randomly.

[0011] For example, in the display panel provided by the embodiments of the present disclosure, the connection electrodes corresponding to two adjacent light emitting areas are located on different sides of the light emitting areas corresponding to the connection electrodes.

[0012] For example, in the display panel provided by the embodiments of the present disclosure, the connection electrode comprises two connection electrode parts spaced from each other, and the two connection electrode parts are respectively arranged on opposite sides of the light emitting area.

[0013] For example, in the display panel provided by the embodiments of the present disclosure, the display panel further comprises a power supply line connected with the first electrode of the light emitting element.

[0014] For example, in the display panel provided by the embodiments of the present disclosure, the power supply line comprises a power supply signal line extending along a second direction and a power supply connection line extending along the first direction, the second direction intersects the first direction, and adjacent two columns of light emitting elements share the same power supply connection line.

[0015] For example, in the display panel provided by the embodiments of the present disclosure, the power lines are in a mesh shape.

[0016] For example, in the display panel provided by the embodiments of the present disclosure, the power signal lines comprise first widened portions, and the first widened portions of adjacent two power signal lines are arranged in a staggered manner.

[0017] For example, in the display panel provided by the embodiments of the present disclosure, a plurality of first widened portions are arranged corresponding to light emitting elements emitting the same color light.

[0018] For example, in the display panel provided by the embodiments of the present disclosure, a plurality of light emitting elements are provided, and the plurality of light emitting elements comprise first light emitting elements, second light emitting elements, and third light emitting elements, the first light emitting elements are configured to emit first color light, the second light emitting elements are configured to emit second color light, the third light emitting elements are configured to emit third color light, the first light emitting elements and the second light emitting elements are located on the same side of the third light emitting elements and arranged along the first direction, and the first widened portions are arranged corresponding to the third light emitting elements.

[0019] For example, in the display panel provided by the embodiments of the present disclosure, the power lines further comprise connection buses, and one connection bus corresponds to at least two columns of power connection lines.

[0020] For example, in the display panel provided by the embodiments of the present disclosure, the connection buses have second widened portions, and the extension directions of the second widened portions intersect with the extension directions of the first widened portions.

[0021] For example, in the display panel provided by the embodiments of the present disclosure, the separation structure further comprises second separation portions configured to disconnect the second electrodes of different sub-pixels.

[0022] For example, in the display panel provided by the embodiments of the present disclosure, the second separation portions are in contact with the insulating layers, in contact with the pixel defining layers, or are integrated with the pixel defining layers.

[0023] For example, in the display panel provided by the embodiments of the present disclosure, the connection electrodes are configured to extend in a direction perpendicular to the movement direction of the evaporation source when the connection electrodes are formed by an evaporation process.

[0024] For example, in the display panel provided by the embodiments of the present disclosure, no connection electrode is arranged in a direction parallel to the movement direction of the evaporation source.

[0025] For example, in the display panel provided by the embodiments of the present disclosure, the display area and the gate driving area on the array are arranged along a second direction, and the first direction intersects with the second direction.

[0026] For example, pixel circuits of different sub-pixels are connected to different second electrodes to independently control voltage on the second electrode of each sub-pixel, and the first electrodes of the plurality of sub-pixels have the same voltage.

[0027] For example, the light emitting elements are provided as a plurality of sub-pixels including first color sub-pixels configured to emit first color light, second color sub-pixels configured to emit second color light, and third color sub-pixels configured to emit third color light, at least two of the connection electrodes of the first color sub-pixels, the connection electrodes of the second color sub-pixels, and the connection electrodes of the third color sub-pixels have different lengths in the first direction.

[0028] For example, the length of the connection electrode of the first color sub-pixel in the first direction and the length of the connection electrode of the second color sub-pixel in the first direction are different.

[0029] For example, the length of the connection electrode of the second color sub-pixel in the first direction and the length of the connection electrode of the third color sub-pixel in the first direction are different.

[0030] For example, for the same sub-pixel, the ratio of the length of the connection electrode in the first direction to the maximum length of the second opening in the first direction ranges from 0.6 to 1.5.

[0031] For example, for the same sub-pixel, the ratio of the maximum length of the second opening in the first direction to the maximum length of the first opening in the first direction ranges from 0.6 to 1.5.

[0032] Embodiments of the present disclosure also provide a manufacturing method of a display panel, comprising: forming a pixel circuit on a substrate; forming an insulating layer on the pixel circuit; forming a connecting electrode electrically connected to the pixel circuit on the insulating layer; forming a first electrode of a light emitting element on the insulating layer; forming a separation structure, the separation structure comprising a first separation part; forming a pixel defining layer, the pixel defining layer comprising a first opening and a second opening, the first opening being configured to expose at least part of the connecting electrode, and the second opening being configured to expose at least part of the first electrode of the light emitting element to define a light emitting area of the light emitting element; and forming a second electrode of the light emitting element on the pixel defining layer, the second electrode being connected to the connecting electrode through the first opening of the pixel defining layer, wherein the display panel comprises a display area and a gate driving region on an array, the gate driving region on the array being located at one side of the display area, a boundary between the display area and the gate driving region on the array extending along a first direction, and the connecting electrode extending along the first direction.

[0033] For example, in the manufacturing method of the display panel provided by the embodiments of the present disclosure, the forming of the connecting electrode comprises: the connecting electrode being arranged to extend along a direction perpendicular to a moving direction of an evaporation source when the connecting electrode is formed by an evaporation process.

[0034] For example, in the manufacturing method of the display panel provided by the embodiments of the present disclosure, no connecting electrode is arranged in a direction parallel to the moving direction of the evaporation source.

[0035] Embodiments of the present disclosure also provide a display device comprising any of the display panels described above. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are merely some of the embodiments of the present disclosure, and not a limitation of the present disclosure.

[0037] FIG. 1 is a circuit diagram of a display panel comprising a P-type pixel circuit.

[0038] FIG. 2 is a circuit diagram of a display panel comprising a full N-type pixel circuit.

[0039] FIG. 3 is a schematic diagram of a partial structure in a display panel provided by an embodiment of the present disclosure.

[0040] FIG. 4 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure.

[0041] FIG. 5 is a cross-sectional view of a display panel provided by another embodiment of the present disclosure.

[0042] FIG. 6 is a plan view of a display panel according to an embodiment of the present disclosure.

[0043] FIG. 7 shows evaporation of the evaporation source at different times.

[0044] FIG. 8 is a plan view of a display panel according to an embodiment of the present disclosure.

[0045] FIG. 9 is a plan view of a display panel according to another embodiment of the present disclosure.

[0046] FIG. 10 is a plan view of a display panel according to an embodiment of the present disclosure.

[0047] FIG. 11 is a schematic view of a connection electrode and a light-emitting region of a sub-pixel in a display panel according to an embodiment of the present disclosure, in which FIG. 11(a) to FIG. 11(d) are schematic views of a connection electrode and a light-emitting region of a sub-pixel in several display panels according to embodiments of the present disclosure.

[0048] FIG. 12 is a schematic view of a display panel according to an embodiment of the present disclosure.

[0049] FIG. 13 is a plan view of a partial structure of a display panel according to an embodiment of the present disclosure.

[0050] FIG. 14 is a cross-sectional view of a display panel according to an embodiment of the present disclosure.

[0051] FIG. 15 to FIG. 17 are plan views of a display panel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present disclosure.

[0053] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second", and similar terms are used herein merely to distinguish one element from another, and are not intended to imply any order or sequence. Also, the terms "a", "an", and "the" are not limited, unless otherwise defined, to refer to only one of an element but to be able to refer to one or more elements. The terms "including", "comprising", and similar terms are used herein to mean that existence of the stated elements or components is not exclusive, but that other elements or components are possible. The terms "connected" and "coupled" are used herein to mean that two or more elements or components are in direct or indirect contact with each other. The terms "upper", "lower", "left", "right", and similar terms are used herein merely to represent relative positional relationships, and can be changed when the absolute positions of the described objects are changed.

[0054] FIG. 1 is a circuit diagram of a display panel including a P-type pixel circuit. FIG. 2 is a circuit diagram of a display panel including an all-N-type pixel circuit.

[0055] As shown in FIGS. 1 and 2, the pixel circuit includes transistors T1 to T5, capacitors C1 and C2. The pixel circuit drives a light emitting element M0 to emit light.

[0056] As shown in FIGS. 1 and 2, the transistor T1 is a driving transistor, the transistor T2 is a data write transistor, the transistor T3 is a threshold compensation transistor, the transistor T4 is a reset transistor, the transistor T5 is a light emission control transistor, and the transistor T6 is a reset transistor.

[0057] The power line PL1 is configured to provide a power voltage VDD, the power line PL2 is configured to provide a power voltage VSS, the light-emitting control signal line EM is configured to provide a light-emitting control signal, the initialization signal line INT is configured to provide an initialization voltage Vint, the gate line GT is configured to provide a scanning signal, the data line DT is configured to provide a data voltage Vdt, the reference voltage line REF is configured to provide a reference voltage Vref, and the reset control signal lines RST1, RST2 and RST3 are respectively configured to provide a reset control signal. The reset control signals on different reset control signal lines can be the same or different. The power voltage VDD is greater than the power voltage VSS. The initialization voltage Vint can be between the power voltage VDD and the power voltage VSS. The reference voltage Vref can be a fixed voltage.

[0058] FIGS. 1 and 2 show nodes N1 to N4. For example, the node N2 is a drain terminal of the drive transistor T1, and the node N4 is a source terminal of the drive transistor T1.

[0059] As shown in FIGS. 1 and 2, the N-type TFT backplane technology with oxide channel is theoretically analyzed, and it is found that the source terminal of the drive transistor is changed from the high-potential power voltage VDD (as shown in FIG. 1) to the low-potential power voltage VSS (as shown in FIG. 2). The existing OLED device power voltage VSS terminal is a cathode trace, which results in a large resistance and a large voltage drop of the cathode trace, causing the source terminal to be unstable, and further affecting the brightness uniformity.

[0060] The transistor T1 in FIG. 2 can include a bottom gate and a top gate, and the bottom gate can be connected to the second node N2 to improve the performance of the switching transistor, for example, to improve the data range of the switching transistor. Of course, embodiments of the present disclosure include but are not limited to this.

[0061] It should be noted that embodiments of the present disclosure take the pixel circuit shown in FIG. 2 as an example for illustration, however, embodiments of the present disclosure do not limit the structure of the pixel circuit, for example, the structure of the pixel circuit includes the number of transistors, the number of storage capacitors, the connection relationship of the transistors, etc. That is, a person skilled in the art can adjust the structure of the pixel circuit as needed.

[0062] FIG. 3 is a schematic diagram of a partial structure in a display panel according to an embodiment of the present disclosure. FIG. 4 is a cross-sectional view of a display panel according to an embodiment of the present disclosure. FIG. 5 is a cross-sectional view of a display panel according to another embodiment of the present disclosure.

[0063] The light emitting element in the display panel shown in FIG. 4 and FIG. 5 is in an inverted structure. Compared with a common light emitting element, the light emitting element in the inverted structure can not be adjusted in evaporation. The transistors in the pixel circuit are connected to the second electrode E2 (cathode), and the voltage on the second electrode (cathode) of each sub-pixel is independently controlled to perform image display. That is, the pixel circuits of different sub-pixels are connected to different second electrodes to independently control the voltage on the second electrode E2 of each sub-pixel. The first electrodes E1 (anodes) of the plurality of sub-pixels have the same voltage. For example, the first electrode E1 (anode) adopts a patterned mesh design. For example, for a large-size display panel, the pattern of the first electrode E1 (anode) can be set to surround a sub-pixel, and for a small- or medium-size display panel, the first electrode E1 (anode) is at least arranged on the upper and lower sides of the sub-pixel. The first electrode E1 (anode) is connected to a bus, and further connected to an integrated circuit.

[0064] The FMM-free technology refers to a technology in which no fine metal mask (FMM) is used in the manufacturing process of the light emitting element of the display panel, such as the ELEAP technology mentioned later. Of course, the FMM technology can also be used to form the display panel, such as the display panel shown in FIG. 4 and FIG. 5, that is, the FMM technology can also be used to form the display panel.

[0065] FIG. 2 is an embodiment of a full N-type pixel circuit in which the channels of the TFTs all adopt oxides. Referring to FIG. 1 and FIG. 2, in principle, the separated N-type pixel circuit (as shown in FIG. 2) is compared with the P-type pixel circuit (as shown in FIG. 1), the source (node N4) of the driving transistor (DTFT) in the pixel circuit shown in FIG. 1 is close to the VDD end, and the source (node N2) of the driving transistor (DTFT) in the N-type pixel circuit shown in FIG. 2 is close to the VSS end. Because of the resistance drop of the VSS end and the parasitic capacitance of the light emitting element (OLED device) itself, the gate-source end potential of the driving transistor is affected, resulting in a drift of the threshold voltage of the N-type pixel circuit and affecting the display effect.

[0066] FIG. 6 is a plan view of a display panel according to an embodiment of the present disclosure. As shown in FIG. 6, the display panel includes a display area 201 and a gate driver on array (GOA) area 202, and the gate driver on array area 202 is located on one side of the display area 201. FIG. 6 shows a peripheral area 203. As shown in FIG. 6, the peripheral area 203 includes the GOA area 202.

[0067] As shown in FIGS. 2-6, embodiments of the present disclosure provide a display panel including a substrate BS, a pixel circuit PXC, an insulating layer LL, a connecting electrode CE, a first electrode E1 of a light emitting element M0, a separation structure P0, and a pixel defining layer PDL. The pixel circuit PXC is located on the substrate BS. The insulating layer LL is located on the pixel circuit PXC. The connecting electrode CE is located on the insulating layer LL and electrically connected with the pixel circuit PXC. The first electrode E1 of the light emitting element M0 is located on the insulating layer LL. The separation structure P0 includes a first separation part P1. For example, the separation structure P0 includes the first separation part P1 located on the connecting electrode CE. For example, the pixel defining layer PDL is disposed on the insulating layer LL and the first separation part P1. For example, the pixel defining layer PDL includes a first opening OPN1 configured to expose at least a portion of the connecting electrode CE. A second electrode E2 of the light emitting element M0 is disposed on the pixel defining layer PDL and connected with the connecting electrode CE through the first opening OPN1 of the pixel defining layer PDL. The pixel defining layer PDL further includes a second opening OPN2 configured to expose at least a portion of the first electrode E1 of the light emitting element to define a light emitting area 66 of the light emitting element.

[0068] As shown in FIGS. 3 and 6, the boundary 301 of the display area 201 and the gate driving area 202 on the array extends along the first direction Y, and the connecting electrode CE extends along the first direction Y. As shown in FIG. 6, the boundary 301 of the display area 201 and the gate driving area 202 on the array can be a left vertical dashed line.

[0069] In general technology, the connecting electrode is in the form of a dot, and the contact resistance is very large, and there can be a situation where the connection is not made, resulting in the pixel not being able to be lit. Embodiments of the present disclosure provide a display panel, the connecting electrode CE extends along the first direction Y, adjusts the dot-shaped connecting electrode in general technology to a non-dot shape, which is beneficial to improve the connection stability of the connecting electrode CE and the second electrode E2, can increase the effective contact area while saving space as much as possible, and improve the aperture ratio. The display panel provided by embodiments of the present disclosure can increase the effective connection area while ensuring the aperture ratio. The display panel provided by embodiments of the present disclosure can reduce the connection resistance and reduce the voltage drop.

[0070] As shown in FIGS. 4 and 5, the pixel defining layer PDL forms an undercut structure at the first separation part P1 to facilitate the connection of the second electrode E2 and the connecting electrode CE.

[0071] As shown in FIG. 6, a plurality of gate driving units 401 are provided in the GOA region 202 of the display panel. The gate lines GT are connected with the gate driving units 401. The gate driving units 401 are configured to provide scan signals to the gate lines GT. As shown in FIG. 6, the plurality of gate driving units 401 are arranged along the first direction Y. For example, the plurality of gate driving units 401 can be cascaded.

[0072] FIG. 6 illustrates the left side portion of the peripheral region 203 as the GOA region 202. However, embodiments of the present disclosure include but are not limited to this. In other embodiments, the right side portion of the peripheral region 203 can be the GOA region 202, in which case the boundary 301 between the display region 201 and the gate driving region 202 on the array can be a right vertical dashed line. In other embodiments, both the left side portion of the peripheral region 203 and the right side portion of the peripheral region 203 can be the GOA region 202, in which case both the left vertical dashed line and the right vertical dashed line are respectively regarded as the boundary 301 between the display region 201 and the gate driving region 202 on the array.

[0073] As shown in FIG. 6, the gate lines GT extend along the second direction X, and a plurality of gate lines GT are arranged along the first direction Y.

[0074] In embodiments of the present disclosure, a component extends along a direction if the dimension of the component in the direction is greater than the dimension of the component in other directions. The component extending along a direction does not require each part of the component to extend along the direction, but can refer to the trend of the component extending along the direction.

[0075] In embodiments of the present disclosure, the first direction Y is parallel to the substrate BS. As shown in FIG. 3 and FIG. 6, the first direction Y is vertical.

[0076] In embodiments of the present disclosure, the second direction X is parallel to the substrate BS, and the second direction X intersects the first direction Y. For example, the second direction X is perpendicular to the first direction Y. As shown in FIG. 3 and FIG. 6, the second direction X is horizontal.

[0077] In embodiments of the present disclosure, the third direction Z is perpendicular to the substrate BS. That is, the third direction Z is perpendicular to the first direction Y and perpendicular to the second direction X.

[0078] As shown in FIG. 3 to FIG. 6, different sub-pixels 100 are separated so that the second electrodes E2 (VSS terminals) of different sub-pixels are independent of each other. Thus, each sub-pixel 100 can have a different cathode voltage.

[0079] For example, as shown in FIG. 4, the separation structure P0 further includes a second separation part P2 configured to disconnect the second electrodes E2 of different sub-pixels. The second electrodes E2 of different sub-pixels are disconnected at the second separation part P2.

[0080] As shown in FIG. 4, the pixel definition layer PDL further includes a third opening OPN3, and the second electrode E2 is disconnected at the third opening OPN3.

[0081] As shown in FIG. 4, the second electrodes E2 of different sub-pixels are disconnected at the second separation part P2 and the third opening OPN3.

[0082] In some display panels, the second electrodes E2 of different sub-pixels can be disconnected by setting the second separation part P2 and the third opening OPN3, or can be disconnected by other manners.

[0083] As shown in FIG. 4, the pixel definition layer PDL forms an undercut structure at the second separation part P2 to facilitate the isolation of the second electrodes E2 of different sub-pixels.

[0084] For example, as shown in FIG. 4, the second separation part P2 is in contact with the insulating layer LL and the pixel definition layer PDL, and the second separation part P2 can also be an integral structure with the pixel definition layer PDL.

[0085] In embodiments of the present disclosure, the first separation part P1 can be made of a conductive material or an insulating material, and the second separation part P2 can be made of a conductive material or an insulating material. The materials of the first separation part P1 and the second separation part P2 can be the same or different. For example, the conductive material includes metal, and the insulating material includes organic insulating material and inorganic insulating material. The organic insulating material includes resin, but is not limited thereto. The inorganic insulating material includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0086] The display panel shown in FIG. 5 disconnects the second electrodes E2 of different sub-pixels by setting the third separation part P3 in an inverted trapezoidal shape.

[0087] For example, as shown in FIG. 3, the connection electrode CE is configured to extend in a direction perpendicular to the movement direction of the evaporation source when the connection electrode CE is formed in an evaporation process. As shown in FIG. 3, the movement direction of the evaporation source is the second direction X.

[0088] For example, the display area 201 and the gate driving area 202 on the array are arranged along the second direction X, and the first direction Y intersects the second direction X.

[0089] For example, as shown in FIG. 3, the connection electrode CE is not provided in the direction parallel to the moving direction of the evaporation source. The periphery of the light emitting region 66 is divided into the direction parallel to the moving direction of the evaporation source and the direction perpendicular to the moving direction of the evaporation source. For example, the first direction Y is the direction perpendicular to the moving direction of the evaporation source, and the second direction X is the direction parallel to the moving direction of the evaporation source. The connection electrode CE is provided outside the light emitting region 66 and in the direction perpendicular to the moving direction of the evaporation source, and is not provided in the direction parallel to the moving direction of the evaporation source.

[0090] FIGS. 4 and 5 show the light emitting functional layer FL. The light emitting functional layer FL is located between the first electrode E1 and the second electrode E2. The light emitting functional layer FL includes the first light emitting functional part FL1 and the second light emitting functional part FL2. It should be noted that the arrangement of the light emitting functional layer FL is not limited to that shown in the figures, and can be adjusted as needed. For example, the second light emitting functional part FL2 can be made using an opening mask. The second light emitting functional part FL2 can be referred to as a common layer.

[0091] As shown in FIGS. 4 and 5, the display panel includes the insulating layers L0 to L5. The insulating layers L0 to L3 can be made of inorganic insulating materials. The insulating layers L4 to L5 can be made of organic insulating materials.

[0092] As shown in FIGS. 4 and 5, the pixel defining layer PDL can be made of organic insulating materials, or can be made of organic insulating materials and inorganic insulating materials. For example, the pixel defining layer PDL can include a plurality of sub-layers. The plurality of sub-layers of the pixel defining layer PDL can be made of suitable materials as needed. For example, some sub-layers can be made of organic insulating materials, and some sub-layers can be made of inorganic insulating materials.

[0093] As shown in FIG. 4, the third separation part P3 can be made of organic insulating materials. The pixel defining layer PDL and the third separation part P3 can be a one-piece structure or a separate structure.

[0094] As shown in FIGS. 4 and 5, the display panel includes an encapsulation layer ECS. The encapsulation layer ECS is used to encapsulate the light emitting element to avoid water-like attack.

[0095] As shown in FIGS. 4 and 5, the display panel includes the conductive structure A0, the conductive structure G0, and the connection S0. For example, the conductive structure A0 and the conductive structure G0 constitute a capacitor. The connection S0 is used to connect with other components.

[0096] As shown in FIGS. 4 and 5, the pixel circuit is an NMOS circuit, and the light emitting element (OLED device) is inverted.

[0097] Because the connecting electrode and the cathode are usually overlapped in a dot shape in the prior art, and because a common layer is evaporated before forming the cathode, it is difficult to connect the very thin cathode to the common layer and the connecting electrode together by evaporation angle and other process factors, and even if the connection is successful, the connection area is very small, which will inevitably lead to a large contact resistance and heat generation when the current is large, which is not conducive to obtaining high brightness and other display qualities.

[0098] Figure 7 shows the evaporation of the evaporation source at different times. When the evaporation source moves, the large-angle evaporation material (cathode) can well exceed the second light-emitting functional part FL2 and be overlapped with the connecting electrode CE. At t1, the material at the evaporation line La and the evaporation line Lb cannot be evaporated onto the connecting electrode CE because the eaves structure (as shown in Figure 7) protruding from the undercut structure blocks it. At t2, because the evaporation source moves, the cathode material evaporated at the evaporation line Lb can be connected to the connecting electrode CE.

[0099] For example, as shown in Figure 3, the length of the connecting electrode CE in its extension direction is greater than or equal to the length of the light-emitting area close to the connecting electrode CE in the extension direction. The length of the connecting electrode CE in the extension direction is consistent with the length of the sub-pixel, or slightly longer, which can maximize the contact area.

[0100] If the extension direction of the connecting electrode CE is parallel to the evaporation direction, then as the evaporation source moves, the above-mentioned effect will not occur. On the one hand, this will lead to the evaporation of the cathode material in some sub-pixels that may not be well overlapped with the connecting electrode CE. On the other hand, there may be a situation where the edge is far from the evaporation source and can have a large-angle material evaporated obliquely, but the center does not have enough large-angle material to enter, resulting in poor overlap. The uneven contact resistance of the center area and the edge area of the display panel leads to uneven display. Therefore, the parallel connecting electrode CE can be omitted, which can also save space and increase the overall aperture ratio of the pixel.

[0101] Compared with the point connection mode of the inverted OLED in the prior art, the design of the connecting electrode CE in the display panel provided in the embodiments of the present disclosure can increase the effective contact area while saving space and improving the aperture ratio.

[0102] Figure 8 is a plan view of a display panel according to an embodiment of the present disclosure. Figure 9 is a plan view of a display panel according to another embodiment of the present disclosure.

[0103] As shown in FIG. 3 and FIG. 8, the plurality of sub-pixels 100 include first color sub-pixels 101, second color sub-pixels 102, and third color sub-pixels 103. For example, the first color sub-pixels 101 are red sub-pixels, the second color sub-pixels 102 are green sub-pixels, and the third color sub-pixels 103 are blue sub-pixels, but are not limited thereto.

[0104] For example, as shown in FIG. 8, in the connection electrodes CE corresponding to the light emitting regions 66 in the same column, the connection electrodes CE corresponding to the adjacent two light emitting regions 66 are located on different sides of the light emitting regions 66 corresponding thereto. That is, each light emitting region 66 corresponds to a connection electrode CE, and for the light emitting regions 66 in the same column, the connection electrodes CE corresponding to the adjacent two rows of light emitting regions 66 are located on different sides of the light emitting regions 66 corresponding thereto. For the connection electrodes CE corresponding to the light emitting regions 66 in the same column, the connection electrodes CE are alternately arranged on opposite sides of the light emitting regions 66. FIG. 8 shows a plurality of columns of sub-pixels 100. The plurality of sub-pixels 100 include first color sub-pixels 101, second color sub-pixels 102, and third color sub-pixels 103.

[0105] For example, as shown in FIG. 8, for the first column of sub-pixels (first color sub-pixels 101), the connection electrodes CE corresponding to the adjacent two light emitting regions 66 are located on different sides of the light emitting regions 66 corresponding thereto, i.e., left and right sides. For example, for the second column of sub-pixels (second color sub-pixels 102), the connection electrodes CE corresponding to the adjacent two light emitting regions 66 are located on different sides of the light emitting regions 66 corresponding thereto, i.e., left and right sides. For example, for the third column of sub-pixels (third color sub-pixels 103), the connection electrodes CE corresponding to the adjacent two light emitting regions 66 are located on different sides of the light emitting regions 66 corresponding thereto, i.e., left and right sides. FIG. 8 takes the same column of sub-pixels having the same light emitting color as an example. Of course, in other embodiments, the same column of sub-pixels can also have different light emitting colors.

[0106] Of course, for the light emitting regions 66 in the same column, the connection electrodes CE can also be alternately arranged with a plurality of rows of light emitting regions 66 therebetween.

[0107] For example, as shown in FIG. 9, the connection electrode CE includes two connection electrode portions CEC and CEd spaced apart from each other, and the two connection electrode portions CEC and CEd are respectively arranged on opposite sides of the light emitting region 66. FIG. 9 shows that the two connection electrode portions CEC and CEd are respectively arranged on left and right sides of the light emitting region 66. That is, the connection electrode portions CEC and CEd are respectively arranged on opposite sides of the same light emitting region 66.

[0108] FIG. 10 is a plan view of a display panel according to an embodiment of the present disclosure. For example, as shown in FIG. 10, each light emitting region 66 corresponds to one connection electrode CE, and the connection electrodes CE corresponding to the light emitting regions 66 in the same column are arranged in disorder. In an embodiment of the present disclosure, arranged in disorder means not arranged in an alternating manner.

[0109] Because the connection electrode CE includes metal, it can reflect external light, and if the connection electrode CE is arranged on one side of the sub-pixel, it can be visually connected to form a line, and the reflected light can be recognized by the human eye.

[0110] In an embodiment of the present disclosure, the connection electrode CE can be arranged on one side of the sub-pixel, or alternatively arranged on both sides of the sub-pixel, or arranged on both sides of the sub-pixel in disorder. If the connection electrode CE is arranged on both sides of the sub-pixel, the contact area can be increased, and the resistance can be further reduced.

[0111] FIG. 11 is a schematic view of a connection electrode and a light emitting region of a sub-pixel in a display panel according to an embodiment of the present disclosure.

[0112] As shown in (a) of FIG. 11, the light emitting region 66 is in the shape of an ellipse, and the connection electrode CE is in the shape of an arc.

[0113] As shown in (b) of FIG. 11, the light emitting region 66 is in the shape of an ellipse, and the connection electrode CE is in the shape of a broken line. The connection electrode CE includes a plurality of portions extending along different straight lines and respectively in the shape of a strip.

[0114] As shown in (c) of FIG. 11, the light emitting region 66 is in the shape of a hexagon, and the connection electrode CE is in the shape of a straight line, which can also be referred to as a strip.

[0115] As shown in (d) of FIG. 11, the light emitting region 66 is in the shape of a hexagon, and the connection electrode CE is in the shape of a broken line. The connection electrode CE includes a plurality of portions extending along different straight lines and respectively in the shape of a strip.

[0116] For example, as shown in FIG. 11, the connection electrode CE can extend along a straight line and be in the shape of a strip, in the shape of an arc, in the shape of a curve, or include a plurality of portions extending along different straight lines and respectively in the shape of a strip.

[0117] In an embodiment of the present disclosure, the connection electrode CE can adopt various shapes. Embodiments of the present disclosure do not limit the shape of the connection electrode CE, as long as the connection electrode CE can be connected to the second electrode E2.

[0118] ​It should be noted that the shape of the light-emitting region 66 is not limited in the embodiments of the present disclosure, and can be adjusted as needed. For example, the light-emitting region 66 can adopt a circular shape, an elliptical shape, a polygonal shape, or the like. For example, the polygonal shape includes a rectangular shape, a pentagonal shape, a hexagonal shape, and an octagonal shape.

[0119] FIG. 12 is a schematic diagram of a display panel according to an embodiment of the present disclosure. As shown in FIG. 12, the pixel arrangement adopts a diamond type, the shape of the sub-pixel 100 is a polygonal shape, and the connection electrodes CE are arranged in an alternating arrangement. Each light-emitting region 66 corresponds to one connection electrode CE. For the same column of sub-pixels 100, the two adjacent connection electrodes CE are located at the upper left side and the lower right side of the light-emitting region 66 corresponding thereto, respectively. For example, as shown in FIG. 12, the light-emitting colors of the same column of sub-pixels are different.

[0120] It should be noted that the pixel arrangement is not limited in the embodiments of the present disclosure.

[0121] As described above, in order to improve the reliability of the cathode overlap in the undercut structure while trying to improve the aperture ratio of the light-emitting region, the embodiments of the present disclosure make a design on the shape and position of the overlap part.

[0122] As shown in FIGS. 3, 8-10, and 12, the plurality of sub-pixels 100 include first color sub-pixels 101, second color sub-pixels 102, and third color sub-pixels 103; the lengths of at least two of the connection electrodes CE of the first color sub-pixels 101, the connection electrodes CE of the second color sub-pixels 102, and the connection electrodes CE of the third color sub-pixels 103 in the first direction Y are different.

[0123] As shown in FIGS. 3 and 8-12, the length of the connection electrode CE of the first color sub-pixel 101 in the first direction Y and the length of the connection electrode CE of the second color sub-pixel 102 in the first direction Y are different. For example, the length of the connection electrode CE of the first color sub-pixel 101 in the first direction Y is greater than the length of the connection electrode CE of the second color sub-pixel 102 in the first direction Y.

[0124] As shown in FIGS. 3 and 8-12, the length of the connection electrode CE of the second color sub-pixel 102 in the first direction Y and the length of the connection electrode CE of the third color sub-pixel 103 in the first direction Y are different. For example, the length of the connection electrode CE of the second color sub-pixel 102 in the first direction Y is less than the length of the connection electrode CE of the third color sub-pixel 103 in the first direction Y.

[0125] As shown in FIG. 3, and FIGS. 8 to 10, the length of the connection electrode CE of the first color sub-pixel 101 in the first direction Y and the length of the connection electrode CE of the third color sub-pixel 103 in the first direction Y can be equal or can not be equal.

[0126] As shown in FIG. 3, and FIGS. 8 to 12, the length of the first color sub-pixel 101 in the first direction Y and the length of the second color sub-pixel 102 in the first direction Y are different. For example, the length of the first color sub-pixel 101 in the first direction Y is greater than the length of the second color sub-pixel 102 in the first direction Y.

[0127] As shown in FIG. 3, and FIGS. 8 to 12, the length of the second color sub-pixel 102 in the first direction Y and the length of the third color sub-pixel 103 in the first direction Y are different. For example, the length of the second color sub-pixel 102 in the first direction Y is less than the length of the third color sub-pixel 103 in the first direction Y.

[0128] As shown in FIG. 3, and FIGS. 8 to 12, the length of the first color sub-pixel 101 in the first direction Y and the length of the third color sub-pixel 103 in the first direction Y can be equal or can not be equal.

[0129] The length of the connection electrode CE of a sub-pixel in the first direction Y can be associated with the length of the sub-pixel in the first direction Y.

[0130] The length of a sub-pixel 100 in the first direction Y refers to the length of the light emitting area 66 (second opening OPN2) of the sub-pixel in the first direction Y.

[0131] For example, as shown in FIG. 3, FIGS. 8 to 12, for the same sub-pixel, the ratio of the length of the connection electrode CE in the first direction Y to the maximum length of the second opening (pixel opening) OPN2 in the first direction Y ranges from 0.6 to 1.5. Further for example, the ratio ranges from 0.8 to 1.2.

[0132] For example, as shown in FIG. 3, FIGS. 8 to 12, for the same sub-pixel, the ratio of the maximum length of the second opening (pixel opening) OPN2 in the first direction Y to the maximum length of the first opening OPN1 in the first direction Y ranges from 0.6 to 1.5. Further for example, the ratio ranges from 0.8 to 1.2. The maximum length of the first opening OPN1 in the first direction Y can be considered as the maximum length of the connection electrode CE in the first direction Y at the corresponding position in the figure.

[0133] FIG. 13 is a plan view of a partial structure of a display panel according to an embodiment of the present disclosure. FIG. 14 is a cross-sectional view of a display panel according to an embodiment of the present disclosure. FIGS. 15 to 17 are plan views of a display panel according to an embodiment of the present disclosure.

[0134] For example, as shown in FIGS. 2, 13 and 14, the display panel further includes a power line PL1 connected to the first electrode E1 of the light emitting element.

[0135] As shown in FIGS. 4 and 5, the power line PL1 and the first electrode E1 of the light emitting element can be an integral structure. That is, the power line PL1 and the first electrode E1 of the light emitting element are located in the same layer and formed integrally.

[0136] As shown in FIG. 14, the power line PL1 and the first electrode E1 of the light emitting element are located in different layers and connected through a via V0. As shown in FIG. 14, the via V0 penetrates the planarization layer PLN1 and the planarization layer PLN2.

[0137] As shown in FIGS. 4, 5 and 14, the connection electrode CE is connected to a connection line CC, and the connection line CC is connected to the pixel circuit PXC.

[0138] FIG. 14 shows the electrode SDa, the electrode SDb, the electrode SDc, and the electrode SDd. The electrode SDa and the electrode SDb are respectively connected to the active layer AT. FIG. 14 shows the gate electrode GE1 and the gate electrode GE2. The gate electrode GE1 and the gate electrode GE2 can be a bottom gate and a top gate, respectively. The gate electrode GE1 and the gate electrode GE2 can be connected to each other or not.

[0139] FIG. 14 shows the gate insulating layer GI1, the interlayer insulating layer ILD1, the gate insulating layer GI2, the interlayer insulating layer ILD2, the passivation layer PVX, the planarization layer PLN1, the planarization layer PLN2, the pixel definition layer PDL, and the substrate BS. FIG. 14 illustrates an example in which the substrate BS includes the buffer layer BF1, the barrier layer BR1, the barrier layer BR2, the first substrate PI1, and the second substrate PI2, but is not limited thereto, and the structure of the substrate BS can be adjusted as needed.

[0140] As shown in FIGS. 4 and 5, the display panel further includes a conductive structure G11, a conductive structure G21, and a conductive structure SD0. For example, the conductive structure G11 and the conductive structure SD0 are connected, and the conductive structure G21 and the conductive structure G11 constitute a capacitor.

[0141] For example, as shown in FIGS. 15 to 17, the power supply line PL1 includes the power supply signal line PL11 extending in the second direction X and the power supply connection line PL12 extending in the first direction Y. The power supply signal line PL11 and the power supply connection line PL12 are continuous with each other. For example, the power supply signal line PL11 and the power supply connection line PL12 are in a unitary structure.

[0142] For example, as shown in FIGS. 15 to 17, two adjacent columns of light emitting elements share the same power supply connection line PL12, which reduces the resistance of the power supply line PL1, facilitates connection with the first electrode E1 (anode), and reduces the light emitting area of the first electrode E1 (anode) wasted by the connection of the power supply line PL1, thereby reducing the reflection of the metal line. For example, the layout of adjacent sub-pixel columns can be designed to be mirror images.

[0143] For example, as shown in FIGS. 15 to 17, the power supply signal line PL11 and the power supply connection line PL12 are in a unitary structure, and the power supply line PL1 is in a mesh shape in order to reduce the resistance and reduce the difference between the regions. The power supply line PL1 in a mesh shape also improves the flexibility of the layout and reduces the wiring pressure of the lower pad (PAD) area, thereby improving the space for wiring of the lower PAD area.

[0144] For example, as shown in FIGS. 15 to 17, the power supply signal line PL11 includes the first widened portion W1, and the first widened portions W1 of two adjacent power supply signal lines PL11 are arranged in a staggered manner in order to facilitate layout design. As shown in FIGS. 15 to 17, the first widened portions W1 of two adjacent power supply signal lines PL11 are arranged in a staggered manner in the second direction X, i.e., in the lateral direction. The widened regions (first widened portions W1) of the power supply signal lines PL11 are arranged in a staggered manner in two adjacent rows, thereby improving the flexibility of the layout space.

[0145] As shown in FIGS. 15 to 17, the first widened portions W1 corresponding to the same column of light emitting regions 66 are not aligned, for example, the first widened portions W11 corresponding to the same column of light emitting regions 66 in the even rows are arranged to the right, and the first widened portions W12 corresponding to the same column of light emitting regions 66 in the odd rows are arranged to the left. For example, the left ends of the first widened portions W1 corresponding to the same column of light emitting regions 66 are not aligned, and the right ends are not aligned. For example, the sizes of the first widened portions W1 corresponding to the same column of light emitting regions 66 are the same. The first widened portion W1 includes the first widened portion W11 and the first widened portion W12.

[0146] For example, as shown in FIGS. 15 to 17, a plurality of first widened portions W1 are provided corresponding to light emitting elements emitting light of the same color. FIGS. 15 to 17 show that a plurality of first widened portions W1 are provided corresponding to light emitting elements (third color sub-pixels 103) emitting light of the third color.

[0147] For example, as shown in FIGS. 15-17, the plurality of first widened portions W1 are arranged corresponding to the light-emitting regions emitting the same color light with the largest size. The light-emitting region 66 of the third color sub-pixel 103 has the largest size, and the plurality of first widened portions W1 are arranged corresponding to the light-emitting region of the third color sub-pixel 103.

[0148] For example, as shown in FIGS. 15-17, the plurality of light-emitting elements are provided, and the plurality of light-emitting elements include a first light-emitting element M1, a second light-emitting element M2, and a third light-emitting element M3, the first light-emitting element M1 is configured to emit a first color light, the second light-emitting element M2 is configured to emit a second color light, the third light-emitting element M3 is configured to emit a third color light, the first light-emitting element M1 and the second light-emitting element M2 are located on the same side of the third light-emitting element M3 and arranged along a first direction Y, and the first widened portion W1 is arranged corresponding to the third light-emitting element M3.

[0149] For example, as shown in FIG. 17, the power supply line PL1 further includes a connection bus BL, and one connection bus BL corresponds to at least two columns of power supply connection lines PL12.

[0150] For example, as shown in FIG. 17, the connection bus BL has a second widened portion W2. As shown in FIG. 17, the second widened portion W2 extends along the first direction Y, and the first widened portion W1 extends along the second direction X. The extending directions of the first widened portion W1 and the second widened portion W2 are different. The extending directions of the first widened portion W1 and the second widened portion W2 intersect. The sizes of the first widened portion W1 and the second widened portion W2 can be the same or different.

[0151] For example, as shown in FIG. 17, the lower frame region power supply line PL1 is designed to have a one-to-two or one-to-four effect, reduces the wiring in the lower frame edge region, reduces the number of wiring in the rounded corner region, realizes a narrow frame, and can effectively reduce the number of wirings in the lower edge region.

[0152] As shown in FIG. 14, the display panel includes a separation structure, and the separation structure includes a separation portion P4, the separation portion P4 includes a main body P41 and a roof P42, the roof P42 extends from the main body P41 to form a roof, that is, the roof P42 protrudes from the main body P41 to facilitate the separation of the light-emitting functional layer FL and the second electrode E2.

[0153] As shown in FIG. 14, in the ELEAP technology, the second electrode E2 is connected to the connection electrode CC through the main body P41. The main body P41 is conductive. For example, the main body P41 can be made of a metal material.

[0154] The roof P42 can be made of a conductive material or an insulating material. The conductive material and the insulating material can be the materials described above, which will not be repeated here.

[0155] For example, the main body P41 and the roof P42 can be made of different materials, or can be made of the same material.

[0156] As shown in FIG. 14, the second electrode E2 (cathode) is connected with the pixel circuit PXC. The second electrode E2 (cathode) is connected with the pixel circuit PXC through the main body P41, the connection structure CCO, and the connection line CC.

[0157] As shown in FIG. 14, the second electrode E2 (cathode) is connected with the connection structure CCO through the main body P41, the connection structure CCO is connected with the connection line CC, and the connection line CC is connected with the pixel circuit PXC, so that the effect of reducing the resistance of the cathode can be achieved.

[0158] For example, as shown in FIG. 14, the encapsulation layer ECS includes an inorganic encapsulation thin film ECS1, an organic encapsulation thin film ECS2, and an inorganic encapsulation thin film ECS3. The inorganic encapsulation thin film ECS1 and the inorganic encapsulation thin film ECS3 are made of inorganic insulating materials, and the organic encapsulation thin film ECS2 is made of organic insulating materials.

[0159] In addition, the structure of the display panel provided by the embodiment of the present disclosure is suitable for the inverted OLED of the full N-type pixel circuit, the structure of the light-emitting device is consistent with the conventional structure, the development of new materials is not required, and the development cost is effectively reduced.

[0160] The embodiment of the present disclosure further provides a manufacturing method of a display panel. As shown in FIGS. 4, 5, and 14, the manufacturing method comprises the following steps: forming a pixel circuit PXC on a substrate BS; forming an insulating layer LL on the pixel circuit PXC; forming a connection electrode CE electrically connected with the pixel circuit PXC on the insulating layer LL; forming a first electrode E1 of a light-emitting element on the insulating layer LL; forming a separation structure P0, the separation structure P0 comprising a first separation part P1; forming a pixel definition layer PDL, the pixel definition layer PDL comprising a first opening OPN1 and a second opening OPN2, the first opening OPN1 being configured to expose at least a part of the connection electrode CE, and the second opening OPN2 being configured to expose at least a part of the first electrode E1 of the light-emitting element to define a light-emitting area of the light-emitting element; and forming a second electrode E2 of the light-emitting element on the pixel definition layer PDL, the second electrode E2 being connected with the connection electrode CE through the first opening OPN1 of the pixel definition layer PDL. As shown in FIGS. 3, 6, and 7, the display panel comprises a display area 201 and a gate driving region on an array 202, the gate driving region on the array 202 is located on one side of the display area 201, a boundary between the display area 201 and the gate driving region on the array 202 extends along a first direction Y, and the connection electrode CE extends along the first direction Y.

[0161] The main body P41 in FIG. 14 is the connection electrode CE.

[0162] In FIG. 14, the first opening OPN1 and the second opening OPN2 are the same opening.

[0163] The separation portion P4 in FIG. 14 corresponds to the separation structure P0 (the first separation portion P1) in FIGS. 4 and 5.

[0164] For example, as shown in FIG. 3, in the manufacturing method of the display panel, the connecting electrode CE is arranged to extend in a direction perpendicular to the moving direction of the evaporation source when the connecting electrode CE is formed in the evaporation process.

[0165] For example, as shown in FIGS. 8 to 12, in the manufacturing method of the display panel, the connecting electrode CE is not arranged in a direction parallel to the moving direction of the evaporation source.

[0166] The effects in the manufacturing method of the display panel can be correspondingly referred to the technical effects in the display panel, which will not be repeated here.

[0167] FIG. 14 is a display panel formed by using the ELEAP (E: environment positive, L: lithography with maskless deposition, E: extreme long life, low power, and high luminance, AP: any shape patterning) technology.

[0168] For example, in the ELEAP technology, the material (including the light-emitting functional layer FL and the second electrode E2) of the light-emitting element is formed on the whole surface, and then the material in the unnecessary area is removed by etching to form the display panel.

[0169] As shown in FIG. 14, materials (including the light-emitting functional layer FL and the second electrode E2) of the light-emitting element emitting light of the first color are formed on the entire substrate, the materials are reserved in the region of the first color sub-pixel, the materials are removed in the region of the second color sub-pixel and the region of the third color sub-pixel, and the materials are reserved in the non-display area part to facilitate the separation of the light-emitting functional layer and the second electrode at the isolation structure; materials (including the light-emitting functional layer FL and the second electrode E2) of the light-emitting element emitting light of the second color are formed on the entire substrate, the materials are reserved in the region of the second color sub-pixel, the materials are removed in the region of the first color sub-pixel and the region of the third color sub-pixel, and the materials are reserved in the non-display area part to facilitate the separation of the light-emitting functional layer and the second electrode at the isolation structure; materials (including the light-emitting functional layer FL and the second electrode E2) of the light-emitting element emitting light of the third color are formed on the entire substrate, the materials are reserved in the region of the third color sub-pixel, the materials are removed in the region of the first color sub-pixel and the region of the second color sub-pixel, and the materials are reserved in the non-display area part to facilitate the separation of the light-emitting functional layer and the second electrode at the isolation structure. The separation structure at the non-display area of adjacent display areas can be composed of materials of the light-emitting element emitting light of two different colors (including the light-emitting functional layer FL and the second electrode E2).

[0170] The separation structure is formed at the same time as the light-emitting element, and a separate cathode isolation part (isolation column) is not needed, the cathode pattern is realized, and the display quality of the full N-type pixel circuit is improved.

[0171] The same problem of cathode overlap also exists in the ELEAP technology, of course, not only in the ELEAP technology, but also in the display panel formed by using a fine metal mask. The scheme provided by the embodiments of the present disclosure can be used to solve the problem of cathode overlap in all undercut structures.

[0172] The cathode overlap in the ELEAP technology can adopt a structure that surrounds the sub-pixel in a whole circle, and then the part parallel to the movement of the evaporation source will appear the inconsistent situation of the center area pixel and the edge area pixel overlap mentioned above, and the uneven situation of the entire display screen. Therefore, the design provided by the embodiments of the present disclosure can also be used to optimize the ELEAP technology.

[0173] Embodiments of the present disclosure take an example of a plurality of sub-pixels 100 including a first color sub-pixel 101, a second color sub-pixel 102, and a third color sub-pixel 103, and the first color sub-pixel 101, the second color sub-pixel 102, and the third color sub-pixel 103 constitute one pixel. For example, the first color sub-pixel 101 is a red sub-pixel, the second color sub-pixel 102 is a green sub-pixel, and the third color sub-pixel 103 is a blue sub-pixel. However, embodiments of the present disclosure include but are not limited to this. The number of sub-pixels included in one pixel can be determined as needed, and the light-emitting color of the sub-pixel is not limited to red, green, and blue, and can be determined as needed.

[0174] Embodiments of the present disclosure also provide a display device including any of the display panels described above.

[0175] For example, the display device can be any product or component having a display function, such as a television, a digital camera, a mobile phone, a watch, a tablet computer, a notebook computer, a navigator, or an organic light-emitting diode display device.

[0176] The following points need to be explained:

[0177] (1) Unless otherwise defined, technical terms or scientific terms used herein should be understood as having the commonly understood meaning to those skilled in the art to which the present disclosure belongs.

[0178] (2) In the drawings of the embodiments of the present disclosure, only structures related to the embodiments of the present disclosure are involved, and other structures can be referred to the general design.

[0179] (3) For the sake of clarity, the thickness of layers or regions is exaggerated in the drawings used to describe the embodiments of the present disclosure. It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, it can be "directly" on or under the other element, or there can be an intermediate element.

[0180] (4) The embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0181] The above description is merely a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display panel, comprising: a substrate; a pixel circuit on the substrate; an insulating layer on the pixel circuit; a connection electrode on the insulating layer and electrically connected to the pixel circuit; a first electrode of a light emitting element on the insulating layer; a separation structure comprising a first separation portion; a pixel defining layer comprising a first opening configured to expose at least a portion of the connection electrode; and a second electrode of the light emitting element disposed on the pixel defining layer and connected to the connection electrode through the first opening of the pixel defining layer, wherein the pixel defining layer further comprises a second opening configured to expose at least a portion of the first electrode of the light emitting element to define a light emitting region of the light emitting element, wherein the display panel comprises a display region and a gate-on-array region on an array, the gate-on-array region is located on one side of the display region, a boundary between the display region and the gate-on-array region extends along a first direction, and the connection electrode extends along the first direction. The connection electrode extends along a straight line and has a strip shape, an arc shape, a curve shape, or comprises a plurality of portions each extending along a different straight line and having a strip shape.

2. The display panel of claim 1, wherein, A length of the connection electrode in its extending direction is greater than or equal to a length of the light emitting region adjacent to the connection electrode in the extending direction.

3. The display panel of claim 1 or 2, wherein, Each light emitting region corresponds to one connection electrode, and in the connection electrodes corresponding to the light emitting regions located in the same column, the connection electrodes are arranged alternately or randomly.

4. The display panel according to any one of claims 1-3, wherein, The connection electrodes corresponding to two adjacent light emitting regions are located on different sides of the light emitting regions corresponding thereto.

5. The display panel of claim 4, wherein, The connection electrode comprises two connection electrode portions spaced from each other, and the two connection electrode portions are disposed on opposite sides of the light emitting region, respectively.

6. The display panel according to any one of claims 1-5, wherein, The power supply line is connected to the first electrode of the light emitting element.

7. The display panel of any of claims 1-6, further comprising a power line, wherein, The power supply line comprises a power supply signal line extending along a second direction and a power supply connection line extending along the first direction, the second direction intersects the first direction, and adjacent two columns of light emitting elements share the same power supply connection line.

8. The display panel of claim 7, wherein, The power supply line has a mesh shape.

9. The display panel of claim 8, wherein, The power supply signal line comprises a first widened portion, and the first widened portions of adjacent two power supply signal lines are disposed staggered.

10. The display panel of claim 9, wherein, A plurality of first widened portions are disposed corresponding to light emitting elements emitting the same color light.

11. The display panel of claim 10, wherein, The light emitting elements are provided as a plurality of light emitting elements comprising a first light emitting element, a second light emitting element, and a third light emitting element, the first light emitting element is configured to emit a first color light, the second light emitting element is configured to emit a second color light, the third light emitting element is configured to emit a third color light, the first light emitting element and the second light emitting element are located on the same side of the third light emitting element and arranged along the first direction, and the first widened portion is disposed corresponding to the third light emitting element.

12. The display panel of claim 10 or 11, wherein, The power supply line further comprises a connection bus, and one connection bus corresponds to at least two columns of power supply connection lines.

13. The display panel according to any one of claims 10-12, wherein, The connection bus has a second widened portion, and an extending direction of the second widened portion intersects an extending direction of the first widened portion.

14. The display panel of claim 13, wherein, ​ 15. The display panel according to any one of claims 1-14, wherein, The separation structure further comprises a second separation part configured to disconnect the second electrodes of different sub-pixels.

16. The display panel of claim 15, wherein, The second separation part is in contact with the insulating layer, in contact with the pixel boundary layer, or is an integral structure with the pixel boundary layer.

17. The display panel of any of claims 1-16, wherein, The connection electrode is configured to extend in a direction perpendicular to the moving direction of the evaporation source when the connection electrode is formed in an evaporation process.

18. The display panel of claim 17, wherein, The connection electrode is not provided in a direction parallel to the moving direction of the evaporation source.

19. The display panel of any of claims 1-18, wherein, The display area and the gate driving area on the array are arranged in a second direction, the first direction intersecting the second direction.

20. The display panel of any of claims 1-18, wherein, Pixel circuits of different sub-pixels are connected to different second electrodes to independently control the voltage on the second electrode of each sub-pixel, and the first electrodes of multiple sub-pixels have the same voltage.

21. The display panel of any of claims 1-18, wherein, The light emitting elements are provided as a plurality of sub-pixels, the plurality of sub-pixels including first color sub-pixels, second color sub-pixels, and third color sub-pixels, the first color sub-pixels configured to emit first color light, the second color sub-pixels configured to emit second color light, and the third color sub-pixels configured to emit third color light, At least two of the connection electrodes of the first color sub-pixels, the connection electrodes of the second color sub-pixels, and the connection electrodes of the third color sub-pixels have different lengths in the first direction.

22. The display panel of claim 21, wherein, The length of the connection electrode of the first color sub-pixel in the first direction and the length of the connection electrode of the second color sub-pixel in the first direction are different.

23. The display panel of claim 21 or 22, wherein, The length of the connection electrode of the second color sub-pixel in the first direction and the length of the connection electrode of the third color sub-pixel in the first direction are different.

24. The display panel of any of claims 21-23, wherein, For the same sub-pixel, the ratio of the length of the connection electrode in the first direction to the maximum length of the second opening in the first direction ranges from 0.6 to 1.

5.

25. The display panel of any of claims 21-24, wherein, For the same sub-pixel, the ratio of the maximum length of the second opening in the first direction to the maximum length of the first opening in the first direction ranges from 0.6 to 1.

5.

26. A manufacturing method of a display panel, comprising: forming a pixel circuit on a substrate; forming an insulating layer on the pixel circuit; forming a connection electrode electrically connected to the pixel circuit on the insulating layer; forming a first electrode of a light emitting element on the insulating layer; forming a separation structure, the separation structure comprising a first separation part; forming a pixel boundary layer, the pixel boundary layer comprising a first opening and a second opening, the first opening configured to expose at least a portion of the connection electrode, and the second opening configured to expose at least a portion of the first electrode of the light emitting element to define a light emitting area of the light emitting element; and forming a second electrode of the light emitting element on the pixel boundary layer, the second electrode connected to the connection electrode through the first opening of the pixel boundary layer, ​ The display panel includes a display area and a gate-on-array region, the gate-on-array region is located at one side of the display area, a boundary of the display area and the gate-on-array region extends along a first direction, and the connection electrode extends along the first direction.

27. The method of manufacturing a display panel according to claim 26, wherein, Forming the connection electrode includes: The connection electrode is arranged to extend along a direction perpendicular to a movement direction of a vapor deposition source when the connection electrode is formed by a vapor deposition process.

28. The method of manufacturing a display panel according to claim 26 or 27, wherein, No connection electrode is arranged in a direction parallel to the movement direction of the vapor deposition source.

29. A display device comprising the display panel according to any one of claims 1-25.

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