Method for manufacturing a substrate

Abstract

Disclosed is a method for manufacturing a substrate, comprising the following series of steps: a) using an initial substrate (1) made of polycrystalline silicon carbide, comprising a rough surface (10) having a random distribution of holes; b) forming a filling layer on the rough surface (10) so as to close off at least an upper portion (110) of the holes, the filling layer being made of a material chosen from amorphous silicon, polycrystalline silicon, and graphite; c) flattening the filling layer; d) causing a chemical reaction to take place between a reagent and the flattened filling layer (2') during step c) so as to convert at least the surface of the flattened filling layer (2') into polycrystalline silicon carbide.

Description

[0001] METHOD FOR MANUFACTURING A SUBSTRATE

[0002] technical field

[0003] The invention relates to the technical field of manufacturing processes for a final substrate from an initial substrate of polycrystalline silicon carbide SiC.

[0004] The final substrate can be used, in particular, in the manufacture of:

[0005] - components for high voltage power conversion, for example in the range [600 V — 1770 V], and at high frequency;

[0006] - components for electrical protection, for example in the voltage range [600 V - 1770 V].

[0007] State of the art

[0008] A first method for manufacturing a power component, known from the prior art, involves an initial step using a bulk substrate of single-crystal silicon carbide (SiC), preferably with a 4H polytype. Such a first prior art method is not entirely satisfactory because such bulk substrates of single-crystal SiC are expensive to manufacture and can exhibit crystalline defects that affect the upper epitaxial layers, making component manufacturing costly.

[0009] A second method for manufacturing a power component, known in the prior art, involves a step of initially using a polycrystalline SiC substrate onto which a thin layer of monocrystalline SiC, preferably of polytype 4H, is bonded. The bonding of the thin layer of monocrystalline SiC is generally a direct bond (i.e., a molecular adhesion bond) requiring a very low surface roughness (e.g., on the order of 0.5 nm RMS, root mean square) of the polycrystalline SiC substrate. However, the polycrystalline SiC substrate is quite mechanically hard and chemically inert. Therefore, such a second prior art method is not entirely satisfactory, as it requires mechanical and / or chemical-mechanical polishing of the polycrystalline SiC, which is time-consuming and costly, to obtain a satisfactory surface roughness. Description of the invention

[0010] The invention aims to remedy, in whole or in part, the aforementioned drawbacks. To this end, the invention relates to a method for manufacturing a substrate, comprising the successive steps: a) using an initial substrate of polycrystalline silicon carbide, comprising a rough surface having a random distribution of holes; b) forming a filling layer on the rough surface so as to plug at least an upper part of the holes; the filling layer being made of a material selected from amorphous silicon, polycrystalline silicon, and graphite; c) flattening the filling layer; d) causing a chemical reaction between a reagent and the flattened filling layer during step c) so as to convert, at least superficially, the flattened filling layer into polycrystalline silicon carbide.

[0011] Thus, such a process according to the invention makes it possible to use an initial substrate of inexpensive polycrystalline silicon carbide SiC, having holes with random dimensions (size, depth) in order to modify it into a substrate that can be used to manufacture electronic components.

[0012] According to an alternative not part of the invention, step b) can be carried out with a filling layer made of dense polycrystalline silicon carbide (i.e. free of holes), for example formed by chemical vapor deposition (CVD), in which case step d) is not carried out.

[0013] The method according to the invention may include one or more of the following characteristics.

[0014] According to one feature of the invention, the process comprises the steps: e) forming a flattening layer extending over the filler layer converted at least superficially in step d), the flattening layer preferably being made of a material selected from polycrystalline silicon carbide, polycrystalline aluminum nitride, polycrystalline silicon, or polycrystalline diamond; f) flattening the flattening layer formed in step e) so as to obtain a surface roughness below a predetermined threshold. Thus, an advantage is obtaining a final substrate ready to receive a functional layer (e.g., a nucleation layer) by direct bonding (i.e., by molecular adhesion) onto the flattened flattening layer at the end of step f).

[0015] According to one feature of the invention:

[0016] - step c) is executed so that the upper part of the holes plugged by the flattened filling layer is flush with the rough surface of the initial substrate;

[0017] - the flattening layer formed during step e) extends over the filling layer converted at least superficially during step d), and extends over the rough surface of the initial substrate.

[0018] Thus, one advantage provided is to minimize the amount of material to be converted later in step d) in order to reduce the execution time.

[0019] According to one feature of the invention, step d) is carried out so that the filler layer flattened in step c) is completely converted into polycrystalline silicon carbide.

[0020] Thus, one advantage provided is to simplify the execution of step d).

[0021] According to one feature of the invention, step d) is carried out so that only a superficial part of the filler layer flattened in step c) is converted into polycrystalline silicon carbide.

[0022] Thus, one advantage provided is to reduce the execution time of step d).

[0023] According to one feature of the invention:

[0024] - the material of the filling layer formed during step b) has a melting temperature;

[0025] - step e) is carried out at a temperature above 1000°C and strictly below the melting point.

[0026] Thus, one advantage obtained is to achieve a satisfactory compromise between the rate of formation of the flattening layer (in the case of chemical vapor deposition) and the preservation of a possible part of the filling layer that has not been converted into polycrystalline SiC.

[0027] According to one feature of the invention, step b) is carried out so that the filling layer completely seals the holes. Thus, one advantage provided is the ability to reduce the negative consequences of the holes, such as improving the structural strength of the resulting substrate, improving heat dissipation within the substrate, etc.

[0028] According to one feature of the invention, step b) is carried out by low-pressure chemical vapor deposition.

[0029] Thus, one advantage obtained is to achieve high compliance of the deposit.

[0030] According to one feature of the invention, step c) is carried out by mechanical polishing and / or mechano-chemical polishing.

[0031] According to one feature of the invention, step d) is performed such that:

[0032] - the reagent is chosen from methane CH4 and propane CsHs when the filling layer formed during step b) is made of amorphous silicon or polycrystalline silicon;

[0033] - the reagent is chosen from silane SiH4 and tetramethylsilane CJffoSi when the filling layer formed during step b) is made of graphite.

[0034] Thus, one advantage provided by such reagents is the ability to react chemically with the filling layer material to obtain polycrystalline SiC.

[0035] According to one feature of the invention:

[0036] - the material of the filling layer formed during step b) has a melting temperature;

[0037] - step d) is carried out at a temperature above 1000°C and strictly below the melting point.

[0038] Thus, one advantage provided is to increase the rate of the chemical reaction in step d) while preserving a possible part of the filling layer that has not been converted into polycrystalline SiC.

[0039] According to one feature of the invention, step e) is carried out by chemical vapor deposition.

[0040] Thus, one advantage obtained is to achieve high compliance of the deposit.

[0041] According to one feature of the invention, step f) is carried out by mechanical polishing and / or chemical-mechanical polishing. According to one feature of the invention, step c) is followed by a CT) surface treatment step adapted to remove contaminants and impurities introduced during step c), the CT) step being carried out before step d).

[0042] Thus, one advantage provided is to facilitate the chemical reaction triggered during step d).

[0043] According to one feature of the invention, step f) is followed by a surface treatment step fr) adapted to remove contaminants and impurities introduced during step 9-

[0044] Thus, one advantage provided is to reduce the risks of defect formation within the nucleation layer which is formed subsequently and to prepare the surface for direct bonding (i.e. by molecular adhesion).

[0045] According to one feature of the invention, the process includes a step g) consisting of forming a nucleation layer on the flattened layer in step f), the nucleation layer being made of a material selected from single-crystal silicon carbide, preferably having a 4H polytype, single-crystal silicon, single-crystal gallium nitride, single-crystal aluminum nitride, polycrystalline aluminum nitride, single-crystal diamond, single-crystal gallium oxide Ga2Os, and aluminum boron nitride A1BN.

[0046] Thus, one advantage provided is the ability to prepare the manufacture of an electronic component from the nucleation layer.

[0047] Definitions

[0048] - By "substrate", we mean a self-supporting physical support, made of a crystalline material. A substrate can be a "slice", also called a "wafer" which is generally in the form of a disc cut from an ingot of a crystalline material.

[0049] - By "predetermined threshold", we mean that the surface roughness of the flattened layer during step f) must have, on root mean square, a value low enough to allow direct bonding (i.e., bonding by molecular adhesion).

[0050] - A "flattening layer" is a layer designed to modify the surface topology to create a flat surface (after polishing). - "Chemical Mechanical Polishing" (CMP) is a polishing process that uses:

[0051] (i) a polishing cloth, brought into contact with a free surface of the stack, the polishing cloth and the free surface being classically mobile in rotation around parallel axes of rotation (mechanical interaction);

[0052] (ii) a polishing solution, classically abrasive and corrosive, impregnating the polishing cloth (chemical interaction).

[0053] - By "flush", we mean that the flattened filling layer (closing the upper part of the holes) and the rough surface of the initial substrate are coplanar.

[0054] - By "nucleation layer", we mean a layer forming a crystal seed allowing epitaxial growth.

[0055] Brief description of the drawings

[0056] Other features and advantages will become apparent in the detailed description of different embodiments of the invention, the description being accompanied by examples and references to the accompanying drawings.

[0057] Figure 1 is a schematic cross-sectional view, illustrating a step a) of a process according to the invention.

[0058] Figure 2 is a schematic cross-sectional view, illustrating a step b) of a process according to the invention when the filling layer fills all of the holes.

[0059] Figure 3 is a schematic cross-sectional view, illustrating a step c) of a process according to the invention carried out after step b) illustrated in Figure 2, the flattened filling layer extending over the rough surface of the initial substrate.

[0060] Figure 4 is a schematic cross-sectional view, illustrating a step d) of a process according to the invention, carried out after step c) illustrated in Figure 3, the flattened filling layer being fully converted into polycrystalline SiC.

[0061] Figure 5 is a schematic cross-sectional view, illustrating a step e) of a process according to the invention, carried out after step d) illustrated in Figure 4.

[0062] Figure 6 is a schematic cross-sectional view, illustrating a step f) of a process according to the invention, carried out after step e) illustrated in Figure 5.

[0063] Figure 7 is a schematic cross-sectional view, illustrating a step g) of a process according to the invention, carried out after step f) illustrated in Figure 6. Figure 8 is a schematic cross-sectional view, illustrating a step c) of a process according to the invention carried out after step b) illustrated in Figure 2, the flattened filling layer flush with the rough surface of the initial substrate.

[0064] Figure 9 is a schematic cross-sectional view, illustrating a step d) of a process according to the invention, carried out after step c) illustrated in Figure 8, the flattened filling layer (flush with the rough surface) being fully converted into polycrystalline SiC.

[0065] Figure 10 is a schematic cross-sectional view, illustrating a step e) of a process according to the invention, carried out after step d) illustrated in Figure 9.

[0066] Figure 11 is a schematic cross-sectional view, illustrating a step f) of a process according to the invention, carried out after step e) illustrated in Figure 10.

[0067] Figure 12 is a schematic cross-sectional view, illustrating a step g) of a process according to the invention, carried out after step f) illustrated in Figure 11.

[0068] Figure 13 is a schematic cross-sectional view, illustrating a step d) of a process according to the invention, carried out after step c) illustrated in Figure 8, the flattened filling layer (flush with the rough surface) being partially converted into polycrystalline SiC.

[0069] Figure 14 is a schematic cross-sectional view, illustrating a step e) of a process according to the invention, carried out after step d) illustrated in Figure 13.

[0070] Figure 15 is a schematic cross-sectional view, illustrating a step f) of a process according to the invention, carried out after step e) illustrated in Figure 14.

[0071] Figure 16 is a schematic cross-sectional view, illustrating a step g) of a process according to the invention, carried out after step f) illustrated in Figure 15.

[0072] Figure 17 is a schematic cross-sectional view, illustrating a step b) of a process according to the invention where the filling layer fills only an upper part of the holes.

[0073] Figure 18 is a schematic cross-sectional view, illustrating a step c) of a process according to the invention carried out after step b) illustrated in Figure 17, the flattened filling layer extending over the rough surface of the initial substrate.

[0074] Figure 19 is a schematic cross-sectional view, illustrating a step d) of a process according to the invention carried out after step c) illustrated in Figure 18, the flattened filling layer being fully converted into polycrystalline SiC.

[0075] Figure 20 is a schematic cross-sectional view, illustrating a step e) of a process according to the invention carried out after step d) illustrated in Figure 19.

[0076] Figure 21 is a schematic cross-sectional view, illustrating a step f) of a process according to the invention carried out after step e) illustrated in Figure 20. Figure 22 is a schematic cross-sectional view, illustrating a step g) of a process according to the invention carried out after step f) illustrated in Figure 21.

[0077] Figure 23 is a schematic cross-sectional view, illustrating a step c) of a process according to the invention carried out after step b) illustrated in Figure 17, the flattened filling layer flush with the rough surface of the initial substrate.

[0078] Figure 24 is a schematic cross-sectional view, illustrating a step d) of a process according to the invention carried out after step c) illustrated in Figure 23, the flattened filling layer (flush with the rough surface) being fully converted into polycrystalline SiC.

[0079] Figure 25 is a schematic cross-sectional view, illustrating a step e) of a process according to the invention carried out after step d) illustrated in Figure 24.

[0080] Figure 26 is a schematic cross-sectional view, illustrating a step f) of a process according to the invention carried out after step e) illustrated in Figure 25.

[0081] Figure 27 is a schematic cross-sectional view, illustrating a step g) of a process according to the invention carried out after step f) illustrated in Figure 26.

[0082] Figure 28 is a schematic cross-sectional view, illustrating step d) of a process according to the invention carried out after step c) illustrated in Figure 3, the flattened filling layer

[0083] (extending over the rough surface of the initial substrate) being partially converted into polycrystalline SiC.

[0084] It should be noted that the drawings described above are schematic and not necessarily to scale for the sake of readability and to simplify understanding. The sections are made along the normal to the surface of the original substrate.

[0085] Detailed description of the implementation methods

[0086] Identical elements or elements performing the same function will bear the same references for the different embodiments, for the sake of simplification.

[0087] An object of the invention is a method for manufacturing a substrate, comprising the successive steps: a) using an initial substrate 1 of polycrystalline silicon carbide, comprising a rough surface 10 having a random distribution of holes 11; b) forming a filling layer 2 on the rough surface 10 so as to plug at least an upper part 110 of the holes 11; the filling layer 2 being made of a material selected from amorphous silicon, polycrystalline silicon, and graphite; c) flattening the filling layer 2; d) causing a chemical reaction between a reagent and the flattened filling layer 2' during step c) so as to convert at least superficially the flattened filling layer 2' into polycrystalline silicon carbide.

[0088] Step a)

[0089] Step a) consists of using an initial substrate 1 made of polycrystalline silicon carbide, comprising a rough surface 10 having a random distribution of holes 11. By "random distribution" is meant that the holes 11 each have a random size and random depth. The holes 11 are crystalline defects, generally caused by sintering.

[0090] Step b)

[0091] Step b) consists of forming a filler layer 2 on the rough surface 10 of the initial substrate 1 so as to plug at least an upper part 110 of the holes 11. Step b) can be carried out so that the filler layer 2 completely plugs the holes 11.

[0092] The filling layer 2 formed during step b) is made of a material chosen from amorphous silicon, polycrystalline silicon, and graphite.

[0093] The material of the filling layer 2 formed in step b) has a melting point. Amorphous silicon has a melting point of approximately 1150°C. Polycrystalline silicon has a melting point of approximately 1400°C. Graphite has a melting point of approximately 3650°C.

[0094] Step b) is advantageously carried out by low-pressure chemical vapor deposition. Conformity of the deposition is not a necessary condition for carrying out step b).

[0095] Step c)

[0096] Step c) consists of flattening the filling layer 2 formed during step b).

[0097] According to a first embodiment, step c) is carried out so that the upper part 110 of the holes 11 sealed by the flattened filling layer 2' is flush with the rough surface 10 of the initial substrate 1.

[0098] According to a second embodiment, step c) is carried out so that the flattened filling layer 2' extends over the rough surface 10 of the initial substrate 1.

[0099] Step c) is advantageously performed by mechanical polishing and / or chemical-mechanical polishing. By way of non-limiting example, chemical-mechanical polishing can be performed with a commercially available polishing pad (e.g., DuPont's ICI 000™) and a commercially available polishing slurry (e.g., DuPont's Nanopure™). Step c) is advantageously followed by a suitable surface treatment step (CT) to remove contaminants and impurities introduced during step c). The CT) step is performed before step d). By way of non-limiting example, the CT) step can be performed using hydrofluoric acid (HF) or an RCA-type solution known to those skilled in the art.

[0100] Step d)

[0101] Step d) consists of inducing a chemical reaction between a reagent and the flattened filling layer 2' in step c). The reagent and the nature of the chemical reaction are chosen so as to convert at least superficially the flattened filling layer 2' in step c) into polycrystalline silicon carbide.

[0102] The reagent is advantageously chosen from methane (CH4) and propane (C3H8) when the filling layer 2 formed in step b) is made of amorphous silicon or polycrystalline silicon. A first chemical reaction can be written: Si + CFF SiC + 2H2. A second chemical reaction can be written: 3Si + C3H8 3SiC + 4H2. The reagent is advantageously chosen from silane SiH4 and tetramethylsilane C4Hi2Si when the filling layer 2 formed in step b) is made of graphite. A third chemical reaction can

[0103] According to a first embodiment, step d) is carried out so that the flattened filling layer 2' in step c) is completely converted into polycrystalline silicon carbide.

[0104] According to a second embodiment, step d) is carried out so that only a superficial part of the flattened filling layer 2' in step c) is converted into polycrystalline silicon carbide.

[0105] Step d) is advantageously carried out at a temperature above 1000°C and strictly below the melting temperature of the material of the filling layer 2 formed during step b).

[0106] Step e)

[0107] The process advantageously includes a step e) consisting of forming a leveling layer 3 extending over the converted filling layer 2” at least superficially during step d).

[0108] When step c) is carried out so that the upper part 110 of the holes 11 plugged by the smoothed filler layer 2' is flush with the rough surface 10 of the initial substrate 1, then the smoothing layer 3 formed in step e) extends over the converted filler layer 2” at least superficially in step d), and extends over the rough surface 10 of the initial substrate 1. When step c) is carried out so that the smoothed filler layer 2' extends over the rough surface 10 of the initial substrate 1, then the smoothing layer 3 formed in step e) extends entirely over the converted filler layer 2” at least superficially in step d).

[0109] Step e) is advantageously carried out so that the leveling layer 3 is made of a material chosen from:

[0110] - polycrystalline silicon carbide,

[0111] - polycrystalline aluminum nitride,

[0112] - polycrystalline silicon,

[0113] - polycrystalline diamond.

[0114] Step e) is advantageously carried out by chemical vapor deposition. Step e) is advantageously carried out at a temperature above 1000°C and strictly below the melting temperature of the filler layer material 2 formed in step b). Step e) can be carried out at a temperature between 900°C and 1300°C, preferably between 1000°C and 1200°C for polycrystalline SiC. Step e) can be carried out at a pressure between 10 Torr and 100 Torr. It is also possible to reduce the pressure to between 1 and 10 Torr.

[0115] Step f)

[0116] The process advantageously includes a step f) of flattening the flattening layer 3 formed in step e) so as to obtain a surface roughness below a predetermined threshold. By way of non-limiting example, the predetermined threshold may be set at 0.5 nm RMS.

[0117] Step f) is advantageously performed by mechanical polishing and / or chemical mechano-polishing. By way of non-limiting example, chemical mechano-polishing can be performed with a commercially available polishing cloth (e.g., Epie Power™ from Entregris) and a commercially available polishing solution (e.g., SC3000 from Entregris for polycrystalline SiC).

[0118] Step f) is advantageously followed by a suitable surface treatment step fr) to remove contaminants and impurities introduced during step f). By way of non-limiting example, step fr) may be carried out using hydrofluoric acid HF or an RCA-type solution known to those skilled in the art. Step fr) is carried out before step g), see below. Step g)

[0119] The process advantageously includes a step g) consisting of forming a nucleation layer 4 on the flattened planar layer 3' during step f). If necessary, step g) is carried out after step fo). By way of non-limiting example, the nucleation layer 4 can be formed on the flattened planar layer 3' by a layer transfer, obtained for example by Smart-Cut™ technology or by bonding followed by thinning.

[0120] The nucleation layer 4 is advantageously made of a material chosen from:

[0121] - single-crystal silicon carbide, preferably possessing a 4H polytype,

[0122] - monocrystalline silicon,

[0123] - single-crystal gallium nitride,

[0124] - single-crystal aluminum nitride,

[0125] - polycrystalline aluminum nitride,

[0126] - the single-crystal diamond,

[0127] - monocrystalline gallium oxide (Ga2O3),

[0128] - boron aluminum nitride A1BN.

[0129] The invention is not limited to the embodiments described. A person skilled in the art is able to consider their technically operative combinations and to substitute equivalents for them.

Claims

DEMANDS 1. A method for manufacturing a substrate, comprising the successive steps: a) using an initial substrate (1) of polycrystalline silicon carbide, comprising a rough surface (10) having a random distribution of holes (11); b) forming a filling layer (2) on the rough surface (10) so as to close at least an upper part (110) of the holes (11); the filling layer (2) being made of a material selected from amorphous silicon, polycrystalline silicon, and graphite; c) flattening the filling layer (2); d) causing a chemical reaction between a reagent and the flattened filling layer (2') during step c) so as to convert at least superficially the flattened filling layer (2') into polycrystalline silicon carbide.

2. A method according to claim 1, comprising the steps: e) forming a flattening layer (3) extending over the converted filling layer (2”) at least superficially during step d), the flattening layer (3) preferably being made of a material selected from polycrystalline silicon carbide, polycrystalline aluminum nitride, polycrystalline silicon, polycrystalline diamond; f) flattening the flattening layer (3) formed during step e) so as to obtain a surface roughness below a predetermined threshold.

3. A method according to claim 2, wherein: - step c) is carried out so that the upper part (110) of the holes (11) plugged by the flattened filling layer (2') is flush with the rough surface (10) of the initial substrate (1); - the flattening layer (3) formed during step e) extends over the converted filling layer (2”) at least superficially during step d), and extends over the rough surface (10) of the initial substrate (1).

4. A method according to any one of claims 1 to 3, wherein step d) is carried out so that the flattened filling layer (2') in step c) is completely converted into polycrystalline silicon carbide.

5. A method according to any one of claims 1 to 3, wherein step d) is carried out so that only a superficial part of the flattened filling layer (2') in step c) is converted into polycrystalline silicon carbide.

6. A method according to claim 5 in combination with claim 2, wherein: - the material of the filling layer (2) formed during step b) has a melting temperature; - step e) is carried out at a temperature above 1000°C and strictly below the melting point.

7. A method according to any one of claims 1 to 6, wherein step b) is carried out so that the filling layer (2) completely seals the holes (11).

8. A method according to any one of claims 1 to 7, wherein step b) is carried out by low-pressure chemical vapor deposition.

9. A method according to any one of claims 1 to 8, wherein step c) is carried out by mechanical polishing and / or mechano-chemical polishing.

10. A method according to any one of claims 1 to 9, wherein step d) is carried out such that: - the reagent is chosen from methane CH4 and propane CsHs when the filling layer (2) formed during step b) is made of amorphous silicon or polycrystalline silicon; - the reagent is chosen from silane SiH4 and tetramethylsilane C4Hi2Si when the filling layer (2) formed during step b) is made of graphite.

11. A method according to any one of claims 1 to 10, wherein: - the material of the filling layer (2) formed during step b) has a melting temperature; - step d) is carried out at a temperature above 1000°C and strictly below the melting point. 15 12. A method according to claim 2 or according to any one of claims 3 to 11 in combination with claim 2, wherein step e) is carried out by chemical vapor deposition.

13. A method according to claim 2 or according to any one of claims 3 to 12 in combination with claim 2, wherein step f) is carried out by mechanical polishing and / or chemical mechano-polishing.

14. A method according to any one of claims 1 to 13, wherein step c) is followed by a surface treatment step CT) adapted to remove contaminants and impurities introduced during step c), step CT) being carried out before step d).

15. A method according to claim 2 or according to any one of claims 3 to 14 in combination with claim 2, wherein step f) is followed by a surface treatment step FT) adapted to remove contaminants and impurities introduced during step f).

16. A method according to claim 2 or according to any one of claims 3 to 15 in combination with claim 2, comprising a step g) of forming a nucleation layer (4) on the flattened planing layer (3') in step f), the nucleation layer (4) being made of a material selected from single-crystal silicon carbide, preferably having a 4H polytype, single-crystal silicon, single-crystal gallium nitride, single-crystal aluminum nitride, polycrystalline aluminum nitride, single-crystal diamond, single-crystal gallium oxide Ga2O3, and aluminum boron nitride A1BN.

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