Heat dissipation in integrated circuit packages
The 3D IC package design with manifolds and heat transfer fluid circulation addresses uneven cooling in 3D ICs, ensuring efficient and uniform heat dissipation, enhancing reliability and performance by preventing thermal hotspots.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-22
- Publication Date
- 2026-04-02
AI Technical Summary
Conventional heat dissipation methods for 3D IC packages are inadequate, leading to uneven cooling, thermal hotspots, and potential damage due to excessive heat accumulation, particularly in lower layers, which can cause performance degradation and reliability issues.
A 3D IC package design that incorporates manifolds extending through aligned solder cavities between stacked dies, utilizing a heat transfer fluid to circulate and dissipate heat uniformly across the package, with strategically varied gaps and openings to align with heat generation characteristics.
The solution provides efficient, uniform cooling, preventing thermal hotspots and ensuring reliable operation by maintaining optimal thermal management and reducing the risk of overheating, while minimizing weight and structural complexity.
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Figure IN2025051534_02042026_PF_FP_ABST
Abstract
Description
HEAT DISSIPATION IN INTEGRATED CIRCUIT PACKAGESBACKGROUND
[0001] Integrated circuits (ICs) are one of the important components in electronic systems that are designed to perform a range of functions, such as data processing, memory management, and signal transmission. In this regard, the ICs incorporates a large number of components, such as transistors, resistors, capacitors, and the like. Traditionally, ICs have been fabricated on a single die, which limits their capacity in terms of performance, speed, and storage. However, as technological demands for higher storage capacities, faster data processing speeds, and improved performance continue to grow, new approaches have emerged to overcome these limitations.
[0002] One such approach is the development of stacked IC packages, which are commonly referred to as three-dimensional integrated circuits (3D-ICs). The 3D-ICs are built by stacking a plurality of semiconductor dies on top of one another within a single package. Such stacking significantly increases the functional density of the IC, allowing for more components, such as transistors and memory cells, to be integrated into a smaller footprint. In other words, each die of the plurality of dies in the stack incorporates a large number of transistors, which are responsible for executing various operations. The stacking of the dies allows for an increased number of components, such as transistors, resistors, and capacitors, and the like to be integrated into the package, further enhancing the functionality and processing power of the 3D-IC. Each of the stacked semiconductor dies performs specific functions and can vary in design depending on its role in the overall system.
[0003] Each of the dies within the stack are interconnected using one or more through-silicon vias (TSVs). The TSVs pass through each die of the plurality of dies, allowing signals and power to be transmitted between dies without the need for long horizontal traces.BRIEF DESCRIPTION OF DRAWINGS
[0004] The detailed description is described with reference to the accompanying figures. It should be noted that the description and figures are merely examples of the present subject matter and are not meant to represent the subject matter itself.
[0005] Figure 1 illustrates an Integrated Circuit (IC) package, according to an example implementation of the present subject matter.
[0006] Figure 2 illustrates of an IC package, according to an example implementation of the present subject matter.
[0007] Figure 3 illustrates a plurality of manifolds of an IC package, according to an example implementation of the present subject matter.
[0008] Figure 4A illustrates a perspective view of a manifold of an Integrated Circuit (IC) package, according to an example implementation of the present subject matter.
[0009] Figure 4B illustrates a side view of a manifold of an Integrated Circuit (IC) package, according to an example implementation of the present subject matter.
[0010] Figure 4C illustrates a front view of a manifold of an Integrated Circuit (IC) package, according to an example implementation of the present subject matter.
[0011] Figure 5A, 5B, and 5C illustrates temperature variation of a heat transfer fluid across an IC package, according to an example implementation of the present subject matter.
[0012] Figure 6A and 6B illustrates temperature variation of a heat transfer fluid across an IC package, according to an example implementation of the present subject matter.
[0013] Figure 7A and 7B illustrates temperature variation of a plurality of dies across an IC package, according to an example implementation of the present subject matter.
[0014] Figure 8A and 8B illustrates temperature variation of a plurality of dies across an IC package, according to an example implementation of the present subject matter.
[0015] Figure 9 illustrates a heat transfer fluid velocity across an IC package, according to an example implementation of the present subject matter.
[0016] Figure 10A, 10B, and 10C illustrates a heat transfer fluid velocity across an IC package, according to an example implementation of the present subject matter.
[0017] Figure 11 illustrates a method for cooling an IC package, according to an example implementation of the present subject matter.
[0018] Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements. The figures are not necessarily to scale, and the size of some parts may be exaggerated to more clearly illustrate the example shown. Moreover, the drawings provide examples and / or implementations consistent with the description; however, the description is not limited to the examples and / or implementations provided in the drawings.DETAILED DESCRIPTION
[0019] Integrated circuits (ICs) are designed to meet demands for high power density, high bandwidth, and low power consumption. To achieve this, multiple dies are stacked in a three-dimensional structure. Accordingly, the stacked ICs are referred to as 3D ICs. In the 3D ICs, each die corresponds to a die. Each die may be densely populated with components, such as transistors, resistors, capacitors and the like. The stacking of these dies increases performance by reducing the distance between components, which shortens signal paths.
[0020] Further, the 3-D ICs may include a substrate and an interpose. The substrate provides a mechanical foundation by supporting the stackeddies by providing a rigid and stable base, preventing them from shifting or becoming dislodged during handling, transportation, or operation. The interposer may be configured to form an intermediate layer or structure that provides electrical connections between 3D IC stack and any other semiconductor chips mounted on interposer. In order to facilitate electrical connection between each of the plurality of dies, the 3D ICs may include a Plurality of Through-silicon vias (TSVs). The TSVs facilitates in signal transmission between dies. The TSVs pass through the plurality of dies. The TSVs facilitates communication across multiple layers without requiring large horizontal traces, which would increase latency.
[0021] Such compact arrangement of dies in a 3D arrangement leads to a significant increase in power density. As each die contains densely packed transistors and other components, the overall power consumption increases during operation. Accordingly, during the operation, each of these dies generates heat. The power dissipated during transistor operation may be converted to heat, which increases the temperature of each of the plurality of dies. The increase in the temperature by each layer of plurality of dies accumulates, creating thermal hotspots. These hotspots can reduce the performance of the IC by slowing down the switching speed of transistors. Additionally, excessive heat can cause permanent damage to the IC by degrading materials or causing physical stress due to thermal expansion. This leads to issues like delamination or cracking, which affect the reliability of the IC dies using device. Therefore, during the operation, heat will have to be dissipated from the plurality of dies.
[0022] To dissipate the heat generated by the plurality of dies, conventionally, a heat sink may be coupled to a last IC of the plurality of ICs in the stack. The last IC may be an IC that may be at a farther distance to the substrate than other ICs. For instance, in a vertically stacked 3D IC, the heat sink may be positioned over the topmost IC. The heat sink may be made of a thermally conductive material, such as aluminium, copper, andthe like. The heat sink absorbs the heat from the IC package and transfers the heat to the surrounding environment. However, the effectiveness of the heat sink may be limited by its location on the topmost layer of the IC. Since the heat sink may only provide at the last IC, the heat dissipated from the ICs that are nearer to the IC may be higher, while the heat dissipated from the ICs higher up may be less. This may result in uneven cooling. Additionally, the lowermost layers generally generate higher heat, and in conventional scenarios, effective cooling of the lowermost layers may not take place. Consequently, this heat increase may cause damage, leading to performance degradation, potential failures, or reduced lifespan of the 3D IC stack.
[0023] In conventional techniques, the primary focus remains on using a heat sink. However, as 3D IC package are densely packed and their power consumption may be higher, the conventional techniques may prove insufficient to dissipate heat from the IC package.
[0024] The present subject matter relates to an Integrated Circuit (IC) package that includes a three-dimensional stack of plurality of dies. With the present subject matter, heat can be efficiently and uniformly dissipated from the plurality of dies. Therefore, the present subject matter prevents overheating of the ICs and thereby, eliminating any damage caused to the ICs due to such overheating.
[0025] In an example, an IC package may include a plurality of dies. Each die may correspond to an IC-ch iplet. Each die may have two surfaces, such as a first surface and a second surface. The first surface may be opposite the second surface. Each of the plurality of dies are stacked such that a first surface of a die may face a second surface of an adjacent die with a gap being formed between the facing surfaces of the adjacent dies. In an example, the stacking may be done along a vertical direction, where one die may be stacked over another die. For instance, there may be a first die having a first surface and a second surface, and a second die alsohaving a first surface and a second surface. The second die may be stacked over the first die in a vertical arrangement. Particularly, the second surface of the first die and the first surface of the second die may face each other. A gap may be formed between the second surface of the first die and the first surface of the second die, allowing for separation between the second surface of the first die and the first surface of the second die.
[0026] The pluralities of dies are interconnected and secured using through-silicon vias (TSVs). The TSVs pass through each die of plurality of dies. These TSVs provide electrical connections between the layers plurality of dies in the stack. Each die may include with a plurality of solder cavities. The solder cavities are aligned with corresponding cavities on adjacent dies, forming a through openings that span the entire stack of the plurality of dies. In an example, each soldering cavity of the plurality of soldering cavity in a one die may be aligned with the corresponding each solder cavities of plurality of solder cavities. The aligned solder cavities in each die of the plurality of dies forms a through opening. The TSVs passes through the through openings of the plurality of dies.
[0027] The IC package may include at least one manifold that extends through the continuous through openings formed by the aligned solder cavities. Each manifold of the at least one manifold includes at least one opening. For instance, the at least one manifold include an opening at the proximal end to receive a heat transfer fluid. The at least one manifold may include another opening at a distal end of the at least one manifold. In an example, at least one opening comprises an opening at the distal end and at least one opening between a proximal end and a distal end of the at least one manifold. The at least one opening may be in fluid communication with the gap formed between the adjacent dies of the plurality of dies. The heat transfer fluid may be circulatable through the gaps formed between the adjacent dies. In an example, an opening may be provided at the distal end of the manifold. The opening may face the gap formed between the first dieand the second die. Similarly, there may be a third die, and a fourth die stacked above the first and second dies. The gap between the third die and the fourth die may be aligned with an opening provided between the proximal and distal ends of the manifold for fluid communication.
[0028] In an example, the IC package may include an inlet port and an outlet port. The inlet port may be adapted to receive the heat transfer fluid. The received heat transfer fluid may be circulatable through the at least one manifold. The at least one opening of the at least one manifold in fluid communication with the gap facilitates in transfer of heat transfer fluid to gap between the adjacent dies. As the heat transfer fluid moves through these gaps. The heat transfer fluid absorbs the heat generated by the dies and cools the adjacent dies. The heated fluid exits the stack through the outlet port. For instance, the heat transfer fluid may be circulated, by way of a pump, through the inlet port. The inlet port delivers the received heat transfer fluid to at least one manifold. The heat transfer fluid flow through the opening at the proximal end of the at least one manifold. The heat transfer fluid entered the at least one manifold exits the at least one manifold through at least one opening between the proximal end and distal end of the at least one manifold corresponding to the gap of the identified heat generating dies of plurality of dies. In another embodiment the heat transfer fluid exits the at least one manifold through the at least one opening at the distal end of the at least one manifold. In yet another embodiment the heat transfer fluid exits the at least one manifold through at least one opening at the distal end and at least one opening between the proximal end and distal end of the at least one manifold aligned with the gap formed by the two adjacent dies. The heat transfer fluid then flows to dissipate the heat from the die. The heat transfer fluid further exits the dies through the outlet port to a reservoir. At the reservoir the heat transfer may be cooled. The heat transfer fluid continuously circulated repeating as explained above. The gap formed between the adjacent dies of the plurality of dies varies corresponding to the heat generated by plurality of dies. For instance, theheat generated at on particular die of the plurality of the dies then the dimension of the gap between that particular die varies to accommodate the efficient heat dissipation of that particular die of the plurality of dies. The dimension of the gap varies is strategically determined based on the thermal output of the adjacent dies, ensuring effective heat dissipation. This configuration enhances thermal management within the package, contributing to improved performance and reliability of the integrated circuit assembly. In one aspect the height between the two adjacent dies of the plurality of dies varies corresponding to the heat generated by the particular die of the plurality of die. In another aspect the height and width of the gap formed between the adjacent dies of the plurality of dies varies correspond to the heat generated by the particular adjacent dies. Correspondingly the opening on the at least one manifold may align with the varying gap between the adjacent die of the plurality of the dies.
[0029] In example, the IC package may include a first manifold and a second manifold. The first manifold and the second manifold may be positioned along the width direction of the IC package. This arrangement may allow the heat transfer fluid to circulate across multiple regions along the width of the IC package, enabling efficient heat dissipation across the width of the stacked dies.
[0030] In another example, the IC package may include a third manifold and a fourth manifold in addition to the first manifold and the second manifold as explained above. The third manifold and the fourth manifold may be displaced along the width direction of the IC package. Furthermore, the first manifold and the third manifold are displaced along the length direction of the IC package, while the second manifold and the fourth manifold are similarly displaced along the length direction of the IC package. This configuration depicts that the manifold may be uniformly disposed in the plurality of through openings and uniformly facilitate the flow of the heat transfer fluid to flow between the adjacent semiconductor diesto dissipate the heat from the corresponding die of the plurality of dies. Additionally, each manifold of the at least one manifold in the IC package may be made of copper. The at least one manifold may have a diameter ranging from 50 pm to 2100 pm, with at least one opening having a dimension between 25 pm and 200 pm. The dimensions of the through openings formed by the solder cavities may be varied depending on the thermal load generated by the dies.
[0031] In another embodiment of the present subject matter, the IC package may include a first manifold and a third manifold. The first manifold and the third manifold are displaced along the length direction of the IC package.
[0032] The heat transfer fluid used in the present subject matter may be a dielectric fluid. Examples of such dielectric fluids include Shell Diala S4, XG Galden, Fluorinert, or Opteon SF33. These fluids are selected based on their ability to effectively transfer heat without interfering with the electrical properties of the IC package.
[0033] The circulation of the heat transfer fluid as explained above in present subject matter eliminates the heat sinks. The heat transfer fluid in the present subject matter flow through the gap formed between the adjacent dies. The flow of heat transfer fluid dissipates the heat from the dies. The heat transfer fluid uniformly cools the die by dissipating the heat from the dies unlike the conventional techniques where the dies near the heat sink are cooled better than those away from the heat sink.
[0034] The use of at least one manifold and circulating heat transfer fluid offers a more effective cooling solution. By circulating the fluid directly through the gaps between the dies, this approach provides more uniform cooling across the die. Therefore, the present subject matter increases efficiency of the heat dissipation. The present subject matter eliminates any need of external fan to dissipate heat.
[0035] In the present subject matter, at least one manifold includes at least one opening for the flow of heat transfer fluid. The at least one opening can be selectively aligned with the gaps between the plurality of dies based on their heat generation characteristics. For example, if certain dies, such as the ultimate and penultimate dies, generate higher heat in specific regions, the manifold can be positioned in the solder cavities near those high-heat generation areas. The openings of the manifold can be aligned with the gaps between the corresponding adjacent dies to direct the heat transfer fluid to these regions for efficient cooling. In yet another example, if the bottommost die in the stack generates more heat in a particular spot, the manifold can be positioned in the through opening near that high-heat area, allowing the heat transfer fluid to be delivered to the corresponding gap. The fluid then efficiently dissipates heat from that specific location. The present subject matter flexibility enables targeted cooling of areas with higher thermal demands, ensuring optimal heat dissipation across different regions of the IC package
[0036] In the present subject matter, the gap between the adjacent dies of the plurality varies correspond to the heat generated adjacent dies of the plurality of dies. The varying gaps between the adjacent dies facilitates the efficient flow of the heat transfer fluid to dissipate the heat from the corresponding die generating high heat. Correspondingly the opening in the manifold aligns with the varying gap between the dies.
[0037] The present subject matter reduces the overall weight of the Integrated Circuit (IC) package by equipping only the required solder cavities with the manifold for heat transfer. The remaining solder cavities, which are not involved in the thermal management process, are left as dummy cavities. This selective use of the manifold ensures efficient heat dissipation where necessary while minimizing the structural complexity and weight of the IC package. By reducing the number of active manifold connections, the design optimizes both thermal performance and materialusage, resulting in a lighter and more efficient IC package. The present subject matter also eliminates the dependency of heat sink which also reduces the overall size and weight of the packaging of 3D IC.
[0038] In the present subject matter, the manifold within the plurality of dies ensures that it does not impede the functionality of other components situated on the plurality of dies. The design of the present subject matter is optimized to prevent any hindrance to the arrangement and operation of adjacent components, which may include transistors, capacitors, resistors, inductors, and other components on the integrated circuits. The present subject matter maintains an effective spatial configuration. Furthermore, the design the present subject matter is such that it does not necessitate any alteration to the positioning of components across the plurality of dies. The present subject matter facilitates seamless integration of the manifold without requiring modifications to the established layout, thereby preserving the overall integrity and performance.
[0039] In the present subject matter, the integration of the manifold, solder cavities, and TSVs ensures that the cooling system may be both effective and efficient. The present subject matter addresses the limitations of conventional thermal management solutions by providing a more reliable and uniform cooling method for 3D ICs.
[0040] Further, the continuous circulating the heat transfer fluid and removing the absorbed heat, the present subject matter prevents the formation of thermal hotspots. The present subject matter improves the performance and reliability of the IC package, making it suitable for high- performance and high-density applications.
[0041] The present subject matter utilizing existing solder cavities for accommodating the at least one manifold, thereby avoiding modifications to the Integrated Circuit (IC) design such as drilling new openings. The present subject matter maintains the original design integrity of the IC packagewithout introducing additional complexity or requiring structural changes. By employing the pre-existing solder cavities, the design remains straightforward and uncomplicated. This results in a simplified integration process for the cooling system, eliminating the need for extensive redesign efforts and reducing associated manufacturing complexities. Thus, the present subject matter enables efficient cooling while preserving the design simplicity and reliability of the IC package
[0042] Figure 1 illustrates a base model of an Integrated Circuit (IC) package 100, according to an example implementation. Figure 2 illustrates a block diagram of an Integrated Circuit (IC) package 100, according to an example implementation. For the sake of brevity, figure 1 and figure 2 are explained in conjunction with each other. The IC package 100 may include a plurality of dies 202. Each of the plurality of dies 202 may have a first surface 218 and a second surface 220. The plurality of dies 202 may be stacked to form a three-dimensional stack. The three-dimensional stack may be formed by placing one die over another in a vertical configuration, aligning the first surface of a die with the second surface of an adjacent die. Alternatively, the dies may be arranged in a horizontal configuration, where each die is placed next to another along the same level, ensuring that the first surface of one die faces the second surface of the adjacent die where the first surface 218 of one die of the plurality of dies 202 faces the second surface 220 of an adjacent die of the plurality of dies 202. The adjacent dies 202 are arranged such that the facing surfaces of the first surface 218 and the second surface 220 have a gap 208 formed between them. Accordingly, a plurality of gaps 208 are formed between adjacent dies of the plurality of dies 202. For example, consider a first die and a second die from the plurality of dies 202. The first die has a first surface 218 and a second surface 220, and the second die similarly has a first surface 218 and a second surface 220. The first surface 218 of the second die is positioned to face the second surface 220 of the first die, creating a gap 208 between the two adjacent dies. This gap 208 is formed specifically between the firstsurface 218 of the second die and the second surface 220 of the first die. In essence, the gap 208 is established between the adjacent dies.
[0043] The dimensions of the gap 208 between adjacent dies 202 in the integrated circuit package 100 are strategically determined based on the thermal output generated by these dies. The dimension of the gap 208 varies to facilitate the effective heat dissipation, which is crucial for maintaining optimal thermal management within the IC package. By addressing the specific thermal characteristics of each die, the IC package enhances overall performance and reliability of the integrated circuit assembly, reducing the risk of overheating and associated failures.
[0044] In one aspect of the design, the height of the gap between two adjacent dies varies in direct response to the heat generated by a particular die. For instance, dies that produce higher thermal output will have greater gaps, allowing for increased flow of the heat transfer fluid. The varying height of the gap 208 facilitates in heat dissipation and also contributes to maintaining the integrity of the electrical connections between the dies.
[0045] In another aspect, both the height and width of the gap between adjacent dies are adjusted based on the heat generation of the particular adjacent dies. This variation ensures that each gap is optimized for the enhanced heat dissipation on the particular die of the plurality of dies. The varying dimension of the gap 208 between the adjacent dies of the plurality of dies 202 facilitates a more efficient thermal pathway, reducing localized hotspots that could potentially lead to performance degradation.
[0046] Moreover, the openings in at least one manifold are designed to align precisely with the varying dimensions of the gap between the adjacent dies to facilitates enhanced and effective removal of heat from the IC package.
[0047] The plurality of dies 202 may be electrically connected using a plurality of through-silicon vias (TSVs) 210. Each TSV 210 may be connected to a die of the plurality of dies 202, providing electrical connectivity across the entire IC stack. In addition to electrical connection,the plurality of TSVs 210 also secures the plurality of dies 202 together, ensuring that the dies remain structurally aligned within the three- dimensional stack while facilitating electrical connection between them.
[0048] The IC package 100 may further includes a plurality of solder cavities 204 provided on each of the plurality of dies 202. The plurality of solder cavities 204 on one die 202 may be aligned with the corresponding plurality of solder cavities 204 on the adjacent die 202. This alignment forms a plurality of through openings across the three-dimensional stack of the plurality of dies 202. For example, the first die may have a plurality of solder cavities, and the second die may also have a plurality of solder cavities 204. Each solder cavity on the first die may be aligned with a corresponding solder cavity on the second die. The corresponding solder cavity refers to the solder cavity on the second die that is positioned in the same location as the solder cavity on the first die. This alignment of the solder cavities between the first and second dies forms a through opening. Accordingly, a plurality of through openings is formed across the entire stack, allowing structural alignment and facilitating functions such as fluid flow for cooling or electrical connections.
[0049] The IC package 100 may include at least one manifold 106. The at least one manifold 106 extends through the through openings formed by the plurality of solder cavities 204. The at least one manifold 106 may be made of copper or any electrically conductive material and runs along the height direction of the stack of the plurality of dies 202. The at least one manifold 106 includes at least one opening 108 that may be in fluid communication with the gap 208 formed between adjacent dies 202 to enable cooling of the dies 202. The at least one manifold 106 facilitates the circulation of a heat transfer fluid through the gap 208 formed between adjacent dies of plurality of dies 202. The heat transfer fluid dissipates the heat generated by the adjacent dies of plurality of dies 202. For instance, based on the specific working environment of the three-dimensional Integrated Circuits (3D ICs), such as the type of workload and the placementof transistors and other components on each die of the plurality of dies 202, certain dies of the plurality of dies 202 may generate higher amounts of heat. The at least one opening 108 of the at least one manifold 106 may be configured to align with the gap 208 formed between the adjacent dies 202. However, the at least one opening 108 may be positioned specifically to correspond to the gap 208 corresponding to the die generating the higher heat. Since a gap 208 exists between any two adjacent dies, the dies that produce more heat are identified by the type of workload and the placement of transistors and other components on each die of the plurality of dies 202, and the at least one opening 108 may be aligned with the corresponding gap 208 to deliver the heat transfer fluid to the area where the heat may be generated. The heat transfer fluid circulates through the gap 208, dissipating the heat generated by the adjacent dies 202, and exits after absorbing the heat, ensuring efficient cooling of the targeted die of the plurality of dies 202. For example, if the heat generated by the dies indicates that a higher thermal load is concentrated at the edge of the first die in the stack, the placement of the at least one manifold 106 can be adjusted to address this localized heating. In this scenario, the at least one manifold 106 would be positioned to extend through a through opening formed by the solder cavity 204 near the edge of the first die. This positioning allows the at least one opening 108 of the at least one manifold 106 to align directly with the gap 208 at the high-heat region. As a result, the heat transfer fluid can be efficiently directed to the area where the heat is concentrated, ensuring that the increased thermal load at the edge of the first die is effectively dissipated. The IC package may include an inlet port 102 for receiving the heat transfer fluid. The heat transfer fluid circulates through the gap 208 formed between adjacent dies 202 and exits through at least one outlet port 104. The outlet port 104 discharges the heat transfer fluid into a reservoir, facilitating the cooling process of the IC package 100.
[0050] The heat transfer fluid used in the IC package 100 may be a dielectric fluid. Examples of dielectric fluids include, but are not limited to,Shell Diala S4, XG Galden, Fluorinert, or Opteon SF33. The dielectric nature of the fluid ensures that the heat transfer fluid does not interfere with the electrical functionality of the IC package 100 while providing efficient cooling.
[0051] The heat transfer fluid may be circulated through the at least one manifold 106 by the pump. The pump may be responsible for driving the flow of the heat transfer fluid through the inlet port 102 of the manifold 106, through the gap 208 formed between adjacent dies 202, and out through the outlet port 104. The use of the pump ensures a continuous flow of the heat transfer fluid, enabling consistent cooling of the IC package 100 during operation.
[0052] Figure 3 illustrates a plurality of manifolds of an IC package, according to an example implementation of the present subject matter.
[0053] In an example, the heat transfer fluid may be circulated using a pump (not shown in figures) through the inlet port 102 (as shown in figure 1 ). The inlet port 102 directs the heat transfer fluid into at least one manifold 106. The heat transfer fluid enters the at least one manifold 106 at the proximal end 212 and flows through the manifold. The heat transfer fluid exits the at least one manifold 106 through at least one opening 108 located between the proximal end 212 and the distal end 214 of the at least one manifold 106. The at least one opening 108 may be positioned to correspond with the gap 208 formed by the adjacent dies 202 that have been identified as generating higher amounts of heat. In another aspect, the heat transfer fluid exits the at least one manifold 106 through the at least one opening 108 located at the distal end 214 of the at least one manifold 106. In yet another aspect, the heat transfer fluid exits through at least one opening 108 at the distal end 214 and through at least one additional opening 108 positioned between the proximal end 212 and distal end 214, which may be aligned with the gap 208 formed between two adjacent dies 202. The heat transfer fluid then flows into the gap 208 to dissipate the heatgenerated by the identified dies 202. After absorbing the heat, the heat transfer fluid exits the dies 202 through the outlet port 104 (as shown in figure 2) and may be directed to a reservoir (not shown in figures). In the reservoir, the heat transfer fluid may be cooled and continuously circulated, repeating the process described
[0054] In an example, the IC package 100 includes a first manifold and a second manifold. The first manifold and the second manifold may be displaced along the width direction of the IC package 100.
[0055] In an example, the IC package 100 includes a third manifold and a fourth manifold. The third manifold and the fourth manifold are displaced along the width direction, while the first manifold and the third manifold are displaced along the length direction of the IC package 100. Similarly, the second manifold and the fourth manifold are displaced along the length direction of the IC package 100. This arrangement of multiple manifolds enhances the cooling efficiency by providing improved fluid flow through the IC package 100. This arrangement depicts that the manifold may be placed uniformly on the plurality of dies 202 facilitating the uniform dissipation of heat from the plurality of dies 202.
[0056] In another example, the at least one manifold 106 includes a first manifold and a third manifold displaced along the length direction of the IC package 100. The arrangement of the manifolds along the length direction ensures that the heat transfer fluid may be efficiently circulated across the entire IC package 100, allowing for effective dissipation of heat from the plurality of dies 202.
[0057] The dimensions of the gap 208 between adjacent dies 202 within the integrated circuit package 100 are deliberately configured based on the thermal output produced by these dies. The dimension of the gap 208 is varied to facilitate effective heat dissipation within the IC package. The IC package improves the overall performance and reliability of the integrated circuit assembly, thereby minimizing the risk of overheating andrelated failures. In one aspect, the height of the gap between two adjacent dies is adjusted in direct response to the heat generated by a particular adjacent die. For example, the dies with higher thermal outputs will feature larger gaps, allowing for enhanced flow of the heat transfer fluid.
[0058] In another aspects of the present subject matter, both the height and width of the gap between adjacent dies are varies based on the thermal output of the corresponding dies. This adjustment ensures that each gap is optimized for improved heat dissipation for each die in the plurality. The differing dimensions of gap 208 contribute to a more efficient thermal pathway, effectively reducing localized hotspots that could potentially impair performance. Furthermore, the openings of at least one manifold are specifically designed to align with the varying dimensions of the gap between adjacent dies, facilitating enhanced and effective heat removal from the IC package.
[0059] The at least one manifold 106 may have a diameter ranging from 50 pm to 2100 pm, allowing for the efficient transport of heat transfer fluid. The at least one opening 108 within the manifold 106 may have dimensions ranging from 25 pm to 200 pm. The size of the through openings formed by the aligned solder cavities 204 between the dies 202 may be adjusted based on the specific thermal load generated by the dies 202 in the IC package 100. This flexible design of the present subject matter allows for efficient thermal management by directing the appropriate volume of heat transfer fluid to regions of the IC package 100 that experience higher thermal loads, ensuring optimal heat dissipation across the plurality of dies 202.
[0060] The at least one manifold 106 may have a diameter ranging from 50 pm to 2100 pm, allowing for the efficient transport of heat transfer fluid. The at least one opening 108 within the manifold 106 may have dimensions ranging from 25 pm to 200 pm. The size of the through openings formed by the aligned solder cavities 204 between the dies 202 may beadjusted based on the specific thermal load generated by the dies 202 in the IC package 100. For example, in regions where the heat generation is higher, larger through openings may be provided to accommodate a greater flow of heat transfer fluid, thus enhancing the cooling effect. Conversely, areas with lower thermal output may require smaller through openings. This flexible design allows for efficient thermal management by directing the appropriate volume of heat transfer fluid to regions of the IC package 100 that experience higher thermal loads, ensuring optimal heat dissipation across the plurality of dies 202.
[0061] In an example, the at least one manifold 106 may be utilized to perform the function of through-silicon vias (TSVs). In such a configuration, the at least one manifold 106 may facilitates to provides a secure electrical connection between the plurality of dies 202. By integrating the functionality of TSVs into the design of the manifold 106. This integration reduces the need for additional components solely dedicated to electrical connectivity, streamlining the overall IC package design. As a result, the at least one manifold 106 may efficiently handle the electrical interconnection requirements of the IC package 100, enhancing its performance.
[0062] In an example, the at least one manifold 106 along the length direction of the IC package in the plurality of through opening formed by the plurality of solder cavities 204 aligned with the solder cavities 204 of each die as shown in figure 1 . The at least one manifold 106 may be placed along the width direction
[0063] In an example, the at least one manifold 106 may be utilized to perform the function of through-silicon vias (TSVs). In such a configuration, the at least one manifold 106 may facilitates to provides a secure electrical connection between the plurality of dies 202. By integrating the functionality of TSVs into the design of the manifold 106, This integration reduces the need for additional components solely dedicated to electrical connectivity, streamlining the overall IC package design. As a result, the at least onemanifold 106 may efficiently handle the electrical interconnection requirements of the IC package 100, enhancing its performance.
[0064] Figure 4A illustrates a perspective view of an at least one manifold 106 of an Integrated Circuit (IC) package 100, according to an example implementation of the present subject matter. Figure 4B illustrates a side view of an at least one manifold 106 of an Integrated Circuit (IC) package 100, according to an example implementation of the present subject matter. Figure 4C illustrates a front view of an at least one manifold 106 of an Integrated Circuit (IC) package 100, according to an example implementation of the present subject matter. For the sake of brevity, the Figure 4A, 4B and 4C are explained in conjunction with each other.
[0065] The at least one manifold 106 may include at least one opening 108. Each manifold of the at least one manifold 106 may include a proximal end 212 and a distal end 214. The proximal end 212 may be configured to receive the heat transfer fluid, while the distal end 214 includes at least one opening 108. The opening 108 at the distal end 214 may be in fluid communication with the gap 208 formed between adjacent dies 202, allowing the heat transfer fluid to circulate through the manifold 106 and into the gap 208. The at least one opening 108 may include a first opening. The first opening may be disposed at the distal end of the at least one manifold 106. In another instance the at least one opening may be disposed between the proximal end and the distal end of the at least one manifold 106. In another aspect the at least one manifold 106 may include a first opening and a second opening. The first opening may be disposed at the distal end of the at least one manifold 106. For example, if the IC package forms a 10 number of gaps 208 between the adjacent dies of plurality of dies 202. The at least one manifold 106 maybe includes 10 corresponding openings aligned with the gap 208 formed between the adjacent dies. If the heat generated, at the ultimate gap 208 or penultimate gap 208 formed by the adjacent dies of plurality of dies 202, is higher, the at least one manifold 106 may have openings concentrating those two dies to dissipate the heat fromthe dies. In another aspects, If the heat generated at the ultimate die of the plurality of dies 202 is higher, the at least one manifold 106 may have at least one opening at the distal end of the at lest one manifold 106. The heat transfer fluid may flow from the inlet port and enter the proximal end of the at least one manifold 106. The heat transfer fluid exits the at least one manifold 106 through the corresponding opening disposed on the at least on manifold 106. The heat transfer fluid may further flow through the corresponding aligned gap 208 and dissipated the heat from the die and exits the plurality of dies 202 through the outlet port to repeat the process.
[0066] In an example, the efficiency of the present subject matter is evaluated by comparing it with a baseline model. The baseline model does not include the at least one manifold, as incorporated in the present subject matter. The comparison highlights the performance improvements attributed to the present subject matter. The results of this comparison are outlined as follows.
[0067] Figure 5A, 5B, and 5C illustrate the temperature variation of a heat transfer fluid across an Integrated Circuit (IC) package of a base model, which does not incorporate at least one manifold.
[0068] The distribution of the heat transfer fluid across the IC package is depicted. Without the presence of manifolds, the fluid is shown to be inadequately distributed, resulting in inefficient heat dissipation. Figure 5A and Figure 5B highlights the thermal hotspots remaining within the IC package, particularly around the comers and specific regions where the heat transfer fluid fails to adequately reach. These hotspots indicate areas where heat is not effectively removed from the plurality of dies 202.
[0069] Figure 5C further illustrates the temperature profile of the heat transfer fluid exiting the IC package. The figure shows that, due to the absence of manifolds, the fluid exits without having significantly reduced the temperature of the affected regions. The resulting thermal hotspots are indicative of persistent high temperatures, especially in areas where heat generation is higher, such as the corners of the dies. This demonstrates thelimitation of the base model in providing uniform cooling across the IC package.
[0070] Figure 6A and 6B illustrates temperature variation of a heat transfer fluid across an IC package, according to an example implementation of the present subject matter. The figure 6A and 6B depicts the IC package includes at least one manifold. The at least one manifold 106 extends through a through openings formed by a plurality of solder cavities 204. which facilitates efficient heat dissipation. Figure 6A depicts the flow of heat transfer fluid entering the IC package through the manifold. The heat transfer fluid is shown to be evenly distributed, targeting areas where heat generation is higher across the plurality of dies 202. The presence of the manifold ensures that the heat transfer fluid is directed towards these heat-generating regions, aligning with the gaps formed between adjacent dies.
[0071] Figure 6B further illustrates the temperature change in the heat transfer fluid as it circulates through the IC package. The fluid absorbs heat from the dies and exits the package at a higher temperature, indicating that the heat has been effectively dissipated from the plurality of dies 202. The consistent drop in temperature across the dies demonstrates the efficiency of the manifold in maintaining optimal cooling and preventing the formation of thermal hotspots, ensuring uniform heat dissipation from the IC package.
[0072] Figure 7A and 7B illustrates temperature variation of a plurality of dies across an IC package, according to an implementation of a base model, which does not incorporate at least one manifold.
[0073] The figures depict the temperature differences among the plurality of dies 202 in the IC package without the use of a manifold. Each die shows varying temperature levels, with some dies generating more heat than others. Figure 7A and 7B clearly show that certain dies, such as the ultimate die, have higher temperatures compared to the other dies in the stack. These variations highlight the heat generated across different diesdue to their workload and placement, leading to higher temperatures in specific dies.
[0074] Figure 8A and 8B illustrates temperature variation of a plurality of dies across an IC package, according to an example implementation of the present subject matter. Figure 8A and 8B depict thermal hotspots across various regions of the dies (102) and highlight how the positioning of the at least one manifold (106) can optimize cooling. The figures show that the regions with higher thermal concentration, or thermal hotspots, can be effectively managed by strategically placing the manifold and optimizing the location of openings on the manifold. This ensures uniform cooling by allowing heat to dissipate efficiently from the high-heat regions, leading to better thermal management across the IC package without the actual depiction of the heat transfer fluid flow.
[0075] Figure 9 illustrates a heat transfer fluid velocity across an IC package corresponding to a base model, which does not incorporate at least one manifold. The figure 9 depicts a jet impingement effect that without the manifold near the region of thermal spot across the stacked plurality of dies 102, the velocity of the heat transfer fluid is significantly higher only at the point of contact, such as when the inlet of the heat transfer fluid is positioned, usually at the centre of the die. As shown, the heat transfer fluid fails to effectively reach the comers of the dies (102) and other thermal hotspot regions, leading to inefficient cooling. The higher velocity at the central point results in uneven distribution of the heat transfer fluid, causing inadequate dissipation of heat from the outer regions of the dies, which can negatively impact the overall thermal performance of the IC package.
[0076] Figure 10A, 10B, and 10C illustrates a heat transfer fluid velocity across an IC package, according to an example implementation of the present subject matter.
[0077] Figure 10A provides a perspective view, Figure 10B presents a top view, and Figure 10C shows a front view of the IC package. The figures depict that the strategic placement of a plurality of manifolds (106)across the plurality of dies, along with multiple openings in the manifolds. The manifolds are oriented in both the length and breadth directions, enables uniform cooling of the dies (102). This configuration effectively eliminates thermal hotspots, ensuring that the heat transfer fluid uniformly circulates across all dies. As a result, the heat transfer fluid exits the plurality of dies, efficiently dissipating heat generated by each die and maintaining optimal thermal performance throughout the IC package.
[0078] Figure 11 illustrates a flowchart depicting a method 2100 for cooling an IC package depicting thermal hotspots, according to an example implementation. The method 2100 for cooling the IC package follows following steps. At step 2202, a heat transfer fluid may be introduced at a proximal end of an at least one manifold of an IC package. The IC package may correspond to the IC package 100. The introduction occurs through an inlet port of the IC package. The inlet port may be in fluid communication with the proximal end of the at least one manifold. The IC package comprises a plurality of dies. Each die of the plurality of dies has a first surface and a second surface. The plurality of dies forms a three- dimensional stack. A first surface of a die faces a second surface of an adjacent die. Adjacent dies of the plurality of dies have facing surfaces. A gap may be formed between the facing surfaces of the adjacent dies of the plurality of dies. The IC package also includes a plurality of through-silicon vias (TSVs) that secure and electrically connect the dies. The at least one manifold extends through a through opening of the plurality of through openings. In one aspect of the present subject matter, the formation of through openings is achieved by setting the dimensions of these openings based on the heat generation characteristics of a plurality of dies 202. The process begins with the determination of appropriate dimensions, which are derived from the heat generated by the each dies of the plurality of dies 202. Once the dimensions are established, the next step involves etching the dies. Each die in the plurality is etched to create a series of openings. This etching process is performed by stacking the adjacent dies whilemaintaining a gap between them. The dimensions of this gap are specifically configured based on the heat generated by the plurality of dies, ensuring effective thermal management.
[0079] During the etching process, the adjacent dies are carefully aligned. This alignment is critical, as it ensures that the openings of one die are co-axial with the corresponding openings of the adjacent die. This precise alignment allows for the formation of a coherent plurality of through openings, enhancing the overall functionality of the assembly. In another aspect of the present subject matter the through openings are formed by aligning a solder cavity of a plurality of solder cavities on a die with a solder cavity of a plurality of solder cavities on an adjacent die.
[0080] The at least one manifold may correspond to the at least one manifold 202. The proximal end may correspond to the proximal end 212. The plurality of dies may correspond to the plurality of ides 202. The first surface may correspond to the first surface 218. The second surface corresponds to the second surface 220. The gap may correspond to the gap 208. The at least one manifold may correspond to the at least one manifold 106. The plurality of solder cavities may correspond to the plurality of the solder cavities 204.
[0081] At step 2204, the heat transfer fluid may be circulated to the gap formed between the adjacent dies of the plurality of dies. This circulation occurs through at least one opening of the at least one manifold. The at least one opening may be in fluid communication with the gap formed between the adjacent dies of the plurality of dies. The at least one opening may correspond to the at least one opening 108.
[0082] At step 2106, the heat generated by the adjacent dies forming the gap may be dissipated to the heat transfer fluid. The heat transfer fluid absorbs the heat from the gap.
[0083] At step 2208, the heat transfer fluid that carries the dissipated heat may be collected at an outlet port of the IC package. The outlet portmay be in fluid communication with the gap. The heat transfer fluid exits through the outlet port, carrying away the absorbed heat. The outlet port may correspond to the outlet port 104.
[0084] In an example, the method 2100 may include introducing the heat transfer fluid involves introducing the heat transfer fluid at the proximal end of a first manifold, a second manifold, a third manifold, and a fourth manifold. The first manifold and the second manifold are displaced along a width direction of the IC package. The third manifold and the fourth manifold are displaced along the width direction of the IC package. The first manifold and the third manifold are displaced along a length direction of the IC package. The second manifold and the fourth manifold are displaced along the length direction of the IC package. The proximal end corresponds to the proximal end 212.
[0085] In an example, the method 2100 may include circulating the heat transfer fluid to the gap includes circulating the heat transfer fluid through an opening at the distal end of the at least one manifold. The distal end may correspond to the distal end 214.
[0086] In an example, the method 2100 may include, circulating the heat transfer fluid to the gap includes circulating the heat transfer fluid through an opening at the distal end of the at least one manifold. The at least one opening includes a first opening in fluid communication with a gap formed between a first set of adjacent dies of the plurality of dies. The at least one opening also includes a second opening in fluid communication with a gap formed between a second set of adjacent dies of the plurality of dies.
[0087] an example, the method 2100 may include, Introducing the heat transfer fluid may involve using a pump to introduce the heat transfer fluid at the proximal end of the at least one manifold 106 through the inlet port. The pump drives the flow of the heat transfer fluid into the manifold. Theheat transfer fluid used may be a dielectric fluid. The dielectric fluid may be selected from one of Shell Diala S4, XG Galden, Fluorinert, or Opteon SF33. The selection of the dielectric fluid depends on its thermal properties and compatibility with the IC package.
[0088] In the present subject matter by employing at least one manifold 106 to circulate heat transfer fluid through gaps 208 formed between stacked dies 202. Unlike conventional methods that rely solely on a heat sink positioned on the topmost die, the present subject matter may ensure uniform cooling throughout the entire IC package 100. By circulating heat transfer fluid directly across the multiple layers of dies 202, heat may be effectively removed from all dies 202, preventing overheating and ensuring the IC's performance is maintained without the risk of thermal hotspots.
[0089] The present subject matter addresses the issue of uneven cooling commonly found in traditional 3D IC configurations, where lower dies in the stack may generate higher heat but are less effectively cooled. By allowing the heat transfer fluid to flow through strategically positioned manifolds 106 and their openings 212, the present subject matter may enable more uniform cooling. This may result in increased thermal management efficiency, ensuring that the lower layers are just as effectively cooled as the upper layers, ultimately enhancing the overall performance and longevity of the IC package 100.
[0090] The present subject matter may further optimize the design of the IC package 100 by selectively utilizing solder cavities 210 for thermal management. Instead of filling every solder cavity 210 with a manifold 106, only those required for heat dissipation may be equipped with manifolds 106, while others may remain as dummy cavities. This approach may reduce the overall weight and complexity of the package without compromising on cooling performance. The removal of external heat sinks and unnecessary manifold connections may further contribute to reducing 1the package's size and weight, allowing for a more streamlined and lightweight design.
[0091] The present subject matter may offer a targeted approach to cooling by allowing the manifold 106 to be positioned in response to the specific thermal demands of different dies 202. For instance, if a particular die in the stack may generate more heat than others, the manifold 106 may be aligned with the corresponding solder cavity 210 near that die 202 to direct the flow of heat transfer fluid more efficiently to that region. This flexibility may ensure that areas with higher thermal loads receive the necessary cooling, preventing damage and maintaining performance, particularly in high-performance ICs where power density and heat generation are significant concerns.
[0092] The present subject matter may eliminate the need for structural modifications to the IC package 100 by utilizing the pre-existing solder cavities 210 for the manifold system. This may avoid the need for new openings or additional redesigns, preserving the original integrity of the IC package 100 design while enhancing thermal management capabilities.
[0093] The present subject matter may also prevent the formation of thermal hotspots, a common issue in high-density 3D IC packages. By continuously circulating the heat transfer fluid and effectively removing heat from the dies 202, the present subject matter may ensure that no part of the IC 100 experiences localized overheating. This may improve the operational performance of the IC package 100 and enhance its reliability and lifespan, making it suitable for use in applications where high performance and durability are critical.
[0094] In addition, the present subject matter may reduce the dependency on external cooling methods such as large heat sinks and the like components, which are typically required to manage the heat generated by densely packed 3D ICs. By circulating the heat transfer fluid through the manifold system, the present subject matter may eliminate the need for external cooling components, resulting in a more compact and efficient ICpackage 100. This may further contribute to reducing the overall footprint and weight of the package, making it more suitable for compact, high- performance applications.
[0095] Although examples for the present subject matter have been described in language specific to structural features and / or methods, it should be understood that the appended claims are not limited to the specific features or methods described. Rather, the specific features and methods are disclosed and explained as examples of the present subject matter.
Claims
l / We Claim:
1. An Integrated Circuit (IC) package (100) comprising: a plurality of dies (202), each of the plurality of dies (202) having a first surface (218) and a second surface (220), wherein the plurality of dies (202) are to form a three-dimensional stack, wherein a first surface (218) of a die of the plurality of dies (202) is to face a second surface (220) of an adjacent die of the plurality of dies (202) such that adjacent dies of the plurality of dies (202) have facing surfaces, wherein a gap (208) is formed between facing surfaces of the adjacent dies of the plurality of dies (202); a plurality of through-silicon vias (TSV) (210), each of the plurality of TSVs (210) are to secure the plurality of dies (202) together and electrically connect each of the plurality of dies (202); and at least one manifold (106), wherein the at least one manifold (106) extends through a through opening of a plurality of through openings, wherein each of the plurality of through openings extending through the three-dimensional stack of the plurality of dies (202), wherein the at least one manifold (106) comprises: at least one opening (108) that is in fluid communication with a gap (208) formed between the adjacent dies of the plurality of dies (202), wherein a heat transfer fluid is circulatable to the gap (208) through the at least one opening (108) of the at least one manifold (106) to dissipate heat generated by the adjacent dies.
2. The IC package (100) as claimed in claim 1 comprising: a plurality of solder cavities (204) on each of the plurality of dies (202), wherein the plurality of solder cavities (204) on a die of the plurality of dies (202) is aligned to the plurality of corresponding solder cavities on an adjacent die of the plurality of dies (202) suchthat the plurality of through openings are formed across the three- dimensional stack of the plurality of dies (202).
3. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) is configured to receive the heat transfer fluid through an inlet port (102) and the heat transfer fluid circulated through the gap (208) formed between the adjacent dies of plurality of dies (202) is received by at least one outlet port (104) to discharge heat transfer fluid to a reservoir.
4. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) comprises: a proximal end (212) to receive the heat transfer fluid for circulation thereof; and a distal end (214), wherein the at least one opening (108) comprises a first opening at the distal end (214) of the at least one manifold (106).
5. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) comprises: a proximal end (212) to receive the heat transfer fluid for circulation thereof; and a distal end (214), wherein the at least one opening (108) comprises: a first opening in fluid communication with the gap (208) formed between a first set of adjacent dies of the plurality of dies (202) at a distal end (214) of the at least one manifold (106); and a second opening in fluid communication with the gap (208) formed between a second set of adjacent dies of the plurality of dies (202) formed between a proximal end (212) and the distal end (214) of the at least one manifold (106).
6. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) comprises a first manifold and a second manifold being displaced along a width direction of the IC package.
7. The IC package (100) as claimed in claim 6, wherein the at least one manifold (106) comprises: a third manifold and a fourth manifold being displaced along the width direction of the IC package; the first manifold and the third manifold being displaced at length direction of the IC package; and the second manifold and the fourth manifold displaced at length direction of the IC package.
8. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) comprises a first manifold and a third manifold being displaced along a length direction of the IC package.
9. The IC package (100) as claimed in claim 1 , wherein dimensions of the gap (108) formed between adjacent dies of the plurality of dies (102) correspond to heat generated by the adjacent dies of the plurality of dies (202). The IC package (100) as claimed in claim 1 , wherein the heat transfer fluid is a dielectric fluid and comprises one of: Shell Diala S4, XG Galden, Fluorinert, or Opteon SF33.
10. The IC package (100) as claimed in claim 1 , wherein the at least one manifold (106) is made of copper.11 . The IC package (100) as claimed in claim 1 , wherein the dimensions and spatial arrangement of the through openings correspond to the thermal load generated by the plurality of dies (202), and wherein the through openings (212) are aligned to accommodate the at least one manifold (106) to facilitate heat dissipation12. The IC package (100) as claimed in claim 1 and 2, wherein the heat transfer fluid is circulated through the at least one manifold (106) by a pump.
13. A method for cooling of an Integrated circuit (IC) package, the method comprising: introducing, at a proximal end (212) of an at least one manifold (106) of the IC package through an inlet port of the IC package, a heat transfer fluid, wherein the inlet port is in fluid communication with the proximal end (212) of the at least one manifold (106), wherein the IC package comprises: a plurality of dies (202), each of the plurality of the dies having a first surface (218) and a second surface (220), wherein the plurality of dies (202) are to form a three- dimensional stack, wherein a first surface (218) of a die of the plurality of dies (202) is to face a second surface (220) of an adjacent die of the plurality of dies (202) such that adjacent dies of the plurality of dies (202) have facing surfaces, wherein a gap (208) is formed between facing surfaces of the adjacent dies of the plurality of dies (202); and a plurality of through-silicon vias (TSVs) (210) securing and electrically connecting the dies, and wherein the at least one manifold (106) extends through a through opening of the plurality of through openings, wherein each of the plurality of through openings extending through the three-dimensional stack of the plurality of dies (202); circulating the heat transfer fluid to the gap (208) formed between the adjacent dies of the plurality of dies (202) through an at least one opening (108) of the at least one manifold (106), wherein the at least one opening (108) is in fluid communication with the gap (208) formed between the adjacent dies of the plurality of dies (202);dissipating heat generated by the adjacent dies forming the gap (208) to the heat transfer fluid; and collecting, at an outlet port of the IC package, the heat transfer fluid that carries the dissipated heat, wherein the outlet port is in fluid communication with the gap (208).
14. The method as claimed in claims 13, the method comprising: etching a plurality of openings on each of the plurality of dies; stacking the adjacent dies with the gap, the gap being configured based on the heat generated by the plurality of dies; and aligning the adjacent dies such that a plurality of openings of one die of the adjacent dies is co-axial with corresponding plurality of openings of another die of the adjacent dies to form the plurality of through openings, wherein at least one through opening of the plurality of through openings is adapted receive the at least one manifold.
15. The method as claimed in claims 14, wherein prior to the etching the plurality of openings on each of the plurality of dies (202), the method comprising: setting the dimensions of the openings based on the heat generation by the plurality of dies (202).
16. The method as claimed in claims 13, wherein introducing the heat transfer fluid comprises: introducing, at a proximal end (212) of an at least one manifold (106) of the IC package through an inlet port of the IC package, a heat transfer fluid, wherein the at least one manifold (106) extends through a through opening of the plurality of through openings formed by aligning a solder cavity of a plurality of solder cavities (204) on a die of the plurality of dies (202) and a solder cavity of a plurality of solder cavities (204) an adjacent die of the plurality of dies (202).
17. The method as claimed in claim 13, wherein introducing the heat transfer fluid comprises: introducing the heat transfer fluid at a proximal end of a first manifold, at a proximal end of a second manifold, at a proximal end of a third manifold, and at a proximal end of a fourth manifold, wherein the first manifold and the second manifold are displaced along a width direction of the IC package, wherein the third manifold and the fourth manifold are displaced along the width direction of the IC package, wherein the first manifold and the third manifold are displaced along a length direction of the IC package, and wherein the second manifold and the fourth manifold are displaced along the length direction of the IC package.
18. The method as claimed in claim 13, wherein circulating the heat transfer fluid to the gap (208) comprises: circulating the heat transfer fluid through an opening at the distal end (214) of the at least one manifold (106).
19. The method as claimed in claim 13, wherein circulating the heat transfer fluid to the gap (208) comprises: circulating the heat transfer fluid through an opening at the distal end (214) of the at least one manifold (106), wherein the at least one opening comprises: a first opening in fluid communication with a gap formed between a first set of adjacent dies of the plurality of dies of the at least one manifold; and a second opening in fluid communication with the gap formed between a second set of adjacent dies of the plurality of dies of the at least one manifold.
20. The method as claimed in claim 13, wherein introducing the heat transfer fluid comprises:introducing, by a pump, the heat transfer fluid at the proximal end (212) of the at least one manifold (106) through the inlet port.
21. The method as claimed in claim 13, wherein circulating the heat transfer fluid comprises: Circulating the heat transfer fluid through the gap formed between the adjacent dies of the plurality of dies (202), wherein dimensions of the gap (208) formed between adjacent dies of the plurality of dies (202) correspond to heat generated by the adjacent dies of the plurality of dies (102).
22. The method as claimed in claim 13, wherein the heat transfer fluid is a dielectric fluid and is selected from one of: Shell Diala S4, XG Galden, Fluorinert, or Opteon SF33.
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