Semiconductor device

Abstract

A semiconductor device 10 comprises a first functional layer (first semiconductor layer) 12a, a second functional layer (second semiconductor layer) 12b stacked above the first functional layer, and a joining layer 110 provided between the functional layers 12a, 12b. The first functional layer 12a has a P-type (first conductivity type) first region (103a, 83a, 84a, 85a, 86a) and an N-type (second conductivity type) second region (81a, 82a) on a first surface facing the joining layer 110. The second functional layer 12b has a P-type third region (103b) and an N-type fourth region (81b, 82b) on a second surface facing the joining layer 110. Between the functional layers 12a and 12b, a shield layer 90 (shielding layer) is provided in a portion facing the fourth region within the first region and / or a portion facing the third region within the second region.

Description

Semiconductor device

[0001] The present disclosure relates to a semiconductor device.

[0002] Conventionally, a semiconductor device in which a second semiconductor layer is stacked on a first semiconductor layer via a spacer is known (see, for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2010-219291 (see the abstract)

[0004] However, in the above semiconductor device, the influence of charges and the like in the second semiconductor layer (upper layer) affects the first semiconductor layer (lower layer), and there is a possibility of malfunction. Therefore, a semiconductor device capable of suppressing malfunction is required.

[0005] An object of the present disclosure is to provide a semiconductor device capable of suppressing malfunction.

[0006] The semiconductor device of the present disclosure includes a first semiconductor layer, a second semiconductor layer stacked above the first semiconductor layer, and a bonding layer provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer has a first region of a first conductivity type and a second region of a second conductivity type different from the first conductivity type on a first surface facing the bonding layer. The second semiconductor layer has a third region of the first conductivity type and a fourth region of the second conductivity type on a second surface facing the bonding layer. A shielding layer is provided in at least one of a portion of the first region facing the fourth region or a portion of the second region facing the third region between the first semiconductor layer and the second semiconductor layer.

[0007] In the semiconductor device of the present disclosure, the shielding layer can suppress the influence of charges and the like in the second semiconductor layer from reaching the first semiconductor layer, and can suppress malfunction of the semiconductor device.

[0008] This is a plan view showing the SOI substrate of Embodiment 1. These are a plan view (A) and a cross-sectional view (B) showing the functional film of Embodiment 1. These are a plan view (A) and a cross-sectional view (B) showing the process of forming electrode pads and a protective layer on the functional layer of the functional film of Embodiment 1. These are a plan view (A) and a cross-sectional view (B) showing the process of forming a resist layer on the functional film of Embodiment 1. This is a cross-sectional view showing the process of separating the functional film of Embodiment 1 from the substrate. These are cross-sectional views (A) and (B) showing other examples of the process of separating the functional film of Embodiment 1 from the substrate. This is a figure (A) showing the process of attaching the second functional film of Embodiment 1 to an intermediate transfer substrate to form a dummy layer, and a figure (B) showing the process of attaching the first functional film to an intermediate transfer substrate to form a dummy layer. This is a figure (A) showing the process of separating the second functional film of Embodiment 1 from the intermediate transfer substrate, and a figure (B) showing the process of separating the first functional film from the intermediate transfer substrate. These are figures (A) and (B) showing the process of laminating the first functional film and the second functional film of Embodiment 1. This is a cross-sectional view showing the semiconductor device of Embodiment 1. This is a plan view showing an example of electrode pad connection in a semiconductor device of Embodiment 1. This is a diagram showing an example of an analog integrated circuit formed on a functional film of a semiconductor device of Embodiment 1. This is a cross-sectional view illustrating the configuration of the first functional film and the second functional film of Embodiment 1. These are diagrams (A) and (B) illustrating the problems to be solved in Embodiment 1. These are diagrams (A) illustrating the problems to be solved in Embodiment 1 and diagram (B) illustrating the operation of the semiconductor device of Embodiment 1. This is a diagram illustrating the operation of the semiconductor device of Embodiment 1. This is a diagram illustrating the sheet resistance of the semiconductor layer in the semiconductor device of Embodiment 1. These are diagrams (A) and (B) showing an example of the configuration of the functional film of Embodiment 1. This is a plan view showing an SOI substrate of Embodiment 2. These are plan views (A) and cross-sectional views (B) illustrating the process of forming electrode pads and a protective layer on the functional layer of the functional film of Embodiment 2. These are cross-sectional views (A) illustrating the process of forming a resist layer on the second functional film of Embodiment 2 and cross-sectional views (B) illustrating the process of removing the dummy region of the second functional film. This is a cross-sectional view illustrating the process of forming a resist layer and a bonding layer on the first functional film of Embodiment 2.This is a cross-sectional view (A) showing the process of separating the second functional film of Embodiment 2 from the substrate, and a cross-sectional view (B) showing the process of separating the first functional film of Embodiment 2 from the substrate. This is a cross-sectional view showing the process of laminating the first functional film and the second functional film of Embodiment 2. This is a cross-sectional view showing the process of exposing the electrode pads of the first functional film of Embodiment 2. This is a diagram showing another example of a laminate including the first functional film and the second functional film of Embodiment 2. This is a cross-sectional view showing a semiconductor device of Embodiment 2. This is a cross-sectional view showing another configuration example of a semiconductor device of Embodiment 2. This is a cross-sectional view showing yet another configuration example of a semiconductor device of Embodiment 2. This is a cross-sectional view for explaining the configuration of the first functional film and the second functional film of Embodiment 2. This is a plan view showing a first connection example of the electrode pads of a semiconductor device of Embodiment 2. This is a plan view showing a second connection example of the electrode pads of a semiconductor device of Embodiment 2. This is a plan view showing a third connection example of the electrode pads of a semiconductor device of Embodiment 2. This is a plan view showing a fourth connection example of the electrode pads of a semiconductor device of Embodiment 2. This is a cross-sectional view showing a fourth connection example of the electrode pads of a semiconductor device of Embodiment 2. These are schematic diagrams (A) to (C) illustrating a method for separating the functional film of Embodiment 2 from the substrate in one piece. This is a plan view showing the SOI substrate of Embodiment 3. These are plan views (A) and cross-sectional views (B) and (C) showing the process of forming electrode pads and a protective layer on the functional layer of the functional film of Embodiment 3. These are plan views (A) and cross-sectional views (B) and (C) showing the process of forming a resist layer on the functional film of Embodiment 3. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the functional film of Embodiment 3 from the substrate. These are plan views (A) and cross-sectional views (B) and (C) showing the process of transferring the functional film of Embodiment 3 to an intermediate transfer substrate to form a dummy layer. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the functional film of Embodiment 3 from the intermediate transfer substrate. This is a cross-sectional view showing the process of laminating the first to fourth functional films of Embodiment 3. These are schematic diagrams (A) to (D) showing the process of exposing the electrode pads of the first to fourth functional films of Embodiment 3. This is a cross-sectional view showing the process of etching the first to fourth functional films of Embodiment 3.This is a cross-sectional view illustrating the configuration of the first to fourth functional films of Embodiment 3. This is a plan view showing the arrangement of electrode pads of the semiconductor device of Embodiment 3. This is a plan view showing an example of electrode pad connection of the semiconductor device of Embodiment 3. This is a plan view showing the SOI substrate of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of forming electrode pads and a protective layer on the functional layer of the functional film of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of forming a resist layer on the functional film of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of removing a part of the dummy area of ​​the second functional film of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of removing a part of the dummy area of ​​the third functional film of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of removing the entire dummy area of ​​the fourth functional film of Embodiment 4. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the first functional film of Embodiment 4 from the substrate. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the second functional film of Embodiment 4 from the substrate. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the third functional film of Embodiment 4 from the substrate. These are plan views (A) and cross-sectional views (B) and (C) showing the process of separating the fourth functional film of Embodiment 4 from the substrate. This is a cross-sectional view showing the process of laminating the first to fourth functional films of Embodiment 4. This is a schematic diagram showing the process of laminating the first to fourth functional films of Embodiment 4. This is a cross-sectional view showing a laminate formed by laminating the first to fourth functional films of Embodiment 4. This is a diagram showing another example of a laminate including the first to fourth functional films of Embodiment 4. This is a cross-sectional view for explaining the configuration of the first to fourth functional films of Embodiment 4. This is a plan view showing an example of electrode pad connection of a semiconductor device of Embodiment 4. This is a plan view showing an SOI substrate on which the second functional film of a modified example of Embodiment 4 is formed. This is a plan view showing an SOI substrate on which the third functional film of a modified example of Embodiment 4 is formed. This is a plan view showing an SOI substrate on which the fourth functional film of a modified example of Embodiment 4 is formed. This is a plan view showing the second SOI substrate of Embodiment 5.This is a plan view showing the first SOI substrate of Embodiment 5. This is a cross-sectional view (A) showing the process of laminating the first functional film and the second functional film of Embodiment 5, and a cross-sectional view (B) showing the process of removing the dummy area of ​​the second functional film. This is a plan view showing an example of electrode pad connection of the semiconductor device of Embodiment 5. This is a cross-sectional view showing a laminate including the first functional film and the second functional film of Embodiment 5.

[0009] The semiconductor devices according to each embodiment will be described with reference to the drawings. The semiconductor device includes a functional layer (also called an active layer or device layer), which is a semiconductor layer on which circuits such as operational amplifiers are formed.

[0010] Embodiment 1. <Manufacturing Process of Semiconductor Device> Figure 1 is a plan view showing an SOI (Silicone On Insulator) wafer 11 of Embodiment 1. Multiple functional films 12 are formed on the SOI wafer 11. The functional films 12 are arranged in a matrix in two mutually orthogonal directions. The functional films 12 are also referred to as semiconductor thin films or integrated circuit films.

[0011] In the example shown in Figure 1, 40 functional films 12 are formed on the SOI wafer 11, each labeled with reference numerals 12-1 to 12-40. However, the number of functional films 12 on the SOI wafer 11 is not particularly limited and may be several hundred, for example.

[0012] The functional film 12 has a circuit region 13 and a pad region 14. The circuit region 13 has N-type diffusion regions, P-type diffusion regions, contacts, and wiring layers that constitute an analog integrated circuit formed thereon. Electrode pads are formed in the pad region 14.

[0013] Figure 2(A) is a plan view showing the functional film 12. Figure 2(B) is a cross-sectional view along the line segment 2B-2B shown in Figure 2(A).

[0014] As shown in Figures 2(A) and (B), the SOI wafer 11 has a substrate 101, an oxide film 102, and a functional layer 103. The substrate 101 is, for example, a silicon (Si) substrate. The thickness of the substrate 101 is, for example, 400 μm.

[0015] The oxide film 102 is formed on the surface of the substrate 101. ２ It is a film, also called a sacrificial layer or BOX (Buried Oxide) layer. The oxide film 102 is formed, for example, by thermal oxidation of the surface of the substrate 101. The thickness of the oxide film 102 is, for example, several micrometers.

[0016] The functional layer 103 is a semiconductor layer formed on the oxide film 102, and more specifically, a silicon single crystal layer. The functional layer 103 is also called the active layer or device layer. The functional layer 103 is formed, for example, by epitaxial growth. The thickness of the functional layer 103 is, for example, 20 μm or less.

[0017] Figure 3(A) is a plan view showing the process of forming electrode pads 104 and protective layers 105 on the functional layer 103. Figure 3(B) is a cross-sectional view taken along the line segment 3B-3B shown in Figure 3(A).

[0018] An analog integrated circuit is formed in the functional layer 103 by a photolithography process. Specifically, a P-type diffusion region, an N-type diffusion region, contacts, and a wiring layer are formed (see Figures 18(A) and (B) described later). The P-type diffusion region and the N-type diffusion region are formed by implanting P-type and N-type impurities into the functional layer 103. The region in which the P-type diffusion region, N-type diffusion region, contacts, and wiring layer are formed corresponds to the circuit region 13.

[0019] In each circuit region 13 of the multiple functional films 12 (Figure 1) on the SOI wafer 11, the same circuit pattern, that is, a circuit pattern having the same function, is formed. In other words, in each circuit region 13 of the multiple functional films 12 on the SOI wafer 11, an analog integrated circuit, such as the operational amplifier 16 shown in Figure 12 (described later), is formed by the same photolithography process.

[0020] Electrode pads 104 are formed on the functional layer 103. Specifically, multiple electrode pads 104 are formed along one side of the functional layer 103. The number of electrode pads 104 is eight in Figure 3(A), but is not particularly limited. The area on which the electrode pads 104 are formed corresponds to the pad area 14.

[0021] Note that electrode pads 104 are not formed in the circuit region 13. In contrast, a portion of the wiring layer may extend from the circuit region 13 to the pad region 14. A shielding layer 90 (see Figure 13) is formed on the functional layer 103 as needed, but this will be described later.

[0022] A protective layer 105 is formed to cover the surface of the functional layer 103. The protective layer 105 is, for example, an oxide film or a nitride film. The wiring layer formed on the surface of the functional layer 103 is covered by the protective layer 105. The surface of the electrode pad 104 is exposed from the protective layer 105.

[0023] Figure 4(A) is a plan view showing the process of forming a resist layer 106 on the protective layer 105. Figure 4(B) is a cross-sectional view along the line segment 4B-4B shown in Figure 4(A).

[0024] As shown in Figures 4(A) and 4(B), a resist layer 106 is formed as a cover layer to cover the electrode pad 104 and protective layer 105 on the functional layer 103. The resist layer 106 is, for example, a photoresist. However, it is not limited to a photoresist; an insulating inorganic material or the like may be deposited, and a multilayer film may be formed using multiple types of materials.

[0025] Figure 5 is a cross-sectional view showing the process of separating the functional film 12 from the substrate 101. As shown in Figure 5, the functional film 12 (functional layer 103, electrode pad 104, and protective layer 105) is separated from the substrate 101 by removing the oxide film 102 by wet etching or the like.

[0026] When the functional film 12 is separated from the substrate 101 by removing the oxide film 102, the surface roughness of the lower surface of the functional layer 103 becomes 10 nm or less. In this specification, the n-point average roughness Rz measured by atomic force microscopy (AFM) is used as an indicator of surface roughness.

[0027] Figures 6(A) and 6(B) are cross-sectional views showing another example of the process for separating the functional film 12 from the substrate 101. When a Si(111) substrate is used as the substrate 101, as shown in Figure 6(A), the surface layer of the substrate 101 is etched in the direction of (110) indicated by arrow H, and the oxide film 102 is used as an etching stop layer. As a result, as shown in Figure 6(B), the functional film 12 can be separated from the substrate 101 while leaving the oxide film 102 intact.

[0028] As shown in Figures 6(A) and (B), when the functional film 12 is separated from the substrate 101 together with the oxide film 102, the surface roughness of the lower surface of the oxide film 102 separated together with the functional film 12 is 10 nm or less.

[0029] In this way, two or more functional films 12 are separated from the substrate 101. Of the two or more functional films 12 separated from the substrate 101, the functional film 12 that becomes the lower layer in the lamination process described later (Figure 9(A)) is called the "first functional film 12a" (first semiconductor thin film), and the functional film 12 that becomes the upper layer is called the "second functional film 12b" (second semiconductor thin film).

[0030] In the following description, each component (functional layer 103, electrode pad 104, etc.) and each region (circuit region 13, pad region 14, etc.) of the first functional film 12a will be described with the letter "a" appended to the end of the reference numeral. Similarly, each component and each region of the second functional film 12b will be described with the letter "b" appended to the end of the reference numeral.

[0031] Figure 7(A) is a cross-sectional view showing the process of bonding the upper layer, the second functional film 12b, to the intermediate transfer substrate 108b to form the dummy layer 107b. As shown in Figure 7(A), a sacrificial layer 109b is formed on the surface of the intermediate transfer substrate 108b.

[0032] The intermediate transfer substrate 108b is formed of, for example, silicon, and the sacrificial layer 109b is made of, for example, an oxide film (SiO ２ It is formed from (etc.). Alternatively, the intermediate transfer substrate 108b may be formed from glass and the sacrificial layer 109b may be formed from resin. In either case, the surface roughness of the sacrificial layer 109b is 10 nm or less.

[0033] The second functional film 12b is bonded to the surface of the sacrificial layer 109b on the intermediate transfer substrate 108b. As described above, the surface roughness of the lower surface of the second functional film 12b is 10 nm or less, so the second functional film 12b and the sacrificial layer 109b on the intermediate transfer substrate 108b are bonded by intermolecular forces.

[0034] The second functional film 12b is bonded to the intermediate transfer substrate 108b by rotating it 180 degrees around a central axis perpendicular to the surface of the intermediate transfer substrate 108b. Therefore, the pad region 14b of the second functional film 12b is located on the opposite side from the pad region 14a of the first functional film 12a (Figure 7(B)).

[0035] Furthermore, during the lamination process described later (Figure 9(A)), the second functional film 12b may be rotated 180 degrees relative to the first functional film 12a.

[0036] Subsequently, a dummy layer 107b is formed as a resin layer on the surface of the sacrificial layer 109b on the intermediate transfer substrate 108b. The dummy layer 107b is formed using the same photoresist as the resist layer 106b by spin coating or the like. However, the dummy layer 107b may be formed from a different material than the resist layer 106b.

[0037] The dummy layer 107b is formed on the sacrificial layer 109b adjacent to the functional layer 103b. More specifically, the dummy layer 107b is formed adjacent to the functional layer 103b on the side opposite to the electrode pad 104b. Furthermore, the dummy layer 107b is formed to the same height as the surface of the resist layer 106b on the functional layer 103b.

[0038] Figure 7(B) is a cross-sectional view showing the process of bonding the lower layer, the first functional film 12a, to the intermediate transfer substrate 108a to form a dummy layer 107a. As shown in Figure 7(B), a sacrificial layer 109a is formed on the surface of the intermediate transfer substrate 108a. The material of the intermediate transfer substrate 108a is the same as that of the intermediate transfer substrate 108b (Figure 7(A)), and the material of the sacrificial layer 109a is the same as that of the sacrificial layer 109b (Figure 7(A)).

[0039] The first functional film 12a is joined to the surface of the sacrificial layer 109a on the intermediate transfer substrate 108a. As described above, since the surface roughness of the lower surface of the functional layer 103a is 10 nm or less, the functional layer 103a and the sacrificial layer 109a on the intermediate transfer substrate 108a are joined by intermolecular forces.

[0040] After that, a dummy layer 107a as a resin layer is formed on the surface of the sacrificial layer 109a on the intermediate transfer substrate 108a. The material and formation method of the dummy layer 107a are the same as those of the dummy layer 107b (FIG. 7(A)).

[0041] The dummy layer 107a is formed on the sacrificial layer 109a so as to be adjacent to the functional layer 103a. More specifically, the dummy layer 107a is formed so as to be adjacent to the side opposite to the side where the electrode pad 104a of the functional layer 103a is formed. Further, the dummy layer 107a is formed up to the same height as the surface of the resist layer 106a on the functional layer 103a.

[0042] On the intermediate transfer substrate 108b in FIG. 7(A) described above, the dummy layer 107b is formed on the first side (left side in the figure) of the functional layer 103b, whereas on the intermediate transfer substrate 108a in FIG. 7(B), the dummy layer 107a is formed on the second side (right side in the figure) of the functional layer 103a.

[0043] Furthermore, a bonding layer 110 is formed so as to cover the resist layer 106a and the dummy layer 107a. The bonding layer 110 is, for example, a polyimide layer and has a thickness of several μm.

[0044] FIG. 8(A) is a cross-sectional view showing the step of separating the second functional film 12b from the intermediate transfer substrate 108b. As shown in FIG. 8(A), the second functional film 12b is separated from the intermediate transfer substrate 108b by removing the sacrificial layer 109b by wet etching or the like.

[0045] FIG. 8(B) is a cross-sectional view showing the step of separating the first functional film 12a from the intermediate transfer substrate 108a. As shown in FIG. 8(B), the first functional film 12a is separated from the intermediate transfer substrate 108a by removing the sacrificial layer 109a by wet etching or the like.

[0046] Figure 9(A) is a cross-sectional view showing the process of laminating the first functional film 12a and the second functional film 12b on the transfer substrate 120. The transfer substrate 120 is, for example, a glass substrate, but it may be other substrates. The surface roughness of the transfer substrate 120 is 10 nm or less.

[0047] As shown in Figure 9(A), the functional layer 103a of the first functional film 12a is bonded onto the transfer substrate 120. Also, the functional layer 103b of the second functional film 12b is bonded onto the first functional film 12a via the bonding layer 110.

[0048] The transfer substrate 120 and the functional layer 103a of the first functional film 12a are bonded by intermolecular forces. Similarly, the bonding layer 110 formed on the first functional film 12a and the functional layer 103b of the second functional film 12b are bonded by intermolecular forces.

[0049] Figure 9(B) is a cross-sectional view showing the process of exposing the electrode pads 104a and 104b of the functional films 12a and 12b. As shown in Figure 9(B), the resist layer 106a, the bonding layer 110, and the dummy layer 107b located on the electrode pad 104a of the first functional film 12a are removed by etching (e.g., dry etching) to expose the electrode pad 104a of the first functional film 12a.

[0050] Also, the resist layer 106b located on the electrode pad 104b of the second functional film 12b is removed by etching to expose the electrode pad 104b of the second functional film 12b.

[0051] Thereby, a laminate 100 is obtained in which the first functional film 12a and the second functional film 12b are laminated such that the pad regions 14a and 14b do not overlap. In the laminate 100, the dummy layer 107a (dummy region 15a) of the first functional film 12a is located below the pad region 14b of the second functional film 12b.

[0052] Figure 10 is a cross-sectional view showing a semiconductor device 10. As shown in Figure 10, a transfer substrate 120 on which functional films 12a and 12b are laminated is attached to a die pad 130, which is a support member. Lead frames 131 and 132 are arranged on both sides of the die pad 130.

[0053] Wire bonding connects the electrode pad 104a of the first functional film 12a to the lead frame 131 with wire 121, and connects the electrode pad 104b of the second functional film 12b to the lead frame 132 with wire 122.

[0054] After connecting the electrode pads 104a and 104b to the lead frames 131 and 132, the die pad 130, transfer substrate 120, and functional films 12a and 12b are sealed in a resin package 140. This completes the semiconductor device 10.

[0055] The manufacturing process for the semiconductor device 10 described herein can be said to include the steps of forming a first functional film 12a (first semiconductor thin film) having an electrode pad 104a and a second functional film 12b (second semiconductor thin film) having an electrode pad 104b on a substrate 101, separating the functional films 12a and 12b from the substrate 101, and laminating the functional films 12a and 12b on a transfer substrate 120 such that the electrode pads 104a and 104b do not overlap.

[0056] <Example of electrode pad connection> Figure 11 is a plan view showing an example of the connection of electrode pads 104a and 104b of the semiconductor device 10. In the example shown in Figure 11, eight electrode pads 104a (referred to as electrode pads 104a1 to 104a8) and eight electrode pads 104b (referred to as electrode pads 104b1 to 104b8) are provided.

[0057] The electrode pads 104a1 to 104a8 are located on the first side (left side in the figure) of the laminate 100, and the electrode pads 104b1 to 104b8 are located on the second side (right side in the figure) of the laminate 100.

[0058] Furthermore, eight lead frames 131 (referred to as lead frames 131a to 131h) are arranged on the first side of the die pad 130, and eight lead frames 132 (referred to as lead frames 132a to 132h) are arranged on the second side of the die pad 130.

[0059] The electrode pads 104a1 to 104a8 are connected to lead frames 131a to 131h by eight wires 121 (referred to as wires 121a to 121h). The electrode pads 104b1 to 104b8 are connected to lead frames 132a to 132h by eight wires 122 (referred to as wires 122a to 122h).

[0060] Since the electrode pads 104a and 104b of the functional films 12a and 12b are located in positions where they do not overlap (especially on both sides of the laminate 100), wire bonding can be easily performed, and the wire length can also be shortened. Note that the connection example shown in Figure 11 is merely an example, and the number of electrode pads 104a and 104b and the number of lead frames 131 and 132 (number of pins) can be changed as appropriate.

[0061] Figure 12 shows an example of an analog integrated circuit formed on the functional layers 103a and 103b of the functional films 12a and 12b. In the functional layers 103a and 103b, an analog integrated circuit, such as the operational amplifier 16 shown in Figure 12, is formed.

[0062] The operational amplifier 16 shown in Figure 12 has PNP transistors T1 and T2 and NPN transistors T3 and T4 in its input stage. The emitters of transistors T1 and T2 are connected to the power supply terminal VCC. The collectors of transistors T1 and T2 are connected to the collectors of transistors T3 and T4. The bases of transistors T1 and T2 are connected to the collector of transistor T3.

[0063] The base of transistor T3 is connected to the inverting input terminal IN (-). The base of transistor T4 is connected to the non-inverting input terminal IN (+). The emitters of transistors T3 and T4 are connected to the ground terminal GND via the current source CS.

[0064] The operational amplifier 16 has a gain stage comprising a PNP transistor T5, a capacitor C1, a diode D1, and a resistor R1. The emitter of transistor T5 is connected to the power supply terminal VCC. The base of transistor T5 is connected to the collector of transistor T2.

[0065] Capacitor C1 is connected to the collector of transistor T5, the collector of transistor T2, and the base of transistor T5. The anode of diode D1 is connected to the collector of transistor T5. The cathode of diode D1 is connected to the ground terminal GND via resistor R1.

[0066] The operational amplifier 16 has an NPN transistor T6 and a PNP transistor T7 in its output stage. The collector of transistor T6 is connected to the power supply terminal VCC. The base of transistor T6 is connected to the collector of transistor T5. The emitter of transistor T6 is connected to the output terminal OUT.

[0067] The emitter of transistor T7 is connected to the output terminal OUT. The base of transistor T7 is connected to the cathode of diode D1 and resistor R1. The collector of transistor T7 is connected to the ground terminal GND.

[0068] In addition, other integrated circuits besides the operational amplifier 16 shown in Figure 12 may be formed on the functional layers 103a and 103b of the functional films 12a and 12b.

[0069] <Configuration of Functional Films> Figure 13 is a cross-sectional view illustrating the configuration of the first functional film 12a and the second functional film 12b. Here, an example is described in which the functional layers 103a and 103b of the functional films 12a and 12b are P-type semiconductor layers, but they may also be N-type semiconductor layers.

[0070] In the lower layer, the first functional film 12a, N-type diffusion regions 81a and 82a are formed. In addition, P-type diffusion regions 83a and 84a are formed near the surface of the N-type diffusion region 81a. In addition, P-type diffusion regions 85a and 86a are formed near the surface of the N-type diffusion region 82a.

[0071] Furthermore, the N-type diffusion regions 81a and 82a formed in the functional layer 103a extend to the lower surface of the functional layer 103a.

[0072] A wiring layer and contacts (not shown) are formed on the surface of the functional layer 103a of the first functional film 12a, and it is covered with a protective layer 105a. The contacts are, for example, contacts 151 to 156 shown in Figure 18(A). The regions where these diffusion regions 81a, 82a, 83a, 84a, 85a, 86a, contacts, and wiring layers are formed correspond to the circuit region 13a.

[0073] The pad region 14a on which the electrode pad 104a is formed is located on the first side (left side in the figure) of the circuit region 13a in a plane parallel to the surface of the transfer substrate 120. In contrast, the dummy region 15a on which the dummy layer 107a is formed is located on the second side (right side in the figure) of the circuit region 13a.

[0074] The upper layer, the second functional film 12b, is laminated on the first functional film 12a via a bonding layer 110, which is a polyimide layer.

[0075] The second functional film 12b has N-type diffusion regions 81b and 82b formed therein. In addition, P-type diffusion regions 83b and 84b are formed near the surface of the N-type diffusion region 81b. Similarly, P-type diffusion regions 85b and 86b are formed near the surface of the N-type diffusion region 82b.

[0076] Furthermore, the N-type diffusion regions 81b and 82b formed in the functional layer 103b extend to the lower surface of the functional layer 103b.

[0077] A wiring layer and contacts (not shown) are formed on the surface of the functional layer 103b of the second functional film 12b, and it is covered with a protective layer 105b. The contacts are, for example, contacts 151 to 156 shown in Figure 18(A). These diffusion regions 81b, 82b, 83b, 84b, 85b, 86b and the region where the wiring layer is formed constitute the circuit region 13b.

[0078] The pad region 14b on which the electrode pad 104b is formed is located on the second side (right side in the figure) of the circuit region 13b in a plane parallel to the surface of the transfer substrate 120. On the other hand, the dummy region 15b on which the dummy layer 107b is formed is removed by etching as described with reference to Figures 9(A) to (B).

[0079] Thus, the pad regions 14a and 14b of the functional films 12a and 12b are positioned so as not to overlap (more specifically, on both sides of the laminate 100). Furthermore, the dummy region 15a of the first functional film 12a is located below the pad region 14b of the second functional film 12b.

[0080] A shielding layer 90 is formed between the functional layer 103a of the first functional film 12a and the functional layer 103b of the second functional film 12b (more specifically, on the functional layer 103a of the first functional film 12a). The shielding layer 90 is made of a conductive material such as aluminum or polysilicon. The shielding layer 90 is connected to the power terminal VCC or the ground terminal GND.

[0081] The shield layer 90 is formed on the upper surface (the surface facing the bonding layer 110) of the functional layer 103a of the first functional film 12a and on the lower surface (the surface facing the bonding layer 110) of the functional layer 103b of the second functional film 12b, in the portion where regions with different conductivity types face each other.

[0082] Specifically, a shield layer 91 is formed between the N-type diffusion region 81a of the first functional film 12a and the functional layer 103b (P-type) of the second functional film 12b. In addition, a shield layer 92 is formed between the P-type diffusion region 84a of the first functional film 12a and the N-type diffusion region 81b of the second functional film 12b.

[0083] Furthermore, a shield layer 93 is formed between the functional layer 103a (P-type) of the first functional film 12a and the N-type diffusion region 81b of the second functional film 12b. This shield layer 93 extends between the N-type diffusion region 82a of the first functional film 12a and the functional layer 103b (P-type) of the second functional film 12b.

[0084] Furthermore, a shield layer 94 is formed between the P-type diffusion region 86a of the first functional film 12a and the N-type diffusion region 82b of the second functional film 12b. Additionally, a shield layer 95 is formed between the functional layer 103a (P-type) of the first functional film 12a and the N-type diffusion region 82b of the second functional film 12b.

[0085] The shield layers 91 to 95 are collectively referred to as the shield layer 90. The shield layers 91 to 95 described here are merely examples; the shield layer 90 is only necessary in the portion where regions of different conductive types face each other on the upper surface (first surface) of the first functional film 12a and the lower surface (second surface) of the second functional film 12b.

[0086] Note that in Figure 13, for illustrative purposes, the shield layer 90 (shield layers 91-95) is shown on the surface of the first functional film 12a. However, if a contact or wiring layer is formed on the surface of the first functional film 12a, the shield layer 90 is formed to cover that contact or wiring layer (see Figure 18(A) described later).

[0087] <Operation> Next, the operation of Embodiment 1 will be described. Figures 14(A), (B) and 15(A) are schematic diagrams to explain the problem to be solved. In Figures 14(A) and (B), the first functional film 12a and the second functional film 12b shown in Figure 10 are shown in a further simplified form. The functional layers 103a and 103b of the first functional film 12a and the second functional film 12b are both assumed to be P-type semiconductor layers.

[0088] As shown in Figure 14(A), an N-type diffusion region 81a is formed in the functional layer 103a (P-type semiconductor layer) of the lower layer, the first functional film 12a. A P-type diffusion region 83a is formed near the surface of the N-type diffusion region 81a.

[0089] An N-type diffusion region 81b is formed in the functional layer 103b (P-type semiconductor layer) of the upper layer, the second functional film 12b. A P-type diffusion region 83b is formed near the surface of the N-type diffusion region 81b.

[0090] As explained with reference to Figure 13, the N-type diffusion region 81a extends to the lower surface of the functional layer 103a, and the N-type diffusion region 81b extends to the lower surface of the functional layer 103b.

[0091] As shown in Figure 14(B), negative charges with the opposite polarity to the conductivity type of the functional layer 103b tend to accumulate near the lower surface of the functional layer 103b (P-type semiconductor layer) of the second functional film 12b. Also, positive charges with the opposite polarity to the conductivity type of the N-type diffusion region 81b tend to accumulate near the lower surface of the N-type diffusion region 81b of the second functional film 12b.

[0092] The bonding layer 110 (polyimide layer) interposed between the functional films 12a and 12b is thin, with a thickness of only a few micrometers. Therefore, when the above-mentioned charge is generated on the second functional film 12b, as shown in Figure 15(A), a charge with the opposite polarity to the charge on the lower surface of the second functional film 12b is attracted to the upper surface of the first functional film 12a in a portion where the conductivity type is different from that of the lower surface of the second functional film 12b.

[0093] If electric charge is attracted to the upper surface of the first functional film 12a, malfunction of the semiconductor device 10 may occur. For example, if a positive charge is induced in the channel region between the P-type diffusion regions 83a and 84a, or in the channel region between the P-type diffusion regions 85a and 86a, as shown in Figure 13 above, a leakage current will flow, causing a malfunction.

[0094] Therefore, in Embodiment 1, a shield layer 90 is provided between the functional layer 103a of the first functional film 12a and the functional layer 103b of the second functional film 12b (more specifically, on the functional layer 103a of the first functional film 12a), in the portion where regions with different conductivity types face each other on the upper surface of the functional layer 103a and the lower surface of the functional layer 103b.

[0095] Specifically, as shown in Figure 15(B), a shield layer 91 is provided in the portion where the N-type diffusion region 81a of the first functional film 12a and the functional layer 103b (P-type) of the second functional film 12b face each other. In addition, a shield layer 92 is provided in the portion where the P-type diffusion region 83a of the first functional film 12a and the N-type diffusion region 81b of the second functional film 12b face each other.

[0096] In other words, a shield layer 91 is provided so as to cover the portion of the N-type diffusion region 81a of the first functional film 12a that overlaps with the functional layer 103b (P-type) of the second functional film 12b. Furthermore, a shield layer 92 is provided so as to cover the portion of the P-type diffusion region 83a of the first functional film 12a that overlaps with the N-type diffusion region 81b of the second functional film 12b.

[0097] By providing the shield layer 90 (91, 92) in this manner, the attraction of charges on the surface of the first functional film 12a can be suppressed, and malfunction of the semiconductor device 10 can be prevented.

[0098] Furthermore, from the standpoint of preventing malfunction of the semiconductor device 10, it is conceivable to cover the entire surface of the first functional film 12a with the shielding layer 90. However, in this case, the parasitic capacitance between the wiring layer of the first functional film 12a and the shielding layer 90 increases, resulting in a decrease in the response speed of the semiconductor device 10. In Embodiment 1, only a portion of the first functional film 12a is covered with the shielding layer 90, thereby enabling high-speed operation of the semiconductor device 10.

[0099] In Figure 15(A), the functional layers 103a and 103b were formed from P-type semiconductor layers, but the example is not limited to this. For example, as shown in Figure 16, the functional layers 103a and 103b may be formed from N-type semiconductor layers, with the conductivity of the diffusion regions 81a and 81b being P-type and the conductivity of the diffusion regions 83a and 83b being N-type.

[0100] In this case as well, if a shielding layer 90 is formed between the functional layer 103a of the first functional film 12a and the functional layer 103b of the second functional film 12b, and in the portion where regions with different conductivity types face each other on the upper surface of the functional layer 103a and the lower surface of the functional layer 103b, malfunction of the semiconductor device 10 can be prevented.

[0101] Figures 15(B) and 16 show simplified examples, but it is sufficient that the shield layer 90 is formed between the functional layers 103a and 103b of the functional films 12a and 12b, and in the portion where regions with different conductivity types face each other on the upper surface of the functional layer 103a and the lower surface of the functional layer 103b.

[0102] Furthermore, although an example in which a shield layer 90 is formed on the surface of the first functional film 12a has been described here, it is sufficient if the shield layer 90 is formed between the first functional film 12a and the second functional film 12b.

[0103] Furthermore, in the semiconductor device 10 of Embodiment 1, as shown in Figure 13, the pad area 14a of the first functional film 12a and the pad area 14b of the second functional film 12b are located in positions where they do not overlap.

[0104] Therefore, as explained with reference to Figure 11, wire bonding between the electrode pads 104a and 104b of the functional films 12a and 12b and the lead frames 131 and 132 arranged on both sides of the laminate 100 becomes easier, and the wire length can also be shortened.

[0105] Furthermore, during the wire bonding process, loads and ultrasonic vibrations are applied to the pad region 14b of the second functional film 12b. However, since the dummy region 15a of the first functional film 12a is located below the pad region 14b of the second functional film 12b, the load of wire bonding in the pad region 14b is prevented from extending to the circuit region 13a of the first functional film 12a.

[0106] Therefore, even when the first functional film 12a is made thin, damage to the circuit region 13a and the pad region 14a can be prevented. In other words, accurate circuit operation of the semiconductor device 10 can be guaranteed, and manufacturing yield can be improved.

[0107] Figure 17 is a schematic diagram illustrating the sheet resistance of the semiconductor layer functional layer 103 (i.e., functional layers 103a and 103b). As shown in Figure 17, the resistivity of the functional layer 103 is ρ (Ω·m), the length in the direction of current flow is L (m), and the cross-sectional area on the plane perpendicular to length L is S (m). ２ )

[0108] The sheet resistance R (Ω) of the functional layer 103 is expressed by the following equation (1), using the resistivity ρ, length L, and cross-sectional area S described above: R = ρL / S … (1)

[0109] For example, if the length L of the functional layer 103 increases to L + α, the cross-sectional area S of the functional layer 103 decreases to S - β. When the length L of the functional layer 103 increases and the cross-sectional area S decreases, the resistance R increases from equation (1). Similarly, the sheet capacitance of the functional layer 103 also changes.

[0110] Generally, it is known that if the thickness of the functional film 12 is made thinner than 400 μm, deformation is more likely to occur, and the above-mentioned changes in resistance and capacitance are more likely to occur.

[0111] In contrast, in Embodiment 1, a functional film 12 including a functional layer 103 with a thickness of 20 μm or less is separated from the substrate 101 and bonded to a smooth transfer substrate 120 such as a glass substrate by intermolecular forces. As a result, deformation of the functional layer 103 can be suppressed, and changes in resistance and capacitance can be suppressed.

[0112] In other words, when the semiconductor device 10 having functional layers 103a and 103b is configured as an analog integrated circuit device (for example, a bipolar operational amplifier), a high-precision analog integrated circuit device with minimal fluctuations in circuit constants can be obtained by suppressing changes in resistance and capacitance.

[0113] <Example of Functional Layer Configuration> Figures 18(A) and (B) are cross-sectional views showing specific examples of the configuration of the functional layer 103. The functional layer 103 shown in Figures 18(A) and (B) is applicable to either the functional layer 103a of the first functional film 12a or the functional layer 103b of the second functional film 12b.

[0114] The functional layer 103 shown in Figure 18(A) has the configuration of a bipolar operational amplifier. The functional layer 103 is a P-type semiconductor layer, and N-type diffusion regions 81 and 82 are formed thereon. P-type diffusion regions 83 and 84 are formed near the surface of the N-type diffusion region 81. In addition, a P-type diffusion region 85 is formed near the surface of the N-type diffusion region 82, and an N-type diffusion region 87 is formed near the surface of the P-type diffusion region 85.

[0115] A PNP structure is formed by the functional layer 103 (P-type), the N-type diffusion region 81, and the P-type diffusion regions 83 and 84. An NPN structure is formed by the N-type diffusion region 82, the P-type diffusion region 85, and the N-type diffusion region 87.

[0116] A base contact 151 is formed on the N-type diffusion region 81. An emitter contact 152 is formed on the P-type diffusion region 83. A collector contact 153 is formed on the P-type diffusion region 84.

[0117] Furthermore, a collector contact 154 is formed on the N-type diffusion region 82. A base contact 155 is formed on the P-type diffusion region 85. An emitter contact 156 is formed on the N-type diffusion region 87.

[0118] A wiring layer (not shown) connecting contacts 151 to 156 is also formed on the functional layer 103. The contacts 151 to 156 and the wiring layer are covered with a protective layer 105.

[0119] When the functional layer 103 shown in Figure 18(A) is the functional layer 103a of the first functional film 12a (lower layer), a shield layer 90 is also formed. The shield layer 90 can be formed, for example, as shown by reference numerals 901 to 906 in Figure 18(A).

[0120] In other words, the shield layer 90 can be formed on the surface of the functional layer 103 and any of the diffusion regions 81-85, 87, as indicated by reference numerals 902, 903, and 906. It can also be formed on insulating members 161, 162 that cover the contact or wiring layer, as indicated by reference numerals 901, 904, and 905.

[0121] Note that Figure 18(A) does not show the correspondence between regions with different conductivity types in the upper and lower functional layers 103a and 103b, so the arrangement indicated by reference numerals 901 to 906 is merely an example. Also, if the functional layer 103 shown in Figure 18(A) is the functional layer 103b of the second functional film 12b, the shield layer 90 is not required.

[0122] The functional layer 103 shown in Figure 18(B) has the configuration of a CMOS (complementary metal-oxide-semiconductor) operational amplifier. The functional layer 103 is a P-type semiconductor layer, and N-type diffusion regions 81, 88, and 89 are formed therein. P-type diffusion regions 83 and 84 are formed in the N-type diffusion region 81.

[0123] A PMOS structure is formed by the N-type diffusion region 81 and the P-type diffusion regions 83 and 84. An NMOS structure is formed by the functional layer 103 (P-type) and the N-type diffusion regions 88 and 89.

[0124] A source contact 171 is formed on the P-type diffusion region 83. A gate contact 172 is formed in the region of the N-type diffusion region 81 that spans the P-type diffusion regions 83 and 84, via a gate oxide film 181. A drain contact 173 is formed on the P-type diffusion region 84.

[0125] Furthermore, a source contact 174 is formed on the N-type diffusion region 88. A gate contact 175 is formed in the region spanning the N-type diffusion regions 88 and 89 via a gate oxide film 182. A drain contact 176 is formed on the N-type diffusion region 89.

[0126] Furthermore, a wiring layer (not shown) connecting contacts 171 to 176 is also formed on the functional layer 103. The contacts 171 to 176 and the wiring layer are covered with a protective layer 105.

[0127] When the functional layer 103 shown in Figure 18(B) is the functional layer 103a of the first functional film 12a (lower layer), a shield layer 90 is also formed. The shield layer 90 can be formed, for example, as the shield layers 907 to 910 shown in Figure 18(B).

[0128] In other words, the shield layer 90 can be formed on any of the surfaces of the functional layer 103 and the diffusion regions 81, 83, 84, 88, and 89, as indicated by reference numerals 907 and 908. It can also be formed on insulating members 183 and 184 covering the contact or wiring layer, as indicated by reference numerals 909 and 910.

[0129] Note that Figure 18(B) does not show the correspondence between the parts of the upper and lower functional layers 103a and 103b with different conductivity types, so the arrangement indicated by reference numerals 907 to 910 is merely an example. Also, if the functional layer 103 shown in Figure 18(B) is the functional layer 103b of the second functional film 12b, the shield layer 90 is not required.

[0130] <Effects of Embodiment 1> As described above, the semiconductor device 10 of Embodiment 1 has a functional layer 103a as a first semiconductor layer, a functional layer 103b as a second semiconductor layer stacked above the functional layer 103a, and a junction layer 110 provided between the functional layers 103a and 103b. The functional layer 103a has a first P-type region (functional layer 103a and P-type diffusion regions 83a, 84a, 85a, 86a) as a first conductivity type and a second N-type region (N-type diffusion regions 81a, 82a) as a second conductivity type on its upper surface (first surface) facing the junction layer 110. The functional layer 103b has a third P-type region (functional layer 103b) and a fourth N-type region (N-type diffusion regions 81b, 82b) on its lower surface (second surface) facing the junction layer 110. Between the functional layers 103a and 103b, a shield layer 90 is provided as a shielding layer in at least one of the portions where the first region and the fourth region face each other, and where the second region and the third region face each other (see Figure 13).

[0131] Because of this configuration, the shield layer 90 can suppress the influence of the charge on the functional layer 103b of the second functional film 12b from affecting the functional layer 103a of the first functional film 12a. This prevents malfunction of the semiconductor device 10.

[0132] Furthermore, since the electrode pad 104a, which serves as the first electrode pad formed on the functional layer 103a, and the electrode pad 104b, which serves as the second electrode pad formed on the functional layer 103b, are arranged so as not to overlap (see Figure 9(B)), wire bonding to the electrode pads 104a and 104b can be easily performed.

[0133] Furthermore, since the function of the first circuit formed in the circuit region 13a of the functional layer 103a and the second circuit formed in the circuit region 13b of the functional layer 103b are the same (see Figure 12), the semiconductor device 1 can be manufactured by stacking two functional films 12a and 12b, each having a circuit formed in the same photolithography process, while rotating one of them.

[0134] Furthermore, because the dummy layer 107a (resin layer) formed adjacent to the functional layer 103a and the electrode pad 104b formed on the functional layer 103b overlap (see Figure 9(B)), when a load or ultrasonic vibration force is applied to the electrode pad 104b during the wire bonding process, the load on the circuit region 13a of the functional layer 103a can be suppressed.

[0135] Furthermore, the manufacturing method for the semiconductor device 10 of Embodiment 1 includes the steps of forming a first functional film 12a (first semiconductor thin film) having an electrode pad 104a and a second functional film 12b (second semiconductor thin film) having an electrode pad 104b on a substrate 101; separating the functional films 12a and 12b from the substrate 101; and laminating the functional films 12a and 12b on another transfer substrate 120 such that their respective electrode pads 104a and 104b do not overlap. According to this manufacturing method, a semiconductor device 10 can be obtained in which the functional films 12a and 12b are laminated so that their electrode pads 104a and 104b do not overlap.

[0136] Furthermore, in the manufacturing method of the semiconductor device 10, the functional films 12a and 12b separated from the substrate 101 are transferred to an intermediate transfer substrate 108 to form dummy layers 107a and 107b (see Figures 7(A) and 7(B)). Therefore, the functional films 12a and 12b can be formed at high density on the substrate 101, and after transferring them to the intermediate transfer substrates 108a and 108b, each functional film 12a and 12b can be expanded by the dummy layers 107a and 107b.

[0137] Embodiment 2. <Manufacturing Process of Semiconductor Device> Figure 19 is a plan view showing the SOI wafer 21 of Embodiment 2. Multiple functional films 22 are formed on the SOI wafer 21 and are arranged in a matrix in two mutually orthogonal directions.

[0138] In the example shown in Figure 19, 36 functional films 22 are formed on the SOI wafer 21, each designated with reference numerals 22-1 to 22-36. However, the number of functional films 22 on the SOI wafer 21 is not particularly limited and may be several hundred, for example.

[0139] The functional film 22 has a circuit region 23, a pad region 24, and a dummy region 25. The circuit region 23 is formed with N-type diffusion regions, P-type diffusion regions, contacts, and wiring layers that constitute an analog integrated circuit. Electrode pads are formed in the pad region 24. The dummy region 25 is a region where no analog integrated circuit or electrode pads are formed. The dummy region 25 is located on the opposite side of the circuit region 23 from the pad region 24.

[0140] Figure 20(A) is a plan view showing the process of forming electrode pads 204 and protective layers 205 on the functional layer 203. Figure 20(B) is a cross-sectional view along the line segment 20B-20B shown in Figure 20(A).

[0141] As shown in Figure 20(B), the SOI wafer 21 has a substrate 201, an oxide film 202, and a functional layer 203. The material and thickness of the substrate 201, oxide film 202, and functional layer 203 are the same as those of the substrate 101, oxide film 102, and functional layer 103 in Embodiment 1 (Figures 2(A), (B)).

[0142] An analog integrated circuit is formed in the functional layer 203 by photolithography. The configuration of the analog integrated circuit is as described in Embodiment 1. The region in the functional layer 203 where the analog integrated circuit (each diffusion region, contact and wiring layer) is formed corresponds to the circuit region 23.

[0143] The same circuit pattern, that is, a circuit pattern having the same function, is formed in each circuit region 23 of the multiple functional films 22 on the SOI wafer 21. In other words, an analog integrated circuit, such as the operational amplifier 16 described in Embodiment 1 with reference to Figure 12, is formed on each functional film 22 by the same photolithography process.

[0144] Electrode pads 204 are formed on the functional layer 203. Specifically, multiple electrode pads 204 are formed along one side of the functional layer 203. The number of electrode pads 204 is eight in Figure 20(A), but is not particularly limited. The area on which the electrode pads 204 are formed corresponds to the pad area 24.

[0145] Note that electrode pads 204 are not formed in the circuit region 23. In contrast, a portion of the wiring layer from the circuit region 23 may extend into the pad region 24. Furthermore, a shielding layer 90 (see Figure 30) is formed on the functional layer 203 as needed, which will be described later.

[0146] The functional layer 203 extends from the circuit region 23 to the opposite side of the pad region 24. Of the functional layer 203, the region opposite the pad region 24 relative to the circuit region 23 is the dummy region 25.

[0147] The dummy region 25 is a region of the analog integrated circuit in which at least an active region is not formed and an electrode pad 204 is not formed. More preferably, the dummy region 25 is a region in which the analog integrated circuit (P-type diffusion region, N-type diffusion region, contacts and wiring layers) is not formed and an electrode pad 204 is not formed.

[0148] A protective layer 205, made of a nitride or oxide film, is formed to cover the surface of the functional layer 203. The wiring layer formed on the surface of the functional layer 203 is covered by the protective layer 205. The surface of the electrode pad 204 is exposed from the protective layer 205.

[0149] Of the multiple functional films 22 (Figure 19) formed on the substrate 201, the functional film 22 that becomes the lower layer in the lamination process (Figure 24) described later is referred to as the "first functional film 22a" (first semiconductor thin film), and the functional film 22 that becomes the upper layer is referred to as the "second functional film 22b" (second semiconductor thin film).

[0150] In the following description, each component (functional layer 203, electrode pad 204, etc.) and each region (circuit region 23, pad region 24, etc.) of the first functional film 22a will be described with the letter "a" appended to the end of the reference numeral. Similarly, each component and each region of the second functional film 22b will be described with the letter "b" appended to the end of the reference numeral.

[0151] Figure 21(A) is a cross-sectional view showing the process of forming a resist layer 206b on the protective layer 205b of the second functional film 22b. As shown in Figure 21(A), a resist layer 206b is formed using a photoresist or the like so as to cover the electrode pads 204b and the protective layer 205b of the second functional film 22b.

[0152] Figure 21(B) is a cross-sectional view showing the process of removing the dummy region 25b of the second functional film 22b. As shown in Figure 21(B), the functional layer 203b, protective layer 205b, and resist layer 206b included in the dummy region 25b (Figure 21(A)) of the second functional film 22b are removed by etching (e.g., dry etching).

[0153] Figure 22 is a cross-sectional view showing the process of forming a resist layer 206a and a bonding layer 210 on the protective layer 205a of the first functional film 22a. As shown in Figure 22, the resist layer 206a is formed so as to cover the electrode pads 204a and the protective layer 205a of the first functional film 22a. The material of the resist layer 206a is the same as that of the resist layer 106a in Embodiment 1.

[0154] Furthermore, a bonding layer 210 is formed on the surface of the resist layer 206a. The bonding layer 210 is, for example, a polyimide layer with a thickness of several micrometers. For the first functional film 22a, the dummy region 25a is not removed.

[0155] As shown in Figures 21(A) and 22, the second functional film 22b is positioned on the substrate 201 rotated 180 degrees relative to the first functional film 22a. However, the second functional film 22b may be rotated 180 degrees relative to the first functional film 22a during lamination (Figure 24), as described later.

[0156] Figure 23(A) is a cross-sectional view showing the process of separating the second functional film 22b from the substrate 201. As shown in Figure 23(A), the second functional film 22b is separated from the substrate 201 by removing the oxide film 202 by wet etching or the like.

[0157] Figure 23(B) is a cross-sectional view showing the process of separating the first functional film 22a from the substrate 201. As shown in Figure 23(B), the first functional film 22a is separated from the substrate 201 by removing the oxide film 202 by wet etching or the like.

[0158] Figures 23(A) and (B) show a method for removing the oxide film 202, but the surface layer of the substrate 201 may also be etched in the (110) direction, as described in Embodiment 1 with reference to Figures 6(A) and (B). In either case, the surface roughness of the lower surfaces of the functional films 22a and 22b can be made 10 nm or less. Furthermore, the first functional film 22a can be used without separating it from the substrate 201 (see Figure 26, described later).

[0159] Figure 24 is a cross-sectional view showing the process of laminating a first functional film 22a and a second functional film 22b on a transfer substrate 220. The transfer substrate 220 is, for example, a glass substrate, but may be any other substrate. The surface roughness of the transfer substrate 220 is 10 nm or less.

[0160] As shown in Figure 24, the functional layer 203a of the first functional film 22a is bonded to the transfer substrate 220. The functional layer 203b of the second functional film 22b is bonded to the first functional film 22a via the bonding layer 210.

[0161] The transfer substrate 220 and the functional layer 203a of the first functional film 22a are joined by intermolecular forces. Similarly, the bonding layer 210 formed on the first functional film 22a and the functional layer 203b of the second functional film 22b are joined by intermolecular forces.

[0162] Figure 25 is a cross-sectional view showing the process of exposing the electrode pads 204a and 204b of the functional films 22a and 22b. As shown in Figure 25, the electrode pads 204a of the first functional film 22a are exposed by etching away the resist layer 206a and bonding layer 210 located on the electrode pads 204a of the first functional film 22a.

[0163] Furthermore, the electrode pads 204b of the second functional film 22b are exposed by etching away the resist layer 206b located on the electrode pads 204b of the second functional film 22b.

[0164] This results in a laminate 200 in which the first functional film 22a and the second functional film 22b are laminated in such a way that their pad regions 24a and 24b do not overlap. In the laminate 200, the dummy region 25a of the first functional film 22a is located below the pad region 24b of the second functional film 22b.

[0165] Figure 26 is a cross-sectional view showing an example in which the first functional film 22a is used without being separated from the substrate 201. In the example shown in Figure 26, the second functional film 22b is laminated on the first functional film 22a, which is formed on the substrate 201 via an oxide film 202, via a bonding layer 210.

[0166] In this case, the transfer substrate 220 (Figure 25) becomes unnecessary.

[0167] Figure 27 is a cross-sectional view showing the semiconductor device 20. As shown in Figure 27, a transfer substrate 220 on which functional films 22a and 22b are laminated is attached to a die pad 230, which is a support member. Lead frames 231 and 232 are arranged on both sides of the die pad 230.

[0168] By wire bonding, the electrode pad 204a of the first functional film 22a is connected to the lead frame 231 with wire 221, and the electrode pad 204b of the second functional film 22b is connected to the lead frame 232 with wire 222.

[0169] After connecting the electrode pads 204a and 204b to the lead frames 231 and 232, the die pad 230, transfer substrate 220, and functional films 22a and 22b are sealed in a resin package 240. This completes the semiconductor device 20.

[0170] Figure 28 is a cross-sectional view showing another configuration example of the semiconductor device 20 (referred to as semiconductor device 20A). In the semiconductor device 20A shown in Figure 28, as shown in Figure 26, a second functional film 22b is laminated on a first functional film 22a formed on a substrate 201 via an oxide film 202, with a bonding layer 210 in between.

[0171] In this semiconductor device 20A, a first functional film 22a and a second functional film 22b are laminated on a substrate 201, and the substrate 201 is attached to a die pad 230. Therefore, a transfer substrate 220 (Figure 27) is not required. In other respects, it is configured the same as the semiconductor device 20 shown in Figure 27.

[0172] Figure 29 is a cross-sectional view showing yet another configuration example of the semiconductor device 20 (referred to as semiconductor device 20B). The semiconductor device 20B shown in Figure 29 is obtained by selecting a method to leave the oxide film 202 when separating the second functional film 22b from the substrate 201 (Figure 21(A)), as described in Embodiment 1 with reference to Figures 6(A) and (B).

[0173] In this case, the oxide film 202 of the second functional film 22b is bonded to the surface of the bonding layer 210 on the first functional film 22a.

[0174] <Configuration of Functional Films> Figure 30 is a cross-sectional view illustrating the configuration of the first functional film 22a and the second functional film 22b. Here, an example is described in which the functional layers 203a and 203b of the functional films 22a and 22b are P-type semiconductor layers, but they may also be N-type semiconductor layers.

[0175] The functional layer 203a of the first functional film 22a has N-type diffusion regions 81a, 82a and P-type diffusion regions 83a, 84a, 85a, and 86a formed on it, similar to the functional layer 103a of the first functional film 12a in Embodiment 1. In addition, as described in Embodiment 1, a contact and wiring layer is formed on the surface of the functional layer 203a of the first functional film 22a and is covered with a protective layer 205a.

[0176] The functional layer 203b of the second functional film 22b has N-type diffusion regions 81b, 82b and P-type diffusion regions 83b, 84b, 85b, and 86b formed on it, similar to the functional layer 103b of the second functional film 12b in Embodiment 1. In addition, as described in Embodiment 1, a contact and wiring layer is formed on the surface of the functional layer 203b of the second functional film 22b and is covered with a protective layer 205b.

[0177] A shielding layer 90 is provided between the functional layer 203a of the first functional film 22a and the functional layer 203b of the second functional film 22b (more specifically, on the functional layer 203a of the first functional film 22a). The shielding layer 90 is made of a conductive material such as aluminum or polysilicon and is connected to the power terminal VCC or the ground terminal GND.

[0178] The shield layer 90 is formed on the upper surface (the surface facing the bonding layer 210) of the functional layer 203a of the first functional film 22a and on the lower surface (the surface facing the bonding layer 210) of the functional layer 203b of the second functional film 22b, in the portion where regions with different conductivity types face each other. The specific arrangement of the shield layer 90 (shield layers 91 to 95) is as described in Embodiment 1 with reference to Figure 13.

[0179] <First example of electrode pad connection> Figure 31 is a plan view showing an example of connection of electrode pads 204a and 204b of the semiconductor device 20 of Embodiment 2. In the example shown in Figure 31, five electrode pads 204a (referred to as electrode pads 204a1 to 204a5) and five electrode pads 204b (referred to as electrode pads 204b1 to 204b5) are provided.

[0180] Electrode pads 204a1 to 204a5 are positioned on the first side (left side in the figure) of the laminate 200. Electrode pads 204b1 to 204b5 are positioned on the second side (right side in the figure) of the laminate 200.

[0181] Furthermore, four lead frames 231 (referred to as lead frames 231a to 231d) are arranged on the first side of the die pad 230, and four lead frames 232 (referred to as lead frames 232a to 232d) are arranged on the second side of the die pad 230.

[0182] Electrode pads 204a2 to 204a5 are connected to lead frames 231a to 231d by four wires 221 (referred to as wires 221a to 221d). Lead frames 231a, 231b, 231c, and 231d correspond to the ground terminal GND, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively. Electrode pad 204a1 is connected to the lead frame 232a on the opposite side by a wire L2 that spans the laminate 200.

[0183] Electrode pads 204b1, 204b3-204b5 are connected to lead frames 232a-232d by four wires 222 (referred to as 222a-222d). Lead frames 232a, 232b, 232c, and 232d correspond to the power terminal VCC, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT. Electrode pad 204b2 is connected to the lead frame 231a on the opposite side by a wire L1 that spans the laminate 200.

[0184] <Second example of electrode pad connection> Figure 32 is a plan view showing another example of connection of electrode pads 204a and 204b of the semiconductor device 20. In the example shown in Figure 32, the electrode pad 204a of the first functional film 22a and the electrode pad 204b of the second functional film 22b are provided on the same side (left side in the figure) of the transfer substrate 220.

[0185] In the example shown in Figure 32, seven electrode pads 204a (referred to as electrode pads 204a1 to 204a7) and seven electrode pads 204b (referred to as electrode pads 204b1 to 204b7) are provided.

[0186] Electrode pads 204a1, 204a2, 204a3, 204a4, 204a5, 204a6, and 204a7 are for the ground terminal GND, the power terminal VCC, the non-inverting input terminal IN (+), the inverting input terminal IN (-), the output terminal OUT, the ground terminal GND, and the power terminal VCC, respectively. Electrode pads 204a1 and 204a6 for the ground terminal GND may be used selectively. Electrode pads 204a2 and 204a7 for the power terminal VCC may be used selectively.

[0187] Furthermore, four lead frames 231 (referred to as lead frames 231a to 231d) are provided on the first side (left side in the figure) of the transfer substrate 220, and four lead frames 232 (referred to as lead frames 232a to 232d) are provided on the second side (right side in the figure) of the transfer substrate 220.

[0188] The electrode pads 204a1, 204a3 to 204a5 are connected to lead frames 231a to 231d by four wires 221 (referred to as wires 221a to 221d). Lead frames 231a, 231b, 231c, and 231d correspond to the ground terminal GND, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively.

[0189] Electrode pads 204b1, 204b2, 204b3, 204b4, 204b5, 204b6, and 204b7 are for the power terminal VCC, the ground terminal GND, the output terminal OUT, the inverting input terminal IN (-), the non-inverting input terminal IN (+), the power terminal VCC, and the ground terminal GND, respectively. Electrode pads 204b1 and 204b6 for the power terminal VCC may be used selectively. Electrode pads 204b2 and 204b7 for the ground terminal GND may be used selectively.

[0190] The electrode pads 204b1, 204b3 to 204b5 are connected to lead frames 232a to 232d by four wires 222 (referred to as wires 222a to 222d) that span the laminate 200. Lead frames 232a, 232b, 232c, and 232d correspond to the power terminal VCC, the output terminal OUT, the inverting input terminal IN (-), and the non-inverting input terminal IN (+), respectively.

[0191] Furthermore, electrode pads 204a2 and 204b6 for the power terminal VCC are connected to each other. Electrode pads 204a6 and 204b2 for the ground terminal GND are also connected to each other.

[0192] In the example shown in Figure 32, the circuit region 23a of the first functional film 22a (Figure 30) is located below the pad region 24b of the second functional film 22b. Therefore, the effect of preventing the effects of load and ultrasonic vibration during the wire bonding process in the pad region 24b of the second functional film 22b from affecting the circuit region 23a of the first functional film 22a is low. However, the effect of preventing malfunction of the semiconductor device 20 by the shielding layer 90, as explained with reference to Figure 30, can be obtained.

[0193] <Third Connection Example of Electrode Pads> Figure 33 is a plan view showing yet another connection example of the electrode pads 204a and 204b of the semiconductor device 20. In the example shown in Figure 33, nine electrode pads 204a (referred to as electrode pads 204a1 to 204a9) and nine electrode pads 204b (referred to as electrode pads 204b1 to 204b9) are provided.

[0194] Electrode pads 204a1, 204a2, 204a3, 204a4, 204a5, 204a6, 204a7, 204a8, and 204a9 are for the power terminal VCC, the ground terminal GND, the output terminal OUT, the inverting input terminal IN (-), the non-inverting input terminal IN (+), the inverting input terminal IN (-), the output terminal OUT, the ground terminal GND, and the power terminal VCC, respectively.

[0195] The electrode pads 204a1 and 204a9 for the power terminal VCC may be used selectively. The electrode pads 204a2 and 204a8 for the ground terminal GND may be used selectively. The electrode pads 204a3 and 204a7 for the output terminal OUT may be used selectively.

[0196] Four lead frames 231 (referred to as lead frames 231a to 231d) are provided on the first side (left side in the figure) of the transfer substrate 220, and four lead frames 232 (referred to as lead frames 232a to 232d) are provided on the second side (right side in the figure) of the transfer substrate 220.

[0197] The electrode pads 204a2, 204a5, 204a6, and 204a7 are connected to lead frames 231a, 231b, 231c, and 231d by four wires 221 (referred to as wires 221a, 221b, 221c, and 221d). The lead frames 231a, 231b, 231c, and 231d correspond to the ground terminal GND, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively.

[0198] Electrode pads 204b1, 204b2, 204b3, 204b4, 204b5, 204b6, 204b7, 204b8, and 204b9 are for the power terminal VCC, the ground terminal GND, the output terminal OUT, the inverting input terminal IN (-), the non-inverting input terminal IN (+), the inverting input terminal IN (-), the output terminal OUT, the ground terminal GND, and the power terminal VCC, respectively.

[0199] The electrode pads 204b1 and 204b9 for the power terminal VCC may be used selectively. The electrode pads 204b2 and 204b8 for the ground terminal GND may be used selectively. The electrode pads 204b3 and 204b7 for the output terminal OUT may be used selectively.

[0200] The electrode pads 204b1, 204b3 to 204b5 are connected to lead frames 232a to 232d by four wires 222 (referred to as wires 222a, 222b, 222c, and 222d). Lead frames 232a, 232b, 232c, and 232d correspond to the power terminal VCC, the output terminal OUT, the inverting input terminal IN (-), and the non-inverting input terminal IN (+), respectively.

[0201] Furthermore, electrode pads 204a1 and 204b9 for the power terminal VCC are connected to each other by a wire L2 that spans the laminate 200. Electrode pads 204a8 and 204b2 for the ground terminal GND are connected to each other by a wire L1 that spans the laminate 200.

[0202] In the connection example shown in Figure 33, the electrode pads 204a1 to 204a9 of the first functional film 22a are arranged symmetrically with respect to the center of their arrangement direction (vertical direction in the figure). Similarly, the electrode pads 204b1 to 204b9 of the second functional film 22b are arranged symmetrically with respect to the center of their arrangement direction. In this case, the lengths of each wire 221 and 222 can be shortened.

[0203] <Fourth example of electrode pad connection> Figures 34 and 35 are a plan view and a cross-sectional view showing an example of connection of electrode pads 204a and 204b when a relay substrate 250 is provided on the semiconductor device 20. In the example shown in Figures 34 and 35, a relay substrate 250 is provided between the transfer substrate 220 and the die pad 230.

[0204] Five electrode pads 204a (referred to as electrode pads 204a1 to 204a5) are provided on the first side (left side in the figure) of the laminate 200, and five electrode pads 204b (referred to as electrode pads 204b1 to 204b5) are provided on the second side (right side in the figure) of the laminate 200.

[0205] Furthermore, four lead frames 231 (referred to as lead frames 231a to 231d) are provided on the first side of the transfer substrate 220, and four lead frames 232 (referred to as lead frames 232a to 232d) are provided on the second side of the transfer substrate 220.

[0206] On the first side of the relay board 250, relay terminals R11 to R15 (collectively referred to as relay terminal R10) and relay terminals R31 to R34 (collectively referred to as relay terminal R30) are formed. Relay terminals R11 to R15 are connected to electrode pads 204a1 to 204a5 via wires 221a to 221e. Relay terminals R31 to R34 are connected to lead frames 231a to 231d via wires 225a to 225d.

[0207] On the second side of the relay board 250, relay terminals R21 to R25 (collectively referred to as relay terminal R20) and relay terminals R41 to R44 (collectively referred to as relay terminal R40) are formed. Relay terminals R21 to R25 are connected to electrode pads 204b1 to 204b5 via wires 222a to 222e. Relay terminals R41 to R44 are connected to lead frames 232a to 232d via wires 226a to 226d.

[0208] The relay terminals R12 and R41 for the power terminal VCC are connected inside the relay board 250. Similarly, the relay terminals R21 and R31 for the ground terminal GND are connected inside the relay board 250.

[0209] In the example shown in Figures 34 and 35, the electrode pads 204a and 204b are connected to the lead frames 231 and 232 via the relay terminals R10, R20, R30 and R40 of the relay board 250. Since the relay terminals are also connected to each other inside the relay board 250, the length of each wire can be shortened.

[0210] Except for the points mentioned above, the semiconductor device 20 of Embodiment 2 is formed in the same manner as the semiconductor device 10 of Embodiment 1.

[0211] In this example, as shown in Figures 21(A) and (B), the dummy region 25b of the functional film 22b was removed before the functional films 22a and 22b were laminated as shown in Figure 24. However, it is also possible to laminate the functional films 22a and 22b first and then remove the dummy region 25b of the functional film 22b.

[0212] Furthermore, while Figures 23(A) and (B) above show examples of separating the functional films 22 (first functional film 22a and second functional film 22b) of the SOI wafer 21 individually from the substrate 201, it is also possible to separate multiple functional films 22 of the SOI wafer 21 all at once.

[0213] For example, as shown in Figure 36(A), a plurality (e.g., 36) second functional films 22b are formed on the substrate 211 of the SOI wafer 21. Then, as shown in Figure 36(B), the assembly G of the 36 second functional films 22b is held together in a holder (not shown), and the oxide film 202 (Figure 20(B)) is removed to separate it from the substrate 211.

[0214] Furthermore, the assembly G of 36 second functional films 22b held in the holder is rotated 180 degrees around its central position C. Then, as shown in Figure 36(C), the assembly G of 36 second functional films 22b held in the holder is superimposed on 36 first functional films 22a formed on another substrate 212.

[0215] This makes it possible to obtain multiple laminates 200 in which a first functional film 22a and a second functional film 22b are laminated on a substrate 212.

[0216] <Effects of Embodiment 2> As described above, in the semiconductor device 20 of Embodiment 2, the dummy region 25a formed on the functional layer 203a of the first functional film 22a and the electrode pad 204b of the functional layer 203b of the second functional film 22b overlap (see Figure 25). Therefore, when a load or force due to ultrasonic vibration is applied to the electrode pad 204b during the wire bonding process, the load on the circuit region 23a of the functional layer 203a of the first functional film 22a can be suppressed.

[0217] Furthermore, since dummy regions 25a and 25b are formed on the functional films 22a and 22b (see Figures 21(A) and 22), the process of forming a resin dummy layer as in Embodiment 1 is unnecessary. Therefore, a two-layer semiconductor device 20 can be manufactured using a simple manufacturing process.

[0218] Furthermore, since the electrode pads 204a and 204b of the functional films 22a and 22b are arranged so as not to overlap (see Figure 25), wire bonding to the electrode pads 204a and 204b is facilitated.

[0219] Furthermore, since a shielding layer 90 is provided as a shielding layer in the portion where regions with different conductivity types face each other between the functional layers 203a and 203b (see Figure 30), malfunctions of the semiconductor device 20 can be prevented.

[0220] Embodiment 3. <Manufacturing Process of Semiconductor Device> Figure 37 is a plan view showing the SOI wafer 31 of Embodiment 3. Multiple functional films 32 are formed on the SOI wafer 31 and are arranged in a matrix in two mutually orthogonal directions.

[0221] In the example shown in Figure 37, 36 functional films 32 are formed on the SOI wafer 31, each designated with reference numerals 32-1 to 32-36. However, the number of functional films 32 on the SOI wafer 31 is not particularly limited and may be several hundred, for example.

[0222] The functional film 32 has a circuit region 33 and a pad region 34. The circuit region 33 has N-type diffusion regions, P-type diffusion regions, contacts, and wiring layers that constitute an analog integrated circuit formed thereon. The pad region 34 has electrode pads formed thereon.

[0223] Figure 38(A) is a plan view showing the process of forming electrode pads 304 and protective layers 305 on the functional layer 303. Figure 38(B) is a cross-sectional view along the line segment 38B-38B shown in Figure 38(A). Figure 38(C) is a cross-sectional view along the line segment 38C-38C shown in Figure 38(A).

[0224] As shown in Figures 38(B) to (C), the SOI wafer 31 has a substrate 301, an oxide film 302, and a functional layer 303. The material and thickness of the substrate 301, oxide film 302, and functional layer 303 are the same as those of the substrate 101, oxide film 102, and functional layer 103 in Embodiment 1.

[0225] An analog integrated circuit is formed in the functional layer 303 by a photolithography process. The configuration of the analog integrated circuit is as described in Embodiment 1. The region in the functional layer 303 where the analog integrated circuit (each diffusion region, contact and wiring layer) is formed corresponds to the circuit region 33.

[0226] The same circuit pattern, that is, a circuit pattern having the same function, is formed in each circuit region 33 of the multiple functional films 32 on the SOI wafer 31. In other words, an analog integrated circuit, such as the operational amplifier 16 described in Embodiment 1 with reference to Figure 12, is formed on each functional film 32 by the same photolithography process.

[0227] Electrode pads 304 are formed on the functional layer 303. Specifically, multiple electrode pads 304 are formed along one side of the functional layer 303. The number of electrode pads 304 is eight in Figure 38(A), but is not particularly limited. The area on which the electrode pads 304 are formed corresponds to the pad area 34.

[0228] Note that electrode pads 304 are not formed in the circuit region 33. In contrast, a portion of the wiring layer may extend from the circuit region 33 to the pad region 34. Furthermore, a shielding layer 90 (Figure 46) is formed on the functional layer 303 as needed, but this will be described later.

[0229] A protective layer 305, made of a nitride or oxide film, is formed to cover the surface of the functional layer 303. The wiring layer formed on the surface of the functional layer 303 is covered by the protective layer 305. The surface of the electrode pad 304 is exposed from the protective layer 305.

[0230] Figure 39(A) is a plan view showing the process of forming a resist layer 306 on a protective layer 305. Figure 39(B) is a cross-sectional view along the line segment 39B-39B shown in Figure 39(A). Figure 39(C) is a cross-sectional view along the line segment 39C-39C shown in Figure 39(A).

[0231] As shown in Figures 39(A) to (C), a resist layer 306 is formed using a photoresist or the like so as to cover the electrode pad 304 and protective layer 305 on the functional layer 303.

[0232] Figure 40(A) is a plan view showing the process of separating the functional film 32 from the substrate 301. Figure 40(B) is a cross-sectional view along the line segment 40B-40B shown in Figure 40(A). Figure 40(C) is a cross-sectional view along the line segment 40C-40C shown in Figure 40(A).

[0233] As shown in Figures 40(A) to (C), the functional film 32 (functional layer 303, electrode pad 304, and protective layer 305) is separated from the substrate 301 by removing the oxide film 302 (Figures 39(B), (C)) by wet etching or the like.

[0234] Alternatively, instead of removing the oxide film 302, the method described in Embodiment 1 with reference to Figures 6(A) and (B) may be used. In either case, the surface roughness of the lower surface of the functional film 32 can be reduced to 10 nm or less.

[0235] Figure 41(A) is a plan view showing the process of bonding the functional film 32 to the intermediate transfer substrate 308 to form a dummy layer. Figure 41(B) is a cross-sectional view along the line segment 41B-41B shown in Figure 41(A). Figure 41(C) is a cross-sectional view along the line segment 41C-41C shown in Figure 41(A).

[0236] As shown in Figures 41(A) to (C), a sacrificial layer 309 is formed on the surface of the intermediate transfer substrate 308. The surface roughness of the sacrificial layer 309 is 10 nm or less. The functional layer 303 and the sacrificial layer 309 on the intermediate transfer substrate 308 are joined by intermolecular forces. The materials of the intermediate transfer substrate 308 and the sacrificial layer 309 are the same as those of the intermediate transfer substrates 108a, 108b and sacrificial layers 109a, 109b in Embodiment 1 (Figures 7(A), (B)).

[0237] Subsequently, a dummy layer 307 is formed on the surface of the sacrificial layer 309 on the intermediate transfer substrate 308. The dummy layer 307 is formed along three sides of the functional layer 303, excluding the electrode pad 304 side. That is, the dummy layer 307 is formed to expand the area of ​​the functional film 32 in three directions excluding the electrode pad 304 side of the functional layer 303. The dummy layer 307 is also formed to the same height as the surface of the resist layer 306 on the functional layer 303.

[0238] The dummy layer 307 is formed from the same photoresist as the resist layer 306 by spin coating or the like. Alternatively, the dummy layer 307 may be formed from a different material than the resist layer 306.

[0239] Figure 42(A) is a plan view showing the process of separating the functional film 32 from the intermediate transfer substrate 308. Figure 42(B) is a cross-sectional view along the line segment 42B-42B shown in Figure 42(A). Figure 42(C) is a cross-sectional view along the line segment 42C-42C shown in Figure 42(A).

[0240] As shown in Figures 42(A) to (C), the functional film 32 is separated from the intermediate transfer substrate 308 by removing the sacrificial layer 309 by wet etching or the like.

[0241] Of the multiple functional films 32 separated from the substrate 301, the functional film 32 that becomes the bottom layer in the lamination process described later (Figure 43) is referred to as the "first functional film 32a" (first semiconductor thin film), the functional film 32 that becomes the second layer from the bottom is referred to as the "second functional film 32b" (second semiconductor thin film), the functional film 32 that becomes the third layer from the bottom is referred to as the "third functional film 32c" (third semiconductor thin film), and the functional film 32 that becomes the top layer is referred to as the "fourth functional film 32d" (fourth semiconductor thin film).

[0242] In the following description, each component (functional layer 303, electrode pad 304, etc.) and each region (circuit region 33, pad region 34, etc.) of the first functional film 32a will be described with "a" appended to the end of the reference numeral. Similarly, each component and region of the second functional film 32b will be described with "b" appended to the end of the reference numeral. Each component and region of the third functional film 32c will be described with "c" appended to the end of the reference numeral. Each component and region of the fourth functional film 32d will be described with "d" appended to the end of the reference numeral.

[0243] Of the functional films 32a to 32d, bonding layers 310a, 310b, and 310c (Figure 43) are formed on the surfaces of the first to third functional films 32a to 32c. The formation of bonding layers 310a to 310c is the same as the formation of bonding layer 110 described in Embodiment 1 with reference to Figure 7(B). Bonding layers 310a to 310c are, for example, polyimide layers with a thickness of several μm. In contrast, no bonding layer is formed on the surface of the fourth functional film 32d.

[0244] Figure 43 is a cross-sectional view showing the process of laminating the first to fourth functional films 32a to 32d on the transfer substrate 320. The material and surface roughness of the transfer substrate 320 are the same as those of the transfer substrate 120 in Embodiment 1.

[0245] As shown in Figure 43, the functional layer 303a of the first functional film 32a is bonded to the transfer substrate 320. The second functional film 32b is bonded to the first functional film 32a via a bonding layer 310a. The third functional film 32c is bonded to the second functional film 32b via a bonding layer 310b. The fourth functional film 32d is bonded to the third functional film 32c via a bonding layer 310c.

[0246] This results in a laminate 300 in which the first to fourth functional films 32a to 32d are laminated. The transfer substrate 320 and the first to fourth functional films 32a to 32d are joined to each other by intermolecular forces (for functional films 32b to 32d, via bonding layers 310a to 310c).

[0247] In Figure 43, the normal direction to the surface (main surface) of the transfer substrate 320 is defined as the Z direction. Two mutually orthogonal directions on a plane parallel to the surface of the transfer substrate 320 are defined as the X direction and the Y direction.

[0248] The first functional film 32a is laminated such that the pad region 34a is located in the -Y direction (left side in the figure) of the functional layer 303a. The second functional film 32b is laminated such that the pad region 34b is located in the +Y direction (right side in the figure) of the functional layer 303b. The third functional film 32c is laminated such that the pad region 34c (see Figure 44(A)) is located in the +X direction (front in the figure) of the functional layer 303c. The fourth functional film 32d is laminated such that the pad region 34d (see Figure 44(A)) is located in the -X direction (back in the figure) of the functional layer 303d.

[0249] Therefore, the pad regions 34a to 34d are positioned at 90-degree rotations with respect to a central axis perpendicular to the surface of the transfer substrate 320. In this way, the first to fourth functional films 32a to 32d are laminated so that the pad regions 34a to 34d do not overlap.

[0250] Figures 44(A) to 44(D) are schematic diagrams illustrating the lamination state and etching process of the first to fourth functional films 32a to 32d. As shown in Figure 44(A), the pad regions 34a to 34d of each layer are formed at the -Y direction end, the +Y direction end, the +X direction end, and the -X direction end of the laminate 300, respectively.

[0251] As shown in Figure 44(B), the Y-direction ends and the +X-direction end of the fourth functional film 32d are removed by etching. More specifically, the portion of the fourth functional film 32d located above the pad region 34a of the first functional film 32a, the portion located above the pad region 34b of the second functional film 32b (Figure 44(C)), and the portion located above the pad region 34c of the third functional film 32c are removed by etching.

[0252] Next, as shown in Figure 44(C), both ends of the third functional film 32c in the Y direction are removed by etching. More specifically, the portion of the third functional film 32c located above the pad region 34a of the first functional film 32a and the portion of the second functional film 32b located above the pad region 34b are removed by etching.

[0253] Next, as shown in Figure 44(D), the -Y direction end of the second functional film 32b is removed by etching. More specifically, the portion of the second functional film 32b located above the pad region 34a of the first functional film 32a is removed.

[0254] Furthermore, the portion of the resist layer 306d (Figure 43) of the fourth functional film 32d that is located on the electrode pad 304d is also removed by etching. As a result, a laminate 300 is obtained in which the first to fourth functional films 32a to 32d are laminated and the electrode pads 304a to 304d are exposed.

[0255] In the laminate 300, the dummy region 35a of the first functional film 32a is located below the pad region 34b of the second functional film 32b. Below the pad region 34c of the third functional film 32c, the dummy region 35b of the second functional film 32b and the dummy region 35a of the first functional film 32a are located (see Figure 44(D)).

[0256] Furthermore, below the pad area 34d of the fourth functional film 32d, there are the dummy area 35c of the third functional film 32c, the dummy area 35b of the second functional film 32b, and the dummy area 35a of the first functional film 32a (see Figure 44(D)).

[0257] Therefore, even if a load or ultrasonic vibration force is applied to the pad regions 34b to 34d of the second to fourth functional films 32b to 34d during the wire bonding process, the influence of the load or ultrasonic vibration on the circuit region 33 (Figure 41(B)) of the lower functional film 32 is suppressed.

[0258] Figure 45 is a cross-sectional view showing a laminate 300 in which the first to fourth functional films 32a to 32d are laminated on a transfer substrate 320. The functional layer 303a of the first functional film 32a is bonded to the transfer substrate 320. The second functional film 32b is bonded to the first functional film 32a via a bonding layer 310a. The third functional film 32c is bonded to the second functional film 32b via a bonding layer 310b. The fourth functional film 32d is bonded to the third functional film 32c via a bonding layer 310c.

[0259] The transfer substrate 320 and the first to fourth functional films 32a to 32d are joined to each other by intermolecular forces (for functional films 32b to 32d, via bonding layers 310a to 310c, respectively).

[0260] <Configuration of Functional Films> Figure 46 is a cross-sectional view illustrating the configuration of the first to fourth functional films 32a to 32d. Here, an example is described in which the functional layers 303a, 303b, 303c, and 303d of the first to fourth functional films 32a to 32d are P-type semiconductor layers, but they may also be N-type semiconductor layers.

[0261] The first functional film 32a has N-type diffusion regions 81a, 82a and P-type diffusion regions 83a, 84a, 85a, 86a, as described in Embodiment 1 with reference to Figure 13. Contact and wiring layers are formed on the surface of the first functional film 32a as described in Embodiment 1, and it is covered with a protective layer 305a.

[0262] The second functional film 32b has N-type diffusion regions 81b, 82b and P-type diffusion regions 83b, 84b, 85b, 86b, as described in Embodiment 1 with reference to Figure 13. Contact and wiring layers are formed on the surface of the second functional film 32b as described in Embodiment 1, and it is covered with a protective layer 305b.

[0263] The third functional film 32c, like the functional films 32a and 32b, has an N-type diffusion region and a P-type diffusion region (only the N-type diffusion region 81c and the P-type diffusion region 83c are shown in Figure 46). The surface of the third functional film 32c has contact and wiring layers formed on it as described in Embodiment 1, and is covered with a protective layer 305c.

[0264] The fourth functional film 32d, like the functional films 32a and 32b, has an N-type diffusion region and a P-type diffusion region (only the N-type diffusion region 81d and the P-type diffusion region 83d are shown in Figure 46). The surface of the fourth functional film 32d has contact and wiring layers formed on it as described in Embodiment 1, and is covered with a protective layer 305d.

[0265] A shield layer 90a is provided between the functional layer 303a of the first functional film 32a and the functional layer 303b of the second functional film 32b (more specifically, on the functional layer 303a of the first functional film 32a). The shield layer 90a is made of the same material as the shield layer 90 of Embodiment 1 (Figure 13) and is connected to the power terminal VCC or the ground terminal GND.

[0266] The shield layer 90a is formed in the portion where regions with different conductivity types overlap on the upper surface of the functional layer 303a of the first functional film 32a and the lower surface of the functional layer 303b of the second functional film 32b.

[0267] Specifically, shield layers 91a and 92a are formed between the N-type diffusion region 81a of the first functional film 32a and the functional layer 303b (P-type) of the second functional film 32b. Additionally, a shield layer 93a is formed between the functional layer 303a (P-type) of the first functional film 32a and the N-type diffusion region 81b of the second functional film 32b.

[0268] Furthermore, shield layers 94a and 95a are formed between the P-type diffusion regions 85a and 86a of the first functional film 32a and the N-type diffusion region 81b of the second functional film 32b. Also, a shield layer 96a is formed between the N-type diffusion region 82a of the first functional film 32a and the functional layer 303b (P-type) of the second functional film 32b.

[0269] Similarly, a shield layer 90b is provided between the functional layer 303b of the second functional film 32b and the functional layer 303c of the third functional film 32c (more specifically, on the functional layer 303b of the second functional film 32b). The shield layer 90b is made of the same material as the shield layer 90 of Embodiment 1 (Figure 13) and is connected to the power terminal VCC or the ground terminal GND.

[0270] The shield layer 90b is formed in the portion where regions with different conductivity types overlap on the upper surface of the functional layer 303b of the second functional film 32b and the lower surface of the functional layer 303c of the third functional film 32c.

[0271] Specifically, shield layers 91b and 94b are formed between the functional layer 303b (P-type) of the second functional film 32b and the N-type diffusion region 81c of the third functional film 32c. Additionally, a shield layer 92b is formed between the P-type diffusion region 83b of the second functional film 32b and the N-type diffusion region 81c of the third functional film 32c. The shield layer 92b also extends between the P-type diffusion region 84b of the second functional film 32b and the functional layer 303c (P-type) of the third functional film 32c.

[0272] Furthermore, shield layers 93b and 96b are formed between the N-type diffusion regions 81b and 82b of the second functional film 32b and the functional layer 303c (P-type) of the third functional film 32c. Additionally, a shield layer 95b is formed between the P-type diffusion region 85b of the second functional film 32b and the N-type diffusion region 81c of the third functional film 32c.

[0273] Similarly, a shield layer 90c is provided between the functional layer 303c of the third functional film 32c and the functional layer 303d of the fourth functional film 32d (specifically, on the functional layer 303c of the third functional film 32c). The shield layer 90c is made of the same material as the shield layer 90 of Embodiment 1 (Figure 13) and is connected to the power terminal VCC or the ground terminal GND.

[0274] The shield layer 90c is formed in the portion where regions with different conductivity types overlap on the upper surface of the functional layer 303c of the third functional film 32c and the lower surface of the functional layer 303d of the fourth functional film 32d.

[0275] Specifically, a shield layer 91c is formed between the P-type diffusion region 83c of the third functional film 32c and the N-type diffusion region 81d of the fourth functional film 32d.

[0276] The arrangement of shield layers 90a to 90c described here is merely an example; each shield layer 90 should be placed where parts of different conductive types overlap. Shield layers 90 are not required on the fourth functional film 32d.

[0277] By forming the shield layers 90a to 90c in this manner, the influence of the upper functional film can be suppressed on the surface of the first to third functional films 32a to 32c, thereby preventing malfunction of the semiconductor device 30.

[0278] <Example of electrode pad connection> Figure 47 is a plan view illustrating the arrangement of electrode pads 304a, 304b, 304c, and 304d. As shown in Figure 47, electrode pads 304a, 304b, 304c, and 304d are arranged on the four sides of the laminate 300.

[0279] Figure 47 shows that eight electrode pads 304a (referred to as electrode pads 304a1 to 304a8), eight electrode pads 304b (referred to as electrode pads 304b1 to 304b8), eight electrode pads 304c (referred to as electrode pads 304c1 to 304c8), and eight electrode pads 304d (referred to as electrode pads 304d1 to 304d8) are provided.

[0280] Figure 48 is a schematic diagram showing an example of the connection of electrode pads 304a to 304d. The transfer substrate 320 on which the first to fourth functional films 32a to 32d are laminated is attached to the die pad 330 and sealed in a resin package 340. This completes the semiconductor device 30, which includes a laminate 300 of the first to fourth functional films 32a to 32d.

[0281] In the semiconductor device 30, lead frames 331 to 334 are arranged along the four sides of the die pad 330. Electrode pads 304a1 to 304a8 (indicated by reference numerals a1 to a8 in Figure 48) are connected to lead frame 331 (referred to as lead frames 331a to 331h) by wires 321. Electrode pads 304b1 to 304b8 (indicated by reference numerals b1 to b8 in Figure 48) are connected to eight lead frames 332 (referred to as lead frames 332a to 332h) by wires 322.

[0282] The electrode pads 304c1 to 304c8 (indicated by reference numerals c1 to c8 in Figure 48) are connected to eight lead frames 333 (referred to as lead frames 333a to 333h) by wires 323. The electrode pads 304d1 to 304d8 (indicated by reference numerals d1 to d8 in Figure 48) are connected to lead frame 334 (referred to as lead frames 334a to 334h) by wires 324.

[0283] Since electrode pads 304a, 304b, 304c, and 304d are arranged on all four sides of the laminate 300 of the first to fourth functional films 32a to 32d, wire bonding with lead frames 331 to 334 arranged on all four sides of the laminate 300 is easy, and the wire length can also be shortened.

[0284] Here, a semiconductor device 30 in which the first to fourth functional films 32a to 32d are laminated has been described, but three or more layers of functional films may be laminated.

[0285] Except for the points mentioned above, the semiconductor device 30 of Embodiment 3 is formed in the same manner as the semiconductor device 10 of Embodiment 1.

[0286] In this case, the functional films 32a to 32d were laminated as shown in Figure 44(A), and then the functional films 32b to 32d were etched as shown in Figures 44(B) to (D). However, the functional films 32b to 32d may also be etched into the shapes shown in Figures 44(B) to (D) before being laminated onto the functional film 32a.

[0287] <Effects of Embodiment 3> As described above, in the semiconductor device 30 of Embodiment 3, the first to fourth functional films 32a to 32d are laminated so that the electrode pads 304a to 304d do not overlap (see Figures 44 and 45), so that wire bonding to the electrode pads 304a to 304d can be easily performed.

[0288] Furthermore, because the dummy layers 307a to 307c (resin layers) of the functional films 32a to 32c and the electrode pads 304b to 304d of the functional films 32b to 32d overlap, when load or ultrasonic vibration forces are applied to the electrode pads 304b to 304d during the wire bonding process, the load on the circuit region 33 of the lower functional film 32 (Figure 41(B)) can be reduced.

[0289] Furthermore, since a shield layer 90 is provided between functional layers 303a and 303b, between functional layers 303b and 303c, and between functional layers 303c and 303d, in the areas where regions with different conductivity types face each other (see Figure 46), malfunctions of the semiconductor device 30 can be prevented.

[0290] Embodiment 4. <Manufacturing Process of Semiconductor Device> Figure 49 is a plan view showing the SOI wafer 41 of Embodiment 4. Multiple functional films 42 are formed on the SOI wafer 41. The functional films 42 are arranged in a matrix in two mutually orthogonal directions.

[0291] In the example shown in Figure 49, 21 functional films 42 are formed on the SOI wafer 41, each designated with reference numerals 42-1 to 42-21. However, the number of functional films 42 on the SOI wafer 41 is not particularly limited and may be several hundred, for example.

[0292] The functional film 42 has a circuit region 43, a pad region 44, and a dummy region 45. The circuit region 43 is formed with N-type diffusion regions, P-type diffusion regions, contacts, and wiring layers that constitute an analog integrated circuit. Electrode pads are formed in the pad region 44. The dummy region 45 is a region where no analog integrated circuit or electrode pads are formed.

[0293] In Embodiment 4, the pad region 44 is formed along one side of the circuit region 43. The dummy region 45 is formed along three of the four sides of the circuit region 43 where the pad region 44 is not formed.

[0294] Figure 50(A) is a plan view showing the process of forming electrode pads 404 and protective layers 405 on the functional layer 403. Figure 50(B) is a cross-sectional view along the line segment 50B-50B shown in Figure 50(A). Figure 50(C) is a cross-sectional view along the line segment 50C-50C shown in Figure 50(A).

[0295] As shown in Figures 50(A) to (C), the SOI wafer 41 has a substrate 401, an oxide film 402, and a functional layer 403. The material and thickness of the substrate 401, oxide film 402, and functional layer 403 are the same as those of the substrate 101, oxide film 102, and functional layer 103 in Embodiment 1.

[0296] An analog integrated circuit is formed in the functional layer 403 by a photolithography process. The configuration of the analog integrated circuit is as described in Embodiment 1. The region in the functional layer 403 where the analog integrated circuit (P-type diffusion region, N-type diffusion region, contact and wiring layer) is formed corresponds to the circuit region 43.

[0297] The same circuit pattern, that is, a circuit pattern having the same function, is formed in each circuit region 43 of the multiple functional films 42 on the SOI wafer 41. In other words, an analog integrated circuit, such as the operational amplifier 16 described in Embodiment 1 with reference to Figure 12, is formed in each circuit region 43 of the multiple functional films 42 on the SOI wafer 41 by the same photolithography process.

[0298] Electrode pads 404 are formed on the functional layer 403. Specifically, multiple electrode pads 404 are formed along one side of the functional layer 403. The number of electrode pads 404 is eight in this case, but is not particularly limited. The area on which the electrode pads 404 are formed corresponds to the pad area 44.

[0299] Note that electrode pads 404 are not formed in the circuit region 43. In contrast, a portion of the wiring layer may extend from the circuit region 43 to the pad region 44. Furthermore, a shielding layer 90 (Figure 63) is formed on the functional layer 403 as needed, which will be described later.

[0300] The portion of the functional layer 403 excluding the circuit region 43 and the pad region 44 is the dummy region 45 described above. The functional layer 403 extends outward from three of the four sides of the combined region of the circuit region 43 and the pad region 44, excluding the side facing the pad region 44.

[0301] A protective layer 405, consisting of a nitride or oxide film, is formed on the surface of the functional layer 403. The wiring layer formed on the surface of the functional layer 403 is covered by the protective layer 405. The surface of the electrode pad 404 is exposed from the protective layer 405.

[0302] Figure 51(A) is a plan view showing the process of forming a resist layer 406 on a protective layer 405. Figure 51(B) is a cross-sectional view along the line segment 51B-51B shown in Figure 51(A). Figure 51(C) is a cross-sectional view along the line segment 51C-51C shown in Figure 51(A).

[0303] As shown in Figures 51(A) to (C), a resist layer 406 is formed using a photoresist or the like so as to cover the electrode pad 404 and protective layer 405 on the functional layer 403.

[0304] Of the multiple functional films 42 formed on the substrate 401, the functional film 42 located in the bottom layer during the lamination process described later (Figure 59) is referred to as the "first functional film 42a" (first semiconductor thin film), the functional film 42 located in the second layer from the bottom is referred to as the "second functional film 42b" (second semiconductor thin film), the functional film 42 located in the third layer from the bottom is referred to as the "third functional film 42c" (third semiconductor thin film), and the functional film 42 located in the top layer is referred to as the "fourth functional film 42d" (fourth semiconductor thin film).

[0305] Each component (functional layer 403, electrode pad 404, etc.) and each region (circuit region 43, pad region 44, dummy region 45, etc.) of the first functional film 42a will be described with the letter "a" appended to the end of the reference numeral. Similarly, each component and region of the second functional film 42b will be described with the letter "b" appended to the end of the reference numeral. Each component and region of the third functional film 42c will be described with the letter "c" appended to the end of the reference numeral. Each component and region of the fourth functional film 42d will be described with the letter "d" appended to the end of the reference numeral.

[0306] Of the first to fourth functional films 42a to 42d, the second to fourth functional films 42b to 42d undergo the removal of part or all of the dummy region 45 as shown in Figures 52(A) to (C), Figures 53(A) to (C), or Figures 54(A) to (C). For the first functional film 42a, the dummy region 45 is not removed.

[0307] Figure 52(A) is a plan view showing the process of removing a portion of the dummy region 45b of the second functional film 42b. Figure 52(B) is a cross-sectional view along the line segment 52B-52B shown in Figure 52(A). Figure 52(C) is a cross-sectional view along the line segment 52C-52C shown in Figure 52(A).

[0308] As shown in Figures 52(A) to (C), a portion W1 of the dummy region 45b of the second functional film 42b, located on one side of the circuit region 43b in the direction of the electrode pad 404b arrangement, is removed by etching.

[0309] Figure 53(A) is a plan view showing the process of removing a portion of the dummy region 45c of the third functional film 42c. Figure 53(B) is a cross-sectional view along the line segment 53B-53B shown in Figure 53(A). Figure 53(C) is a cross-sectional view along the line segment 53C-53C shown in Figure 53(A).

[0310] As shown in Figures 53(A) to (C), portions W1 and W2 of the dummy region 45c of the third functional film 42c, located on both sides of the circuit region 43c in the direction of the electrode pad 404c arrangement, are removed by etching.

[0311] Figure 54(A) is a plan view showing the process of removing the entire dummy region 45d of the fourth functional film 42d. Figure 54(B) is a cross-sectional view along the line segment 54B-54B shown in Figure 54(A). Figure 54(C) is a cross-sectional view along the line segment 54C-54C shown in Figure 54(A).

[0312] As shown in Figures 54(A) to (C), the entire dummy region 45d of the fourth functional film 42d is removed by etching. Specifically, the portions W1 and W2 located on both sides of the circuit region 43d and the portion W3 located on the opposite side of the pad region 44d are removed by etching.

[0313] In the process described with reference to Figures 52(A) to 54(C), bonding layers 410a, 410b, and 410c (Figure 59) are further formed on the surfaces of the first to third functional films 42a to 42c. The bonding layers 410a, 410b, and 410c (collectively referred to as bonding layer 410) are, for example, polyimide layers with a thickness of several micrometers. No bonding layer 410 is formed on the surface of the fourth functional film 42d.

[0314] Figure 55(A) is a plan view showing the process of separating the first functional film 42a from the substrate 401. Figure 55(B) is a cross-sectional view along the line segment 55B-55B shown in Figure 55(A). Figure 55(C) is a cross-sectional view along the line segment 55C-55C shown in Figure 55(A).

[0315] As shown in Figures 55(A) to (C), the first functional film 42a (functional layer 403a, electrode pad 404a, and protective layer 405a) is separated from the substrate 401 by removing the oxide film 402 (Figures 51(B), (C)) by wet etching or the like.

[0316] Figure 56(A) is a plan view showing the process of separating the second functional film 42b from the substrate 401. Figure 56(B) is a cross-sectional view along the line segment 56B-56B shown in Figure 56(A). Figure 56(C) is a cross-sectional view along the line segment 56C-56C shown in Figure 56(A).

[0317] As shown in Figures 56(A) to (C), the second functional film 42b (functional layer 403b, electrode pad 404b, and protective layer 405b) is separated from the substrate 401 by removing the oxide film 402 (Figures 52(B), (C)) by etching or the like.

[0318] Figure 57(A) is a plan view showing the process of separating the third functional film 42c from the substrate 401. Figure 57(B) is a cross-sectional view along the line segment 57B-57B shown in Figure 57(A). Figure 57(C) is a cross-sectional view along the line segment 57C-57C shown in Figure 57(A).

[0319] As shown in Figures 57(A) to (C), the third functional film 42c (functional layer 403c, electrode pad 404c, and protective layer 405c) is separated from the substrate 401 by removing the oxide film 402 (Figures 53(B), (C)) by etching or the like. The surface roughness of the lower surface of the functional layer 403c is 10 nm or less.

[0320] Figure 58(A) is a plan view showing the process of separating the fourth functional film 42d from the substrate 401. Figure 58(B) is a cross-sectional view along the line segment 58B-58B shown in Figure 58(A). Figure 58(C) is a cross-sectional view along the line segment 58C-58C shown in Figure 58(A).

[0321] As shown in Figures 58(A) to (C), the fourth functional film 42d (functional layer 403d, electrode pad 404d, and protective layer 405d) is separated from the substrate 401 by removing the oxide film 402 (Figures 54(B), (C)) by etching or the like. The surface roughness of the lower surface of the functional layer 403d becomes 10 nm or less.

[0322] The surface roughness of each of the lower surfaces of the functional layers 403a to 403d separated in this way is 10 nm or less. Alternatively, instead of removing the oxide film 402, the method described in Embodiment 1 with reference to Figures 6(A) and (B) may be used.

[0323] Figure 59 is a cross-sectional view showing the process of laminating the first to fourth functional films 42a to 42d on the transfer substrate 420. The material and surface roughness of the transfer substrate 420 are the same as those of the transfer substrate 120 in Embodiment 1.

[0324] As shown in Figure 59, the first functional film 42a, the second functional film 42b, the third functional film 42c, and the fourth functional film 42d are bonded to the transfer substrate 420 in order. This results in a laminate 400 (Figure 60) in which the first to fourth functional films 42a to 42d are laminated.

[0325] In Figure 59, the normal direction to the surface (main surface) of the transfer substrate 420 is defined as the Z direction. Two mutually orthogonal directions on a plane parallel to the surface of the transfer substrate 420 are defined as the X direction and the Y direction.

[0326] Figure 60 is a schematic diagram illustrating the lamination state of the first to fourth functional films 42a to 42d. As shown in Figure 60, the first functional film 42a is laminated such that the pad region 44a is located at the end in the -Y direction. The second functional film 42b is laminated such that the pad region 44b is located at the end in the +Y direction. The third functional film 42c is laminated such that the pad region 44c is located at the end in the +X direction. The fourth functional film 42d is laminated such that the pad region 44d is located at the end in the -X direction.

[0327] Therefore, the pad regions 44a to 44d are positioned at a 90-degree rotation with respect to a central axis perpendicular to the surface of the transfer substrate 420. In this way, the first to fourth functional films 42a to 42d are laminated so that the pad regions 44a to 44d do not overlap.

[0328] Figure 61 is a cross-sectional view showing a laminate 400 in which the first to fourth functional films 42a to 42d are laminated on a transfer substrate 420. The functional layer 403a of the first functional film 42a is bonded to the transfer substrate 420. The second functional film 42b is bonded to the first functional film 42a via a bonding layer 410a. The third functional film 42c is bonded to the second functional film 42b via a bonding layer 410b. The fourth functional film 42d is bonded to the third functional film 42c via a bonding layer 410c.

[0329] The transfer substrate 420 and the first to fourth functional films 42a to 42d are joined to each other by intermolecular forces (for functional films 42b to 42d, via bonding layers 410a to 410c).

[0330] Figure 62 is a cross-sectional view showing an example in which the first to fourth functional films 42a to 42d are laminated on a substrate 401 instead of a transfer substrate 420. In this example, the first functional film 42a is used without being separated from the substrate 401 (Figures 51(A) to (C)). The first functional film 42a is held on the substrate 401 via an oxide film 402. When substrate 401 is used, the transfer substrate 420 is not required.

[0331] <Configuration of Functional Films> Figure 63 is a cross-sectional view illustrating the configuration of the first to fourth functional films 42a to 42d. The first to fourth functional films 42a to 42d are configured similarly to the first to fourth functional films 32a to 32d of Embodiment 3, except that dummy regions 45a to 45d (Figures 60, 61) are formed on the functional layers 403a to 403d. The fact that shield layers 90a to 90c are formed on the first to third functional films 42a to 42c is also the same as in Embodiment 3.

[0332] <Example of power pad connection> Figure 64 is a schematic diagram showing an example of connection of the semiconductor device 40 of Embodiment 4. The transfer substrate 420 on which the first to fourth functional films 42a to 42d are laminated is attached to the die pad 430 and sealed with a resin package 440. This completes the semiconductor device 40 including the laminate 400 of the first to fourth functional films 42a to 42d.

[0333] Of the six electrode pads 404a of the first functional film 42a (shown as a1 to a6 in Figure 64), electrode pad a1 is connected to the lead frame 431a by a wire 421a. Electrode pad a2 is connected to the lead frame 431b by a wire 421b. Electrode pad a3 is connected to the lead frame 431c by a wire 421c.

[0334] Furthermore, electrode pad a4 is connected to electrode pad c6 (described later) of the third functional film 42c by wire L1. Electrode pad a5 is connected to lead frame 431d by wire 421d, and is also connected to electrode pad c5 (described later) of the third functional film 42c by wire L2. Electrode pad a6 is connected to electrode pad d4 (described later) of the fourth functional film 42d by wire L3.

[0335] Lead frames 431a, 431b, 431c, 431d, 431e, 431f, and 431g correspond to the output terminal OUT, the inverting input terminal IN (-), the non-inverting input terminal IN (+), the power terminal VCC, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively.

[0336] Of the six electrode pads 404b of the second functional film 42b (shown as b1 to b6 in Figure 64), electrode pad b1 is connected to the lead frame 432a by wire 422a. Electrode pad b2 is connected to the lead frame 432b by wire 422b. Electrode pad b3 is connected to the lead frame 432c by wire 422c.

[0337] Furthermore, electrode pad b4 is connected to electrode pad d6 (described later) of the fourth functional film 42d by wire L4. Electrode pad b5 is connected to electrode pad d5 (described later) of the fourth functional film 42d by wire L5, and is also connected to electrode pad c5 (described later) of the third functional film 42c by wire L6. Electrode pad b6 is connected to lead frame 432d by wire 422d.

[0338] Lead frames 432a, 432b, 432c, 432d, 432e, 432f, and 432g correspond to the output terminal OUT, the inverting input terminal IN (-), the non-inverting input terminal IN (+), the ground terminal GND, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively.

[0339] Of the six electrode pads 404c (shown as c1 to c6 in Figure 64) of the third functional film 42c, electrode pad c1 is connected to the lead frame 432g by a wire 422g. Electrode pad c2 is connected to the lead frame 432f by a wire 422f. Electrode pad c3 is connected to the lead frame 432e by a wire 422e.

[0340] Furthermore, electrode pad c5 is connected to electrode pad b5 of the second functional film 42b by wire L6, and also to electrode pad a5 of the first functional film 42a by wire L2. Electrode pad c6 is connected to electrode pad a4 of the first functional film 42a by wire L1.

[0341] Of the six electrode pads 404d (indicated by reference numerals d1 to d6 in Figure 64) of the fourth functional film 42d, electrode pad d1 is connected to the lead frame 431g by a wire 421g. Electrode pad d2 is connected to the lead frame 431f by a wire 421f. Electrode pad d3 is connected to the lead frame 431e by a wire 421e.

[0342] Furthermore, electrode pad d4 is connected to electrode pad a6 of the first functional film 42a by wire L3. Also, electrode pad d5 is connected to electrode pad b5 of the second functional film 42b by wire L5. Electrode pad d6 is connected to electrode pad b4 of the second functional film 42b by wire L4.

[0343] By adopting the connection example shown in Figure 64, even when placed in a 14-pin DIP (Dual In-Line Package), SOP (Small Outline Package), or other package, the pin arrangement is compatible, and wiring can be done without crossing wires for wire bonding. Furthermore, as explained with reference to Figures 34 and 35, a relay board may be provided.

[0344] Except for the points mentioned above, the semiconductor device 40 of Embodiment 4 is formed in the same manner as the semiconductor device 30 of Embodiment 3.

[0345] Figures 55 to 58 above illustrate an example in which the functional films 42 (first to fourth functional films 42a to 42d) on the SOI wafer 41 are individually separated from the substrate 401 and then laminated. However, it is also possible to separate multiple functional films 42 on the SOI wafer 41 from the substrate 401 all at once and then laminate them.

[0346] For example, as shown in Figure 49 above, a plurality (e.g., 21) first functional films 42a are formed on the substrate 401 (here referred to as substrate 411) of the SOI wafer 41. Furthermore, as shown in Figure 65, a plurality of second functional films 42b are formed on another substrate 412, and a portion of the dummy region 45b is removed as shown in Figures 52(A) to (C).

[0347] Furthermore, as shown in Figure 66, a plurality of third functional films 42c are formed on another substrate 413, and a portion of the dummy region 45b is removed as shown in Figures 53(A) to (C). Furthermore, as shown in Figure 67, a plurality of fourth functional films 42d are formed on another substrate 414, and the entire dummy region 45b is removed as shown in Figures 54(A) to (C).

[0348] The first to fourth functional films 42a to 42d formed in this manner are separated collectively from each substrate 411, 412, 413, and 414 as described with reference to Figures 36(A) to (C), and then laminated to obtain a laminate of the first to fourth functional films 42a to 42d as shown in Figure 62.

[0349] Here, a semiconductor device 40 with four layers of functional films 42a to 42d stacked on top of each other has been described, but it is also possible to stack three or five or more layers of functional films.

[0350] <Effects of Embodiment 4> As described above, in the semiconductor device 40 of Embodiment 4, the first to fourth functional films 42a to 42d are laminated so that the electrode pads 404a to 404d do not overlap (see Figures 60 and 61), so that wire bonding to the electrode pads 404a to 404d can be easily performed.

[0351] Furthermore, because the dummy regions 45a to 45c of the functional films 42a to 42c and the electrode pads 404b to 404d of the functional films 42b to 42d overlap, when load or ultrasonic vibration forces are applied to the electrode pads 404b to 404d during the wire bonding process, the load on the circuit regions 43a to 43c of the lower functional films 42a to 42c can be reduced.

[0352] Furthermore, since a shield layer 90 is provided between functional layers 403a and 403b, between functional layers 403b and 403c, and between functional layers 403c and 403d, in the areas where regions with different conductivity types face each other (see Figure 63), malfunctions of the semiconductor device 40 can be prevented.

[0353] Embodiment 5. <Manufacturing Process of Semiconductor Device> Figure 68 is a plan view showing the SOI wafer 51 of Embodiment 5. Multiple functional films 52 are formed on the substrate 501 of the SOI wafer 51 and arranged in a matrix. The SOI wafer 51 is also referred to as the second SOI wafer. The substrate 501 is configured in the same way as the substrate 101 of Embodiment 1.

[0354] In the example shown in Figure 68, 40 functional films 52 are formed on the SOI wafer 51, each designated with reference numerals 52-1 to 52-40. However, the number of functional films 52 formed on the SOI wafer 51 is not particularly limited and may be several hundred, for example. The functional films 52 are also referred to as second functional films.

[0355] The functional film 52 has a circuit region 53 and a pad region 54. The circuit region 53 is formed with N-type diffusion regions, P-type diffusion regions, contacts, and wiring layers that constitute a CMOS operational amplifier. The pad region 54 is formed along one side of the circuit region 53, and electrode pads are formed therein. The configuration of the functional film 52 is the same as that of the functional film 12 in Embodiment 1.

[0356] Figure 69 is a plan view showing the SOI wafer 61 of Embodiment 5. Multiple functional films 62 are formed on the substrate 601 of the SOI wafer 61 and arranged in a matrix. The SOI wafer 61 is also referred to as the first SOI wafer. The substrate 601 is configured in the same way as the substrate 101 of Embodiment 1.

[0357] In the example shown in Figure 69, 36 functional films 62 are formed on the SOI wafer 61, each designated with reference numerals 62-1 to 62-36. However, the number of functional films 62 formed on the SOI wafer 61 is not particularly limited and may be several hundred, for example. The functional films 62 are also referred to as the first functional films.

[0358] The functional film 62 has a circuit region 63, a pad region 64, and a dummy region 65. The circuit region 63 is formed with an N-type diffusion region, a P-type diffusion region, contacts, and wiring layers that constitute a bipolar operational amplifier. The pad region 64 is formed along one side of the circuit region 63, and electrode pads are formed therein. The dummy region 65 is formed on the opposite side of the circuit region 63 from the pad region 64. The configuration of the functional film 62 is the same as that of the functional film 12 of Embodiment 1, except that a bipolar operational amplifier is formed in the circuit region 63.

[0359] Figure 70(A) is a cross-sectional view showing the functional film 52 separated from substrate 501 and the functional film 62 separated from substrate 601 laminated on a transfer substrate 520. The separation of the functional film 52 from substrate 501 and the functional film 62 from substrate 601 is as described in Embodiment 1.

[0360] A functional film 62 is bonded onto the transfer substrate 520. The functional film 52 is bonded to the functional film 62 via a bonding layer 510 such as a polyimide layer. The functional films 52 and 62 are laminated such that their pad regions 54 and 64 do not overlap, and the pad region 54 of the functional film 52 and the dummy region 65 of the functional film 62 overlap.

[0361] Figure 70(B) is a cross-sectional view showing the process of exposing the electrode pads 504, 604 of the functional films 52, 62. As shown in Figure 70(B), the electrode pads 604 of the functional film 62 are exposed by etching away the resist layer 606 and bonding layer 510 located on the electrode pads 604 of the underlying functional film 62.

[0362] Furthermore, by etching away the resist layer 506 located on the electrode pads 504 of the upper functional film 52, the electrode pads 504 of the functional film 52 are exposed. This results in a laminate 500 in which the functional films 52 and 62 are stacked so that the pad regions 54 and 64 do not overlap.

[0363] <Example of electrode pad connection> Figure 71 is a plan view illustrating an example of connection of the semiconductor device 50 according to Embodiment 5. The transfer substrate 520 on which the functional films 52 and 62 are laminated is attached to the die pad 530 and sealed with a resin package 540. This completes the semiconductor device 50 including the laminate 500 of the functional films 52 and 62.

[0364] In the connection example shown in Figure 71, the functional film 52 has five electrode pads 504a to 504e in the pad area 54, and the functional film 62 has five electrode pads 604a to 604e in the pad area 64.

[0365] The electrode pad 504a of the functional film 52 is connected to the lead frame 531a (described later) by a wire 521a. The electrode pad 504b is connected to the lead frame 631a by a wire L2 that spans the laminate 500. The electrode pads 504c, 504d, and 504e are connected to the lead frames 531b, 531c, and 531d, respectively, by wires 521b, 521c, and 521d.

[0366] Lead frames 531a, 531b, 531c, and 531d correspond to the power terminal VCC, the output terminal OUT, the inverting input terminal IN (-), and the non-inverting input terminal IN (+), respectively.

[0367] The electrode pad 604a of the functional film 62 is connected to the lead frame 531a by a wire L1 that spans the laminate 500. The electrode pads 604b, 604c, 604d, and 604e are connected to the lead frames 631a, 631b, 631c, and 631d by wires 621a, 621b, 621c, and 621d.

[0368] Lead frames 631a, 631b, 631c, and 631d correspond to the ground terminal GND, the non-inverting input terminal IN (+), the inverting input terminal IN (-), and the output terminal OUT, respectively.

[0369] In this way, a composite operational amplifier can be obtained by combining a CMOS operational amplifier (functional film 52) and a bipolar operational amplifier (functional film 62).

[0370] <Configuration of the Functional Film> Figure 72 is a cross-sectional view showing a laminate of functional films 52 and 62. Here, an example is described in which the functional layers 503 and 603 of the functional films 52 and 62 are P-type semiconductor layers, but they may also be N-type semiconductor layers.

[0371] The functional layer 503 of the functional film 52 (upper layer) is a P-type semiconductor layer, and by implanting N-type impurities from the surface, an N-type diffusion region 511 and N-type diffusion regions 512, 513 are formed. In the N-type diffusion region 511, P+ diffusion regions 514, 515 are formed by implanting P-type impurities from the surface. Of these diffusion regions 511 to 515, the N-type diffusion region 511 reaches the lower surface of the functional layer 503.

[0372] A wiring layer is formed on the surface of the functional layer 503 of the functional film 52. The wiring layer is covered with a protective layer 505, although it is omitted in Figure 72. The diffusion regions 511-515 and the wiring layer constitute the circuit region 53 (Figure 68). The region where the electrode pad 504 is formed constitutes the pad region 54.

[0373] The functional layer 603 of the functional film 62 (lower layer) is a P-type semiconductor layer, and an N-type diffusion region 611 is formed by the injection of N-type impurities from the surface. In the N-type diffusion region 611, P-type diffusion regions 612 and 613 are formed by the injection of P-type impurities from the surface.

[0374] A wiring layer is formed on the surface of the functional layer 603 of the functional film 62. The wiring layer is covered with a protective layer 605, although it is omitted in Figure 72. The diffusion regions 611-613 and the wiring layer constitute the circuit region 63 (Figure 69). The region where the electrode pad 604 is formed constitutes the pad region 64.

[0375] Furthermore, a shielding layer 90 is provided on the functional film 62. The shielding layer 90 is made of a conductive material such as aluminum or polysilicon and is connected to the power terminal VCC or the grounding terminal GND.

[0376] The shield layer 90 is formed in the region where regions with different conductivity types overlap on the lower surface of the functional layer 503 of the functional film 52 (the surface facing the bonding layer 510) and the upper surface of the functional layer 603 of the functional film 62 (the surface facing the bonding layer 510).

[0377] Specifically, shield layers 91 and 92 are formed between the N-type diffusion region 611 of the functional film 62 and the functional layer 503 (P-type) of the functional film 52. Furthermore, a shield layer 93 is formed between the P-type diffusion region 613 of the functional film 62 and the N-type diffusion region 511 of the functional film 52. Additionally, a shield layer 94 is formed between the functional layer 603 (P-type) of the functional film 62 and the N-type diffusion region 511 of the functional film 52.

[0378] The arrangement of shield layers 91-94 described here is merely an example; the shield layers should be placed in the areas where the different conductive types of functional film 52 and functional film 62 overlap.

[0379] Furthermore, although the functional film 52 (CMOS operational amplifier) ​​is used as the upper layer and the functional film 62 (bipolar operational amplifier) ​​is used as the lower layer here, the functional film 52 may be used as the lower layer and the functional film 62 as the upper layer.

[0380] Furthermore, the combination of functional films 52 and 62 is not limited to a CMOS operational amplifier and a bipolar operational amplifier; it may also be a combination of other analog integrated circuits.

[0381] Furthermore, although a semiconductor device 50 in which two layers of functional films 52 and 62 are laminated has been described here, three or more layers of functional films may be laminated as in Embodiments 3 and 4, and at least one of the functional films may have a different function from the other functional films.

[0382] Except for the points mentioned above, the semiconductor device 50 of Embodiment 5 is formed in the same manner as the semiconductor device 10 of Embodiment 1.

[0383] <Effects of Embodiment 5> As described above, in Embodiment 5, a composite operational amplifier can be obtained by stacking functional layers 503 and 603 on which different types of analog integrated circuits (for example, a CMOS operational amplifier and a bipolar operational amplifier) ​​are formed (see Figure 72).

[0384] Furthermore, by providing a shielding layer 90 on the upper surface of the functional layer 603 of the functional film 62 in a portion where the conductivity type differs from that of the lower surface of the functional layer 503 of the functional film 52, malfunctions of the semiconductor device 50 can be prevented.

[0385] Furthermore, by ensuring that the pad regions 54, 64 of the functional films 52, 62 do not overlap, the load applied to the lower circuit region 63 during wire bonding to the pad region 54 can be reduced.

[0386] In Embodiment 1 described above, the shield layer 90 is not provided on the functional layer 103b of the upper functional film 12b (see Figure 13). However, in order to make the formation process of the functional films 12a and 12b the same, the shield layer 90 may be provided on the functional layer 103b. Similarly, in Embodiments 2 to 5, the shield layer 90 may be provided on the functional layer of the upper functional film (the topmost layer in Embodiments 3 and 4).

[0387] Furthermore, in the first embodiment described above, the lower surface (second surface) of the functional layer 103b of the second functional film 12b was in contact with the bonding layer 110 (see Figure 13), but another layer (for example, a BOX layer) may be interposed between the lower surface of the functional layer 103b and the bonding layer 110. That is, it is sufficient that the upper surface of the functional layer 103b of the second functional film 12b faces the bonding layer 110. In embodiments 2 to 5 as well, another layer may be interposed between the bonding layer and the functional layer on the bonding layer.

[0388] Furthermore, in the first embodiment described above, a shield layer 90 was provided between the functional films 12a and 12b (Figure 13), but a configuration without the shield layer 90 is also possible. In this case as well, if the functional films 12a and 12b are laminated so that the first pad region 14a and the second pad region 14b do not overlap, the effect of facilitating wire bonding can be obtained. Similarly, in embodiments 2 to 5, a configuration without the shield layer 90 may be adopted.

[0389] Furthermore, in Embodiment 1 described above, an example was explained in which an N-type region and a P-type region are formed on the lower surface of each functional layer (see Figure 13). However, it is sufficient for the N-type region and the P-type region to be formed at any position on each functional layer. That is, a configuration may be adopted in which the N-type diffusion region does not reach the lower surface of the functional layer, as shown in the N-type diffusion regions 88 and 89 in Figure 18(B). Similarly, in Embodiments 2 to 5, a configuration may be adopted in which the N-type diffusion region does not reach the lower surface of the functional layer.

[0390] Furthermore, the features described in Embodiments 1 to 5 above can be combined as appropriate.

[0391] Although preferred embodiments have been described in detail above, this disclosure is not limited to the embodiments described above, and various improvements or modifications can be made.

[0392] The various aspects of this disclosure are described below as appendices. (Appendix 10) A semiconductor device comprising: a first semiconductor layer; a first electrode pad formed on the first semiconductor layer; a second semiconductor layer laminated above the first semiconductor layer; and a junction layer provided between the second electrode pad formed on the second semiconductor layer and the first and second semiconductor layers, wherein the first and second semiconductor layers are provided in positions that do not overlap in the lamination direction. (Appendix 11) The semiconductor device according to appendix 10, wherein a resin layer is formed adjacent to the first semiconductor layer, and the resin layer and the second electrode pad overlap in the lamination direction. (Appendix 12) The semiconductor device according to appendix 10 or 11, wherein the first semiconductor layer has a dummy region on which no functional elements and wiring are formed, and the dummy region and the second electrode pad overlap in the lamination direction. (Note 13) A method for manufacturing a semiconductor device, comprising the steps of: forming a first semiconductor thin film having a first functional layer and a first electrode pad, and a second semiconductor thin film having a second functional layer and a second electrode pad on a substrate; separating the first semiconductor thin film and the second semiconductor thin film from the substrate; and laminating the first semiconductor thin film and the second semiconductor thin film on a laminate substrate different from the previous substrate, such that the first electrode pad and the second electrode pad do not overlap. (Note 14) The method for manufacturing a semiconductor device according to Note 13, further comprising the step of forming a resin layer adjacent to the first functional layer before laminating the first semiconductor thin film and the second semiconductor thin film, characterized in that the lamination of the first semiconductor thin film and the second semiconductor thin film is carried out such that the second electrode pad and the resin layer overlap. (Note 15) The method for manufacturing a semiconductor device according to Note 13, wherein the first functional layer has a first dummy region, and in the step of stacking the first semiconductor thin film and the second semiconductor thin film, the stacking is performed such that the second electrode pad and the dummy region overlap.

[0393] 10, 20, 20A, 20B, 30, 40, 50 Semiconductor equipment, 11, 21, 31, 41, 51, 61 SOI wafer, 12, 22, 32, 42, 52, 62 Functional film (semiconductor thin film), 13, 23, 33, 43, 53, 63 Circuit region, 14, 24, 34, 44, 54, 64 Pad region, 15, 25, 35, 45, 65 Dummy region, 90 Shielding layer, 100, 200, 300, 400, 500 Laminate, 101, 201, 301, 401, 501, 601 Substrate, 102, 202, 302, 402 Oxide film, 103, 203, 303, 403, 503, 603 Functional layer (semiconductor layer): 103a, 203a, 303a, 403a, 603 First functional layer (first semiconductor layer): 103b, 203b, 303b, 403b, 503 Second functional layer (second semiconductor layer): 104, 204, 304, 404, 504, 604 Electrode pad: 108, 308 Intermediate transfer substrate: 110, 210, 310, 410, 510 Bonding layer: 120, 220, 320, 420, 520 Transfer substrate: 130, 230, 430, 530 Die pad.

Claims

1. A semiconductor device comprising: a first semiconductor layer; a second semiconductor layer laminated above the first semiconductor layer; and a junction layer provided between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer has, on a first surface facing the junction layer, a first region of a first conductivity type and a second region of a second conductivity type different from the first conductivity type; the second semiconductor layer has, on a second surface facing the junction layer, a third region of the first conductivity type and a fourth region of the second conductivity type; and a shielding layer provided between the first semiconductor layer and the second semiconductor layer, in at least one of the portion of the first region facing the fourth region, or the portion of the second region facing the third region.

2. The semiconductor device according to claim 1, further comprising a first electrode pad formed on the first semiconductor layer and a second electrode pad formed on the second semiconductor layer, wherein the first electrode pad and the second electrode pad are arranged so as not to overlap in the stacking direction.

3. The semiconductor device according to claim 1 or 2, characterized in that a first circuit is formed in the first semiconductor layer, a second circuit is formed in the second semiconductor layer, and the first circuit and the second circuit have the same function.

4. The semiconductor device according to claim 2, characterized in that a resin layer is formed adjacent to the first semiconductor layer, and the resin layer and the second electrode pad overlap in the stacking direction.

5. The semiconductor device according to claim 2 or 4, characterized in that the first semiconductor layer has a dummy region in which no active region is formed, and the dummy region and the second electrode pad overlap in the stacking direction.

6. The semiconductor device according to claim 3, characterized in that the first circuit is formed at the end of the first semiconductor layer in a first direction, and the second circuit is formed at the end of the second semiconductor layer in a second direction opposite to the first direction.

7. A semiconductor device according to claim 2, 4, or 5, comprising: a third semiconductor layer laminated above the second semiconductor layer; and a fourth semiconductor layer laminated above the third semiconductor layer, wherein a third electrode pad is formed on the third semiconductor layer; a fourth electrode pad is formed on the fourth semiconductor layer; and the first electrode pad, the second electrode pad, the third electrode pad, and the fourth electrode pad are provided in positions that do not overlap in the lamination direction.

8. The semiconductor device according to claim 7, wherein the first electrode pad, the second electrode pad, the third electrode pad, and the fourth electrode pad are arranged at positions forming four sides of a laminate in which the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked.

9. The semiconductor device according to any one of claims 1, 2, 4 to 8, characterized in that a first circuit is formed in the first semiconductor layer, a second circuit is formed in the second semiconductor layer, and the first circuit and the second circuit have different functions.

Images