Multilayer ceramic capacitor
The multilayer ceramic capacitor with a dielectric layer structured into regions of varying rare earth element concentrations enhances reliability and dielectric constant, addressing the limitations of existing capacitors in high-capacitance and high-reliability applications.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-16
- Publication Date
- 2026-04-02
AI Technical Summary
Existing multilayer ceramic capacitors do not achieve sufficient improvement in electrical characteristics and reliability, particularly in high-capacitance and high-reliability applications such as communication and in-vehicle devices.
A multilayer ceramic capacitor design with a dielectric layer containing rare earth elements, where the crystal particles are divided into regions with varying concentrations of rare earth elements, including a first region with lower concentration surrounded by a second region with higher concentration, and a third region with the highest concentration, forming a core-shell structure that enhances oxygen vacancy trapping.
The design improves the reliability and dielectric constant of the capacitor, ensuring high Mean Time Between Failures (MTF) under high temperature and electric field conditions, while maintaining capacitance performance.
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Figure JP2025032486_02042026_PF_FP_ABST
Abstract
Description
Multilayer ceramic capacitor
[0001] The present invention relates to a multilayer ceramic capacitor.
[0002] In recent years, multilayer ceramic capacitors have been increasingly applied to communication devices and in-vehicle devices that require high capacitance and high reliability. Patent Document 1 describes a technique for improving the performance of multilayer ceramic capacitors by adjusting the distribution of nickel near grain boundaries.
[0003] Japanese Patent Application Laid-Open No. 2017-228590
[0004] However, in the technique described in Patent Document 1, the improvement in electrical characteristics or reliability may not be sufficient. Therefore, an object of the present invention is to provide a multilayer ceramic capacitor with improved reliability.
[0005] The multilayer ceramic capacitor of the present invention includes a plurality of stacked dielectric layers and a plurality of internal electrode layers, and has a laminate having a first main surface and a second main surface facing each other in the height direction, a first side surface and a second side surface facing each other in the width direction orthogonal to the height direction, and a first end surface and a second end surface facing each other in the length direction orthogonal to the height direction and the width direction, and an external electrode provided on the surface of the laminate and connected to a part of the internal electrode layers. The crystal particles contained in the dielectric layer contain rare earth elements. When the crystal particles are divided into a first region where the concentration of rare earth elements is less than a first value and a second region where the concentration of rare earth elements is not less than the first value, the first region is surrounded by the second region, and a rare earth element enrichment region exists in the second region, and the second region exists between the rare earth element enrichment region and the grain boundary of the crystal particles.
[0006] According to the present invention, a multilayer ceramic capacitor with improved reliability can be provided.
[0007] FIG. 1 is a perspective view of the multilayer ceramic capacitor of the present embodiment. FIG. 2 is a cross-sectional view taken along line I-I of FIG. 1. FIG. 3 is a cross-sectional view taken along line II-II of FIG. 1. FIG. 4 is a view showing an image of an inner dielectric layer by TEM-EDX.
[0008] Embodiments for carrying out the invention will be described with reference to Figure 1. Figure 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment of the present invention. Note that Figure 1 shows a so-called two-terminal multilayer ceramic capacitor. However, the multilayer ceramic capacitor 1 of the present invention is not limited to a two-terminal multilayer ceramic capacitor. The multilayer ceramic capacitor 1 of the present invention may be a multi-terminal multilayer ceramic capacitor, such as a three-terminal capacitor.
[0009] (Laminate) Laminate 2 includes a plurality of stacked dielectric layers and a plurality of internal electrode layers. The shape of laminate 2 is approximately a rectangular parallelepiped.
[0010] In the laminate 2, the direction in which the dielectric layer and the internal electrode layer are stacked is defined as the height direction T. The direction perpendicular to the height direction T is defined as the width direction W. The direction perpendicular to both the height direction T and the width direction W is defined as the length direction L.
[0011] In the laminate 2, one of the two faces facing each other in the height direction T is designated as the first main face M1. The remaining face is designated as the second main face M2. In the laminate 2, one of the two faces facing each other in the width direction W is designated as the first side face S1. The remaining face is designated as the second side face S2. In the laminate 2, one of the two faces facing each other in the length direction L is designated as the first end face E1. The remaining face is designated as the second end face E2.
[0012] Regarding the cross-section of the laminate 2, the section along line I-I in Figure 1 is designated as the LT section. Regarding the cross-section of the laminate 2, the section along line II-II in Figure 1 is designated as the WT section.
[0013] The points where three faces of the laminate 2 intersect are defined as corners of the laminate 2, and the points where two faces of the laminate 2 intersect are defined as edges of the laminate 2. It is preferable that the corners and edges are rounded.
[0014] (Dielectric Layer) The total number of dielectric layers laminated on the laminate 2 is preferably 15 to 2000. The main material of the dielectric layer is a ceramic material. Examples of ceramic materials include dielectric ceramics mainly composed of barium titanate, calcium titanate, strontium titanate, calcium zirconate, etc. The ceramic material may also be a dielectric ceramic in which minor components such as manganese compounds, iron compounds, chromium compounds, cobalt compounds, and nickel compounds are added to these main components.
[0015] The dielectric layer contains crystalline particles. These crystalline particles are the main components of the dielectric layer and are composed of a perovskite-type oxide containing A-site and B-site elements. The general formula for perovskite-type oxides is: ABO 3 It has a composition represented by [formula]. Each atom of the A-site element and each atom of the B-site element are ionized and occupy the A-site and B-site of the perovskite structure. Examples of A-site elements include elements with relatively large ion sizes, such as barium, calcium, and strontium. Examples of B-site elements include elements with relatively small ion sizes, such as titanium, zirconium, and hafnium.
[0016] The combination of A-site elements and B-site elements is not particularly limited, as long as the perovskite structure is maintained. Furthermore, each of the A-site and B-site elements may consist of only one type of element, or a combination of multiple elements.
[0017] Preferably, the A-site element contains barium, and the B-site element contains titanium. In other words, the perovskite-type oxide is preferably a barium titanate-based compound.
[0018] The dielectric layer material contains rare earth elements as minor components. Specifically, at least one of the following rare earth elements is included in the dielectric layer material: neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, and yttrium.
[0019] The thickness of each dielectric layer is preferably 0.3 μm or more and 10 μm or less.
[0020] (Division of the Laminate) The division of the laminate 2 in the longitudinal direction L will be explained based on Figure 2. Figure 2 is a cross-sectional view taken along line I-I in Figure 1. The laminate 2 can be divided in the height direction T into a first main surface-side outer layer OL1, an inner layer range IL, and a second main surface-side outer layer OL2. The first main surface-side outer layer OL1, the inner layer range IL, and the second main surface-side outer layer OL2 are arranged in this order from the first main surface M1 to the second main surface M2 in the height direction T.
[0021] The first main surface-side outer layer portion OL1 is the portion between the internal electrode layer closest to the first main surface M1 and the first main surface M1. The inner layer range IL is the range where the internal electrode layers face each other. The second main surface-side outer layer portion OL2 is the portion between the internal electrode layer closest to the second main surface M2 and the second main surface M2.
[0022] The first main surface-side outer layer OL1 is located on the first main surface M1 side of the laminate 2. The first main surface-side outer layer OL1 is formed by an assembly of multiple dielectric layers located between the first main surface M1 and the internal electrode layer closest to the first main surface M1. The first main surface-side outer layer OL1 is formed by multiple dielectric layers located between the first main surface M1 and the outermost surface of the inner layer range IL on the first main surface M1 side and the extension of that outermost surface.
[0023] The second main surface-side outer layer OL2 is located on the second main surface M2 side of the laminate 2. The second main surface-side outer layer OL2 is formed by an assembly of multiple dielectric layers located between the second main surface M2 and the internal electrode layer closest to the second main surface M2. The second main surface-side outer layer OL2 is formed by multiple dielectric layers located between the second main surface M2 and the outermost surface of the inner layer range IL on the second main surface M2 side and the extension of that outermost surface.
[0024] The inner layer area IL is the area sandwiched between the first main surface-side outer layer portion OL1 and the second main surface-side outer layer portion OL2.
[0025] Of the dielectric layers, the dielectric layers located in the first main surface-side outer layer portion OL1 and the second main surface-side outer layer portion OL2 are defined as the outer dielectric layer 3. Of the dielectric layers, the dielectric layers located in the inner layer range IL are defined as the inner dielectric layer 4.
[0026] The following terms may be used in describing length and position.
[0027] The length in the length direction L is defined as the length direction length. The length in the width direction W is defined as the width direction length. The length in the height direction T is defined as the height direction length.
[0028] The position at half the length in the longitudinal direction is defined as the center position in the longitudinal direction L. The center position in the longitudinal direction L is defined as the longitudinal center position.
[0029] The position at half the length in the width direction is defined as the center position in the width direction W. The center position in the width direction W is defined as the width direction center position.
[0030] The position at half the length in the height direction is defined as the center position in the height direction T. The center position in the height direction T is defined as the height direction center position.
[0031] The end in the length direction L is defined as the lengthwise end. The end in the width direction W is defined as the widthwise end. The end in the height direction T is defined as the heightwise end.
[0032] The size of the laminate 2 is not particularly limited. The length of the laminate is preferably 0.2 mm or more and 10 mm or less. The width of the laminate 2 is preferably 0.1 mm or more and 5 mm or less. The height of the laminate 2 is preferably 0.1 mm or more and 5 mm or less.
[0033] (L Gap) The division of the laminate 2 in the longitudinal direction L is explained. The laminate 2 can be divided in the longitudinal direction L into a first end face side outer layer LG1, a longitudinally opposing part LF, and a second end face side outer layer LG2. The first end face side outer layer LG1, the longitudinally opposing part LF, and the second end face side outer layer LG2 are arranged in this order in the longitudinal direction L from the first end face E1 to the second end face E2.
[0034] The longitudinally opposed portion LF is the portion where the internal electrode layers face each other in the height direction T. The first end-face side outer layer portion LG1 is the portion between the longitudinally opposed portion LF and the first end face E1. The second end-face side outer layer portion LG2 is the portion between the longitudinally opposed portion LF and the second end face E2. The longitudinally opposed portion LF corresponds to the opposing electrode portion of the internal electrode layer. The first end-face side outer layer portion LG1 and the second end-face side outer layer portion LG2 correspond to the leading electrode portion of the internal electrode layer. The first end-face side outer layer portion LG1 and the second end-face side outer layer portion LG2 are also called the L gap.
[0035] The opposing electrode section includes a first opposing electrode section 7a and a second opposing electrode section 7b. The lead-out electrode section includes a first lead-out electrode section 8a and a second lead-out electrode section 8b. The opposing electrode section and the lead-out electrode section will be described later.
[0036] The first end-face side outer layer LG1 is located on the first end face E1 side. The first end-face side outer layer LG1 is located between the first end face E1 and the end of the second internal electrode layer 6b on the first end face E1 side.
[0037] The second end-face side outer layer LG2 is located on the second end face E2 side. The second end-face side outer layer LG2 is located between the second end face E2 and the end of the first internal electrode layer 6a on the second end face E2 side.
[0038] (W Gap) The division of the laminate 2 in the width direction W will be explained based on Figure 3. Figure 3 is a cross-sectional view taken along line II-II in Figure 1. The laminate 2 can be divided in the width direction W into a first side outer layer WG1, a width-direction opposing part WF, and a second side outer layer WG2. The first side outer layer WG1, the width-direction opposing part WF, and the second side outer layer WG2 are arranged in this order from the first side S1 to the second side S2 in the width direction W.
[0039] The width-direction facing part WF is the part where the internal electrode layers face each other in the height direction T. The first side surface side outer layer part WG1 is the part between the width-direction facing part WF and the first side surface S1. The second side surface side outer layer part WG2 is the part between the width-direction facing part WF and the second side surface S2. The first side surface side outer layer part WG1 and the second side surface side outer layer part WG2 are also referred to as the W gap.
[0040] The first side surface side outer layer part WG1 and the second side surface side outer layer part WG2 are parts where there is no internal electrode layer in the height direction T. The first side surface side outer layer part WG1 is located on the first side surface S1 side. The second side surface side outer layer part WG2 is located on the second side surface S2 side.
[0041] (Internal Electrode Layer) The internal electrode layer includes a plurality of first internal electrode layers 6a and a plurality of second internal electrode layers 6b. The first internal electrode layer 6a is the internal electrode layer exposed at the first end face E1. The second internal electrode layer 6b is the internal electrode layer exposed at the second end face E2.
[0042] The first internal electrode layer 6a can be divided into a first opposing electrode part 7a and a first lead-out electrode part 8a. The first opposing electrode part 7a is the part facing the second internal electrode layer 6b. The first lead-out electrode part 8a is the part led out from the first opposing electrode part 7a to the first end face E1 of the laminate 2.
[0043] The end of the first lead-out electrode part 8a on the first end face E1 side is led out to the surface of the first end face E1 of the laminate 2. The end of the first lead-out electrode part 8a led out to the first end face E1 is exposed at the first end face E1.
[0044] The second internal electrode layer 6b can be divided into a second opposing electrode part 7b and a second lead-out electrode part 8b. The second opposing electrode part 7b is the part facing the first internal electrode layer 6a. The second lead-out electrode part 8b is the part led out from the second opposing electrode part 7b to the second end face E2 of the laminate 2.
[0045] The end of the second extraction electrode portion 8b on the second end face E2 side is drawn out to the surface of the second end face E2 of the laminate 2. The end of the second extraction electrode portion 8b drawn out to the second end face E2 is exposed on the second end face E2.
[0046] The materials of the first internal electrode layer 6a and the second internal electrode layer 6b can be, for example, metals such as nickel, copper, silver, palladium, gold, and tin. The materials of the first internal electrode layer 6a and the second internal electrode layer 6b can be alloys containing at least one of the aforementioned metals, such as a silver-palladium alloy.
[0047] In the multilayer ceramic capacitor 1, a capacitance is formed by the first opposing electrode portion 7a and the second opposing electrode portion 7b opposing each other through the inner dielectric layer 4. Thereby, the characteristics of a capacitor are exhibited in the multilayer ceramic capacitor 1.
[0048] The thickness of the first internal electrode layer 6a and the thickness of the second internal electrode layer 6b are preferably, for example, about 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layer 6a and the second internal electrode layer 6b added together is preferably 15 or more and 2000 or less.
[0049] (Inner layer portion) The portion where the first internal electrode layer 6a and the second internal electrode layer 6b oppose each other is defined as the inner layer portion 10. The inner layer portion 10 is a portion where the length direction opposing portion LF shown in FIG. 2, the width direction opposing portion WF shown in FIG. 3, and the inner layer range IL overlap. The shape of the inner layer portion 10 is approximately a rectangular parallelepiped. In FIG. 2, the portion where the length direction opposing portion LF and the inner layer range IL overlap is shown as the inner layer portion 10. Also, in FIG. 3, the portion where the width direction opposing portion WF and the inner layer range IL overlap is shown as the inner layer portion 10.
[0050] (External electrodes) The external electrodes will be described. The external electrodes include the first external electrode 20a and the second external electrode 20b. The first external electrode 20a is an external electrode connected to the first internal electrode layer 6a. The second external electrode 20b is an external electrode connected to the second internal electrode layer 6b.
[0051] The first external electrode 20a is positioned on the first end face E1, a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2. The second external electrode 20b is positioned on the second end face E2, a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
[0052] The external electrode includes a base electrode layer and a plating layer. The plating layer includes a Ni plating layer and a Sn plating layer. These layers are arranged in the order of base electrode layer, Ni plating layer, and Sn plating layer from the end face of the laminate 2.
[0053] The first external electrode 20a includes a first base electrode layer 22a, a first Ni plating layer 23a, and a first Sn plating layer 24a. The second external electrode 20b includes a second base electrode layer 22b, a second Ni plating layer 23b, and a second Sn plating layer 24b.
[0054] (Underlayment electrode layer) The first underlayment electrode layer 22a is positioned on the first end face E1 of the laminate 2 and covers the first end face E1. The first underlayment electrode layer 22a extends from the first end face E1 to a part of the first main surface M1, a part of the second main surface M2, a part of the first side surface S1, and a part of the second side surface S2.
[0055] The second base electrode layer 22b is positioned on the second end face E2 of the laminate 2 and covers the second end face E2. The second base electrode layer 22b extends from the second end face E2 to a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
[0056] The underlying electrode layer contains a glass component and a metal. The glass component includes at least one selected from B, Si, Ba, Mg, Al, Li, etc. The metal includes at least one selected from, for example, Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc.
[0057] (Ni plating layer and Sn plating layer) The first Ni plating layer 23a is arranged to cover the first under electrode layer 22a. The first Sn plating layer 24a is arranged to cover the first Ni plating layer 23a.
[0058] The second Ni plating layer 23b is positioned to cover the second under electrode layer 22b. The second Sn plating layer 24b is positioned to cover the second Ni plating layer 23b.
[0059] The Ni plating layer prevents the underlying electrode layer from being corroded by the solder used when mounting the multilayer ceramic capacitor 1. The Sn plating layer improves the wettability of the solder used when mounting the multilayer ceramic capacitor 1, making mounting easier.
[0060] Furthermore, a conductive resin layer can be placed between the base electrode layer and the Ni plating layer. The conductive resin layer may include epoxy resin and metal fillers.
[0061] The size of the multilayer ceramic capacitor 1 is not particularly limited. The preferred length of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is 0.2 mm to 10 mm. The preferred height of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is 0.1 mm to 5 mm. The preferred width of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is 0.1 mm to 10 mm.
[0062] (Measurement Method) The length and thickness of each part can be measured as follows: Polish the multilayer ceramic capacitor 1 to the center in the width direction or the center in the length direction. Then, observe the cross-section exposed by polishing with an optical microscope or the like. Measurements can be taken from the observed cross-section.
[0063] The crystalline particles 50 contained in the dielectric layer of the multilayer ceramic capacitor 1 of this embodiment will be described with reference to Figure 4. Figure 4 is an image of the inner dielectric layer 4 observed by energy-dispersive X-ray spectroscopy (TEM-EDX). Figure 4 shows the concentration distribution of rare earth elements relative to titanium in the crystalline particles 50. The diameter of the probe used for observation was 2 nm.
[0064] The main material of the dielectric layer in the observed multilayer ceramic capacitor 1 was determined to be barium titanate. The rare earth element included as a minor component was determined to be dysprosium.
[0065] The image shown in Figure 4 is an observation of a cross-section parallel to the length direction L and height direction T at the center of the width direction W of the multilayer ceramic capacitor 1. The shades in Figure 4 indicate differences in the concentration of dysprosium. The concentration of titanium is almost constant within the crystal grain 50. Therefore, the shades in Figure 4 can be said to indicate differences in the concentration of dysprosium relative to titanium.
[0066] As shown in Figure 4, the inner dielectric layer 4 contains multiple crystal grains 50. The boundary between adjacent crystal grains 50 is the grain boundary 30.
[0067] (First Region and Second Region) In the multilayer ceramic capacitor 1 of this embodiment, the interior of the crystal grains 50 contained in the dielectric layer is divided into a first region 51 and a second region 52. The first region 51 is the region in which the concentration of rare earth elements is less than a first value. The second region 52 is the region in which the concentration of rare earth elements is equal to or greater than the first value. As shown in Figure 4, in the multilayer ceramic capacitor 1 of this embodiment, the first region 51 is surrounded by the second region 52. Note that the image shown in Figure 4 is a cross-sectional image exposed by polishing, so there are parts of the first region 51 that appear not to be surrounded by the second region 52.
[0068] (Third Region) In the multilayer ceramic capacitor 1 of this embodiment, within the second region 52 there is a third region 53 in which the concentration of rare earth elements is high. The third region 53 is the region with the highest concentration of rare earth elements among the crystal grains 50. The third region 53 can also be called the rare earth element enrichment region.
[0069] A second region 52 exists between the third region 53 and the grain boundary 30. In other words, the contour of the third region 53 does not constitute the grain boundary 30. Furthermore, there may be multiple third regions 53 within the second region 52.
[0070] (Shape of the third region) The shape of each third region 53 is preferably a single mass rather than, for example, an annular shape.
[0071] (Straight section) The surface of the third region 53 preferably includes a plane. In other words, the interface between the third region 53 and other regions preferably includes a plane. Note that since the image shown in Figure 4 is a cross-sectional image, the part of the surface of the third region 53 that is plane appears as a straight line in Figure 4. This part that appears as a straight line is called the straight section 55.
[0072] In Figure 4, among the crystal grains 50, the third region 53 contained in crystal grain A501 is referred to as the third region A531. In the cross-section, the line showing the surface of the third region A531 is shown by the dotted line L1. The straight portion 55 of the dotted line L1 is shown by the dotted line L11.
[0073] Similarly, among the crystal grains 50 shown in Figure 4, the third region 53 contained in crystal grain B502 is designated as the third region B532. In the cross-section, the line showing the surface of the third region B532 is indicated by the dotted line L2. The straight portion 55 of the dotted line L2 is indicated by the dotted line L21.
[0074] As shown by dotted lines L11 and L21, the contour of the third region 53 includes straight sections. In the sections where the contour is straight, the surface of the third region 53 is planar. As shown by dotted lines L11 and L21, the surface of the third region 53 includes planar sections.
[0075] The third region 53 is a region with a high concentration of rare earth elements. Therefore, the third region 53 has high performance in trapping oxygen vacancies in the dielectric layer. When oxygen vacancies in the dielectric layer are trapped, the reliability of the multilayer ceramic capacitor 1 is improved. In the multilayer ceramic capacitor 1 of this embodiment, the third region 53 exists in the dielectric layer. Therefore, the reliability of the multilayer ceramic capacitor 1 can be improved.
[0076] Furthermore, if the line indicating the surface of the third region 53 in the cross-section includes a straight section 55, the reliability of the multilayer ceramic capacitor 1 can be further improved. When the lengths of the lines corresponding to the surface of the third region 53 observed in the cross-section are the same, a straight line has better performance in trapping oxygen vacancies in the dielectric layer than a curved line. This is because, for the same length, a straight line can trap oxygen vacancies over a wider area than a curved line.
[0077] (Length of the straight section) In Figure 4, the length of the dotted line L11 is shown as length D. It is preferable that length D is 50 nm or more. By having length D of 50 nm or more, the reliability of the multilayer ceramic capacitor 1 can be more reliably improved.
[0078] Furthermore, it is preferable that the length D is 150 nm or less. By having a length D of 150 nm or less, delamination at the interface between the third region 53 and the second region 52 can be suppressed.
[0079] (Inclination of the straight portion) The inclination of the straight portion 55 with respect to the interface between the dielectric layer and the internal electrode layer is preferably within 40 degrees. In particular, it is preferable that the inclination of the straight portion 55 contained in the crystal grain 50 located at the interface between the internal electrode layer and the dielectric layer is within the above range.
[0080] The crystalline particle A531 shown in Figure 4 is a crystalline particle 53 located at the interface between the inner dielectric layer 4 and the first internal electrode layer 6a. The extension of the straight portion 55 contained in the crystalline particle A531 is shown by the straight line L31. The line shown in the cross-section of the interface between the inner dielectric layer 4 and the first internal electrode layer 6a is shown by the straight line L32. The angle between the straight line L31 and the straight line L32 is shown by angle A. It is preferable that angle A is 40 degrees or less.
[0081] By keeping angle A within the range described above, the reliability of the multilayer ceramic capacitor 1 can be more reliably improved. Oxygen vacancies in the dielectric layer tend to move in a direction perpendicular to the interface between the internal electrode layer and the dielectric layer, that is, in the direction of the electric field. When angle A is within the range described above, the direction of the extension of the straight section 55 approaches parallel to the interface between the internal electrode layer and the dielectric layer. This allows oxygen vacancies to be trapped more effectively.
[0082] Furthermore, the movement of oxygen vacancies is particularly likely to occur near the interface between the internal electrode layer and the dielectric layer. Therefore, by ensuring that the inclination of the linear portion 55 contained in the crystal grain 50 located at the interface between the internal electrode layer and the dielectric layer is within the above-mentioned range, the reliability of the multilayer ceramic capacitor 1 can be more reliably improved.
[0083] The straight line L32 can be determined by approximating the boundary line between the inner dielectric layer 4 and the first inner electrode layer 6a in the cross-section as a straight line.
[0084] (First and Third Values) The first and third values can be determined, for example, as follows: Assume that the crystal grains 50 contain titanium. The first and third values are the atomic percentages of rare earth elements contained in the crystal grains 50 relative to the titanium contained in the crystal grains 50.
[0085] Specifically, for example, the first value can be 0.3 atomic percent, and the third value can be between 3.0 atomic percent and 6.0 atomic percent.
[0086] The third region 53 is preferably located closer to the first region 51 than the grain boundary 30. More preferably, the third region 53 is in contact with the first region 51. The proximity of the third region 53 to the first region 51, and furthermore, its contact with the first region 51, allows for efficient trapping of oxygen vacancies that have moved from the first region.
[0087] (Core-shell structure) Preferably, at least a portion of the dielectric crystal particles 50 contained in the dielectric layer have a core-shell structure. When the crystal particles 50 have a core-shell structure, preferably the third region 53 is located on a part of the surface of the core.
[0088] (Reliability Evaluation) The reliability of the multilayer ceramic capacitor 1 was evaluated by the MTF (Mean Time Between Failures) at 170°C and 400V. The multilayer ceramic capacitor 1 of this embodiment was confirmed to have a high MTF of 250 hours or more. This indicates that good reliability (life characteristics) can be obtained even under high temperature and high electric field strength environments.
[0089] (Dielectric Constant) Normally, the vicinity of the grain boundary 30 has a high concentration of additives such as rare earth elements, resulting in a relatively low dielectric constant. In the multilayer ceramic capacitor 1 of this embodiment, a third region 53 with a higher concentration of rare earth elements exists within the second region 52. Therefore, by further concentrating the region with a high concentration of rare earth elements, the decrease in dielectric constant can be suppressed. As a result, the dielectric constant of the entire dielectric layer can be improved.
[0090] (Method for manufacturing a multilayer ceramic capacitor) The method for manufacturing a multilayer ceramic capacitor 1 is described below. (1) Prepare a dielectric sheet and a conductive paste for the internal electrodes. The dielectric sheet and the conductive paste for the internal electrodes contain a binder and a solvent. The binder and solvent may be known organic binders and organic solvents, etc.
[0091] When manufacturing dielectric ceramic raw materials, barium titanate powder, the raw material, is coated with a rare earth element, specifically dysprosium, as an additive. By adjusting the amount of dysprosium used for coating and the number of coatings, the distribution of the first, second, and third regions can be controlled.
[0092] (2) A conductive paste for the internal electrodes is printed on the dielectric sheet in a predetermined pattern. The internal electrode pattern is formed by printing the conductive paste. Printing can be done by, for example, screen printing or gravure printing.
[0093] (3) A predetermined number of dielectric sheets for the outer layer are stacked. The dielectric sheets for the outer layer do not have the internal electrode pattern printed on them. Dielectric sheets with the internal electrode pattern printed on them are stacked sequentially on top of the stacked dielectric sheets. Furthermore, a predetermined number of dielectric sheets for the outer layer are stacked on top of that. A laminated sheet is produced by these stacking processes.
[0094] (4) A laminated block is produced by pressing the laminated sheets in the height direction. The pressing method can be hydrostatic pressing.
[0095] (5) Cut the laminated block to the specified size. This cut will produce the laminated chips. After cutting, the corners and edges of the laminated chips may be rounded. Barrel polishing can be used to round the edges.
[0096] (6) The laminated chips are fired. This firing process produces the laminate. The preferred firing temperature is 900°C to 1200°C. The firing temperature can be changed depending on the materials of the dielectric and internal electrode layers.
[0097] (External electrodes) Next, the external electrodes are formed. First, a conductive paste, which will serve as the base electrode layer, is applied to the two end faces of the laminate 2. The conductive paste contains glass components and metal components, etc. The conductive paste can be applied by methods such as dipping. After application, a baking treatment is performed to form the base electrode layer. The baking treatment temperature is preferably 500°C to 900°C. The baking treatment time is preferably 30 minutes to 2 hours.
[0098] Next, a Ni plating layer is formed on the surface of the base electrode layer. Furthermore, a Sn plating layer is formed on the surface of the Ni plating layer. The Ni plating layer and the Sn plating layer can be formed by methods such as barrel plating. In this way, a multilayer ceramic capacitor 1 is obtained.
[0099] Although embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above, and various modifications and variations are possible.
[0100] 1 Multilayer ceramic capacitor 2 Laminate 3 Outer dielectric layer 4 Inner dielectric layer 6a First internal electrode layer 6b Second internal electrode layer 10 Inner layer 20a First external electrode 20b Second external electrode 30 Grain boundary 50 Crystal grain 51 First region 52 Second region 53 Third region 55 Straight section E1 First end face E2 Second end face M1 First main surface M2 Second main surface S1 First side surface S2 Second side surface L Length direction T Height direction W Width direction
Claims
1. A multilayer ceramic capacitor comprising: a laminate including a plurality of stacked dielectric layers and a plurality of internal electrode layers, having a first main surface and a second main surface facing each other in the height direction, a first side surface and a second side surface facing each other in the width direction perpendicular to the height direction, and a first end surface and a second end surface facing each other in the length direction perpendicular to the height direction and width direction; and an external electrode provided on the surface of the laminate and connected to a part of the internal electrode layer, wherein the crystalline particles contained in the dielectric layer contain rare earth elements, and when the crystalline particles are divided into a first region where the concentration of rare earth elements is less than a first value and a second region where the concentration of rare earth elements is equal to or greater than the first value, the first region is surrounded by the second region, a rare earth element concentrated region exists within the second region, and the second region exists between the rare earth element concentrated region and the grain boundary of the crystalline particles.
2. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer contains titanium, the first value is 0.3 atomic percent of rare earth elements relative to the titanium contained in the dielectric layer, and the rare earth element enrichment region contains 3.0 atomic percent or more and 6.0 atomic percent or less of rare earth elements relative to the titanium contained in the dielectric layer.
3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the rare earth element enrichment regions are present in multiple locations within the second region.
4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the surface of the rare earth element enrichment region includes a plane.
Citation Information
Patent Citations
Dielectric ceramic composition and electronic component
JP2008285373A
Condenser
WO2013089269A1