Silicon substrate processing method

Abstract

The present invention is a silicon substrate processing method wherein a silicon substrate having a plane orientation of (551) is subjected to high-temperature processing in a furnace at a temperature higher than 940°C, and when cooling to a temperature of lower than 840°C after the high-temperature processing, a cooling rate of 10°C / min or greater is maintained in the temperature band from 840-940°C which is passed through during cooling. Thereby provided is a silicon substrate processing method that makes it possible to prevent formation of fine protrusions accompanying high-temperature processing of a silicon substrate having a plane orientation of (551).

Description

Method for processing a silicon substrate

[0001] The present invention relates to a method for processing a silicon substrate, and more particularly to a method for processing a silicon substrate having a plane orientation of (551).

[0002] Instead of the Fin structure currently adopted in logic, in the post-next generation, GAA and further CFETs that stack NMOS and CMOS have been proposed and are actively being researched and developed. At this time, as a method for improving hole mobility, it is considered to use a silicon substrate having a plane orientation of (110) (hereinafter also referred to as a silicon (110) substrate) (Non-Patent Document 1).

[0003] However, it has been pointed out that a silicon (110) substrate has problems such as large surface roughness and haze (Non-Patent Document 1). Here, haze is also referred to as the degree of cloudiness of the surface, and represents the surface roughness in terms of the degree of light scattering. The larger the haze, the rougher the surface. Therefore, it has been proposed to use a substrate having a plane orientation of (551) (hereinafter also referred to as a silicon (551) substrate) (Patent Document 1, Non-Patent Document 2). In Patent Document 1, there is no description of the plane orientation (551), but there is a description of 7.9° off the (110) plane, which corresponds to the plane orientation (551).

[0004] Japanese Patent Application Laid-Open No. 2004-265918

[0005] Proceedings of the 1st Research Meeting of the Industry-Academia Collaboration Committee on Semiconductor Crystal Growth, Processing, and Evaluation of the Japan Society of Applied Physics, "Crystal Technology Supporting Semiconductor Restoration", HORIBA Tech. Report, 51, 44 (2018)

[0006] However, in the investigation by the present inventors, it has been found that a silicon substrate having a plane orientation of (551) has small step bunching and the haze is indeed small as in the prior art, but when looking at the substrate after performing a high-temperature treatment such as heat treatment, minute defects may be generated.

[0007] The present invention has been made to solve the above problems, and an object thereof is to provide a method for processing a silicon substrate capable of suppressing the generation of minute protrusions accompanying the high-temperature treatment of a silicon substrate having a plane orientation of (551).

[0008] To achieve the above objective, the present invention provides a method for processing a silicon substrate, characterized in that a silicon substrate with a (551) orientation is subjected to high-temperature processing at a temperature higher than 940°C in a furnace, and when cooled to a temperature below 840°C after the high-temperature processing, the cooling is performed while maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C that the substrate passes through during the cooling.

[0009] In this invention, regarding the high-temperature treatment of a silicon (551) substrate, the cooling process maintains a fast cooling rate within the aforementioned temperature range. In other words, the cooling rate is maintained without decreasing to less than 10°C / min within the aforementioned temperature range. By doing so, the occurrence of defects (micro-protrusions) can be suppressed. Therefore, a high-quality substrate can be obtained.

[0010] In this case, the high-temperature treatment can be annealing under a hydrogen atmosphere to remove the native oxide film on the surface of the silicon substrate. Alternatively, epitaxial growth can be performed on the silicon substrate as part of the high-temperature treatment.

[0011] Thus, the present invention is particularly effective in suppressing defect generation during high-temperature processes such as annealing for the removal of native oxide films and epitaxial growth.

[0012] Furthermore, when storing the cooled silicon substrate in the furnace for the next processing, it can be stored at a temperature of less than 840°C, while controlling the temperature difference within the substrate surface of the silicon substrate to within ±10°C.

[0013] This method helps to suppress the occurrence of defects even during storage inside the reactor.

[0014] Furthermore, by using a silicon substrate with a diameter of 300 mm or more, and by controlling the temperature difference within the substrate surface of the silicon substrate to within ±10°C during cooling in the temperature range of 840°C to 940°C, cooling can be performed.

[0015] In this way, even with large-diameter silicon substrates exceeding 300 mm in diameter, the occurrence of defects can be suppressed more reliably.

[0016] The silicon substrate processing method of the present invention can suppress the occurrence of minute protrusion defects in the silicon (551) substrate that has been subjected to high-temperature processing, thereby enabling the production of a high-quality substrate.

[0017] This is a flow chart showing an example of the process for processing a silicon substrate according to the present invention. This is a TEM observation of the substrate surface when the holding temperature was changed in Investigation 1. This is a TEM observation of the substrate surface when the cooling rate was 9°C / min in Investigation 2. This is a TEM observation of the substrate surface (no defects) in Example 1. This is a TEM observation of the substrate surface (no defects) in Example 2. This is a TEM observation of the substrate surface (with defects) in Comparative Example 1. This is a TEM observation of the substrate surface (with defects) in Comparative Example 2. This is an AFM (atomic force microscope) observation of defects in minute protrusions formed on the surface of a silicon (551) substrate.

[0018] The present invention will be described in detail below with reference to the figures as an example of an embodiment, but the present invention is not limited thereto. When performing epitaxial growth on a silicon substrate, in order to remove the native oxide film present on the surface of the silicon substrate before epitaxial growth, an annealing treatment (hydrogen bake) is generally performed in a hydrogen atmosphere at a high temperature. The temperature at this time is often in the temperature range of approximately 1000°C or higher. This is because even a thin native oxide film of 1 nm or less can prevent epitaxial growth if an amorphous oxide film layer is present.

[0019] However, it was found that after hydrogen baking (for example, hydrogen baking at 1080°C for 40 seconds), the silicon (551) substrate, once removed from the furnace and sufficiently cooled, may develop minute protrusion-like defects. Figure 8 shows an AFM observation of these minute protrusion defects. Defects occur in the areas circled in the figure.

[0020] Therefore, the inventors diligently researched the relationship between high-temperature processing, such as hydrogen baking, and the occurrence of defects in minute protrusions. They found that a silicon substrate processing method is effective in which a silicon substrate with a (551) plane orientation is subjected to high-temperature processing at a temperature higher than 940°C in a furnace, and then cooled to a temperature below 840°C after the high-temperature processing, while maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C that the substrate passes through during cooling. They found that this processing method can suppress the occurrence of defects and produce high-quality substrates, thus completing the present invention.

[0021] The above investigation will now be described in detail. As mentioned earlier, after removing the native oxide film or after silicon epitaxial growth, when the silicon (551) substrate (also simply called the substrate) is removed from the epitaxial growth furnace, minute defects like those shown in Figure 8 may be detected. To investigate the cause of this, the substrate was subjected to high-temperature treatment and subsequent cooling treatment using an epitaxial growth furnace. The specific investigation conditions are as follows. The cooling rate was adjusted by adjusting the output intensity of the heating lamp in the epitaxial growth furnace. In addition, a thermocouple was installed inside the furnace to measure the furnace temperature (substrate temperature) in real time.

[0022] <Investigation 1> Multiple identical silicon (551) substrates were prepared, and each substrate was subjected to the following treatment at different holding temperatures. The substrates were placed in a furnace and heated, and the furnace temperature (substrate temperature) was raised to 1150°C and held for 10 minutes under a hydrogen atmosphere. After that, they were cooled to the holding temperature at a cooling rate of 15°C / min. After holding at this holding temperature for 10 minutes, they were cooled to 500°C at a cooling rate of 15°C / min and removed from the furnace. The substrate surface was then observed using a TEM (transmission electron microscope) at room temperature (approximately 25°C) to investigate the occurrence of defects in detail. The holding temperature was varied in 10°C increments within the range of 600°C to 1000°C.

[0023] A portion of the observation results is shown in Figure 2. Figure 2 shows the case where the holding temperature ranges from 800°C to 960°C in 20°C increments. Defects occur in the areas circled in the figure. Looking at the results from the lower holding temperature side, it was found that defects begin to form from 840°C, the density reaches its maximum around 900°C, and then the defects disappear (no defects are observed) at 960°C, which is above 940°C. In other words, it was found that in silicon (551) substrates, defects can be formed in the temperature range of 840°C to 940°C due to the effect of step bunching on the surface.

[0024] <Investigation 2> Next, the relationship between cooling rate and defect occurrence was investigated in the range of 800°C to 980°C, including the above temperature range (840°C to 940°C). In Investigation 1, the temperature was maintained midway through the process, but in Investigation 2, this temperature maintenance was not performed, and cooling continued from 1150°C to 500°C. In addition, a change temperature was set between 980°C and 800°C to change the cooling rate, and the cooling rate profile was set as A from 1150°C to the change temperature, and as B from the change temperature to 500°C. The cooling rate was selected from 5°C / min, 9°C / min, 10°C / min, 15°C / min, and 200°C / min, and cooling was performed in combinations where A > B or B > A. Note that 5°C / min to 15°C / min are the cooling rates when the substrate is cooled inside the furnace, and 200°C / min is the cooling rate when the substrate is removed from the furnace, so it only corresponds to B. Then, using the same method as in Investigation 1, the substrate surface was observed using a TEM to investigate the occurrence of defects in detail.

[0025] As a result, it was found that it is important to pass through the temperature range of 840°C to 940°C, where this defect occurs, as quickly as possible, and that this temperature range should be passed through while maintaining a cooling rate of 10°C / min or higher. Conversely, if there is a range within the above temperature range where the cooling rate is less than 10°C / min, the defect will occur. As an example, Figure 3 shows a TEM observation when cooled at a constant cooling rate of 9°C / min. The area circled in the figure is where the defect occurs.

[0026] As described above, our investigation has shown that in order to prevent the occurrence of minute protrusion defects related to high-temperature processing of silicon (551) substrates, it is necessary to maintain a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C during cooling.

[0027] Figure 1 shows an example of the steps of the silicon substrate processing method of the present invention. As shown in Figure 1, the process includes Step 1: High-temperature processing of the silicon (551) substrate (higher than 940°C), and Step 2: Cooling to below 840°C (maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C).

[0028] First, let's explain the high-temperature treatment in step 1. A silicon (551) substrate is prepared, and the substrate is placed in a furnace for high-temperature treatment. This high-temperature treatment is not particularly limited and can be any temperature higher than 940°C. An example of an upper temperature limit is 1350°C. As an example of high-temperature treatment, epitaxial growth can be performed (epitaxial growth temperature of silicon: approximately 1100 to 1200°C). Alternatively, as a high-temperature treatment, annealing under a hydrogen atmosphere to remove the native oxide film on the substrate surface, which is commonly performed before epitaxial growth, can also be performed (annealing temperature: approximately 1000 to 1200°C). These treatments themselves can be performed using the same procedures as in conventional methods. Conventionally, the aforementioned micro-protrusion defects may be formed on the silicon (551) substrate after these treatments, and the present invention, which can suppress this formation, is particularly effective for these treatments.

[0029] Next, we will explain the cooling process in step 2. The substrate is cooled to a temperature below 840°C (the lower limit being, for example, room temperature (around 25°C)). The substrate may be cooled inside the furnace or removed from the furnace and cooled outside. In this case, during the 840°C to 940°C temperature range that the substrate passes through during cooling, the cooling rate should be maintained at 10°C / min or higher. As long as the above cooling rate conditions are met, the cooling rate may be kept constant or changed midway through the process. There is no particular upper limit to the cooling rate. In particular, a large cooling rate (for example, 200°C / min or higher) is acceptable, such as when the substrate is removed from the furnace. The cooling rate will vary depending on the furnace temperature at the time of removal and the temperature difference with the outside of the furnace, so it is not possible to set an upper limit.

[0030] With this processing method of the present invention, as described above, even when a silicon (551) substrate is subjected to high-temperature processing, it is possible to suppress the formation of minute protrusion defects on the substrate after cooling.

[0031] Furthermore, it is preferable to ensure that there is no difference in temperature between the center and edges of the substrate during cooling. In particular, when using large-diameter substrates (for example, substrates with a diameter of 300 mm or more) and processing temperatures are high, temperature distributions (temperature differences) tend to occur within the substrate surface. To more effectively prevent the occurrence of defect distributions due to temperature distributions within the substrate surface, it is preferable to control the temperature distribution within the substrate surface to within ±10°C. In particular, around the temperature range of 840°C to 940°C, keeping the temperature difference within the substrate surface within ±10°C can extremely effectively suppress the occurrence of defects within the substrate surface. From the perspective of preventing the occurrence of temperature distributions within the substrate surface, the larger the substrate size, the more effective it is, so there is no upper limit to the substrate size.

[0032] Furthermore, the temperature after cooling is also important, and it is best to avoid leaving the material near the phase transition temperature for extended periods. For example, after removal from equipment that performs high-temperature processing, such as an epitaxial growth furnace, it is best to cool the material to the lowest possible temperature.

[0033] Furthermore, if a substrate has been cooled in a furnace, it may be subjected to another process in the same furnace, in which case the substrate is temporarily stored in the furnace. For example, this may involve first removing the native oxide film and then performing epitaxial growth. In this case, it is preferable to store the substrate at a temperature below 840°C (the lower limit being, for example, room temperature (around 25°C)) and to control the temperature variation (temperature difference) within the substrate surface to within ±10°C. This makes it extremely effective to suppress the occurrence of defects within the substrate surface even during storage. Also, when processing and cooling each substrate at high temperature one by one using a single-wafer furnace and then storing them, if the same storage temperature is set for each substrate, the temperature will not vary from substrate to substrate, so it is possible to obtain multiple substrates of the same quality without defects.

[0034] Furthermore, the cooling rate and temperature distribution within the substrate surface can be controlled during the cooling process by adjusting the output intensity of the heating lamp, etc. The temperature distribution within the substrate surface during storage can be controlled by controlling the heating element. This heating element can be, for example, radiant heating using a lamp. The furnace temperature (substrate temperature) can also be measured in real time using a thermocouple or similar device.

[0035] The present invention will be described more specifically below with reference to embodiments of the present invention, but the present invention is not limited to these embodiments. (Example 1) A single-crystal silicon substrate with a diameter of 300 mm, a crystal orientation (551), boron doping, and a resistivity of 10 Ω·cm was prepared. Using an epitaxial growth furnace, the substrate was annealed for 600 seconds in a hydrogen atmosphere at a temperature of 1080°C. The removal temperature at this time was set to 830°C, and the cooling rate to 830°C was set to 10°C / min. The cooling rate after removal was 200°C / min or more. That is, a cooling rate of 10°C / min or more was maintained in the temperature range of 840 to 940°C during cooling. After removal, the surface of the substrate cooled to room temperature (25°C) was observed with a TEM. The TEM observation diagram is shown in Figure 4. No defects were observed in the TEM results.

[0036] (Example 2) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 940°C. That is, a cooling rate of 10°C / min or more was maintained in the temperature range of 840-940°C during cooling. The observation diagram is shown in Figure 5. No defects were observed as a result of the TEM.

[0037] (Comparative Example 1) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 840°C and the cooling rate was set to 9°C / min. That is, a cooling rate of 10°C / min or higher was not maintained in the temperature range of 840-940°C during cooling. The observation diagram is shown in Figure 6. Defect formation was observed as a result of the TEM.

[0038] (Comparative Example 2) Hydrogen annealing, cooling, and TEM observation were performed in the same manner as in Example 1, except that the extraction temperature was set to 930°C and the cooling rate was set to 9°C / min. That is, a cooling rate of 10°C / min or higher was not maintained in the temperature range of 840-940°C (specifically, the range of 940-930°C) during cooling. The observation diagram is shown in Figure 7. Defect formation was observed as a result of the TEM.

[0039] It should be noted that the present invention is not limited to the embodiments described above. The embodiments described above are illustrative, and any configuration that has substantially the same technical idea as described in the claims of the present invention and achieves similar effects is included within the technical scope of the present invention.

Claims

1. A method for processing a silicon substrate, characterized in that, for a silicon substrate with a (551) orientation, high-temperature processing is performed in a furnace at a temperature higher than 940°C, and when cooling to a temperature below 840°C after the high-temperature processing, the cooling is performed while maintaining a cooling rate of 10°C / min or more in the temperature range of 840°C to 940°C that the substrate passes through during the cooling.

2. The method for processing a silicon substrate according to claim 1, characterized in that the high-temperature treatment involves annealing under a hydrogen atmosphere to remove the native oxide film on the surface of the silicon substrate.

3. The method for processing a silicon substrate according to claim 1, characterized in that epitaxial growth is performed on the silicon substrate as the high-temperature treatment.

4. The method for processing a silicon substrate according to any one of claims 1 to 3, characterized in that when the cooled silicon substrate is stored in the furnace for the next processing, it is stored at a temperature of less than 840°C and the temperature difference within the substrate surface of the silicon substrate is controlled to be within ±10°C.

5. The method for processing a silicon substrate according to any one of claims 1 to 3, characterized in that a silicon substrate with a diameter of 300 mm or more is prepared as the silicon substrate, and during cooling in the temperature range of 840°C to 940°C, the temperature difference within the substrate surface of the silicon substrate is controlled to be within ±10°C.

6. The silicon substrate processing method according to claim 4, characterized in that a silicon substrate with a diameter of 300 mm or more is prepared as the silicon substrate, and during cooling in the temperature range of 840°C to 940°C, the temperature difference within the substrate surface of the silicon substrate is controlled to be within ±10°C.

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