Heat dissipation cover, chip packaging structure, circuit board assembly, and electronic device

Abstract

The present application provides a heat dissipation cover, a chip packaging structure, a circuit board assembly, and an electronic device. The heat dissipation cover comprises: a base; a cover body provided on the base, wherein the cover body comprises a first surface facing the base and a second surface opposite to the first surface, a first accommodating cavity is formed between the first surface and the base, the second surface is provided with a first hole, the first surface is provided with a plurality of second holes in communication with the first hole, the plurality of second holes are all in communication with the first accommodating cavity, and the cover body is provided with a through hole in communication with the first accommodating cavity; and a heat dissipation structure provided in the first accommodating cavity. The present application can improve the heat dissipation effect of the heat dissipation cover.

Description

Heat dissipation cover, chip packaging structure, circuit board assembly and electronic device

[0001] The present application claims priority to the Chinese patent application No. 202411534029.8, filed on October 30, 2024, and entitled "Heat dissipation cover, chip packaging structure, circuit board assembly and electronic device", the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the field of chip heat dissipation, in particular to a heat dissipation cover, a chip packaging structure, a circuit board assembly and an electronic device. BACKGROUND

[0003] With the increase of power consumption of large-size chips, the chip heat dissipation mode gradually changes from air volume heat dissipation to liquid cooling heat dissipation. Based on this, the chip packaging structure usually includes a heat dissipation cover arranged above a plurality of chips, and the heat dissipation cover is provided with an inlet and an outlet. Fluid flows into the heat dissipation cover from the inlet, flows in the heat dissipation cover, and exchanges heat with each chip. Finally, it flows out from the outlet.

[0004] However, during the flow of fluid in the heat dissipation cover, the temperature gradually rises, that is, the fluid far from the inlet has a higher temperature. The fluid with a higher temperature provides a poor heat dissipation effect for the chip at the corresponding position. SUMMARY

[0005] In order to solve the above technical problems, the present application provides a heat dissipation cover, a chip packaging structure, a circuit board assembly and an electronic device, which can improve the heat dissipation effect of the heat dissipation cover.

[0006] In a first aspect of the present application, a heat dissipation cover is provided, which can be applied to a chip packaging structure. The chip packaging structure can also include one or more chips. The heat dissipation cover can include a base, a cover body and a heat dissipation structure.

[0007] When the heat dissipation cover of the present application is applied to the chip packaging structure, the chip packaging structure can also include a chip and a substrate, the chip is arranged on the substrate, the heat dissipation cover is also arranged on the substrate, and a containing cavity is formed between the heat dissipation cover and the substrate, and the chip can be located in the containing cavity.

[0008] The cover body is arranged on the base. Specifically, the cover body can be located on the side of the base away from the chip, or in other words, the cover body is located above the base. The cover body includes a first surface facing the base and a second surface opposite to the first surface, and a first containing cavity is formed between the first surface and the base.

[0009] A first hole is arranged on the second surface. The first hole can serve as a fluid inlet, and when it is necessary to dissipate heat from the chip, fluid can be introduced into the heat dissipation cover from the first hole.

[0010] The first surface is provided with a plurality of second holes in communication with the first hole, and the plurality of second holes are also in communication with the first accommodating cavity. In this way, the fluid flowing into the first hole can flow to the first accommodating cavity from the plurality of second holes. The first accommodating cavity is formed between the first surface of the cover and the base, and the base is located above the chip. Therefore, when the fluid flows into the first accommodating cavity from the second hole, and the second hole corresponds to the position of the chip, the fluid can be directly jetted above the chip, so as to perform vertical jetting impact heat dissipation on the chip, so as to generate a higher convective heat transfer coefficient in a local area, thereby improving the cooling efficiency and the heat dissipation effect. Moreover, the fluid flowing into the first accommodating cavity from the second hole is not subjected to heat exchange with any chip, and has a lower temperature, thereby further improving the heat dissipation effect on the chip.

[0011] The heat dissipation structure is arranged in the first accommodating cavity. In this way, the fluid flowing into the first accommodating cavity can flow to all directions, and exchanges heat with the chip below on one hand, thereby dissipating heat from the chip; and exchanges heat with the heat dissipation structure on the other hand, and dissipates heat through the heat dissipation structure. In this way, the fluid can act as a heat conduction body, and dissipate the heat of the chip through the heat dissipation structure, thereby further improving the heat dissipation effect of the heat dissipation cover.

[0012] The cover is provided with a through hole in communication with the first accommodating cavity, and the through hole can act as a fluid outlet of the heat dissipation cover. The fluid in the first accommodating cavity exchanges heat and flows out of the through hole.

[0013] In some embodiments of the present application, the cover is provided with at least two through holes, and the first through hole and the second through hole of the at least two through holes are located on two sides of the first hole respectively. The first through hole and the second through hole can both act as fluid outlets. In this way, after the fluid enters the inside of the heat dissipation cover from the first hole, the fluid flows into the first accommodating cavity through the plurality of second holes, and flows to both sides along the heat dissipation structure, and finally flows out of the first through hole and the second through hole located at two ends of the first hole, thereby enabling the fluid to exchange heat with each chip as much as possible, and thereby improving the heat dissipation effect on the chip.

[0014] Further, the first through hole, the first hole and the second through hole are arranged in the first direction in sequence. The heat dissipation structure includes a heat dissipation fin extending in the first direction. That is, the extending direction of the heat dissipation fin is the same as the arrangement direction of the first through hole, the first hole and the second through hole. In this way, the fluid flowing into the first accommodating cavity from the second hole can flow in the first direction and flow in the direction opposite to the first direction. On one hand, the fluid flows in the first accommodating cavity and contacts the heat dissipation fin, and the heat dissipation fin has a larger heat exchange area, thereby improving the heat exchange efficiency and the heat exchange effect. On the other hand, the heat dissipation fin can provide a flow guiding effect for the fluid flowing in the first accommodating cavity, thereby making the fluid flow more smoothly in the first accommodating cavity.

[0015] In some embodiments of this application, a channel is formed inside the cover, and multiple second holes communicate with the first hole through the channel. The projection of the channel onto the first surface covers the multiple second holes. That is, the dimension of the channel along the first direction is larger than the distance between the outer edges of two second holes located at the edges of the multiple second holes. In this way, when fluid enters the channel from the first hole, the larger dimension of the channel along the first direction can buffer the fluid, thereby making the pressure of the fluid flowing to each second hole substantially the same, i.e., achieving pressure equalization. This makes the flow rate of the fluid flowing out of each second hole substantially the same, thus providing approximately the same heat dissipation effect for the chip corresponding to each second hole.

[0016] In some embodiments of this application, a plurality of second holes are arranged in a rectangular array. Since multiple chips in a chip package structure are typically arranged in a rectangular array, the plurality of second holes can also be arranged in a rectangular array. Thus, each second hole can correspond to the position of each chip in the chip package structure, thereby corresponding to each chip.

[0017] In some embodiments of this application, the heat dissipation structure includes a plurality of spaced heat dissipation fins. These fins extend along a first direction and are arranged side-by-side along a second direction perpendicular to the first direction. Furthermore, the gaps between any two spaced heat dissipation fins may be identical; or, some gaps may be identical while the remaining gaps may be different; or, all gaps may be different. The following description uses the example of identical gaps.

[0018] The projection of the second hole on the base overlaps with the gap between the two adjacent heat dissipation fins. In this way, when the fluid flowing out of the second hole enters the first receiving cavity, at least a portion of the fluid first flows into the gap corresponding to the position of the second hole. The gap can provide sufficient space for this portion of the fluid, reducing the resistance to the fluid and thus avoiding obstruction to the flow of the fluid to the surrounding areas.

[0019] When the size of the second hole along the second direction is greater than the gap between two adjacent heat dissipation fins, part of the projection of the second hole on the base overlaps with the gap between the two adjacent heat dissipation fins, and another part of the projection overlaps with the heat dissipation fins.

[0020] When the dimension of the second hole along the second direction is equal to the gap between two adjacent heat dissipation fins, a portion of the projection of the second hole on the base overlaps with the gap between the two adjacent heat dissipation fins, and another portion overlaps with the heat dissipation fins. Alternatively, the projection of the second hole on the base completely overlaps with the gap.

[0021] When the dimension of the second hole along the second direction is smaller than the gap between two adjacent heat dissipation fins, a portion of the projection of the second hole on the base overlaps with the gap between the two adjacent heat dissipation fins, and another portion of the projection overlaps with the heat dissipation fins. Alternatively, the projection of the second hole on the base lies within the gap.

[0022] In some embodiments of this application, among the multiple heat dissipation fins, a portion of the fins correspond to the positions of the second holes, while the remaining fins do not. That is, the projections of the multiple second holes onto the base overlap with a portion of the heat dissipation fins, but not with the remaining portion. The surface of the heat dissipation fins corresponding to the second holes facing the cover has grooves, and these grooves are located on the heat dissipation fins at positions corresponding to the second holes. Thus, when fluid flowing from the second holes enters the first receiving cavity, it first flows to the grooves on the heat dissipation fins corresponding to the second holes. These grooves provide sufficient space for the fluid, reducing resistance and preventing obstruction of its outward flow. Furthermore, the areas of the heat dissipation fins corresponding to the second holes that do not have grooves can provide partial heat exchange, ensuring sufficient heat exchange area in each heat dissipation fin.

[0023] In one example, a portion of the heat dissipation fins corresponding to the positions of the multiple second holes have grooves, while the heat dissipation fins not corresponding to the positions of the multiple second holes do not have grooves. In another example, each heat dissipation fin has grooves at the same positions. Multiple heat dissipation fins can be manufactured by cutting. When grooves are provided at the same positions on each heat dissipation fin, the grooves of each heat dissipation fin can be formed in a single cutting process, thereby simplifying the manufacturing process and improving production efficiency.

[0024] In some embodiments of this application, the heat dissipation structure includes a first heat dissipation fin group and a second heat dissipation fin group spaced apart along the extension direction of the first heat dissipation fin group. The gap between the first and second heat dissipation fin groups corresponds to the position of the second hole. Thus, when fluid flowing out of the second hole enters the first receiving cavity, it first flows into the gap area corresponding to the position of the second hole. The gap area provides sufficient space for the fluid, reducing resistance to the fluid and preventing obstruction of its outward flow.

[0025] A second aspect of this application also provides a chip packaging structure, including a substrate, a chip, and a heat sink according to any of the above embodiments. Both the chip and the heat sink are disposed on the substrate. A second receiving cavity is formed on the side of the base of the heat sink away from the cover body, and the chip is located within the second receiving cavity. The chip packaging structure can achieve all the effects of a heat sink.

[0026] In some embodiments of this application, the second hole of the heat sink corresponds to the chip position. Therefore, when fluid flows from the second hole into the first receiving cavity, it can flow directly onto the base, while the chip is located within the second receiving cavity formed on the third surface of the base. Because the second hole in the heat sink corresponds to the chip position, the fluid flowing to the base actually flows above the chip, thereby directly exchanging heat with the chip and improving the chip's heat dissipation effect.

[0027] In some embodiments of this application, the chip package structure includes multiple chips, including a first chip and a second chip. The first chip may be a chip with a hotspot area, specifically including a high-power chip such as a computing chip. The second chip may be a chip other than the first chip, i.e., a chip without a hotspot area. Specifically, the second chip may include a low-power chip such as a communication chip.

[0028] In one example, a second hole is provided on the heat sink at the position corresponding to each chip; that is, a second hole is provided on the heat sink at the position corresponding to the first chip, and a second hole is also provided on the heat sink at the position corresponding to the second chip. Thus, fluid jetting into the first receiving cavity through each second hole can be jetted above each chip, thereby achieving better heat dissipation for each chip.

[0029] In another example, a second hole is provided on the heat sink at the position corresponding to the first chip, but no second hole is provided at the position corresponding to the second chip. Since the first chip has a hot spot area, it generates more heat and reaches a higher temperature during operation, requiring better heat dissipation. The second chip, however, does not have a hot spot area and generates less heat and reaches a lower temperature during operation. Therefore, heat exchange between the first chip and / or the second chip, followed by heat exchange between the two chips, can still meet the heat dissipation requirements of the second chip. During fluid flow distribution, a larger flow rate of fluid that has not undergone heat exchange can also be allocated to the first chip for heat dissipation, thereby improving the heat dissipation effect.

[0030] In some embodiments of this application, the projection of the second hole onto the first chip is located within the hot spot region. For example, the projection of the second hole onto the first chip coincides with the hot spot region. Alternatively, the projection of the second hole onto the first chip is smaller than the hot spot region. When the size of the second hole is small, the flow rate of the fluid flowing from the second hole into the first receiving cavity is higher. The greater the flow rate of the fluid within a certain time, the larger the coverage area, thereby increasing the heat exchange area and improving the heat dissipation effect on the first chip.

[0031] Furthermore, the center of the second hole corresponds to the center of the hot spot region. The temperature at the center of the hot spot region is higher than that at the edge. Therefore, the fluid flowing from the second hole into the first receiving cavity can be directly jetted above the center of the hot spot region, thereby achieving better heat dissipation.

[0032] In some embodiments of this application, the dimension of the hot spot region along the second direction is larger than its dimension along the first direction; that is, the hot spot region may be elongated. The dimension of the second hole along the second direction is larger than its dimension along the first direction, and the second hole is also elongated. Thus, the shape of the second hole matches the shape of the hot spot region, thereby facilitating heat dissipation for the hot spot region.

[0033] In other embodiments, the dimensions of the hot spot region along the second direction are substantially the same as those along the first direction; that is, the hot spot region can be circular or square. The dimensions of the second hole along the second direction are also substantially the same as those along the first direction, and the second hole is also circular or square. Thus, the shape of the second hole matches the shape of the hot spot region, thereby facilitating heat dissipation for the hot spot region.

[0034] A third aspect of this application also provides a circuit board assembly, including a circuit board and a chip packaging structure according to any of the above embodiments, wherein the chip packaging structure is disposed on the circuit board. The circuit board assembly can achieve all the effects of the chip packaging structure.

[0035] A fourth aspect of this application also provides an electronic device, including a controller and the aforementioned circuit board assembly, wherein the controller is electrically connected to the circuit board. The electronic device is capable of achieving all the effects of the circuit board assembly. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 is a schematic diagram of the circuit board assembly in the related technology;

[0038] Figure 2 is a schematic diagram of the temperature distribution obtained by testing the fluid temperature at different locations in the channel of the circuit board assembly shown in Figure 1.

[0039] Figure 3 is a schematic diagram of the circuit board assembly in the first embodiment of this application;

[0040] Figure 4 is a schematic diagram of the heat sink in the circuit board assembly shown in Figure 3;

[0041] Figure 5 is a schematic diagram showing the positional relationship between the heat dissipation structure and the second hole in the heat dissipation cover shown in Figure 4.

[0042] Figure 6 shows the positional relationship between the fluid and the heat dissipation fins in the heat dissipation structure shown in Figure 5.

[0043] Figure 7 is a schematic diagram showing the positional relationship between the hot spot area of ​​the chip and the second hole in the heat sink shown in Figure 4;

[0044] Figure 8 is a schematic diagram of the heat dissipation cover in the second embodiment of this application;

[0045] Figure 9 is a schematic diagram showing the positional relationship between the heat dissipation structure and the second hole in the heat dissipation cover shown in Figure 8;

[0046] Figure 10 shows the positional relationship between the fluid and the heat dissipation fins in the heat dissipation structure shown in Figure 9.

[0047] Figure 11 is a schematic diagram of the heat dissipation cover in the third embodiment of this application;

[0048] Figure 12 is a schematic diagram showing the positional relationship between the heat dissipation structure and the second hole in the heat dissipation cover shown in Figure 11;

[0049] Figure 13 shows the positional relationship between the fluid and the heat dissipation fins in the heat dissipation structure shown in Figure 12.

[0050] Figure 14 is a schematic diagram of the positional relationship between the heat dissipation structure and the second hole in the fourth embodiment of this application;

[0051] Figure 15 is a schematic diagram showing the positional relationship between the hot spot area of ​​the chip and the second hole in the fifth embodiment of this application;

[0052] Figure 16 is a schematic diagram showing the positional relationship between the hot spot area of ​​the chip and the second hole in the sixth embodiment of this application;

[0053] Figure 17 is a schematic diagram of the manufacturing process of the circuit board assembly shown in Figure 3.

[0054] Icons: 1-Circuit board assembly; 2-Fluid; 200-Circuit board; 100-Chip package structure; 10-Substrate; 20-Chip; 21-First chip; 22-Second chip; 23-Hot spot area; 30-Heat cover; 301-Inlet; 302-Outlet; 31-Base; 311-Third surface; 312-Fourth surface; 313-Second receiving cavity; 32-Cover; 321-First surface; 3211-Second hole; 322-Third... Two surfaces; 3221-First hole; 323-First receiving cavity; 324-Through hole; 3241-First through hole; 3242-Second through hole; 325-Channel; 33-Heat dissipation structure; 331-Heat dissipation fins; 3311-Groove; 332-First heat dissipation fin group; 333-Second heat dissipation fin group; 334-Gap area; 50-Second solder ball; 40-Encapsulation layer; 60-Bonding structure; 70-Thermal interface layer; 300-First solder ball. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item)" refers to one or more, while "more" refers to two or more. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0057] The terms "first" and "second," etc., used in the specification and claims of this application are used to distinguish different objects, not to describe a specific order of objects. For example, "first target object" and "second target object," etc., are used to distinguish different target objects, not to describe a specific order of target objects.

[0058] Terms such as “connected” and “linked” are used to express the interconnection or interaction between different components, which may include direct connection or indirect connection through other components. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion, such as including a series of steps or units. A method, system, product, or apparatus is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses. Terms such as “upper,” “lower,” “left,” and “right” are used only relative to the orientation of components in the accompanying drawings. These directional terms are relative concepts used for relative description and clarification, and may vary accordingly depending on the orientation of the components in the drawings.

[0059] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0060] In the description of the embodiments in this application, unless otherwise stated, "multiple" means two or more. For example, multiple processing units means two or more processing units; multiple systems means two or more systems.

[0061] Electronic devices typically include a controller and a circuit board assembly, with the controller electrically connected to the circuit board assembly. As shown in Figure 1, the circuit board assembly 1 may include a circuit board 200, a chip package structure 100, and a plurality of first solder balls 300. The plurality of first solder balls 300 are located between the chip package structure 100 and the circuit board 200. The controller can send signals to the chip package structure 100 via the circuit board 200, and receive signals from the chip package structure 100 via the circuit board 200.

[0062] Here, the electronic device can be, for example, a server, a financial terminal product, or a communication product, and this application embodiment does not limit this. Illustrated, the aforementioned financial terminal product can be an automated teller machine (ATM), a self-service electronic device, etc. The communication product can be a storage device, a network switch, or other communication equipment.

[0063] As shown in Figure 1, the chip packaging structure 100 may include a substrate 10, a chip 20, a heat sink 30, and a packaging layer 40. The chip 20 is disposed on the substrate 10. The packaging layer 40 is disposed on the substrate 10 and covers the top and sides of the chip 20. The heat sink 30 is disposed on the substrate 10, and a second receiving cavity 313 is formed inside the heat sink 30, within which the chip 20 and the packaging layer 40 reside.

[0064] Chip 20 can be a pre-packaged functional module. For example, chip 20 can be a system-on-chip (SOC), a test or dummy chip, a central processing unit (CPU), a graphics processing unit (GPU), a memory chip, an input / output (I / O) chip, an integrated passive device (IPD), etc. It can also integrate other pre-packaged functional modules, such as high-bandwidth memory (HBM), a die-on-silicon interposer (DOI), or a fan-out RDL interposer (FOI).

[0065] As the power consumption of large-size chips 20 increases, the heat dissipation method for chips 20 is gradually shifting from airflow cooling to liquid cooling. Based on this, as shown in Figure 1, the heat sink 30 typically has an inlet 301 and an outlet 302. A channel 325 is formed inside the heat sink 30, and the inlet 301 and outlet 302 are connected through the channel 325. In this way, fluid flows into the channel 325 from the inlet 301 and exchanges heat with each chip 20 during the flow. Finally, it flows out from the outlet 302.

[0066] The fluid temperature at different locations within channel 325 was tested during the fluid flow inside the heat sink 30, resulting in the temperature distribution diagram shown in Figure 2. As shown in Figure 2, the fluid flows in the direction of the arrows, and the temperature at three selected locations was measured: position a1 had a temperature of 40℃, position a2 had a temperature of 46℃, and position a3 had a temperature of 67℃. It can be seen that the fluid temperature gradually increases during its flow within the heat sink 30. In other words, the fluid temperature is higher further away from the inlet 301. The higher fluid temperature results in poorer heat dissipation for the chip 20 at the corresponding location.

[0067] Based on this, this application provides a heat sink 30 that can be applied to a chip packaging structure. As shown in FIG3, the chip packaging structure 100 may include one or more chips 20. The one or more chips 20 are fixed to the substrate 10 by second solder balls 50. The heat sink 30 is bonded to the substrate 10 by an adhesive structure 60.

[0068] As shown in Figure 3, the heat sink 30 may include a base 31, a cover 32, and a heat dissipation structure 33. The base 31 has opposing third surfaces 311 and fourth surfaces 312. A second receiving cavity 313 for accommodating the chip 20 is formed on the third surface 311. When the chip package structure 100 includes one chip 20, all chips 20 can be accommodated within the second receiving cavity 313. When the chip package structure 100 includes multiple chips 20, all chips 20 can be accommodated within the second receiving cavity 313. If the bottom of the chip package structure 100 is facing down, the heat sink 30 is located above the chip 20.

[0069] As shown in Figure 4, the cover 32 is disposed on the fourth surface 312. That is, the cover 32 is located on the side of the base 31 away from the chip 20, or the cover 32 is located above the base 31. The cover 32 includes a first surface 321 facing the base 31 and a second surface 322 opposite to the first surface 321, and a first receiving cavity 323 is formed between the first surface 321 and the fourth surface 312.

[0070] As shown in Figure 4, a first hole 3221 is provided on the second surface 322. The first hole 3221 can serve as a fluid inlet, allowing fluid to flow into the heat sink 30 when heat dissipation of the chip 20 is required.

[0071] As shown in Figure 4, the first surface 321 is provided with a plurality of second holes 3211 that communicate with the first hole 3221, and the plurality of second holes 3211 are also connected to the first receiving cavity 323. In this way, fluid introduced from the first hole 3221 can flow to the first receiving cavity 323 through the plurality of second holes 3211.

[0072] In this embodiment, as shown in FIG3, the number of second holes 3211 is the same as the number of chips 20, and the multiple second holes 3211 correspond to the positions of multiple chips 20 respectively. That is, the heat sink 30 is provided with second holes 3211 at the positions corresponding to each chip 20. The first receiving cavity 323 is formed between the first surface 321 of the cover 32 and the fourth surface 312 of the base 31, and the base 31 is located above the chip 20. Therefore, when fluid flows from the second holes 3211 into the first receiving cavity 323, the fluid can be directly jetted above the chip 20, thereby performing vertical jet impact heat dissipation on the chip 20, so as to generate a higher convective heat transfer coefficient locally, thereby improving cooling efficiency and heat dissipation effect. Moreover, the fluid flowing from the second holes 3211 into the first receiving cavity 323 is a fluid that has not undergone heat exchange with any chip 20, and its temperature is low, thereby further improving the heat dissipation effect on the chip 20.

[0073] As shown in Figure 3, the heat dissipation structure 33 is disposed within the first receiving cavity 323. Thus, the fluid flowing into the first receiving cavity 323 can flow outwards, exchanging heat with the chip 20 below to dissipate heat from the chip 20, and simultaneously exchanging heat with the heat dissipation structure 33 to dissipate heat. Therefore, the fluid acts as a heat conductor, dissipating the heat from the chip 20 through the heat dissipation structure 33, thereby further improving the heat dissipation effect of the heat sink 30.

[0074] As shown in Figure 3, the cover 32 is provided with a through hole 324 communicating with the first receiving cavity 323. The through hole 324 can serve as a fluid outlet for the heat dissipation cover 30. The fluid that has undergone heat exchange in the first receiving cavity 323 flows out through the through hole 324.

[0075] In this embodiment, the cover 32 is provided with at least two through holes 324, for example, the two through holes 324 shown in FIG4; or in other embodiments, the cover 32 is provided with three through holes 324, four through holes 324 or more through holes 324.

[0076] As shown in Figure 4, at least two through holes 324 include a first through hole 3241 and a second through hole 3242, with the first through hole 3241 and the second through hole 3242 located on both sides of the first hole 3221. Since the through hole 324 is a fluid outlet, both the first through hole 3241 and the second through hole 3242 can be fluid outlets. In this way, after the fluid enters the first receiving cavity 323 through the first hole 3221, it flows into the first receiving cavity 323 through multiple second holes 3211, flows to both sides along the heat dissipation structure 33, and finally flows out from the first through hole 3241 and the second through hole 3242 located at both ends of the first hole 3221. This allows the fluid to exchange heat with each chip 20 shown in Figure 3 as fully as possible, thereby improving the heat dissipation effect on the chip 20.

[0077] Furthermore, as shown in Figure 4, the distance L1 between the first through hole 3241 and the first hole 3221 is the same as the distance L2 between the second through hole 3242 and the first hole 3221. Therefore, after the fluid enters the heat dissipation cover 30 through the first hole 3221, it can travel the same distance from both sides to reach the fluid outlet, thus achieving approximately the same heat exchange effect.

[0078] Furthermore, as shown in Figure 4, the first through-hole 3241, the first hole 3221, and the second through-hole 3242 are arranged sequentially along the first direction (X direction). As shown in Figures 5 and 6, the heat dissipation structure 33 includes heat dissipation fins 331, which extend along the X direction. That is, the extension direction of the heat dissipation fins 331 is the same as the arrangement direction of the first through-hole 3241, the first hole 3221, and the second through-hole 3242 shown in Figure 4. Thus, the fluid flowing from the second hole 3211 into the first receiving cavity 323 can flow in the X direction and in the opposite direction. On the one hand, when the fluid flows in the first receiving cavity 323, it comes into contact with the heat dissipation fins 331, which have a larger heat exchange area, thereby improving heat exchange efficiency and heat exchange effect. On the other hand, the heat dissipation fins 331 can provide a guiding effect for the fluid flowing in the first receiving cavity 323, thereby making the fluid flow more smoothly in the first receiving cavity 323.

[0079] As shown in Figure 4, a channel 325 is formed inside the cover 32, through which multiple second holes 3211 communicate with the first hole 3221. The projection of the channel 325 onto the first surface 321 covers the multiple second holes 3211. That is, the dimension L3 of the channel 325 along the X direction is greater than the distance L4 between the outer edges of two second holes 3211 located at the edges. Thus, when fluid enters the channel 325 from the first hole 3221, the channel 325 with its larger dimension along the X direction can buffer the fluid, thereby making the pressure of the fluid flowing to each second hole 3211 basically the same, i.e., achieving pressure equalization. As a result, the flow rate of the fluid flowing out of each second hole 3211 is basically the same, thus providing approximately the same heat dissipation effect to the chip 20 (as shown in Figure 3) corresponding to each second hole 3211.

[0080] As shown in Figure 7, multiple second holes 3211 are arranged in a rectangular array. Multiple chips 20 in the chip package structure 100 are usually arranged in a rectangular array. Therefore, multiple second holes 3211 can also be arranged in a rectangular array. Thus, each second hole 3211 can correspond to the position of each chip 20 in the chip package structure 100, thereby providing heat dissipation for each chip 20 accordingly.

[0081] In this embodiment, as shown in FIG7, all of the multiple chips 20 can be chips 20 with hot spot areas 23. Correspondingly, the number of second holes 3211 can be the same as the number of chips 20, and their positions correspond one-to-one. Thus, the fluid jetting from each second hole 3211 can exchange heat with the corresponding chip 20, thereby improving the heat dissipation effect of each chip 20.

[0082] In other embodiments, some of the chips 20 have hotspot areas, while the remaining chips 20 do not. In this case, the number of second holes 3211 is the same as the number of chips 20, and their positions correspond one-to-one.

[0083] It is understood that the chip 20 with hotspot area 23 may specifically include high-power chips 20 such as computing chips 20. The chip 20 without hotspot area 23 may specifically include low-power chips 20 such as communication chips 20.

[0084] As shown in Figure 5, the heat dissipation structure 33 includes a first heat dissipation fin group 332 and a second heat dissipation fin group 333 spaced apart along the extension direction of the first heat dissipation fin group 332. The interval region 334 between the first heat dissipation fin group 332 and the second heat dissipation fin group 333 corresponds to the position of the second hole 3211. Thus, when the fluid flowing out of the second hole 3211 shown in Figure 4 enters the first receiving cavity 323 shown in Figure 4, it first flows into the interval region 334 corresponding to the position of the second hole 3211. The interval region 334 can provide sufficient space for the fluid, reduce the resistance to the fluid, and thus avoid obstructing the flow of the fluid to the surrounding areas.

[0085] As shown in Figure 5, both the first heat dissipation fin group 332 and the second heat dissipation fin group 333 may include multiple spaced heat dissipation fins 331. These multiple heat dissipation fins 331 can extend along the X direction and be arranged side-by-side along the Y direction, with the Y direction perpendicular to the X direction. Furthermore, regarding the gap d between every two spaced heat dissipation fins 331, in one example, as shown in Figure 5, the gap d between every two spaced heat dissipation fins 331 can be the same. In another example, some gaps d between every two spaced heat dissipation fins 331 are the same, while the remaining gaps d are different. In yet another example, the gaps d between every two spaced heat dissipation fins 331 are all different. The following explanation uses the example of all gaps d being the same.

[0086] Furthermore, each heat dissipation fin 331 has the same structure. Also, each heat dissipation fin 331 has the same external dimensions.

[0087] As shown in Figure 7, the ratio of the size of the second hole 3211 along the X-direction to its size along the Y-direction corresponds to the ratio of the size of the hot spot region 23 along the X-direction to its size along the Y-direction. For example, when the size of the hot spot region 23 along the Y-direction is approximately the same as its size along the X-direction, that is, the hot spot region 23 can be circular or square. Since the size of the second hole 3211 along the Y-direction is approximately the same as its size along the X-direction, the second hole 3211 is also circular or square. Therefore, the shape of the second hole 3211 matches the shape of the hot spot region 23, thus facilitating heat dissipation for the hot spot region 23.

[0088] As shown in Figure 7, the projection of the second hole 3211 onto the chip 20 is located within the hot spot region 23. For example, the projection of the second hole 3211 onto the chip 20 coincides with the hot spot region 23. Alternatively, as shown in Figure 7, the projection of the second hole 3211 onto the chip 20 is smaller than the hot spot region 23. When the size of the second hole 3211 is small, the flow velocity of the fluid flowing from the second hole 3211 to the first receiving cavity 323 shown in Figure 4 is higher. The greater the fluid flow rate within a certain time, the larger the coverage area, thereby increasing the heat exchange area and improving the heat dissipation effect on the chip 20.

[0089] Furthermore, as shown in Figure 7, the center of the second hole 3211 corresponds to the center of the hot spot region 23. The temperature at the center of the hot spot region 23 is higher than that at the edge. Therefore, the fluid flowing from the second hole 3211 to the first receiving cavity 323 shown in Figure 4 can be directly jetted above the center region of the hot spot region 23, thereby achieving better heat dissipation.

[0090] As shown in Figure 3, to improve the tighter contact between the chip 20 and the heat sink 30 and avoid air gaps between them (which would result in significant contact thermal resistance due to the low thermal conductivity of air), the chip package structure 100 may further include a thermal interface layer 70, which can be made of thermal interface material (TIM). Using a thermal interface material can fill air gaps, thereby reducing contact thermal resistance and improving heat dissipation performance.

[0091] In other embodiments of this application, the difference from the embodiment shown in FIG4 lies in the heat dissipation structure 33. As shown in FIG8, 9 and 10, the heat dissipation fins 331 have a continuous structure.

[0092] In this embodiment, as shown in FIG9, the projection of the second hole 3211 on the fourth surface 312 overlaps with the gap d between two adjacent heat dissipation fins 331. In one example, the projection of a portion of the second hole 3211 on the fourth surface 312 overlaps with the gap d between two adjacent heat dissipation fins 331. In another example, the projections of all the second holes 3211 on the fourth surface 312 overlap with the gap d between two adjacent heat dissipation fins 331. Thus, when the fluid flowing out of the second hole 3211 shown in FIG8 enters the first receiving cavity 323, at least a portion of the fluid first flows into the gap d corresponding to the position of the second hole 3211. The gap d provides sufficient space for this at least portion of the fluid, reducing the resistance to the fluid and thus avoiding obstruction of the fluid's flow to the surrounding areas.

[0093] The size of the second hole 3211 along the Y direction can be greater than, equal to or less than the gap d between two adjacent heat dissipation fins 331. When the size of the second hole 3211 along the Y direction is greater than the gap d, part of the projection of the second hole 3211 on the fourth surface 312 overlaps with the gap d, and another part of the projection overlaps with the heat dissipation fin 331.

[0094] When the dimension of the second hole 3211 along the Y direction is equal to the gap d, part of the projection of the second hole 3211 on the fourth surface 312 overlaps with the gap d, and another part of the projection overlaps with the heat dissipation fin 331. Alternatively, the projection of the second hole 3211 on the fourth surface 312 completely overlaps with the gap d.

[0095] When the dimension of the second hole 3211 along the Y direction is smaller than the gap d, part of the projection of the second hole 3211 on the fourth surface 312 overlaps with the gap d, and another part of the projection overlaps with the heat dissipation fin 331. Alternatively, the projection of the second hole 3211 on the fourth surface 312 is located within the range of the gap d.

[0096] In other embodiments of this application, as shown in Figures 11 and 12, the difference between these embodiments and those shown in Figures 8 and 9 lies in the heat dissipation structure 33. Specifically, in this embodiment, the heat dissipation fins 331 are provided with grooves 3311.

[0097] Specifically, in this embodiment, as shown in FIG12, some heat dissipation fins 331 correspond to the positions of the second holes 3211, while the remaining heat dissipation fins 331 do not correspond to the positions of the second holes 3211. In one example, each heat dissipation fin 331 corresponding to the second hole 3211 has a groove 3311 on its surface facing the cover 32, and the groove 3311 is located on the heat dissipation fin 331 at the position corresponding to the second hole 3211. In this way, when the fluid 2 flowing out of the second hole 3211 (as shown in FIG13) enters the first receiving cavity 323 shown in FIG11, it first flows to the groove 3311 on the heat dissipation fin 331 corresponding to the position of the second hole 3211. The groove 3311 can provide sufficient receiving space for the fluid 2, reduce the resistance to the fluid 2, and thus avoid obstructing the flow of the fluid 2 to the surroundings. Moreover, the area in the heat dissipation fin 331 corresponding to the second hole 3211 where the groove 3311 is not provided can provide partial heat exchange, thereby ensuring sufficient heat exchange area in each heat dissipation fin 331.

[0098] In another example, among the multiple heat dissipation fins 331 corresponding to the multiple second holes 3211, some heat dissipation fins 331 are provided with grooves 3311, while the remaining heat dissipation fins 331 are not provided with grooves 3311.

[0099] In another example, as shown in Figure 12, each heat dissipation fin 331 has a groove 3311 at the same position. Multiple heat dissipation fins 331 can be manufactured by cutting. When the groove 3311 is provided at the same position on each heat dissipation fin 331, the groove 3311 of each heat dissipation fin 331 can be formed in one cutting process, thereby simplifying the manufacturing process and improving production efficiency.

[0100] In other embodiments of this application, as shown in FIG14, the difference between the embodiment shown in FIG5 is the number of second holes 3211, the number of chips 20, and the number of chips 20 with hot spot areas 23.

[0101] In this embodiment, as shown in FIG14, some of the multiple chips 20 have hotspot regions 23, while the remaining chips 20 do not have hotspot regions 23. For ease of description, the chip 20 with hotspot regions 23 is named the first chip 21, and the chip 20 without hotspot regions 23 is named the second chip 22.

[0102] As shown in Figure 14, a second hole 3211 is provided on the heat sink 30 at the position corresponding to the first chip 21, but no second hole 3211 is provided at the position corresponding to the second chip 22. Since the first chip 21 is a chip 20 with a hot spot area 23, it generates more heat and reaches a higher temperature during operation, requiring better heat dissipation. The second chip 22, however, is a chip 20 without a hot spot area 23, generating less heat and reaching a lower temperature during operation. Therefore, heat exchange between the first chip 21 and / or the second chip 22, followed by heat exchange between the two chips, can still meet the heat dissipation requirements of the second chip 22. During fluid flow distribution, a larger flow rate of fluid that has not undergone heat exchange can also be allocated to the first chip 21 for heat dissipation, thereby improving the heat dissipation effect.

[0103] In this embodiment, as shown in Figures 15 and 16, when the dimension of the hot spot region 23 along the Y direction is greater than its dimension along the X direction, that is, the hot spot region 23 can be elongated. Therefore, the dimension of the second hole 3211 along the second direction Y is greater than its dimension along the first direction X, and the second hole 3211 is also elongated. Thus, the shape of the second hole 3211 matches the shape of the hot spot region 23, thereby facilitating heat dissipation for the hot spot region 23.

[0104] In one example, as shown in Figure 16, the hot spot area 23 of each chip 20 can be elongated, and the multiple second holes 3211 can also be elongated.

[0105] In another example, as shown in Figure 17, the hot spot region 23 of a portion of the chips 20 can be square, while the hot spot regions 23 of the remaining chips 20 can be elongated. Therefore, the shape of the second hole 3211 corresponding to the square hot spot region 23 can be circular, and the shape of the second hole 3211 corresponding to the elongated hot spot region 23 can be elongated.

[0106] The circuit board assembly 1 shown in Figure 3 can be fabricated using the process shown in Figure 17. As shown in Figure 17(a), a substrate 10, a chip 20, a heat sink 30, an encapsulation layer 40, and a thermal interface layer 70 are provided first. The chip 20 is disposed on the substrate 10. The encapsulation layer 40 is disposed on the substrate 10 and covers the top and sides of the chip 20. A second receiving cavity 313 is formed inside the heat sink 30. An adhesive structure 60 is provided on the substrate 10.

[0107] As shown in Figure 17(b), the thermal interface layer 70 is fixed to the side of the encapsulation layer 40 facing away from the chip 20. The heat sink 30 is bonded to the substrate 10 via the adhesive structure 60. Furthermore, the chip 20 and the encapsulation layer 40 are located within the second receiving cavity 313 formed on the heat sink 30.

[0108] As shown in Figure 17(c), the chip package structure 100 is soldered onto the circuit board 200 via the first solder ball 300.

[0109] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A heat dissipation cover, characterized in that, include: Base; A cover body is disposed on the base. The cover body includes a first surface facing the base and a second surface opposite to the first surface. A first receiving cavity is formed between the first surface and the base. A first hole is provided on the second surface. A plurality of second holes communicating with the first hole are provided on the first surface. All of the plurality of second holes are communicating with the first receiving cavity. A through hole communicating with the first receiving cavity is provided on the cover body. A heat dissipation structure is disposed within the first receiving cavity.

2. The heat dissipation cover according to claim 1, characterized in that, The cover is provided with at least two through holes, and the first through hole and the second through hole are located on both sides of the first hole, respectively.

3. The heat dissipation cover according to claim 2, characterized in that, The first through hole, the first hole and the second through hole are arranged sequentially along the first direction; The heat dissipation structure includes heat dissipation fins that extend along the first direction.

4. The heat dissipation cover according to any one of claims 1-3, characterized in that, The cover has a channel inside, and the plurality of second holes communicate with the first hole through the channel; The projection of the channel onto the first surface covers the plurality of second holes.

5. The heat dissipation cover according to any one of claims 1-4, characterized in that, The plurality of second holes are arranged in a rectangular array.

6. The heat dissipation cover according to any one of claims 1-5, characterized in that, The heat dissipation structure includes multiple spaced heat dissipation fins, and the projection of the second hole on the base overlaps with the gap between two adjacent heat dissipation fins.

7. The heat dissipation cover according to any one of claims 1-5, characterized in that, The heat dissipation structure includes multiple heat dissipation fins. The surface of the heat dissipation fins corresponding to the second hole facing the cover is provided with a groove. The groove is located on the heat dissipation fins at the position corresponding to the second hole.

8. The heat dissipation cover according to claim 7, characterized in that, Each of the heat dissipation fins has a groove at the same position.

9. The heat dissipation cover according to any one of claims 1-8, characterized in that, The heat dissipation structure includes a first heat dissipation fin group and a second heat dissipation fin group spaced apart in the extension direction of the first heat dissipation fin group, wherein the interval between the first heat dissipation fin group and the second heat dissipation fin group corresponds to the position of the second hole.

10. A chip packaging structure, characterized in that, The device includes a substrate, a chip, and a heat sink as described in any one of claims 1-9, wherein the chip and the heat sink are both disposed on the substrate, and a second receiving cavity is formed on the side of the base of the heat sink away from the cover body, and the chip is located in the second receiving cavity.

11. The chip packaging structure according to claim 10, characterized in that, The second hole of the heat sink corresponds to the position of the chip.

12. The chip packaging structure according to claim 11, characterized in that, The chip packaging structure includes multiple chips, including a first chip and a second chip. The first chip has a hot spot area. The heat sink has a second hole at a position corresponding to the first chip, and the heat sink does not have a second hole at a position corresponding to the second chip.

13. The chip packaging structure according to claim 12, characterized in that, The projection of the second hole onto the first chip is located within the area of ​​the hot spot region.

14. The chip packaging structure according to claim 12 or 13, characterized in that, The hot spot area has a larger dimension along the second direction than the dimension along the first direction, and the second hole has a larger dimension along the second direction than the dimension along the first direction.

15. A circuit board assembly, characterized in that, The invention includes a circuit board and a chip packaging structure as described in any one of claims 10-14, wherein the chip packaging structure is disposed on the circuit board.

16. An electronic device, characterized in that, It includes a controller and the circuit board assembly of claim 15, wherein the controller is electrically connected to the circuit board.

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