Solar cell structure

Abstract

The present application relates to the technical field of batteries, in particular to a solar cell structure. Fingers comprise first fingers and second fingers that extend in a second direction and are alternately arranged at intervals, the first fingers and the second fingers passing through a plurality of first regions and a plurality of second regions. First insulating structures are located in the first regions and located on the side of the first fingers away from a substrate, and second insulating structures are located in the second regions and located on the side of the second fingers away from the substrate. First conductive structures are located in the first regions, the first conductive structures covering the first insulating structures and being located between the second fingers and the substrate. Second conductive structures are located in the second regions, the second conductive structures covering the second insulating structures and being located between the first fingers and the substrate.

Description

Solar cell structure

[0001] Cross-references to related applications

[0002] This disclosure claims priority to Chinese Patent Application No. 202411599896X, filed on November 8, 2024, entitled “Semiconductor Structure”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of battery technology, and in particular to a solar cell structure. Background Technology

[0004] A solar cell is a semiconductor device that uses the photovoltaic effect to directly convert sunlight into electrical energy. When sunlight shines on a solar cell, photons excite electrons in the semiconductor material, causing them to transition from the valence band to the conduction band, forming photogenerated charge carriers. These charge carriers generate an electromotive force inside the semiconductor, thereby forming a current in the external circuit, completing the conversion of light energy into electrical energy.

[0005] In related technologies, to prevent leakage, the fine grid of a solar cell must be disconnected at the opposite-shaped main grid. If the fine grid and the opposite-shaped main grid are not properly isolated, unnecessary current paths may be formed, leading to power loss and potentially damaging the cell. However, the design of disconnecting the fine grid at the opposite-shaped main grid inevitably increases the series resistance.

[0006] Therefore, there is an urgent need for a solar cell structure that can reduce series resistance while ensuring high photoelectric conversion efficiency.

[0007] Summary of the Invention

[0008] Various embodiments of this disclosure provide a solar cell structure having a first region and a second region, both extending along a first direction, and the first and second regions alternating along a second direction, the first direction intersecting the second direction. The solar cell structure includes:

[0009] Base;

[0010] A fine grid, located on one side of the substrate, includes a first fine grid and a second fine grid that extend along a second direction and are alternately spaced, the first fine grid and the second fine grid passing through a plurality of first regions and a plurality of second regions;

[0011] An insulating layer includes a first insulating structure and a second insulating structure, wherein the first insulating structure is located in the first region and on the side of the first fine gate away from the substrate, and the second insulating structure is located in the second region and on the side of the second fine gate away from the substrate;

[0012] A conductive layer includes a first conductive structure and a second conductive structure spaced apart. The first conductive structure is located in a first region, covers the first insulating structure and is located between the second fine gate and the substrate. The second conductive structure is located in a second region, covers the second insulating structure and is located between the first fine gate and the substrate.

[0013] According to some embodiments, the solar cell structure further includes:

[0014] A main gate is located on the side of the conductive layer away from the substrate and extends along the first direction. The main gate includes a first main gate and a second main gate. The first main gate is located in the second region and is connected to a plurality of first fine gates via the second conductive structure. The second main gate is located in the first region and is connected to a plurality of second fine gates via the first conductive structure.

[0015] According to some embodiments, the conductive layer includes a third conductive structure and a fourth conductive structure. The third conductive structure is disposed corresponding to the first insulating structure, and the first fine gate is located between the first insulating structure and the third conductive structure. The fourth conductive structure is disposed corresponding to the second insulating structure, and the second fine gate is located between the second insulating structure and the fourth conductive structure.

[0016] According to some embodiments, the first insulating structure extends from the surface of the first fine gate to the sidewall of the third conductive structure, and the second insulating structure extends from the surface of the second fine gate to the sidewall of the fourth conductive structure.

[0017] According to some embodiments, there is a gap between adjacent first conductive structures and second conductive structures, the gap exposing at least a portion of the first insulating structure and the second insulating structure.

[0018] According to some embodiments, the solar cell structure further includes:

[0019] A doped region is located between the fine gate and the substrate. The doped region includes a first doped region and a second doped region that are spaced apart and alternately arranged. The first doped region is located between the first fine gate and the substrate, and the second doped region is located between the second fine gate and the substrate. The gap exposes at least a portion of the first doped region and the second doped region.

[0020] According to some embodiments, the first insulating structure extends from the surface of the first fine gate to the sidewall of the first doped region, and the second insulating structure extends from the surface of the second fine gate to the sidewall of the second doped region.

[0021] According to some embodiments, the first conductive structure covers the surface and sidewalls of the first insulating structure away from the substrate and extends to the surface of the substrate, and the second conductive structure covers the surface and sidewalls of the second insulating structure away from the substrate and extends to the surface of the substrate.

[0022] According to some embodiments, the first conductive structure further covers the surface and sidewalls of the second doped region in the first region away from the substrate, and the second conductive structure further covers the surface and sidewalls of the first doped region in the second region away from the substrate.

[0023] According to some embodiments, the solar cell structure further includes:

[0024] A doped layer is located on the other side of the substrate;

[0025] A low-temperature passivation layer is located on the side of the doped layer away from the substrate. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 is a three-dimensional schematic diagram of a solar cell structure provided in one embodiment.

[0028] Figure 2 is a cross-sectional schematic diagram of a solar cell structure provided in one embodiment.

[0029] Figure 3 is a schematic diagram of the main gate provided in one embodiment.

[0030] To better describe and illustrate embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more accompanying drawings. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, or the best mode of these inventions as currently understood. Detailed Implementation

[0031] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0033] In each embodiment, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in each embodiment according to the specific circumstances.

[0034] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or other elements or layers, it may be directly on, adjacent to, or connected to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," or "directly connected to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this embodiment, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0035] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0036] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0037] Embodiments of this application are described herein with reference to schematic diagrams that serve as preferred embodiments (and intermediate structures). Variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are expected. Therefore, embodiments of this application should not be limited to the specific shapes of the regions shown herein, but should include shape deviations due to, for example, manufacturing techniques. The regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of embodiments of this application.

[0038] Please refer to Figures 1 to 3. A solar cell structure 100 is provided in one or more of the following embodiments and combinations thereof. As an example, the solar cell may be a back-contact solar cell or a heterojunction back-contact solar cell, etc.

[0039] The solar cell structure 100 has a first region 110 and a second region 120, both extending along a first direction (e.g., the Y direction), and the first region 110 and the second region 120 are alternately arranged along a second direction (e.g., the X direction). As an example, the first and second directions may intersect. For example, the first and second directions may be perpendicular.

[0040] The solar cell structure 100 provided in this embodiment may include at least a substrate 130, a grid 140, an insulating layer 150, and a conductive layer 160.

[0041] Referring to Figure 2, the material of the substrate 130 may include silicon, silicon-germanium, silicon-germanium-carbon, etc. The substrate 130 may have a first side and a second side disposed opposite to each other. Structures such as the fine gate 140, the insulating layer 150, and the conductive layer 160 may be located on the first side of the substrate 130, and the second side of the substrate 130 may be provided with a doped layer 190 and a low-temperature passivation layer 191, etc.

[0042] Referring to Figure 1, the fine gate 140 can be located on one side of the substrate 130. For example, the fine gate 140 can be located on the first side of the substrate 130. As an example, the material of the fine gate 140 can include conductive materials such as aluminum, gold, and copper.

[0043] The fine gate 140 may include a first fine gate 141 and a second fine gate 142 that extend along the second direction and are alternately spaced. The first fine gate 141 and the second fine gate 142 may pass through a plurality of first regions 110 and a plurality of second regions 120. As an example, one of the first fine gate 141 and the second fine gate 142 may be a positive fine gate and the other may be a negative fine gate; this embodiment does not impose specific limitations on this.

[0044] Referring to Figure 3, the insulating layer 150 may be located on the side of the fine gate 140 away from the substrate 130. As an example, the material of the insulating layer 150 may include insulating materials such as silicon oxide, silicon nitride, aluminum oxide, or silicon oxynitride.

[0045] The insulating layer 150 may include a first insulating structure 151 and a second insulating structure 152. The first insulating structure 151 may be located within a first region 110 and on the side of the first fine gate 141 away from the substrate 130, and the second insulating structure 152 may be located within a second region 120 and on the side of the second fine gate 142 away from the substrate 130. As an example, within the first region 110, the first insulating structure 151 may cover the surface and sidewalls of the first fine gate 141 away from the substrate 130. In another example, within the second region 120, the second insulating structure 152 may cover the surface and sidewalls of the second fine gate 142 away from the substrate 130.

[0046] The material of the conductive layer 160 may include transparent conductive oxide (TCO), etc. As an example, the material of the conductive layer 160 may include indium tin oxide, indium zinc oxide, aluminum zinc oxide, antimony tin oxide, etc.

[0047] The conductive layer 160 may include a first conductive structure 161 and a second conductive structure 162 spaced apart. The first conductive structure 161 is located within and extends in the same direction as the first region 110, and may cover the first insulating structure 151 and is located between the second fine gate 142 and the substrate 130. The second conductive structure 162 is located within and extends in the same direction as the second region 120, and may cover the second insulating structure 152 and is located between the first fine gate 141 and the substrate 130. It is understood that within the first region 110, the first conductive structure 161 is isolated from the first fine gate 141 using the first conductive structure 161. Within the second region 120, the second conductive structure 162 is isolated from the second fine gate 142 using the second conductive structure 162.

[0048] Furthermore, referring to Figure 3, the solar cell structure 100 may also include a main grid 170. The main grid 170 may be located on the side of the conductive layer 160 away from the substrate 130. The material of the main grid 170 may include conductive materials such as silver and copper.

[0049] The main gate 170 includes a first main gate 171 and a second main gate 172. It can be understood, as an example, that the first main gate 171 has the same polarity as the first fine gate 141, and the second main gate 172 has the same polarity as the second fine gate 142. The first main gate 171 and the second main gate 172 extend along a first direction. For example, the extension of the first main gate 171 is perpendicular to the extension of the first fine gate 141, and the extension of the second main gate 172 is perpendicular to the extension of the second fine gate 142.

[0050] Specifically, the first main gate 171 is located within the second region 120 and is connected to a plurality of first fine gates 141 via the second conductive structure 162. The second main gate 172 is located within the first region 110 and is connected to a plurality of second fine gates 142 via the first conductive structure 161. As an example, the number of insulating layers 150 is half the number of main gates 170.

[0051] In this embodiment, firstly, by setting a first conductive structure 161 to cover the first insulating structure 151 and located between the second fine grid 142 and the substrate 130, and setting a second conductive structure 162 to cover the second insulating structure 152 and located between the first fine grid 141 and the substrate 130, the surface of the resulting structure has a nearly full-area conductive layer 160. This large-area conductive layer 160 can not only transmit current, but also reflect light incident from the front, achieving higher photon utilization and improving the photoelectric conversion efficiency of the solar cell. Secondly, in this embodiment, within the first region 110, the first conductive structure 161 and the first fine gate 141 are isolated by a first insulating structure 151, and within the second region 120, the second conductive structure 162 and the second fine gate 142 are isolated by a second insulating structure 152. This ensures that the second main gate 172 is not electrically connected to the first fine gate 141, and the first main gate 171 is not electrically connected to the second fine gate 142. In other words, the insulating layer 150 can completely cover the irregular fine gate below the main gate 170, thus eliminating the need for the fine gate 140 to disconnect at the irregular main gate 170, resulting in stronger current collection capability and reduced series resistance. Furthermore, in this embodiment, the first conductive structure 161 and the second conductive structure 162 are spaced apart to prevent incorrect current paths between them, thereby improving battery safety. Finally, the solar cell structure 100 provided in this embodiment does not require the provision of a homogeneous doped region below the main grid 170, which makes the solar cell structure 100 of this embodiment simpler, reduces the risk of leakage, and also reduces the difficulty of patterning process during fabrication.

[0052] In one embodiment, the conductive layer 160 includes a third conductive structure 163 and a fourth conductive structure (not shown). The third conductive structure 163 may be correspondingly disposed with respect to the first insulating structure 151, and a first fine gate 141 is located between the first insulating structure 151 and the third conductive structure 163. The fourth conductive structure may be correspondingly disposed with respect to the second insulating structure 152, and a second fine gate 142 is located between the second insulating structure 152 and the fourth conductive structure.

[0053] The materials of the first conductive structure 161, the second conductive structure 162, the third conductive structure 163, and the fourth conductive structure can be the same. As an example, the materials of the first conductive structure 161, the second conductive structure 162, the third conductive structure 163, and the fourth conductive structure can all be indium tin oxide, etc.

[0054] The first fine gate 141 can be connected to the third conductive structure 163, thereby facilitating current transmission in the first fine gate 141. The second fine gate 142 can be connected to the fourth conductive structure, thereby facilitating current transmission in the second fine gate 142. Specifically, the first insulating structure 151 extends from the surface of the first fine gate 141 to the sidewall of the third conductive structure 163, and the second insulating structure 152 extends from the surface of the second fine gate 142 to the sidewall of the fourth conductive structure.

[0055] In this embodiment, a portion of the first fine grid 141 and a portion of the second fine grid 142 can be located between the double-layer conductive structures, thereby increasing the carrier concentration of the solar cell structure 100. As an example, in a heterojunction back-contact cell, the thickness of the conductive layer 160 affects the carrier concentration, but also its contact with the electrodes (fine grid 140 and main grid 170). This embodiment can form a local double-layer conductive structure without affecting the thickness of the conductive layer 160, thus increasing the carrier concentration. Furthermore, in this embodiment, the areas of the first conductive structure 161 and the second conductive structure 162 are relatively large, which allows the solar cell structure 100 to have a larger current density, which is beneficial for improving the performance of the solar cell structure 100. In addition, by setting the first insulating structure 151 to extend to the sidewall of the third conductive structure 163 and the second insulating structure 152 to extend to the sidewall of the fourth conductive structure, this embodiment can prevent the third conductive structure 163 from connecting to the first conductive structure 161, and also prevent the fourth conductive structure from connecting to the second conductive structure 162, thereby preventing short circuits and other situations in the solar cell structure 100.

[0056] In one embodiment, referring to FIG3, a gap 200 is provided between adjacent first conductive structures 161 and second conductive structures 162. The gap 200 exposes at least a portion of the first insulating structure 151 and the second insulating structure 152. This embodiment does not limit the specific size of the gap 200.

[0057] In this embodiment, by setting a gap 200 between adjacent first conductive structures 161 and second conductive structures 162 to expose at least a portion of the first insulating structure 151 and the second insulating structure 152, a longer distance is maintained between adjacent first conductive structures 161 and second conductive structures 162, thereby preventing erroneous current paths between the first conductive structures 161 and the second conductive structures 162. Of course, the gap 200 can be filled with insulating material to further isolate the first conductive structures 161 and the second conductive structures 162.

[0058] In one embodiment, the solar cell structure 100 further includes a doped region 180.

[0059] The doped region 180 may be located between the fine gate 140 and the substrate 130. The doped region 180 may include a first doped region 181 and a second doped region 182 that are spaced apart and alternately arranged. As an example, one of the first doped region 181 and the second doped region 182 may be an N-type conductive region and the other may be a P-type conductive region. This embodiment does not limit the specific dopant ions, doping concentration, doping method, etc. of the first doped region 181 and the second doped region 182.

[0060] The first doped region 181 is located between the first fine gate 141 and the substrate 130, and the second doped region 182 is located between the second fine gate 142 and the substrate 130. It can be understood that the first doped region 181 is correspondingly arranged with the first fine gate 141, and the second doped region 182 is correspondingly arranged with the second fine gate 142.

[0061] Furthermore, the gap 200 can expose at least a portion of the first doped region 181 and the second doped region 182. At this time, the first doped region 181 and the second doped region 182 can continuously traverse multiple first regions 110 and second regions 120.

[0062] In this embodiment, firstly, by setting a gap 200 to expose at least a portion of the first doped region 181 and the second doped region 182, a longer distance is further ensured between adjacent first conductive structures 161 and second conductive structures 162, preventing erroneous current paths between the first conductive structures 161 and second conductive structures 162. Secondly, in this embodiment, the first doped region 181 and the second doped region 182 are configured to traverse multiple first regions 110 and second regions 120, so that the first doped region 181 and the second doped region 182 are continuously arranged along the second direction, thereby facilitating the photoelectric conversion of the solar cell structure 100.

[0063] In related technologies, it is often necessary to remove a relatively wide conductive layer between the first doped region 181 and the second doped region 182, which results in a small area of ​​the conductive layer. In this application, however, a gap 200 is only provided between the main grids of different polarities, while the conductive layer 160 is retained between the fine grids of different polarities. This not only avoids short circuits in the solar cell structure 100 (the conductive layer 160 connected to the main grid 170 can only collect current from the doped region 180 with the same polarity as the main grid 170), but also allows the conductive layer 160 to have a larger area, which is beneficial for the conductive layer 160 to reflect light.

[0064] In one embodiment, a first insulating structure 151 extends from the surface of a first fine gate 141 to the sidewall of a first doped region 181, and a second insulating structure 152 extends from the surface of a second fine gate 142 to the sidewall of a second doped region 182.

[0065] In the thickness direction of the solar cell structure 100, a substrate 130, a doped region 180, and a fine grid 140 are sequentially disposed. A first insulating structure 151 extends from the surface of the first fine grid 141 to the sidewall of the first doped region 181, and a second insulating structure 152 extends from the surface of the second fine grid 142 to the sidewall of the second doped region 182. This allows the first insulating structure 151 to isolate the first fine grid 141 from the first conductive structure 161, and also to isolate the adjacent first doped region 181 and second doped region 182. Similarly, the second insulating structure 152 isolates the second fine grid 142 from the second conductive structure 162, and also isolates the adjacent first doped region 181 and second doped region 182.

[0066] This embodiment further reduces the possibility of erroneous current paths and achieves efficient current transmission by setting a first insulating structure 151 extending from the surface of the first fine gate 141 to the sidewall of the first doped region 181, and a second insulating structure 152 extending from the surface of the second fine gate 142 to the sidewall of the second doped region 182.

[0067] In one embodiment, a first conductive structure 161 covers the surface and sidewalls of the first insulating structure 151 away from the substrate 130 and extends to the surface of the substrate 130 (as shown in region A in FIG3). A second conductive structure 162 covers the surface and sidewalls of the second insulating structure 152 away from the substrate 130 and extends to the surface of the substrate 130.

[0068] The adjacent first doped region 181 and second doped region 182 are spaced apart, which results in an exposed substrate 130 between the adjacent first doped region 181 and second doped region 182. At this time, the first conductive structure 161 can extend from the surface and sidewalls of the first insulating structure 151 away from the substrate 130 to the exposed surface of the substrate 130, and the second conductive structure 162 can extend from the surface and sidewalls of the second insulating structure 152 away from the substrate 130 to the exposed surface of the substrate 130.

[0069] Furthermore, within the first region 110, the first conductive structure 161 covers the surface and sidewalls of the second doped region 182 away from the substrate 130. In this case, the first conductive structure 161 can extend in the same direction as the first region 110 and be continuously disposed within the first region 110. Within the second region 120, the second conductive structure 162 covers the surface and sidewalls of the first doped region 181 away from the substrate 130. In this case, the second conductive structure 162 can extend in the same direction as the second region 120 and be continuously disposed within the second region 120.

[0070] In this embodiment, by setting the first conductive structure 161 and the second conductive structure 162 to cover the substrate 130 in the corresponding area, and the surface and sidewalls of each structure in the corresponding area away from the substrate 130, the area of ​​the conductive layer 160 is increased, which is beneficial for the effective transmission of current in the conductive layer 160. It also allows the conductive layer 160 to have a larger area, which is beneficial for reflecting light incident from the front, achieving higher photon utilization and improving the photoelectric conversion efficiency of the solar cell.

[0071] In one embodiment, referring to Figure 2, the solar cell structure 100 also includes a doped layer 190, a low-temperature passivation layer 191, etc.

[0072] The doped layer 190 can be located on the second side of the substrate 130. In this embodiment, the doped layer 190 can increase the number of holes or electrons, change the energy level structure of the solar cell structure 100, and increase the mobility of the solar cell structure 100, thereby enabling the solar cell structure 100 to generate more charge under illumination and improving the photoelectric conversion efficiency of the solar cell structure 100.

[0073] The low-temperature passivation layer 191 can be located on the side of the doped layer 190 away from the substrate 130. The low-temperature passivation layer 191 can reduce direct sunlight exposure and energy absorption, helping to lower the temperature of the solar cell and extend its lifespan. In addition, the low-temperature passivation layer 191 can also reduce the impact of surface defects and impurities on the performance of the solar cell.

[0074] In addition, the solar cell structure 100 may also include a buffer layer, a transport layer, etc. This embodiment does not impose specific limitations on other film layers of the solar cell structure 100.

[0075] In the description of this application, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this application, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that the phrase "this embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification do not necessarily refer to the same embodiment.

[0076] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0077] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims. The above descriptions are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural transformations made based on the inventive concept of this application and the content of the specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. A solar cell structure, the solar cell structure having a first region and a second region, both the first region and the second region extending along a first direction, and the first region and the second region alternating along a second direction, the first direction intersecting the second direction, the solar cell structure comprising: Base; A fine grid, located on one side of the substrate, includes a first fine grid and a second fine grid that extend along a second direction and are alternately spaced, the first fine grid and the second fine grid passing through a plurality of first regions and a plurality of second regions; An insulating layer includes a first insulating structure and a second insulating structure, wherein the first insulating structure is located in the first region and on the side of the first fine gate away from the substrate, and the second insulating structure is located in the second region and on the side of the second fine gate away from the substrate; A conductive layer includes a first conductive structure and a second conductive structure spaced apart. The first conductive structure is located in a first region, covers the first insulating structure and is located between the second fine gate and the substrate. The second conductive structure is located in a second region, covers the second insulating structure and is located between the first fine gate and the substrate.

2. The solar cell structure according to claim 1, wherein, The solar cell structure also includes: A main gate is located on the side of the conductive layer away from the substrate and extends along the first direction. The main gate includes a first main gate and a second main gate. The first main gate is located in the second region and is connected to a plurality of first fine gates via the second conductive structure. The second main gate is located in the first region and is connected to a plurality of second fine gates via the first conductive structure.

3. The solar cell structure according to claim 1, wherein, The conductive layer includes a third conductive structure and a fourth conductive structure. The third conductive structure is disposed corresponding to the first insulating structure, and the first fine gate is located between the first insulating structure and the third conductive structure. The fourth conductive structure is disposed corresponding to the second insulating structure, and the second fine gate is located between the second insulating structure and the fourth conductive structure.

4. The solar cell structure according to claim 3, wherein, The first insulating structure extends from the surface of the first fine gate to the sidewall of the third conductive structure, and the second insulating structure extends from the surface of the second fine gate to the sidewall of the fourth conductive structure.

5. The solar cell structure according to claim 1, wherein, There is a gap between adjacent first conductive structures and second conductive structures, the gap exposing at least a portion of the first insulating structure and the second insulating structure.

6. The solar cell structure according to claim 5, wherein, The solar cell structure also includes: A doped region is located between the fine gate and the substrate. The doped region includes a first doped region and a second doped region that are spaced apart and alternately arranged. The first doped region is located between the first fine gate and the substrate, and the second doped region is located between the second fine gate and the substrate. The gap exposes at least a portion of the first doped region and the second doped region.

7. The solar cell structure according to claim 6, wherein, The first insulating structure extends from the surface of the first fine gate to the sidewall of the first doped region, and the second insulating structure extends from the surface of the second fine gate to the sidewall of the second doped region.

8. The solar cell structure according to claim 6, wherein, The first conductive structure covers the surface and sidewalls of the first insulating structure away from the substrate and extends to the surface of the substrate, and the second conductive structure covers the surface and sidewalls of the second insulating structure away from the substrate and extends to the surface of the substrate.

9. The solar cell structure according to claim 8, wherein, The first conductive structure further covers the surface and sidewalls of the second doped region in the first region away from the substrate, and the second conductive structure further covers the surface and sidewalls of the first doped region in the second region away from the substrate.

10. The solar cell structure according to claim 1, wherein, The solar cell structure also includes: A doped layer is located on the other side of the substrate; A low-temperature passivation layer is located on the side of the doped layer away from the substrate.

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