Flyback power supply device with active clamp control circuit

Abstract

The present invention relates to a flyback power supply device (100) configured to deliver output electrical power to a load (LOAD) and comprising a voltage limiting system comprising a switch referred to as a clamp switch (TCLAMP), the flyback power supply device (100) further comprising a control circuit (M2) configured, in operation, to receive a first main input signal (PWM_IN) and a second main input signal representative of a main current (IT), and to control, via a first control signal (PWM_CLAMP) determined from the first main input signal (PWM_IN) and the second input signal, switching the clamp switch (T CLAMP) to the on state for a period of time, the period of time increasing with the output electrical power.

Description

Indirect transfer switching power supply device with control circuit for active clamp

[0001] The invention relates to the field of power electronics for acoustic applications. More particularly, the invention relates to switched-mode power supplies for loudspeakers and acoustic systems.

[0002] A power supply provides one or more DC voltages, for example from the voltage of an electrical network or mains supply, thus delivering power to a connected load. The load corresponds to circuits and modules within an electrical device, which could be a loudspeaker.

[0003] Indirect transfer switching power supplies (also called flyback converters) include a transformer that converts energy from a primary circuit to a secondary circuit and a main switch that switches between a conducting state in which energy is stored in the primary circuit and a blocking state in which the stored energy is transferred to the secondary circuit.

[0004] Indirect transfer switching power supplies include a main control circuit configured to control the state of the main switch. The main control circuit can operate in different control modes. In a control mode called continuous conduction mode (CCM), the current through the primary winding never drops to zero during the switching cycle. In a control mode called discontinuous conduction mode, the current through the primary winding drops to zero before the main switch is switched to zero, meaning that all the energy stored in the transformer during the on-state phase is completely transferred to the load during the off-state phase.

[0005] In practice, since the transformer is not ideal, some of the primary circuit energy remains trapped in the primary winding due to the imperfect magnetic coupling of the transformer windings. This untransferred energy is associated with an inductance called leakage inductance. During the When the main switch of the indirect transfer switching power supply goes into blocked mode, the energy stored in the leakage inductance causes an overvoltage that can damage the components of the power supply.

[0006] A voltage limiting system, also known as an active clamp circuit, is frequently used in flyback converters to protect sensitive components by reducing overvoltages and thus improving converter performance in terms of energy efficiency and electromagnetic interference reduction. The architecture of a voltage limiting system allows for the recycling of energy flowing through the transformer's leakage inductance by transferring it to the load.

[0007] Active clamp circuits can be classified into two categories, detailed briefly below. In the first category, the active clamp circuit is self-contained. In other words, it is self-regulating, self-powered, and requires no control. The clamp switch opens and closes in response to a voltage proportional to the current flowing in the active clamp branch. However, this first category cannot be used in all conduction modes while simultaneously producing smooth switching (ZVS) of the main transistor. It should also be noted that the self-contained active clamp introduces additional components in series with the active clamp components. These additional components increase the branch impedance and the losses during clamp operation.

[0009] In a second category, the active clamp circuit is powered and controlled by a separate system, which, for example, detects demagnetization of the flyback converter's main transformer or reads the current flowing through the flyback converter's main switch. This second category allows for improved power supply efficiency under heavy loads by pushing the main switch to the zero-voltage conducting (ZVS) state. Disadvantages of circuits in this second category include, for example, that they cannot be used in all flyback converter conduction modes, or that they introduce discontinuities that can lead to destabilization or oscillations in the system, or that low-load efficiency is degraded. Furthermore, these circuits are difficult to design and require complex components. An active clamp circuit typically includes a transistor called a clamp transistor. In standard active clamp operation, the control signals between the main switch of the power supply and the clamp transistor are complementary. In other words, the clamp transistor conducts when the main switch is off, and vice versa. This control mode is compatible with a converter operating between 80 and 100% of its power. However, when the power demand drops below 20 to 30%, losses increase and efficiency decreases considerably.

[0011] By design, the magnetizing inductance seen in the primary circuit tends to decrease with power. Conversely, the changes in magnetizing current when the clamp switch is conducting will be rapid, leading to a larger amplitude of the magnetizing current in the primary winding. This magnetizing current results in significant switching losses in both the main switch and the clamp switch; these losses are also proportional to the square of the input voltage of the flyback converter.

[0012] Such standard use is therefore not satisfactory because it greatly degrades the efficiency of the converter, especially when the output powers required are low or zero.

[0013] There is therefore a need to improve the efficiency of a flyback converter incorporating an active clamp circuit, particularly for low or zero output power, where switching losses are greater. This need is coupled with the need to offer a flyback converter that can also operate regardless of the conduction mode of the indirect transfer switching power supply.

[0014] The invention presented aims to solve this problem. Description of the invention

[0015] To this end, the invention proposes integrating a control circuit into an indirect transfer switching power supply device, designed from simple components that can operate regardless of the conduction mode of the indirect transfer switching power supply device.

[0016] A switched-mode power supply with indirect transfer is thus proposed, configured to deliver electrical output power to a load from an electrical energy source, comprising: - a transformer comprising a primary winding connected to a primary circuit supplied by the electrical power source and a secondary winding supplying a secondary circuit to which the load is connected, the transformer having a leakage inductance viewed as an additional inductance in series with the primary winding, - a main switch configured to, when closed, close the primary circuit's power supply from the electrical power source and, when blocked, open said power supply circuit, - a voltage limiting system configured to transfer energy stored in the leakage inductance to the load, the limiting system comprising a capacitor called a clamp capacitor and a switch called a clamp switch, the limiting system being configured such that the clamp capacitor is electrically connected in parallel with the primary winding when the clamp switch is in a conducting state, the indirect transfer switching power supply being characterized in that it further comprises a control circuit configured to generate a first binary control signal on the basis of a first binary main input signal and at least one second main input signal, the main switch being controlled from the first main input signal, the at least one second main input signal being representative of a current, called the main current,passing through the main switch when the main switch is conducting, the control circuit (M2) being configured to generate the first control signal (PWM TCLAMP) with an activation time, during which the clamp switch (TCLAMP) is in the conducting state, defined between two successive switching to a high state of the first main input signal, (PWM_IN), the activation time varying increasing with the electrical output power.

[0017] Thus, thanks to the control circuit according to the invention, it is possible to adjust the activation time spent in the on state by the clamp switch of the voltage limiting system of the indirect transfer switching power supply to the electrical output power delivered by the indirect transfer switching power supply. In other words, the control circuit acts as a pulse-width modulator.

[0018] In particular, the lower the output power demand, the shorter the clamp switch's on-state time, and consequently, the lower the current flowing through the voltage limiting system. This reduces leakage inductance losses and improves the efficiency of the indirect transfer switching power supply. More generally, the efficiency of the indirect transfer switching power supply is improved across the entire intended output power range, which can extend from a few watts to several kilowatts.

[0019] Furthermore, the indirect transfer switching power supply incorporating the control circuit according to the invention can operate in any type of conduction mode: discontinuous (DCM), borderline (BCM), quasi-resonant (QRM), or continuous (CCM). The transition from one conduction mode to another, by increasing or decreasing the output electrical power, is achieved without discontinuity.

[0020] Therefore, the indirect transfer switching power supply incorporating the control circuit according to the invention can operate regardless of the operating mode of the main control circuit: peak current mode control or voltage mode control. In other words, any type of main control circuit, for example a standard commercial integrated circuit, can be used.

[0021] More generally, the proposed solution makes it possible to reduce the losses of an indirect transfer switching power supply device suffering from the imperfection of its transformer and the resulting leakage induction.

[0022] Advantageously, the variation in the activation time is a jitter of the falling edge of the first control signal.

[0023] Advantageously, the first control signal varies continuously with the output electrical power. In other words, the activation time varies continuously with the output electrical power.

[0024] Thus, the transition from one mode of conduction to another is achieved smoothly.

[0025] Advantageously, the main switch is configured to switch between a conducting state and a blocked state.

[0026] Advantageously, the control circuit is configured to deliver, from the first main input signal, a second control signal intended to control the switching of the main switch.

[0027] In some embodiments, when the power supply device is in continuous conduction mode, the first control signal and the second control signal are complementary.

[0028] Thus, in these embodiments, when for example the required electrical output power is at its maximum, the voltage limiting system plays its initial role of recycling the energy flowing in the leakage inductance by transferring it to the load.

[0029] Furthermore, by design, although the continuous conduction mode is characterized by a non-zero current flowing through the main switch, smooth switching of the main switch is nevertheless ensured due to the zero voltage switching (ZVS) configuration, which also improves the efficiency of the indirect switching power supply device in this mode.

[0030] In some embodiments, the first main input signal is binary and alternately takes a first high value and a first low value.

[0031] In some of the preceding embodiments, the time between two high-state switching of the first main input signal defining a During the total period, the first main input signal takes an initial high value for an initial duration; the control circuit is further configured to: - convert the second main input signal into a binary signal called the second input signal, the second input signal taking a high value for a second duration, - to have the activation duration which is a function, on the one hand, of a difference between the total period and the first duration and, on the other hand, of the second duration.

[0032] Thus, the duration is determined both by the time value at which the first main input signal reaches its first low value, and by the second duration. By construction of the second input signal, the second duration depends on the value of the main current.

[0033] In some embodiments, the activation duration is a function of the overlap period between said difference and the second duration.

[0034] In some embodiments, the control circuit comprises a first module, a second module and a third module, the first module being configured to receive the first main input signal, and provide as output, via a first branch, a first input signal from the third module, the second module being configured to provide as output the second input signal to the third module, the third module being configured to generate, on the basis of the first input signal and the second input signal, the first control signal.

[0035] In some embodiments, the first branch of the first module (MA) includes an inverter.

[0036] Thus, the first branch generates the first input signal using a simple and standard component.

[0037] In some embodiments, the second module comprises: - a parallel association of a capacitor of value CT and a resistor of value RT forming a time constant system RT*CT taking as input a voltage function of said at least a second main input signal and delivering an intermediate signal; - a comparator receiving as input, via a first input terminal, the intermediate signal, and via a second input terminal, a reference signal, the comparator delivering the second input signal.

[0038] Thus, the control circuit according to the invention comprises simple components, limited in number. Furthermore, the presence of the parallel connection constitutes an additional parameter allowing adjustment of the transistor's high-state duration.

[0039] In some embodiments, the reference signal is derived from a hysteresis voltage source.

[0040] Thus, the use of the hysteresis voltage source allows adjustment of the minimum duration width at the high state of the clamp switch.

[0041] In some embodiments, the third module includes a logic gate configured to perform a logical AND function between, on the one hand, the first input signal and, on the other hand, the second input signal.

[0042] Thus, the control circuit according to the invention comprises a reduced number of simple components.

[0043] In some embodiments, the control circuit is configured to apply a first dead time between switching the main switch to the blocked state and switching the clamp switch to the on state, and to apply a second dead time between switching the clamp switch to the blocked state and switching the main switch to the on state.

[0044] It is thus possible to adjust the time period during which, in a switching cycle, the clamp switch is in the on state, in relation, moreover, to the switching of the main switch of the indirect transfer switching power supply device, by adjusting the first dead time and the second dead time.

[0045] In some embodiments, the first branch includes a first RC circuit comprising a first series resistor and a first parallel capacitor, the first RC circuit being configured to determine the first dead time.

[0046] In some embodiments, the first RC circuit further includes a first diode connected in parallel with the resistor.

[0047] In some embodiments, the second branch includes a second RC circuit comprising a second series resistor and a second parallel capacitor, the second RC circuit being configured to determine the second dead time.

[0048] In some embodiments, the second RC circuit further includes a second diode connected in parallel with the second resistor.

[0049] Thus again, the control circuit according to the invention comprises simple components and is limited in number.

[0050] In some embodiments, the power supply device further includes a modulation and control system for the first dead time and / or the second dead time.

[0051] Such a modulation and control system offers an additional degree of freedom to adjust the time duration during which, in a switching cycle, the clamp switch is in the conducting state.

[0052] In some embodiments, the control circuit includes a main current pickup block, the pickup block being configured to deliver the second main input signal.

[0053] Thus, in these embodiments, the control circuit can be easily integrated into the indirect transfer switching power supply device, since the latter already includes a main current capture block which can deliver the second main input signal.

[0054] In some embodiments, the capture block is configured to apply a gain to the main current, the capture block further comprising a gain modulator including a first sub-module and a second sub-module, the first sub-module being configured, based on an input voltage from a source to which the power supply device is connected, to generate a plurality of N binary signals encoding together a binary word, the second sub-module comprising N stages of which a set of stages is activated according to the value of the binary word, thus determining a gain modulation amplitude, so as to modulate via a control signal as a function of the gain modulation amplitude, the applied gain.

[0055] For example, the gain modulator comprises a plurality of N stages, where N is an integer greater than or equal to 2. The gain modulator may include a first sub-module configured to generate, from a voltage source to which the indirect transfer switching power supply is connected, a set of binary signals that together encode a binary word. These binary signals are configured to be injected into the input of a second sub-module comprising the N stages. The value of the binary word determines which of the N stages is activated. The set of activated stages determines a gain modulation amplitude, based on which the second sub-module controls the main control circuitry via a control signal.

[0056] Thus, advantageously, with the integration of such a gain modulator, the indirect transfer switching power supply device can take into account, in its operation, the fluctuations of the source to which it is connected.

[0057] Another aspect of the invention relates to an acoustic enclosure comprising an indirect transfer switching power supply device as described above.

[0058] Another aspect of the invention relates to an amplification device comprising an indirect transfer switching power supply device as described above. Brief description of the drawings

[0059] Other features, details, and advantages of the invention will become apparent upon reading the detailed description below. This description is purely illustrative and should be read in conjunction with the accompanying drawings, on which: Fig. 1

[0060] [Fig. 1] represents an example of a circuit of an indirect transfer switching power supply device comprising a control circuit according to an embodiment of the invention; Fig. 2

[0061] [Fig. 2] represents an example of a control circuit according to the invention that can be integrated into the indirect transfer switching power supply device; Fig. 3

[0062] [Fig. 3] represents an example of first dead time and second dead time introduced by the control circuit according to one embodiment of the invention; Fig. 4

[0063] [Fig. 4] represents an example of a voltage source according to one embodiment of the invention; Fig. 5

[0064] [Fig. 5] represents a hysteresis effect on a reference voltage that can be delivered by the voltage source in Figure 4; Fig. 6

[0065] [Fig. 6] represents a first embodiment of a current collection block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 7

[0066] [Fig. 7] represents a second embodiment of a current-capturing block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 8

[0067] [Fig. 8] represents a third embodiment of a current-capturing block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 9

[0068] [Fig. 9] represents a set of signals from the indirect transfer switching power supply device according to the invention in a continuous conduction mode; Fig. 10

[0069] [Fig. 10] represents a set of signals from the indirect transfer switching power supply device according to the invention in a discontinuous conduction mode; Fig. 11

[0070] [Fig. 11] represents another set of signals from the indirect transfer switching power supply device according to the invention in a continuous conduction mode; Fig. 12

[0071] [Fig. 12] represents another set of signals from the indirect transfer switching power supply device according to the invention in a discontinuous conduction mode. Fig. 13

[0072] [Fig. 13] schematically represents an acoustic enclosure comprising the indirect transfer switching power supply device according to the invention. Fig. 14

[0073] [Fig. 14] schematically represents an acoustic amplification device comprising the indirect transfer switching power supply device according to the invention. Detailed description

[0074] A switch-mode power supply with indirect transfer 100 is proposed, comprising a voltage limiting system (also called an active clamp circuit or voltage clamp circuit) and a control circuit M2. An embodiment of the switch-mode power supply with indirect transfer 100 is shown in Figure 1.

[0075] In the following disclosure, the terms "indirect transfer switching power supply" and "flyback converter" are used interchangeably. Furthermore, the terms "voltage limiting system," "active clamp circuit," and "voltage clamp circuit" are also used interchangeably.

[0076] A switch in the "on" state is a configuration where a non-zero current flows through the switch. A switch in the "off" state is a configuration where no current flows through the switch.

[0077] In the embodiment illustrated in Figure 1, the indirect transfer switching power supply device 100 includes a TRMAIN transformer comprising a primary winding LP connected to a primary circuit and a secondary winding supplying a secondary circuit to which a LOAD load is connected.

[0078] Furthermore, in the embodiment shown in Figure 1, the primary circuit includes an input capacitor CIN, a main switch TMAIN coupled to the primary winding, a main control circuit U1, a voltage clamp circuit CLAMP_NETWORK, and the control circuit M2 according to the invention.

[0079] The indirect transfer switching power supply 100 is connected at its input, via the input module, to an electrical power source.

[0080] In the example in Figure 1, the SOURCE provides power via a rectifier bridge formed by four Db diodes.

[0081] The voltage across the input capacitor, hereafter referred to as input voltage, is denoted VCIN.

[0082] The main switch TMAIN is connected to a current collection network, from which, during operation, an IVOUT voltage is derived, reflecting the IT current. circulating in the main switch TMAIN. Preferably, the main switch TMAIN is a transistor incorporating by construction a diode which is connected to it in parallel.

[0083] The main control circuit U1 is configured to apply a gain to the current flowing through the main switch TMAIN, thereby controlling this current and maintaining a constant voltage across the LOAD load or a constant current flowing through the LOAD load. The main control circuit U1 operates in a control mode that can be selected from several control modes.

[0084] The CLAMP_NETWORK voltage clamp circuit comprises the primary winding of the transformer TRMAIN, a leakage inductor LL viewed as (or modeled as) an additional inductor in series with the primary winding LP, a capacitor called the clamp capacitor CCLAMP, and a switch called the clamp switch TCLAMP. The current flowing from the leakage inductor LL into the primary winding is denoted ILP. The current entering the clamp switch TCLAMP is denoted IC. Preferably, the clamp switch TCLAMP is a transistor incorporating a diode connected to it in parallel.

[0085] According to the invention, the CLAMP_NETWORK voltage clamp circuit is controlled by the M2 control circuit according to the invention, as will be described below.

[0086] The secondary circuit includes an output diode DOUT, an output capacitor COUT providing energy storage, and the load LOAD. The current flowing in the secondary circuit is denoted ID.

[0087] To ensure smooth switching to zero voltage in the on state of the TMAIN transistor, two conditions can be met for the choice of values ​​of the CCLAMP and LL components that form the resonant circuit of the clamp system.

[0088] The first condition requires that, when the transistor TMAIN is switched on, the energy ELL stored in the leakage inductance LL is of the same magnitude as the energy stored in the output parasitic capacitor Coss, equal to the sum between the parasitic capacitor CGD between the gate and drain and parasitic capacitor CDS between the source and drain, of the main transistor TMAIN.

[0089] [Math.1]

[0091] When transistor TMAIN is switched on, a current ILP flows in the main branch and the energy stored in (LL) will be given by:

[0092] [Math.2]

[0094] Before the TMAIN transistor is switched off, the energy stored in the output capacitor Coss of the main TMAIN transistor is given by:

[0095] [Math.3]

[0096]

[0097] With Vf being the forward conduction voltage of the output diode DOUT and the ratio N between the number of turns of the secondary and the number of turns of the primary of the transformer TRMAIN,

[0098] [Math.4]

[0100] and finally the parasitic output capacitor Coss.

[0101] Furthermore, here is the condition on the value of the leakage inductance, denoted LL:

[0102] [Math.5]

[0104] Indeed, if the leakage inductance LL is chosen to be lower than the ideal value, the output parasitic capacitor Coss of the main transistor TMAIN will not be fully discharged before TMAIN switches to the on state. This would result in a degradation of the switching effect. soft, at zero voltage. More generally, the soft switching effect at zero voltage gradually fades with the decrease in the energy accumulated in the leakage inductance LL compared to that accumulated in the parasitic output capacitance Coss of the transistor TMAIN.

[0105] A second condition for ensuring zero-voltage switching in the on state of transistor TMAIN requires that half the resonance period of the circuit formed by the leakage inductance LL and the clamp capacitor CCLAMP is always greater than the longest off-state time of the main transistor TMAIN. That is:

[0106] [Math.6]

[0108] With the PCCLAMP resonance period of the clamp circuit given by:

[0109] [Math.7]

[0111] And the longest time in the blocked state PoffTMAIN of the main transistor TMAIN defined by:

[0112] [Math.8]

[0114] With DMIN representing the minimum duty cycle of the PWM_MAIN control signal and Psw the period of the PWM_MAIN control signal, we can deduce a condition for choosing the value of CCLAMP:

[0115] [Math.9]

[0117] Or, by reordering the terms:

[0118] [Math.10]

[0120] Furthermore, the primary current (ILP) flowing through the primary winding LP and the leakage inductance LL is a magnetizing current present in prior art indirect transfer switching power supplies, i.e., without the presence of the control circuit according to the invention M2, even when the power supply is at rest. Thus, advantageously, integrating the control circuit M2 into the power supply aims to minimize the amplitude of the ILP current when the power supply is at rest.

[0121] For this purpose, the control circuit M2 according to the invention will allow the time period for the on state of the clamp switch TCLAMP to be adapted according to the power required at the output of the power supply device 100.

[0122] More specifically, when switching the power supply 100 from one control mode to another, particularly from continuous conduction mode (CCM) to discontinuous conduction mode (DCM) via boundary conduction mode (BCM), the on-state time of the clamp switch TCLAMP will be progressively reduced. This reduction will limit and decrease the flow of the primary current ILP through the primary winding LP and the leakage inductance LL.

[0123] As illustrated in Figure 1, the control circuit M2 is connected to one terminal of the main control circuit U1, so as to receive a first main input signal, PWM_IN. The control circuit M2 is also connected to a first terminal of the main switch TMAIN, so as to receive two second main input signals, l_SENS+ and l_SENS-, representing the two half-cycles of the IT current flowing through the main switch TMAIN. However, in other embodiments, only a second main input signal is used to obtain a representation of the IT current flowing through the main switch TMAIN, e.g., based on a single half-cycle. Referring back to Figure 1, the control circuit M2 is connected to the clamp switch TCLAMP of the voltage clamp circuit CLAMP_NETWORK, so as to control the switching of the latter via a first control signal, PWM_CLAMP.The M2 control circuit is also connected to a second terminal of the main TMAIN switch, so as to control the latter, via a second PWM_MAIN control signal.

[0124] The first main input signal, PWM_IN, delivered by the main control circuit U1 is of the PWM type, i.e., Pulse Width Modulation. In other words, the first main input signal, PWM_IN, is a switching signal (i.e., switching between a high and a low state) whose duration in the high state (and therefore in the low state) varies. Any type of PWM control mode can be used as the input to the control circuit M2.

[0125] Figure 2 illustrates one embodiment of the M2 control circuit.

[0126] In this embodiment, the control circuit M2 comprises a first module MA, a second module MB and a third module MC which will be described below.

[0127] The first MA module is connected at its input to an output terminal of the main control circuit U1 and splits into a first branch and a second branch. The first MA module thus receives at its input the first main input signal PWM_IN from the main control circuit U1.

[0128] The first branch is connected at its output to a first input terminal B1 of the third module MC of the control circuit M2.

[0129] The second branch is connected at its output to the main TMAIN switch, and delivers the second PWM_MAIN control signal, which controls the main TMAIN switch.

[0130] The first branch is intended to provide a first input signal PWM_B1 to the third module MC via a first input terminal B1 of the third module M23.

[0131] In one embodiment, the first branch includes an inverter INV1 receiving as input a portion of the first main input signal PWM_IN and a first RC circuit. The electrical signal output from the inverter powers the first RC circuit. The first RC circuit consists of a diode D1, a resistor R1, and a capacitor C1, as illustrated in Figure 2. The capacitor C1 is connected in parallel, and the resistor is connected in series. Furthermore, diode D1 and resistor R1 are connected in parallel. As will be seen later, the first RC circuit is intended to generate an initial dead time. TMORT1 between switching to the blocked state of the main switch TMAIN and switching to the on state of the clamp transistor TCLAMP.

[0132] In one embodiment, the second branch includes a second RC circuit consisting of a diode D2, a resistor R2, and a capacitor C2, in which capacitor C2 is connected in parallel and resistor R2 is connected in series, while diode D2 and resistor R2 are connected in parallel. This second RC circuit feeds a gate switching circuit BUFF1, which provides the second PWM_MAIN control signal at its output. As will be seen later, the second RC circuit is intended to generate a second dead time TMORT2 between the clamp switch TCLAMP switching to the off state and the main switch TMAIN switching to the on state.

[0133] The second MB module is connected, at its input, to a current-harvesting network M21 of the transfer switch-mode power supply 100 and is connected, at its output, to a second input terminal A1 of the third MC module. Thus, during operation, the second MB module provides a second PWM_A1 input signal to the third MC module via a second input terminal A1.

[0134] The M21 current collection block comprises two input terminals, l_SENS+ and l_SENS-, and one output terminal, IVOUT. The two input terminals, l_SENS+ and l_SENS-, are connected to the main switch TMAIN, so as to deliver to the output terminal IVOUT a voltage that is a function of the current IT (e.g., proportional to the current IT) flowing in the main branch of the primary circuit and in the main switch TMAIN.

[0135] In the embodiment shown in Figure 2, the second module MB comprises a sequence consisting of a diode DT, a third RC circuit, and a comparator COMP1. The third RC circuit consists of a capacitor CT and a resistor RT connected in parallel. The comparator COMP1 has a first input terminal IN+, a second input terminal IN-, and an output terminal. The output terminal of comparator COMP1 is connected to the second input terminal A1 of the third module MC and provides the second input signal PWM_A1.

[0136] Furthermore, diode DT rectifies the voltage from current-sensing block M21, generating a transformed voltage through the third RC circuit, which is then injected into the first input terminal IN+ of comparator COMP1. The third RC circuit has a time constant RT*CT. A source M20 is connected to the second input terminal IN- of comparator COMP1, providing a voltage VREF. Thus, by design, the second input signal depends on the comparison between the image voltage of the main current and the VREF voltage, enabling discrimination between high and low main current values.

[0137] As previously mentioned, the third MC module comprises two input terminals, B1 and A1, and one output terminal. The output terminal of the third MC module is connected to the TCLAMP clamp switch of the voltage limiting system, so the signal from the output terminal of the third MC module constitutes the second PWM_CLAMP control signal, configured to control the voltage limiting system, and more specifically the TCLAMP clamp switch.

[0138] In the embodiment illustrated in Figure 2, the third module MC comprises a series association of an ANDA logic gate performing an AND function and a transistor driver incorporating a BUFF2 isolation system. The BUFF2 transistor driver thus provides an on / off output.

[0139] Figure 3 shows an example, for a given power state, of the waveforms of the first main input signal PWM_IN, the first control signal PWM_TCLAMP, and the second control signal PWM_MAIN. The signals shown are voltages expressed in volts.

[0140] Figure 3 shows the first dead time TMORT1 between the switching of the first control signal PWM_TCLAMP to the on state and the switching of the second control signal PWM_TMAIN to the off state. The second dead time TMORT2 is also visible between the switching of the first control signal PWM_TCLAMP to the off state and the switching of the second control signal PWM_TMAIN to the on state. By design, switching the first main input signal PWMJN to the on state triggers the switching of the main switch to the on state. TMAIN. The first dead time TMORT1 and the second dead time TMORT2 can be adjusted by choosing the values ​​of, on the one hand, the resistance R1 and the capacitor C1, and on the other hand, the resistance R2 and the capacitor C2.

[0141] Preferably, the first dead time TMORT1, defined by the values ​​of resistor R1 and capacitor C1, should be long compared to the switching time, as it allows the clamp transistor TCLAMP to switch to the zero-turn-off state ZVS. It can be slightly longer than necessary to provide some margin for the operation of the power supply 100. However, it should not be too long to avoid degrading the performance of the voltage limiting system.

[0142] Preferably, the second dead time TMORT2 should also be defined as precisely as possible by the values ​​of resistor R2 and capacitor C2. If the second dead time TMORT2 is too long, the zero-voltage switching for the main switch TMAIN is lost. If the second dead time TMORT2 is too short, there is a risk of a short circuit between the active clamp branch and the main branch.

[0143] We describe here an embodiment, illustrated in figure 4, of the voltage source M20 connected to the second input terminal IN- of the comparator COMP1. The voltage source receives a voltage at the input IN and generates a voltage VREF at the output.

[0144] In this embodiment, the voltage source, labeled M20, consists of a resistor network that sets the base voltage. This network comprises a resistor RREF3 and a resistor RREF2. This voltage VREF is filtered by the capacitor CREF and injected into the negative input IN- of comparator COMP1. Adjustable hysteresis is created by the component network consisting of resistor RREF3, transistor QREF, and resistor RREF1. When comparator COMP1 switches to the high state, the voltage at the IN input switches transistor QREF to the conducting state, which consequently readjusts the VREF voltage downwards. The amount of hysteresis applied determines the minimum pulse width for controlling the clamp switch TCLAMP via the second control signal PWM_CLAMP, as can be explained in Figure 5.

[0145] Figure 5 illustrates the effect of this hysteresis on the PWM_A1 signal output from comparator COMP1, which feeds the second input terminal A1 of the third MC module. Due to the operation of comparator COMP1, it can be observed that the time period during which the VERF voltage is falling (represented by a dashed line in Figure 5) corresponds to the duration of the high state of the PWM_A1 signal. This duration depends on the time constant of the third RC circuit, which has a time constant RT*CT. Consequently, the signal from the third MC module can be adjusted by selecting the components forming the voltage source and the components of the third RC circuit. Thus, hysteresis allows adjustment of the minimum pulse width sent to transistors TCLAMP and TMAIN. Indeed, pulses that are too short do not actively contribute to the operation of the resonant converter and can even degrade its efficiency.It is therefore desirable to control the minimum pulse width allowed for the control of TCLAMP and TMAIN transistors.

[0146] We now describe several possible embodiments of the M21 current collection block.

[0147] In an embodiment illustrated in Figure 6, the current-sensing block M21 includes a single current-reading resistor RSENS. The current flowing IT in the main branch induces a voltage IVOUT across RSENS. As an example, the value of the RSENS resistance is low and can be between 0.004 ohms and 0.1 ohms.

[0148] In another embodiment illustrated in Figure 7, the current-harvesting block M21 consists of a current transformer TSENS, a diode DTR, and a resistor RSENS. The transformer ratio can range from 1:100 to 1:500 depending on the desired output power and the maximum IT current flowing in the primary circuit, and in particular in the main switch TMAIN of the power supply 100. The IT current should closely match the actual current flowing in the main switch TMAIN. Peak current mode control requires a high transformer cutoff frequency of at least 10 times the power supply operating frequency. To ensure proper operation, this frequency should preferably be much higher. In this configuration, the value of the RSENS resistance can be between 5 ohm and 20 ohm.

[0149] Another embodiment, illustrated in Figure 8, of the current-gaining block M21 integrates into the previous embodiment shown in Figure 7 current loop gain control means, consisting of a sub-module M100 and a sub-module M110. More specifically, the sub-modules M100 and M110 constitute a multi-stage current loop gain modulator. In this configuration, the diode DTR of the embodiment shown in Figure 8 is connected in series with the resistor RSENS, which is itself connected to an input terminal ISENS+ of the control means M110. A differential amplifier SENS_AMP is connected across the terminals of the resistor RSENS and provides an output voltage IVOUT proportional to the voltage induced in the resistor RSENS by the current flowing through the transformer TSENS. In this configuration, the value of the resistor RSENS can be between 0.5 ohms and 1 ohm.

[0150] More specifically, submodule M100 can receive as input an AC_REC signal from the SOURCE to which the power supply 100 is connected and can convert this AC_REC signal into a set of N binary signals B0, B1, ..., BN-1 (N being equal to 4 in Figure 8) which together encode a binary word. The N binary signals B0, B1, ..., BN-1 can be injected into submodule M110 to control a configuration of the control medium M110 that represents a gain modulation amplitude value determined by the value of the binary word.The gain control means can thus generate at output a control signal as a function of the gain modulation amplitude value, which can be injected into the main control circuit U1, so as to modulate the gain of the latter as a function, on the one hand, of the voltage from the source SOURCE and, on the other hand, of a signal l_SENS+ image of the current IT flowing in the primary circuit of the power supply device 100.

[0151] Advantageously, the integration of the M2 control circuit according to the invention is possible in any operating mode of the indirect transfer switching power supply. Indeed, as previously stated, the M2 control circuit according to the invention allows for a gradual reduction in the on-state time of the clamp switch TCLAMP when the power demand increases. output (load power decreases, passing through continuous conduction mode (CCM) and then discontinuous conduction mode). Figures 9 and 10 illustrate this reduction in the on-state duration of the clamp switch TCLAMP, as will be described below.

[0152] Figure 9 illustrates the signal set of the power supply device 100, incorporating the previously described control circuit M2, for an operating point in continuous conduction mode. This is, for example, an operating point where the output power demand is high.

[0153] In Figure 9, the first PWM_MAIN control signal, apart from the time constant introduced by the second RC circuit, is in the conducting state when the first main input signal, PWM_IN, is conducting. The IT current flowing through the main switch increases during the period when the main switch is conducting, then drops to zero when the first main input signal, PWM_IN, and therefore the first PWM_MAIN control signal, goes low.

[0154] The voltage IV, representing the current IT, decreases with the time constant RT*CT when the latter reaches zero, remaining above a value high enough to exceed the output voltage VREF of the voltage source M20. By design, the output signal of comparator COMP1 remains constantly high. Consequently, and also by design, the second control signal PWM_CLAMP will be identical to the first input signal PWM_B1 injected into the input of the third module MC. The first input signal PWM_B1 is, by design, the inverse of the first main input signal PWMJN from the main control circuit U1.

[0155] Figure 10 illustrates the signal set of the power supply device 100 incorporating the previously described control circuit M2 for an operating point in discontinuous conduction mode. This is, for example, an operating point where the output power demand is low, or even the case where the power supply device 100 is at rest.

[0156] In Figure 10, the first PWM_MAIN control signal is, apart from the time constant introduced by the second RC circuit, in the conducting state when The first main PWMJN input signal from the main control circuit U1 is in the conducting state. The IT current flowing through the main switch increases during the period when the main switch TMAIN is in the conducting state, then drops to zero when the first main PWMJN input signal, and therefore the first PWM_MAIN control signal, goes low.

[0157] The voltage IV, representing the IT current, decreases with the time constant RT*CT when the latter drops to zero, but this time, it lies within lower value ranges that can then be lower than the VREF voltage at the output of the voltage source M20. Thus, unlike the continuous conduction mode, in the discontinuous conduction mode, the second input signal PWM_A1 of the third module MC is not constantly high, but switches between the low and high states depending on the voltage IV, representing the IT current, and the VREF voltage.

[0158] The first input signal PWM_B1 injected at the first input terminal B1 of the third MC module is, by construction, the inverse of the first main input signal PWMJN from the main control circuit U1. Therefore, the high-state duration of the second control signal PWMJTCLAMP is shorter than in the case of continuous conduction mode.

[0159] Advantageously, when the indirect transfer switching power supply 100 operates in continuous conduction mode (CCM), the switching of the main switch TMAIN is performed at zero voltage (ZVS), as illustrated in Figure 11 described below.

[0160] Figure 11 illustrates a plurality of signals from the power supply device 100, incorporating the previously described control circuit M2, for an operating point in continuous conduction mode. Figure 11 shows the complementary operation of the first control signal, PWMJTCLAMP, and the second control signal, PWMJTMAIN.

[0161] We can also observe the variation in the intensity of the current flowing in the primary winding, increasing when the main switch TMAIN is conducting, and decreasing when the main TMAIN switch is blocked (and therefore the clamp switch is conducting).

[0162] We also observe, during the periods when the main switch TMAIN is conducting, an increasing variation in the intensity of the main current IT flowing through it, and a drop to zero of this intensity when the main switch TMAIN is blocked. It can be noted that this intensity is zero when the main switch TMAIN switches to the conducting state, in a configuration that is therefore a zero-current switching (ZCS) state.

[0163] By design, the current IC flowing through the clamp switch TCLAMP is zero when the main switch TMAIN is conducting, and switches to the conducting state in ZVS when the clamp switch goes high. When the clamp switch is conducting, the voltage limiting system allows energy transfer from the leakage inductance LL to the secondary circuit. This allows us to observe the two switching (rising and falling) in ZCS of the current ID flowing through the output diode DOUT.

[0164] When the output power demand decreases, or the input voltage increases, the conduction mode of device 100 gradually shifts to boundary conduction mode (BCM) and then discontinuous conduction mode (DCM). According to the invention, the control circuit M2 decreases, during this decrease, the on-state activation time of the clamp switch TCLAMP. This decrease results in the loss of the zero-voltage switching configuration (ZVS).

[0165] However, in discontinuous conduction mode (DCM) or limiting conduction mode (BCM), the magnetizing current always drops to zero before the start of the next switching cycle. Thus, switching for the main transistor TMAIN naturally occurs at zero current (ZCS).

[0166] Figure 12 illustrates a plurality of signals from the power supply device 100, incorporating the previously described control circuit M2, for an operating point in continuous conduction mode. In Figure 11, the first control signal, PWM_TCLAMP, and the second control signal, PWM_TMAIN, are no longer complementary. In particular, there is a period temporal, during the switching cycle of the main switch TMAIN, during which the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN are both in the blocked state.

[0167] Thus, as seen in Figure 12, the ILP current through the primary winding LP evolves as follows during a switching cycle of the main switch TMAIN: when the main switch TMAIN is conducting, the ILP current increases; when the main switch TMAIN is blocked but the clamp switch TCLAMP is conducting, the ILP current decreases; then, the ILP current is zero during the period when the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN are both in the blocked state.

[0168] The main IT current through the main switch TMAIN increases when the main switch TMAIN is in the conducting state, and cancels out when it is in the blocked state.

[0169] By design, the current IC flowing through the clamp switch TCLAMP is zero when the main switch TMAIN is conducting, and switches to the conducting state in ZVS when the clamp switch goes high. When the clamp switch TCLAMP is conducting, the voltage limiting system allows energy transfer from the leakage inductance LL to the secondary circuit. This allows us to observe both switching (rising and falling) in ZCS of the current ID flowing through the output diode DOUT.

[0170] Advantageously, the previously described indirect transfer switching power supply 100 can be used to power a high-power loudspeaker incorporating, where appropriate, also an amplification module and a signal processing module.

[0171] Thus, another aspect of the invention relates to a loudspeaker 200 comprising an indirect transfer switching power supply 100 as described above. Figure 13 schematically illustrates such a loudspeaker 200 incorporating the indirect transfer switching power supply 100.

[0172] In another use, the previously described indirect transfer switching power supply 100 can be separated from the enclosure it powers and alternatively integrated into an external acoustic amplifier.

[0173] Another aspect of the invention relates to an acoustic amplification device 300 comprising an indirect transfer switching power supply 100 as described above. Figure 14 schematically illustrates such an acoustic amplification device 300 incorporating the indirect transfer switching power supply 100.

[0174] In one example, the amplification device is external and can power one or more loudspeakers.

[0175] Of course, the present invention is not limited to the embodiments described above by way of example; it extends to other variations. Other embodiments are possible.

[0176] Various aspects and features described above may be implemented together, separately, or substituted for one another, and all the different combinations and subcombinations of these aspects and features form part of the scope of the invention. Furthermore, some systems and equipment described above may not incorporate all the modules and functions described for the preferred embodiments. Industrial application

[0177] The invention may find application particularly in the field of acoustics, but other areas of application are possible. For example, the control circuit according to the invention can be used to modernize an existing power supply device without significantly altering its initial operation and at a reasonable additional cost.

[0178] The invention is not limited to the examples of the M2 control circuit, and in particular of the first module MA, the second module MB, and the third module MC described above, only by way of example, but it encompasses all the variants that a person skilled in the art may consider within the framework of the protection sought.

Claims

Demands

1. Indirect transfer switching power supply device (100) comprising: - a transformer (TRMAIN) comprising a primary winding (LP) connected to a primary circuit intended to be connected to an electrical power source and a secondary winding supplying a secondary circuit intended to be connected to a load (LOAD), the transformer having a leakage inductance (LL) viewed as an additional inductance in series with the primary winding, - a main switch (TMAIN) configured to, when conducting, close the primary circuit's power supply via the electrical power source and, when blocked, open said power supply circuit, - a voltage limiting system configured to transfer energy stored in the leakage inductance (LL) to the load (LOAD), the limiting system comprising a capacitor called a clamp capacitor (CCLAMP) and a switch (TCLAMP) called a clamp switch, the limiting system being configured so that the clamp capacitor (CCLAMP) is electrically connected in parallel with the primary winding (LP) when the clamp switch (TCLAMP) is in a conducting state, the indirect transfer switching power supply device (100) being characterized in that it further comprises a control circuit (M2) configured to generate a first binary control signal (PWM TCLAMP) on the basis of a first binary main input signal (PWMJN) and at least one second main input signal (l_SENS+, l_SENS-), the main switch (TMAIN) being controlled from the first main input signal (PWMJN),at least one second main input signal being representative of a current, called main current (IT), flowing through the main switch (TMAIN) when the main switch (TMAIN) is conducting, the control circuit being configured to determine an activation time of the first control signal (PWM_TCLAMP) based on the value of the main current (IT), the control circuit (M2) being configured to generate the first control signal (PWM TCLAMP) with an activation time, during which the clamp switch (TCLAMP) is in the conducting state, defined between two, successive switching to a high state of the first main input signal (PWM_IN), the activation time varying increasing with the electrical output power over a planned operating range.

2. Power supply device (100) according to claim 1, wherein, the time between two high-state switching of the first main input signal (PWM_IN) defining a total period, the first main input signal (PWM_IN) taking a first high value for a first duration, the control circuit (M2) is further configured to: - convert the second main input signal into a binary signal called the second input signal (PWM_A1), the second input signal taking a high value for a second duration, - to have the activation duration which is a function, on the one hand, of a difference between the total period and the first duration and, on the other hand, of the second duration.

3. Power supply device (100) according to the preceding claim, characterized in that the activation time is a function of the overlap period between said difference and the second duration.

4. Power supply device (100) according to any one of the preceding claims, characterized in that the control circuit (M2) comprises a first module (MA), a second module (MB) and a third module (MC), the first module (MA) being configured to receive the first main input signal (PWM_IN), and provide as output, via a first branch, a first input signal (PWM_B1) to the third module (MC), the second module (MB) being configured to provide as output the second input signal (PWM_A1) to the third module (MC), the third module (MC) being configured to generate, on the basis of the first input signal (PWM_B1) and the second input signal (PWM_A1), the first control signal (PWM_TCLAMP).

5. Power supply device (100) according to the preceding claim, characterized in that the first branch of the first module (MA) comprises an inverter.

6. Power supply device (100) according to any one of the preceding claims and claim 4, characterized in that the second module (MB) comprises: - a parallel association of a capacitor of value CT and a resistor of value RT forming a time constant system RT*CT taking as input a voltage function of said at least a second main input signal and delivering an intermediate signal; - a comparator (COMP1) receiving as input, via a first input terminal, the intermediate signal, and via a second input terminal, a reference signal (VREF), the comparator delivering the second input signal (PWM_A1).

7. Power supply device (100) according to any one of the preceding claims and claim 4, characterized in that the third module (MC) comprises a logic gate configured to perform a logical AND function between, on the one hand, the first input signal (PWM_B1) and, on the other hand, the second input signal (PWM_A1). [Claims] Power supply device (100) according to any one of the preceding claims, characterized in that the control circuit (M2) is configured to apply a first dead time (TMORT 1) between switching to the blocked state of the main switch (TMAIN) and switching to the on state of the clamp switch (TCLAMP), and to apply a second dead time (TMORT2) between switching to the blocked state of the clamp switch (TCLAMP) and switching to the on state of the main switch (TMAIN). [Claims] Power supply device (100) according to any one of the preceding claims and claims 4 and 8, characterized in that the first branch comprises a first RC circuit comprising a first series resistor and a first parallel capacitor, the first RC circuit being configured to determine the first dead time (TMORT1).

10. Power supply device (100) according to any one of the preceding claims and claims 4 and 8, characterized in that the second branch comprises a second RC circuit including a second series resistor and a second parallel capacitor, the second RC circuit being configured to determine the second dead time (TM0RT2).

11. Power supply device according to any one of the preceding claims and claim 8, further comprising a modulation and control system for the first dead time and / or the second dead time.

12. Power supply device according to any one of the preceding claims, characterized in that the control circuit (M2) includes a main current (IT) pickup block (M21), the pickup block (M21) being configured to deliver the second main input signal.

13. Power supply device (100) according to the preceding claim, wherein the pickup block (M21) is configured to apply a gain to the main current (IT), the pickup block (M21) further comprising a gain modulator comprising a first sub-module (M100) and a second sub-module (M110), the first sub-module being configured, from an input voltage from a source to which the power supply device (100) is connected, to generate a plurality of N binary signals encoding together a binary word, the second sub-module (M110) comprising N stages of which a set of stages is activated according to the value of the binary word, thus determining a gain modulation amplitude, so as to modulate, via a control signal as a function of the gain modulation amplitude, the applied gain.

14. Acoustic enclosure (200) comprising an indirect transfer switching power supply device (100) according to any one of claims 1 to 13.

15. Acoustic amplification device (300) comprising an indirect transfer switching power supply device (100) according to any one of claims 1 to 13.

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