SiC EPITAXIAL WAFER, METHOD FOR INSPECTING SiC EPITAXIAL WAFER, AND METHOD FOR PRODUCING SiC EPITAXIAL WAFER

Abstract

An SiC epitaxial wafer according to the present embodiment comprises a base substrate, an SiC single crystal substrate layer, and an SiC epitaxial layer. The SiC single crystal substrate layer is bonded to the base substrate. The SiC epitaxial layer is laminated on the surface of the SiC single crystal substrate layer opposite the surface where the base substrate and the SiC single crystal substrate layer are in contact. The thickness of the SiC epitaxial layer is specified in an SiC epitaxial wafer according to the present embodiment.

Description

SiC epitaxial wafer, method for inspecting a SiC epitaxial wafer, and method for manufacturing a SiC epitaxial wafer

[0001] This disclosure relates to a SiC epitaxial wafer, a method for inspecting a SiC epitaxial wafer, and a method for manufacturing a SiC epitaxial wafer.

[0002] Silicon carbide (SiC) has a dielectric breakdown field an order of magnitude larger and a band gap three times larger than silicon (Si). Furthermore, SiC has properties such as a thermal conductivity approximately three times higher than silicon (Si). Therefore, SiC is expected to have applications in power devices, high-frequency devices, and other applications. In addition, devices using SiC can operate at high temperatures of 150°C or higher. For this reason, SiC epitaxial wafers have recently come to be used as substrates for the semiconductor devices mentioned above.

[0003] SiC epitaxial wafers are obtained by stacking SiC epitaxial layers on the surface of a SiC substrate. High-quality SiC substrates are expensive. On the other hand, the active layer that exhibits the actual functionality of the device is a thin region of a few micrometers to several hundred micrometers on the surface of the SiC epitaxial wafer, while the remaining portion functions as a support to facilitate handling and other processes.

[0004] In recent years, in order to prevent the high cost of SiC epitaxial wafers, studies have been conducted on bonding high-quality SiC substrates to low-cost base substrates (for example, Patent Document 1).

[0005] Japanese Patent Publication No. 2023-118516

[0006] When fabricating SiC devices using SiC epitaxial wafers, the thickness of the SiC epitaxial layer is crucial information. A discrepancy between the measured and actual thickness of the SiC epitaxial layer can cause problems during the manufacturing process. The thickness of the SiC epitaxial layer can be measured, for example, using Fourier transform infrared spectroscopy (FT-IR). FT-IR measures the thickness by Fourier transform from the interference waveforms of surface reflection and interface reflection. When there are multiple interfaces, multiple interference waveforms are generally generated. However, if these interference waveforms overlap, it may be impossible to separate the desired interference waveform, making it difficult to accurately measure the thickness of the layer being measured.

[0007] This disclosure has been made in view of the above-mentioned problems, and provides a SiC epitaxial wafer in which the thickness of the SiC epitaxial layer is specified, even when a composite substrate in which a SiC single crystal layer is bonded to a base substrate is used, as well as a method for inspecting the SiC epitaxial wafer and a method for manufacturing the SiC epitaxial wafer.

[0008] After diligent research, the inventors discovered that when a SiC epitaxial layer is grown on a composite substrate in which a SiC single crystal layer is bonded to a base substrate, the thickness of the SiC epitaxial layer cannot be directly measured from the FT-IR interference waveform.

[0009] This disclosure provides the following means to solve the above problems.

[0010] (1) The SiC epitaxial wafer according to the first embodiment comprises a base substrate, a SiC single crystal substrate layer, and a SiC epitaxial layer. The SiC single crystal substrate layer is bonded to the base substrate. The SiC epitaxial layer is laminated on the surface of the SiC single crystal substrate layer opposite to the surface where the base substrate and the SiC single crystal substrate layer are in contact. In the SiC epitaxial wafer according to the first embodiment, the thickness of the SiC epitaxial layer is specified.

[0011] (2) In the SiC epitaxial wafer according to the above embodiment, the thickness of the SiC epitaxial layer may be determined by directly measuring the target substrate for which the thickness is to be determined.

[0012] (3) In the SiC epitaxial wafer according to the above embodiment, the thickness of the SiC epitaxial layer at multiple different measurement points in the plane may be specified.

[0013] (4) In the SiC epitaxial wafer according to the above embodiment, the thickness of the SiC epitaxial layer may be a value obtained from the first thickness measured by Fourier transform infrared spectroscopy and the thickness of the SiC single crystal substrate layer.

[0014] (5) The inspection method for a SiC epitaxial wafer according to the second embodiment comprises a Fourier transform infrared spectroscopy measurement step and a film thickness determination step. In the Fourier transform infrared spectroscopy measurement step, incident light is irradiated from the SiC epitaxial layer side of a SiC epitaxial wafer, in which a SiC single crystal substrate layer is bonded to a base substrate and a SiC epitaxial layer is formed on the SiC single crystal substrate layer, to measure the first film thickness. In the film thickness determination step, the film thickness of the SiC epitaxial layer is determined from the first film thickness and the film thickness of the SiC single crystal substrate layer.

[0015] (6) A method for manufacturing a SiC epitaxial wafer according to the third embodiment includes a method for inspecting a SiC epitaxial wafer according to the above embodiment.

[0016] The SiC epitaxial wafers described in this disclosure have a specified thickness of the SiC epitaxial layer, resulting in high accuracy in quality assurance. Furthermore, the inspection method and manufacturing method for the SiC epitaxial wafers described in this disclosure can specify the thickness of the SiC epitaxial layer.

[0017] This is a plan view of a SiC epitaxial wafer according to the first embodiment. This is a cross-sectional view of a SiC epitaxial wafer according to the first embodiment. This is a schematic diagram illustrating the Fourier transform infrared spectroscopy measurement step in the inspection method for a SiC epitaxial wafer according to the first embodiment. This is the FT-IR measurement result of a SiC epitaxial wafer according to the first embodiment.

[0018] This embodiment will now be described in detail with reference to the drawings as appropriate. The drawings used in the following description may be enlarged for convenience to clearly illustrate the features of this embodiment, and the dimensional ratios of each component may differ from those of the actual components. The materials, dimensions, etc., exemplified in the following description are examples only, and this disclosure is not limited to them. It is possible to modify and implement these examples as appropriate without altering the essence of the invention.

[0019] In this specification, individual orientations are indicated by [], collective orientations by <>, individual planes by (), and collective planes by {}. While crystallography dictates that negative exponents are represented by a "-" (bar) above the number, in this specification, the negative sign is placed before the number.

[0020] First, let's define the directions. The thickness direction of the SiC epitaxial wafer 10 is defined as the Z direction. The Z direction may be the <0001> direction of the SiC epitaxial layer 3, or it may be tilted by an offset angle relative to the <0001> direction. One direction on a plane perpendicular to the Z direction is defined as the X direction. On a plane perpendicular to the Z direction, the direction perpendicular to the X direction is defined as the Y direction. The X direction is, for example, the <11-20> direction of the SiC epitaxial layer 3. The Y direction is, for example, the <1-100> direction of the SiC epitaxial layer 3.

[0021] Figure 1 is a plan view of a SiC epitaxial wafer 10 according to this embodiment. The SiC epitaxial wafer 10 is a wafer that is approximately circular in plan view. The SiC epitaxial wafer 10 may have notches or orientation flats for determining the direction of the crystal axis.

[0022] The diameter of the SiC epitaxial wafer 10 is not particularly limited. The diameter of the SiC epitaxial wafer 10 is, for example, 145 mm or more, preferably 149 mm or more. The diameter of the SiC epitaxial wafer 10 is, for example, 155 mm or less, preferably 151 mm or less. The diameter of the SiC epitaxial wafer 10 is, for example, 195 mm or more, preferably 199 mm or more. The diameter of the SiC epitaxial wafer 10 is, for example, 205 mm or less, preferably 201 mm or less. The diameter of the SiC epitaxial wafer 10 is, for example, 245 mm or more, preferably 249 mm or more. The diameter of the SiC epitaxial wafer 10 is, for example, 255 mm or less, preferably 251 mm or less. The diameter of the SiC epitaxial wafer 10 is, for example, 295 mm or more, preferably 299 mm or more. The diameter of the SiC epitaxial wafer 10 is, for example, 305 mm or less, preferably 301 mm or less.

[0023] Figure 2 is a cross-sectional view of the SiC epitaxial wafer 10 according to this embodiment. The SiC epitaxial wafer 10 has a base substrate 1, a SiC single crystal substrate layer 2, and a SiC epitaxial layer 3.

[0024] The base substrate 1 is a support substrate that enhances the handling of the SiC epitaxial wafer 10. The base substrate 1 can be made of, for example, polycrystalline SiC, single-crystal SiC, SiC sintered body, ceramic, single-crystal Si, or SiO ２ It is a film-coated Si. If the base substrate 1 is single-crystal SiC, the single-crystal SiC of the base substrate 1 may be of lower quality than the SiC single-crystal substrate layer 2. For example, the defect density in the single-crystal SiC of the base substrate 1 may be higher than the defect density in the SiC single-crystal substrate layer 2. The base substrate 1 is not limited to a single layer, but may consist of multiple layers.

[0025] The thickness of the base substrate 1 is, for example, 100 μm or more and 1000 μm or less. Preferably, the thickness of the base substrate 1 is 150 μm or more and 500 μm or less, more preferably 200 μm or more and 400 μm or less, and even more preferably 325 μm or more and 375 μm or less.

[0026] The thickness of the base substrate 1 can be measured using a thickness gauge or spectroscopic interferometry if it is available in its state before the SiC single crystal substrate layer 2 is bonded to it. When measuring the thickness of the base substrate 1 in the state of the SiC epitaxial wafer 10, a cross section is cut out and the thickness of the base substrate 1 is measured from the cross-sectional image using a scanning electron microscope (SEM), transmission electron microscope (TEM), etc.

[0027] The thickness of the substrate 1 is measured, for example, at the center when the substrate 1 is viewed from above. The thickness of the substrate 1 may also be measured at multiple equally spaced measurement points along a straight line passing through the center of the substrate 1 when viewed from above. For example, the thickness of the substrate 1 may be measured at the center, at points equally spaced in the X direction relative to the center, and at points equally spaced in the Y direction relative to the center. If the thickness of the substrate 1 is measured at multiple measurement points, the average of the measurements at each measurement point may be considered as the thickness of the substrate 1.

[0028] The SiC single crystal substrate layer 2 is bonded to the base substrate 1. The SiC single crystal substrate layer 2 is in contact with the base substrate 1 and is bonded to the base substrate 1.

[0029] The SiC single crystal substrate layer 2 is made of, for example, a single crystal of SiC. The polytype of the SiC single crystal substrate layer 2 is not particularly limited and may be any of 2H, 3C, 4H, or 6H. For example, the SiC single crystal substrate layer 2 is 4H-SiC.

[0030] The SiC single crystal substrate layer 2 may be doped with, for example, a dopant element. The dopant element is, for example, nitrogen. The concentration of the dopant element in the SiC single crystal substrate layer 2 is, for example, 5 × 10⁻¹⁶. １８ atoms / cm ３ The above 2 x 10 １９ atoms / cm ３ The following applies:

[0031] The thickness of the SiC single crystal substrate layer 2 is, for example, 3 μm or less. Preferably, the thickness of the SiC single crystal substrate layer 2 is, for example, 0.3 μm or more and 2 μm or less, more preferably 0.5 μm or more and 1.5 μm or less, and even more preferably 0.8 μm or more and 1.2 μm or less.

[0032] The thickness of the SiC single crystal substrate layer 2 can be determined, for example, by subtracting the thickness of the substrate before bonding the SiC single crystal substrate layer 2 from the thickness of the substrate after bonding the SiC single crystal substrate layer 2, if the substrates before and after bonding the SiC single crystal substrate layer 2 to the base substrate 1 are available. Alternatively, if a finished SiC epitaxial wafer 10 is available, a cross-section can be cut out, and the thickness of the SiC single crystal substrate layer 2 can be measured from the cross-sectional image using a scanning electron microscope (SEM), transmission electron microscope (TEM), etc. Measuring the thickness of the SiC single crystal substrate layer 2 requires destructive testing of the SiC epitaxial wafer 10, and it is difficult to determine the thickness of the SiC single crystal substrate layer 2 non-destructively. The measurement position for the thickness of the SiC single crystal substrate layer 2 is the same as the measurement position for the thickness of the base substrate 1. It is preferable to measure the thickness of the SiC single crystal substrate layer 2 at the same position where the thickness of the base substrate 1 was measured. Furthermore, if the thickness of the SiC single crystal substrate layer 2 is measured at multiple measurement points, the average of the measurements at each measurement point may be considered as the thickness of the SiC single crystal substrate layer 2.

[0033] The first surface of the SiC single crystal substrate layer 2 may or may not have an offset angle with respect to the (0001) plane in the <11-20> direction. Preferably, the first surface of the SiC single crystal substrate layer 2 has an offset angle in the <11-20> direction. The offset angle is, for example, greater than 0° and 10° or less, preferably 0.1° or more and 8° or less, more preferably 3.5° or more and 4.5° or less, and even more preferably 4°. The first surface of the SiC single crystal substrate layer 2 does not have to have an offset angle with respect to the (0001) plane in the <1-100> direction. The first surface of the SiC single crystal substrate layer 2 is, for example, the surface of the SiC single crystal substrate layer 2 that is in contact with the SiC epitaxial layer 3.

[0034] The SiC epitaxial layer 3 is laminated on the SiC single crystal substrate layer 2. The SiC epitaxial layer 3 is laminated on the SiC single crystal substrate layer 2 on a surface facing the surface where the base substrate 1 and the SiC single crystal substrate layer 2 contact each other.

[0035] The SiC epitaxial layer 3 is composed of a single crystal of SiC. The SiC epitaxial layer 3 is a layer in which SiC has epitaxially grown on the SiC single crystal substrate layer 2. The SiC epitaxial layer 3 may have, for example, a dopant element. The dopant element is, for example, nitrogen. The concentration of the dopant element in the SiC epitaxial layer 3 is, for example, 5×10 １３ atoms / cm ３ or more and 2×10 １８ atoms / cm ３ or less.

[0036] The thickness of the SiC epitaxial layer 3 is specified. The thickness of the SiC epitaxial layer 3 is specified nondestructively, and the SiC epitaxial wafer 10 can be distributed as a product. The thickness of the SiC epitaxial layer 3 is specified as information guaranteeing the quality of the SiC epitaxial wafer 10. The thickness of the SiC epitaxial layer 3 is handled together with the SiC epitaxial wafer 10, for example, as an inspection report. The inspection report may be an actual document or data. The SiC epitaxial wafer 10 and the inspection report are handled as a data set of the SiC epitaxial wafer. A person in charge of the subsequent process of manufacturing the SiC device can confirm the quality with the data set of the SiC epitaxial wafer.

[0037] The film thickness of the SiC epitaxial layer 3 may be specified at a predetermined location in the plane, or may be specified at a plurality of locations in the plane. For example, the film thickness of the SiC epitaxial layer 3 may be specified at the center of the SiC epitaxial wafer 10. Also, for example, the film thickness of the SiC epitaxial layer 3 may be specified at a plurality of measurement points in the plane of the SiC epitaxial wafer 10. The plurality of measurement points are, for example, the same positions as the positions where the plate thickness was measured on the lower base plate 1. By specifying the film thickness of the SiC epitaxial layer 3 at the plurality of measurement points, the in-plane distribution of the film thickness can be confirmed. Also, the film thickness of the SiC epitaxial layer 3 may be specified at a plurality of measurement points, and the average of the film thicknesses of each measurement point may be regarded as the film thickness of the SiC epitaxial layer 3.

[0038] The film thickness of the SiC epitaxial layer 3 can be specified, for example, by directly measuring the target substrate to be measured. By specifying the film thickness of the target substrate itself without preparing a measurement substrate or the like formed under the same conditions, the accuracy of quality assurance of the SiC epitaxial wafer 10 is improved. The film thickness of the SiC epitaxial layer 3 can be specified, for example, from the state of the SiC epitaxial wafer 10 having the SiC epitaxial layer 3.

[0039] The film thickness of the SiC epitaxial layer 3 in the target substrate can be obtained, for example, from the first film thickness measured by Fourier transform infrared spectroscopy (FT-IR) and the film thickness of the SiC single crystal substrate layer 2. When using this method, the film thickness of the SiC epitaxial layer 3 can be measured non-destructively without destroying the target substrate.

[0040] The film thickness of the SiC epitaxial layer 3 can be specified, for example, according to the following inspection method for the SiC epitaxial wafer 10.

[0041] The inspection method for the SiC epitaxial wafer 10 includes a Fourier transform infrared spectroscopy measurement step and a film thickness specification step.

[0042] Figure 3 is a schematic diagram illustrating the Fourier transform infrared spectroscopy measurement process in the inspection method for a SiC epitaxial wafer 10. In the Fourier transform infrared spectroscopy measurement process, incident light L1 is irradiated from the SiC epitaxial layer 3 side of the SiC epitaxial wafer 10. A portion of the incident light L1 is reflected at the surface of the SiC epitaxial layer 3 and becomes reflected light L2. A portion of the incident light L1 is reflected at the interface between the SiC single crystal substrate layer 2 and the SiC epitaxial layer 3 and becomes reflected light L3. A portion of the incident light L1 is reflected at the interface between the base substrate 1 and the SiC single crystal substrate layer 2 and becomes reflected light L4.

[0043] Figure 4 shows an example of the results obtained by performing a Fourier transform infrared spectroscopy measurement on a SiC epitaxial wafer 10 according to this embodiment. FT-IR measures the film thickness by Fourier transform from the interference waveform of surface reflection and interface reflection. When there are multiple interfaces, it is common for multiple interference waveforms to be generated, but in the example shown in Figure 4, the interference waveforms overlap to form a single interference waveform. This is thought to be because the interference waveform of reflected light L2 and reflected light L3 and the interference waveform of reflected light L2 and reflected light L4 overlap. In the Fourier transform infrared spectroscopy measurement process, only one film thickness is determined as the first film thickness.

[0044] The first film thickness is determined from information obtained by the overlapping interference waveforms of reflected light L2 and reflected light L3, and the interference waveforms of reflected light L2 and reflected light L4; therefore, it does not accurately represent the film thickness of the SiC epitaxial layer 3.

[0045] In the film thickness determination process, the film thickness of the SiC epitaxial layer 3 is determined from the first film thickness and the film thickness of the SiC single crystal substrate layer 2. The film thickness of the SiC epitaxial layer 3 is determined, for example, based on the following equation (1). ３ = t １ -t ２ + a ... (1)

[0046] In equation (1), t ３ is the thickness of the SiC epitaxial layer 3, and t １ is the first film thickness, and t ２ is the film thickness of the SiC single crystal substrate layer 2, and a is the correction value.

[0047] First film thickness t １ This is determined from the FT-IR measurement results mentioned above. The film thickness t of the SiC single crystal substrate layer 2. ２ This can be confirmed from the manufacturing history information when the SiC single crystal substrate layer 2 is manufactured. If the manufacturing history information is not available, measurement is performed, for example, by spectroscopic interferometry, when the SiC epitaxial layer 3 is in its pre-deposition state. When the SiC epitaxial layer 3 is in its pre-deposition state, the problem of overlapping interference waveforms does not occur, so the film thickness of the SiC single crystal substrate layer 2 can be measured. The correction value a is the film thickness t of the SiC single crystal substrate layer 2. ２ This value is determined by the concentration of the dopant element in the SiC single crystal substrate layer 2. The specific correction value for a SiC single crystal substrate layer 2 with a predetermined film thickness and predetermined dopant element concentration is determined by prior study. For example, a table listing the relationship between film thickness, dopant element concentration, and correction value is prepared in advance, and an appropriate correction value is selected according to the configuration of the SiC single crystal substrate layer 2.

[0048] The inspection method for the SiC epitaxial wafer 10 according to this embodiment can be used to non-destructively determine the thickness of the SiC epitaxial layer 3 of the substrate to be evaluated.

[0049] The inspection method for the SiC epitaxial wafer 10 according to this embodiment can be incorporated into a method for manufacturing the SiC epitaxial wafer 10. The method for manufacturing the SiC epitaxial wafer 10 includes, for example, a base substrate preparation step, a SiC single crystal substrate preparation step, a bonding step, a SiC single crystal substrate separation step, a SiC epitaxial layer deposition step, and an inspection step.

[0050] In the base substrate preparation process, the base substrate 1 described above is prepared. In the SiC single crystal substrate preparation process, a SiC single crystal substrate is prepared. A portion of the SiC single crystal substrate becomes the SiC single crystal substrate layer 2 by performing the single crystal substrate separation process described later. Therefore, the SiC single crystal substrate is the same as the SiC single crystal substrate layer 2 described above. The SiC single crystal substrate may be manufactured by, for example, sublimation, gas, or solution.

[0051] Ions may be implanted into the SiC single crystal substrate. For example, hydrogen ions can be implanted. By keeping the ion implantation energy constant, ion-implanted regions can be formed at the same height. By changing the ion implantation energy, the position where the ion-implanted regions are formed can be freely controlled. When cutting a portion of the SiC single crystal substrate using a wire saw, laser, etc., it is not necessary to implant ions into the SiC single crystal substrate.

[0052] In the bonding process, the base substrate 1 and the SiC single crystal substrate are bonded together. The base substrate 1 and the SiC single crystal substrate can be bonded by activating the bonding surface, then stacking them and applying pressure. The bonding surface can be activated, for example, by irradiating the bonding surface with ions. By performing the bonding process, a composite substrate is obtained in which the base substrate 1 and the SiC single crystal substrate are bonded together.

[0053] In the SiC single crystal substrate separation process, a portion of the SiC single crystal substrate is separated from the composite substrate. The SiC single crystal substrate is separated in the thickness direction. For example, by heating the SiC single crystal substrate, the SiC single crystal substrate is separated along the ion-implanted portion. Alternatively, the SiC single crystal substrate may be cut and separated using a wire saw, laser, or the like. By separating a portion of the SiC single crystal substrate, a SiC single crystal substrate layer 2 is obtained.

[0054] In the SiC epitaxial layer deposition process, a SiC epitaxial layer 3 is deposited on one surface of the SiC single crystal substrate layer 2 described above. The SiC epitaxial layer 3 can be fabricated by known methods.

[0055] The inspection process can be carried out using the method described above. By performing the inspection process, a SiC epitaxial wafer 10 can be manufactured in which the film thickness of the SiC epitaxial layer 3 is appropriately determined.

[0056] Furthermore, a SiC device can be obtained by forming an element structure on the SiC epitaxial layer 3 of the SiC epitaxial wafer 10 and then chipping it. In the manufacturing process of SiC devices, process defects are less likely to occur if the thickness of the SiC epitaxial layer 3 is appropriately specified.

[0057] In this embodiment, the SiC epitaxial wafer 10 has a precisely defined film thickness of the SiC epitaxial layer 3, thus guaranteeing the quality of the SiC epitaxial wafer 10 with high precision. The SiC epitaxial wafer set, consisting of the SiC epitaxial wafer 10 and an inspection report indicating the film thickness of the SiC epitaxial layer 3, can suppress problems in the process that may arise due to differences between the measured film thickness and the actual film thickness of the SiC epitaxial layer.

[0058] While preferred embodiments of this disclosure have been described in detail above, this disclosure is not limited to any particular embodiment, and various modifications and changes are possible within the scope of the gist of this disclosure as described in the claims.

[0059] The SiC epitaxial wafer 10 may have a bonding layer between the base substrate 1 and the SiC single crystal substrate layer 2. The bonding layer is a layer located between the base substrate 1 and the SiC single crystal substrate layer 2, and is a layer containing carbon, silicon, and nitrogen. The bonding layer is formed by bonding the base substrate 1 and the SiC single crystal substrate layer 2 together. The bonding layer contains, for example, elements that constitute the base substrate 1 or the SiC single crystal substrate layer 2. The bonding layer can sometimes be confirmed by observing a cross-section of the composite substrate 10 with a transmission electron microscope (TEM). The thickness of the bonding layer may be, for example, 0.25 nm or more and 10 nm or less. The thickness of the bonding layer can sometimes be measured from a cross-sectional image taken with a transmission electron microscope (TEM). However, the resolution of the transmission electron microscope must be considered.

[0060] 1. Underlayment substrate 2. SiC single crystal substrate layer 3. SiC epitaxial layer 10. SiC epitaxial wafer L1. Incident light L2, L3, L4. Reflected light

Claims

1. A SiC epitaxial wafer comprising a base substrate, a SiC single crystal substrate layer, and a SiC epitaxial layer, wherein the SiC single crystal substrate layer is bonded to the base substrate, the SiC epitaxial layer is laminated on the surface of the SiC single crystal substrate layer opposite to the surface where the base substrate and the SiC single crystal substrate layer are in contact, and the thickness of the SiC epitaxial layer is specified.

2. The SiC epitaxial wafer according to claim 1, wherein the thickness of the SiC epitaxial layer is determined by directly measuring the target substrate for which the thickness is to be determined.

3. The SiC epitaxial wafer according to claim 1, wherein the thickness of the SiC epitaxial layer at multiple different measurement points in the plane is specified.

4. The SiC epitaxial wafer according to claim 1, wherein the thickness of the SiC epitaxial layer is a value obtained from the first thickness measured by Fourier transform infrared spectroscopy and the thickness of the SiC single crystal substrate layer.

5. A method for inspecting a SiC epitaxial wafer, comprising a Fourier transform infrared spectroscopy measurement step and a film thickness determination step, wherein in the Fourier transform infrared spectroscopy measurement step, incident light is irradiated from the SiC epitaxial layer side of a SiC epitaxial wafer in which a SiC single crystal substrate layer is bonded to a base substrate and a SiC epitaxial layer is formed on the SiC single crystal substrate layer, and a first film thickness is measured; and in the film thickness determination step, the film thickness of the SiC epitaxial layer is determined from the first film thickness and the film thickness of the SiC single crystal substrate layer.

6. A method for manufacturing a SiC epitaxial wafer, comprising the inspection method for a SiC epitaxial wafer described in claim 5.

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