Display substrate, display panel, and display apparatus

Abstract

Embodiments of the present disclosure provide a display substrate, a display panel and a display apparatus. The display substrate has a display area and a peripheral area located at the periphery of the display area; The display substrate comprises: a substrate; a heating structure, which is located on one side of the substrate and comprises a plurality of first heating traces and a plurality of second heating traces, the plurality of first heating traces being located in the display area, and the plurality of second heating traces being located in the peripheral area; and a first light sensing structure, which is located in the peripheral area, wherein the orthographic projection of at least part of the first light sensing structure on the substrate does not overlap the orthographic projection of the second heating traces on the substrate.

Description

Display substrate, display panel and display device Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display substrate, a display panel, and a display device. Background Technology

[0002] Thin-film transistor liquid crystal displays (TFT-LCDs) are characterized by their small size, low power consumption, high image quality, no radiation, and portability. They have experienced rapid development in recent years and have gradually replaced traditional cathode ray tube (CRT) displays, dominating the current flat panel display market. Currently, TFT-LCDs are widely used in products of various sizes, covering almost all major electronic products in today's information society, such as LCD TVs, high-definition digital TVs, computers (desktops and laptops), mobile phones, tablets, navigation systems, in-vehicle displays, projection displays, cameras, digital cameras, electronic watches, calculators, electronic instruments, meters, public displays, and virtual displays. Summary of the Invention

[0003] This disclosure provides a display substrate, a display panel, and a display device. The display substrate has a display area and a peripheral area surrounding the display area; wherein the display substrate includes:

[0004] Substrate;

[0005] A heating structure, located on one side of the substrate, includes: multiple first heating lines and multiple second heating lines; the multiple first heating lines are located in the display area, and the multiple second heating lines are located in the peripheral area;

[0006] A first photosensitive structure is located in the peripheral region, and at least a portion of the orthographic projection of the first photosensitive structure onto the substrate does not overlap with the orthographic projection of the second heating trace onto the substrate.

[0007] In one possible implementation, the surrounding area includes: a first surrounding area, a second surrounding area, a third surrounding area, and a fourth surrounding area; wherein the first surrounding area and the fourth surrounding area are disposed opposite to each other, and the second surrounding area and the third surrounding area connect the first surrounding area and the fourth surrounding area;

[0008] The display substrate further includes: multiple gate lines extending along a first direction, multiple data lines extending along a second direction, multiple pixel electrodes, and multiple first fan-shaped trace groups; wherein, the multiple first fan-shaped trace groups are located in the first peripheral area; the first fan-shaped trace group includes: multiple first leads; the first leads are electrically connected to one end of the data lines;

[0009] The first light-sensing structure includes: a first sub-light-sensing structure; the first sub-light-sensing structure is located in the first peripheral area and in the gap between two adjacent first fan-shaped trace groups.

[0010] In one possible implementation, the first sector-shaped trace group includes: a first sub-sector-shaped trace group and a second sub-sector-shaped trace group; the second sub-sector-shaped trace group is located on the side of the first sub-sector-shaped trace group away from the display area; the first sub-sector-shaped trace group includes: a plurality of first sub-leads; the second sub-sector-shaped trace group includes: a plurality of second sub-leads;

[0011] The display substrate further includes: a plurality of first anti-static structures and a plurality of first bonding groups; the first anti-static structures are located between the first sub-fan-shaped trace group and the second sub-fan-shaped trace group, and the first bonding groups are located on the side of the second sub-fan-shaped trace group away from the first sub-fan-shaped trace group; the first anti-static structure includes: a plurality of first anti-static units arranged along the first direction, and the first bonding group includes: a plurality of first bonding terminals arranged along the first direction; one end of the first sub-lead is connected to the data line, and the other end is electrically connected to one end of the first anti-static unit; one end of the second sub-lead is electrically connected to the other end of the first anti-static unit, and the other end of the second sub-lead is electrically connected to the first bonding terminal;

[0012] The first sub-fan-shaped trace group includes: a first outer edge extending along the first direction and away from the side of the display area; the second sub-fan-shaped trace group includes: a second outer edge extending along the first direction and close to the side of the display area; at least a portion of the first sub-photosensitive structure in the orthographic projection of the substrate, the region between the extension line of the first outer edge and the extension line of the second outer edge is located in the orthographic projection of the substrate.

[0013] In one possible implementation, the display substrate further includes: a first common electrode located on the side of the second sub-fan-shaped trace group away from the display area, and a plurality of first photosensitive leads connected to the first photosensitive structure;

[0014] The first photosensitive lead connected to the first sub-photosensitive structure includes: a first photosensitive trace portion; the first photosensitive trace portion is located on the side of the first sub-photosensitive structure away from the display area and extends along the second direction;

[0015] The first common electrode includes a first sub-common electrode and a second sub-common electrode distributed along the first direction; the first sub-common electrode and the second sub-common electrode are respectively located on different sides of the first photosensitive trace portion.

[0016] In one possible implementation, the first photosensitive lead includes: a first sub-photosensitive lead, a second sub-photosensitive lead, and a third sub-photosensitive lead;

[0017] The second photosensitive lead, the third photosensitive lead, the first sub-lead, and the data line are all on the same layer and made of the same material; the first sub-photosensitive lead, the second sub-lead, the first common electrode, and the gate line are all on the same layer and made of the same material.

[0018] In one possible implementation, the display substrate further includes: a plurality of floating pixel electrodes located in the first peripheral region and arranged along the first direction; the length of the floating pixel electrodes in the second direction is one-quarter to three-quarters of the length of the pixel electrodes in the second direction;

[0019] The plurality of second heating traces include: a plurality of first sub-heating traces; the plurality of first sub-heating traces extend along the first direction and are arranged sequentially along the second direction, and the plurality of first sub-heating traces are located on the side of the first sub-photosensitive structure away from the display area; the line width of the first sub-heating traces is greater than the line width of the first heating traces.

[0020] In one possible implementation, the display substrate further includes: a plurality of second sector-shaped trace groups; the plurality of second sector-shaped trace groups are located in the second peripheral area; the second sector-shaped trace group includes: a plurality of second leads; the second leads are connected to one end of the gate line;

[0021] The first photosensitive structure further includes a second sub-photosensitive structure; the second sub-photosensitive structure is located in the second peripheral area and in the gap between two adjacent second fan-shaped trace groups.

[0022] In one possible implementation, the plurality of second heating traces includes: a plurality of second sub-heating traces; the plurality of second sub-heating traces are located in the second peripheral area, extend along the second direction and are arranged sequentially along the first direction; the line width of the second sub-heating traces is greater than the line width of the first heating traces;

[0023] The second sub-photosensitive structure is located in at least a portion of the orthographic projection of the substrate, within the gap between two adjacent second sub-heating traces in the orthographic projection of the substrate.

[0024] In one possible implementation, the display substrate further includes: a plurality of third sector-shaped trace groups; the plurality of third sector-shaped trace groups are located in the third peripheral area; the third sector-shaped trace groups include: a plurality of third leads; the third leads are connected to the other end of the gate line;

[0025] The first photosensitive structure includes a third sub-photosensitive structure; the third sub-photosensitive structure is located in the third peripheral area and in the gap between two adjacent third fan-shaped trace groups.

[0026] In one possible implementation, the plurality of second heating traces includes: a plurality of third sub-heating traces; the plurality of third sub-heating traces are located in the third peripheral area, extend along the second direction and are arranged sequentially along the first direction; the line width of the third sub-heating traces is greater than the line width of the first heating traces;

[0027] At least a portion of the third sub-photosensitive structure is located within the orthographic projection of the substrate, and the gap between two adjacent third sub-heating traces is located within the orthographic projection of the substrate.

[0028] In one possible implementation, the display substrate further includes: a plurality of fourth sector-shaped trace groups; the plurality of fourth sector-shaped trace groups are located in the fourth peripheral area; the fourth sector-shaped trace group includes: a plurality of fourth leads; one end of the fourth lead is connected to one end of the first heating trace;

[0029] The first light-sensing structure includes a fourth sub-light-sensing structure; the fourth sub-light-sensing structure is located in the fourth peripheral area and on the side of the fourth fan-shaped wiring group facing the display area.

[0030] In one possible implementation, the display substrate further includes: a plurality of fourth bonding groups located in the fourth peripheral region; the fourth bonding group includes: a plurality of fourth bonding terminals arranged along the first direction; the other end of the fourth lead is electrically connected to the fourth bonding terminal;

[0031] The plurality of second heating traces also include: auxiliary heating traces; the auxiliary heating traces are located between two adjacent fourth sector trace groups.

[0032] In one possible implementation, the fourth bonding group further includes: a fifth bonding terminal; the auxiliary heating trace includes: a first auxiliary heating trace; one end of the first auxiliary heating trace is electrically connected to the fifth bonding terminal in one of the fourth bonding groups, and the other end is electrically connected to the fifth bonding terminal in another of the fourth bonding groups;

[0033] The first auxiliary heating trace includes: a plurality of first winding units arranged along the first direction and interconnected with each other; the first winding unit includes: two first winding portions extending along the second direction, and a first connecting portion connecting the two first winding portions away from the end of the display area;

[0034] In the first auxiliary heating wiring, the extension lines of the first connecting portions of each of the first winding units coincide; and in the direction from the middle region of two adjacent fourth sector wiring groups to one of the fourth sector wiring groups, the length of each of the first winding units in the second direction gradually decreases.

[0035] In one possible implementation, the display substrate further includes: a first axis extending along the second direction and passing through the gap between adjacent fourth bonding groups; the fourth bonding group further includes: a fifth bonding terminal and a sixth bonding terminal;

[0036] The auxiliary heating trace includes a second auxiliary heating trace and a third auxiliary heating trace; the second auxiliary heating trace is located in the region between the first axis and one of the fourth bonding groups, and the third auxiliary heating trace is located in the region between the first axis and another of the fourth bonding groups; one end of the second auxiliary heating trace is electrically connected to the fifth bonding terminal in one of the fourth bonding groups, and the other end is electrically connected to the sixth bonding terminal in the same fourth bonding group; one end of the third auxiliary heating trace is electrically connected to the fifth bonding terminal in another of the fourth bonding groups, and the other end of the third auxiliary heating trace is electrically connected to the sixth bonding terminal in the same fourth bonding group.

[0037] In one possible implementation, the second auxiliary heating wire and the third auxiliary heating wire each include: a plurality of second winding units arranged and interconnected along the first direction, and a plurality of third winding units arranged and interconnected along the first direction.

[0038] The second winding unit includes: two second winding portions extending along the second direction, and a second connecting portion connecting the two third winding portions away from the end of the display area; the third winding unit includes: two third winding portions extending along the second direction, and a third connecting portion connecting the two third winding portions away from the end of the display area; the second winding unit is located on the side of the third winding unit away from the display area, and the two are nested together;

[0039] In the second auxiliary heating wiring and the third auxiliary heating wiring, the extension lines of the second connecting portion of each second winding unit coincide, and the extension lines of the third connecting portion of each third winding unit coincide; and in the direction from the first axis to the fourth fan-shaped wiring group, the length of each second winding unit in the second direction gradually decreases, and the length of each third winding unit in the second direction gradually decreases.

[0040] In one possible implementation, the display substrate includes: a plurality of pixel electrode columns extending along the second direction and arranged along the first direction, and a plurality of first heating trace groups arranged along the first direction; the pixel electrode columns include: a plurality of pixel electrodes arranged along the second direction; the first heating trace groups include: a plurality of first heating traces;

[0041] The first heating trace is projected onto the substrate at the point where the gap between two adjacent pixel electrode columns is projected onto the substrate; in the same group of first heating traces, the ends of each first heating trace near the first peripheral region are electrically connected, and the ends of some adjacent first heating traces near the fourth peripheral region are electrically connected.

[0042] In one possible implementation, the display substrate further includes: a second light-sensitive structure;

[0043] The first photosensitive structure includes: a plurality of first transistors; each first transistor includes: a first control electrode, a first source electrode, and a first drain electrode; the first control electrodes of the plurality of first transistors are interconnected, the first sources of the plurality of first transistors are interconnected, and the first drain electrodes of the plurality of first transistors are interconnected.

[0044] The second photosensitive structure includes: a plurality of second transistors; each second transistor includes: a second control electrode, a second source electrode, and a second drain electrode; the second control electrodes of the plurality of second transistors are interconnected, the second sources of the plurality of second transistors are interconnected, and the second drain electrodes of the plurality of second transistors are interconnected.

[0045] In one possible implementation, the data line is located on the side of the gate line opposite to the substrate; the pixel electrode is located on the side of the data line opposite to the gate line;

[0046] The first control electrode, the second control electrode, and the gate line are in the same layer and made of the same material; the first source electrode, the first drain electrode, the second source electrode, the second drain electrode, and the data line are in the same layer and made of the same material; the heating structure is located between the data line and the layer containing the pixel electrode.

[0047] This disclosure also provides a display panel, which includes the display substrate as described in this disclosure.

[0048] In one possible implementation, the display panel includes a plurality of heating circuits and a plurality of fourth bonding terminal pairs; each fourth bonding terminal pair includes two adjacent fourth bonding terminals; one end of each heating circuit is electrically connected to one of the fourth bonding terminals of the fourth bonding terminal pair, and the other end of the heating circuit is electrically connected to the other fourth bonding terminal of the fourth bonding terminal pair; the heating circuit includes at least two first heating traces;

[0049] At least a portion of the heating circuit is electrically connected.

[0050] In one possible implementation, the display panel further includes a third transistor connected to at least a portion of the heating circuit, and M first connection lines;

[0051] The third transistor includes a third control electrode, a third source electrode, and a third drain electrode; the third source electrode and the third drain electrode of the third transistor are connected in the heating circuit; the third control electrode of the third transistor in every M heating circuits is connected to a first connection line, and the third control electrode of the third transistor in adjacent heating circuits is sequentially connected to different first connection lines.

[0052] In one possible implementation, the display panel further includes: a first flexible circuit board; the first flexible circuit board includes: M second connecting lines and a third connecting line;

[0053] In every M intervals of the fourth bonding terminal pairs connected to the heating circuits, one of the fourth bonding terminals is connected to a second connecting line, and the fourth bonding terminals of adjacent heating circuits are connected to different second connecting lines; the other fourth bonding terminal in each of the fourth bonding terminal pairs connected to the heating circuits is connected to a third connecting line.

[0054] In one possible implementation, the display panel further includes: a first flexible circuit board; the first flexible circuit board includes: a fourth connecting line, a fifth connecting line, a sixth connecting line, a plurality of first control components, and a plurality of second control components; the first control component and the second control component each include: a first end and a second end;

[0055] In each of the fourth bonding terminal pairs, one of the fourth bonding terminals is connected to the fourth connecting line;

[0056] In each of the fourth bonding terminal pairs, the other fourth bonding terminal is alternately connected to the first end of the first control component and the first end of the second control component;

[0057] The second end of each of the first control components is connected to the fifth connection line, and the second end of each of the second control components is connected to the sixth connection line.

[0058] In one possible implementation, both the first control component and the second control component include: a first resistor, a first trace, and a first switch;

[0059] One end of the first resistor and one end of the first trace are both electrically connected to the first end;

[0060] One end of the first switch in the first control component is electrically connected to the fifth connecting line;

[0061] One end of the first switch in the second control component is electrically connected to the sixth connecting line.

[0062] In one possible implementation, the display panel further includes: a counter substrate disposed with the display substrate; the display substrate has a second photosensitive structure; the counter substrate includes: a black matrix layer; the black matrix layer includes: a blocking portion, and a plurality of first openings;

[0063] The orthographic projection of the first opening on the substrate overlaps with the orthographic projection of the first photosensitive structure on the substrate; the orthographic projection of the blocking portion on the substrate covers the orthographic projection of the second photosensitive structure on the substrate.

[0064] In one possible implementation, the second light-sensitive structure is located on the side of the first light-sensitive structure away from the display area; the first opening is strip-shaped.

[0065] In one possible implementation, the second photosensitive structure and the first photosensitive structure are arranged along the first direction; the first opening includes a plurality of sub-openings.

[0066] In one possible implementation, the display panel further includes: a cover plate located on the side of the opposing substrate away from the display substrate; the cover plate having ink on the side facing the opposing substrate; the ink having a second opening, and the first photosensitive structure being located in the second opening.

[0067] This disclosure also provides a display device, which includes a display panel as provided in this disclosure. Attached Figure Description

[0068] Figure 1 is a schematic diagram of a display substrate provided in an embodiment of this disclosure;

[0069] Figure 2A is a schematic diagram of the display substrate with the heating structure set;

[0070] Figure 2B is a schematic diagram of the display substrate without a heating structure;

[0071] Figure 2C is a schematic diagram of a single layer of the heating structure;

[0072] Figure 2D is a schematic diagram of the display panel when the black matrix layer is set;

[0073] Figure 2E is a schematic diagram of a single film layer of the black matrix layer;

[0074] Figure 2F is a schematic diagram showing the specific connection between the first light-sensing structure and the second light-sensing structure;

[0075] Figure 3A is a schematic diagram of the display substrate with the heating structure set;

[0076] Figure 3B is a schematic diagram of the display substrate without a heating structure;

[0077] Figure 3C is a schematic diagram of a single layer of the heating structure;

[0078] Figure 3D is a schematic diagram of the display panel when the black matrix layer is set;

[0079] Figure 3E is a schematic diagram of a single film layer of the black matrix layer;

[0080] Figure 4 is an enlarged view of Figure 1 at point C3 within the dashed frame;

[0081] Figure 5A is a schematic diagram of the display substrate with the heating structure set;

[0082] Figure 5B is a schematic diagram of a single layer of the heating structure;

[0083] Figure 5C is a schematic diagram of the display panel when the black matrix layer is set;

[0084] Figure 5D is a schematic diagram of a single film layer of the black matrix layer;

[0085] Figure 6A is one of the schematic diagrams of the area between the two fourth sector routing groups;

[0086] Figure 6B is an enlarged view of Figure 6A at point C5 (dashed box);

[0087] Figure 7A is a second schematic diagram of the area between the two fourth sector wiring groups;

[0088] Figure 7B is an enlarged view of Figure 7A at point C6 (dashed box);

[0089] Figure 8A is a schematic diagram of a heating circuit provided in an embodiment of this disclosure;

[0090] Figure 8B is a second schematic diagram of the heating circuit provided in an embodiment of this disclosure;

[0091] Figure 8C is a third schematic diagram of the heating circuit provided in an embodiment of this disclosure;

[0092] Figure 9 is a cross-sectional schematic diagram of the display panel provided in an embodiment of this disclosure;

[0093] Figure 10 is one of the schematic diagrams of the manufacturing process of the display substrate provided in the embodiments of this disclosure. Detailed Implementation

[0094] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0095] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper,” “lower,” “left,” and “right” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0096] As used herein, “approximately” or “substantially the same” includes the stated value and means within an acceptable range of deviations from the specific value, as determined by a person skilled in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., limitations of the measurement system). For example, “substantially the same” may mean a difference relative to the stated value within one or more standard deviations, or within ±30%, 20%, 10%, or 5%.

[0097] In the accompanying drawings, the thicknesses of layers, films, panels, regions, etc., are enlarged for clarity. Exemplary embodiments are described herein with reference to cross-sectional views that are schematic diagrams of idealized embodiments. Thus, deviations from the shapes shown in the drawings will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the regions shown herein, but rather include deviations in shape caused, for example, by manufacturing processes. For example, regions illustrated or described as flat may typically have rough and / or non-linear characteristics. Furthermore, sharp corners illustrated may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions, nor are they intended to limit the scope of the claims.

[0098] To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.

[0099] In low-temperature environments, the viscosity of liquid crystal is high, and the display screen needs an internal heating function to increase the liquid crystal temperature in order to display normally. Therefore, the power consumption will increase, especially for large screens with large areas. To ensure that the liquid crystal can work normally, even more power consumption is required. Excessive power consumption requires frequent charging, which will reduce the user experience.

[0100] In view of this, referring to Figure 1, this disclosure provides a display substrate having a display area AA and a peripheral area BB located around the display area AA; wherein, the display substrate includes:

[0101] Substrate 1;

[0102] The heating structure J is located on one side of the substrate 1 and includes: multiple first heating lines J1 and multiple second heating lines J2; the multiple first heating lines J1 are located in the display area AA, and the multiple second heating lines J2 are located in the peripheral area BB.

[0103] The first photosensitive structure S1 is located in the peripheral region BB. At least a portion of the first photosensitive structure S1 in the orthographic projection of the substrate 1 does not overlap with the orthographic projection of the second heating trace J2 in the substrate.

[0104] In this embodiment, the display substrate has multiple first heating traces J1 in the display area AA and multiple second heating traces J2 in the peripheral area BB. This enables heating of the display substrate and improves the problem of abnormal display due to liquid crystal viscosity at low temperatures. Furthermore, the display substrate also has a first light-sensing structure S1 in the peripheral area BB, which can detect ambient light and automatically adjust the brightness of the display product according to the ambient light, providing users with the best visual effect. In addition, the integration of the first light-sensing structure S1 and the heating structure J allows the display panel to display normally at low temperatures while also achieving low power consumption. This improves the problem that the display panel would have increased power consumption due to the heating structure J, requiring frequent charging and resulting in a poor user experience.

[0105] In one possible implementation, as shown in FIG10, a gate line layer (which may include multiple gate lines 2 extending along a first direction), a gate insulating layer, an active layer, a data line layer (which may include multiple data lines 3 extending along a second direction), a first passivation layer, a heating structure layer (which may include a heating structure J), ​​a second passivation layer, a common electrode layer (which may be a transparent conductive layer), a third passivation layer, and a pixel electrode layer (which may include multiple pixel electrodes 4 and multiple auxiliary pixel electrodes 40) can be sequentially formed on the substrate 1. The above is only one film layer stacking structure of the display substrate provided in the embodiments of this disclosure. In specific implementations, the display substrate may also be stacked in other ways, and the embodiments of this disclosure are not limited here.

[0106] In one possible implementation, referring to Figures 1 and 2A-2E, where Figures 2A-2E are schematic diagrams of a single layer or stacked layers at the dashed box C1 in Figure 1, Figure 2A is a schematic diagram of a display substrate with a heating structure, Figure 2B is a schematic diagram of a display substrate without a heating structure, Figure 2C is a schematic diagram of a single layer with a heating structure, Figure 2D is a schematic diagram of a display panel with a black matrix layer, and Figure 2E is a schematic diagram of a single film layer of the black matrix layer. The peripheral area BB includes: a first peripheral area BB1, a second peripheral area BB2, a third peripheral area BB3, and a fourth peripheral area BB4; the first peripheral area BB1 and the fourth peripheral area BB4 are arranged opposite to each other, and the second peripheral area BB2 and the third peripheral area BB3 connect the first peripheral area BB1 and the fourth peripheral area BB4; for example, referring to Figure 1, the second peripheral area BB2 connects the left end of the first peripheral area BB1 and the left end of the fourth peripheral area BB4; the third peripheral area BB3 connects the right end of the first peripheral area BB1 and the right end of the fourth peripheral area BB4.

[0107] As shown in Figure 2A, the first photosensitive structure S1 includes: a first sub-photosensitive structure S11; the first sub-photosensitive structure S11 is located in the first peripheral region BB1;

[0108] The display substrate also has a second light-sensing structure S2, which may include a first sub-control light-sensing structure S21 located on the side of the first sub-light-sensing structure S11 away from the display area AA.

[0109] When the display substrate is applied to a display panel, the display panel may include: a counter substrate disposed with the display substrate; the counter substrate includes: a black matrix layer; as shown in Figures 2D and 2E, the black matrix layer may include: a blocking portion BM1, and a plurality of first openings BMK; the orthographic projection of the first openings BMK on the substrate overlaps with the orthographic projection of the first photosensitive structure S1 (e.g., the first sub-photosensitive structure S11) on the substrate, that is, the first sub-photosensitive structure S11 can be disposed at the first openings BMK to achieve effective detection of external light; the orthographic projection of the blocking portion BM1 on the substrate covers the orthographic projection of the second photosensitive structure S2 (e.g., the first sub-reference photosensitive structure S21) on the substrate, that is, the first sub-reference photosensitive structure S12 is blocked from light, so that the first sub-photosensitive structure S11 is used for detection and the first sub-reference photosensitive structure S12 is used as a reference, eliminating the leakage current caused by other factors from being miscalculated as optical leakage current and affecting the detection accuracy.

[0110] In one possible implementation, referring to FIG2F, the first photosensitive structure S1 (e.g., the first sub-photosensitive structure S11) includes: a plurality of first transistors T1; the plurality of first transistors T1 are connected in series; the first transistor T1 includes: a first control electrode T1A, a first source electrode T1B, and a first drain electrode T1C; the first control electrodes T1A of the plurality of first transistors T1 are connected to each other, the first sources T1B of the plurality of first transistors T1 are connected to each other, and the first drain electrodes T1C of the plurality of first transistors T1 are connected to each other.

[0111] The second photosensitive structure S2 (e.g., the first sub-control photosensitive structure S21) includes: a plurality of second transistors T2; the second transistors T2 include: a second control electrode T2A, a second source electrode T2B, and a second drain electrode T2C; the second control electrodes T2A of the plurality of second transistors T2 are interconnected, the second sources T2B of the plurality of second transistors T2 are interconnected, and the second drain electrodes T2C of the plurality of second transistors T2 are interconnected.

[0112] In this embodiment of the present disclosure, both the first photosensitive structure S1 and the second photosensitive structure S2 include multiple transistors connected in series, which can improve the detection sensitivity of the first photosensitive structure S1 and the second photosensitive structure S2 to external light and avoid the problems of low detection current of a single transistor, susceptibility to interference signals, and low detection accuracy.

[0113] In one possible implementation, the first sub-photosensitive structure S11 may include 80-120 first transistors connected in series; the first sub-control photosensitive structure S21 may include 80-120 second transistors connected in series.

[0114] In one possible implementation, the data line 3 is located on the side of the gate line 2 away from the substrate 1; the pixel electrode 4 is located on the side of the data line 3 away from the gate line 2; the first control electrode T1A, the second control electrode T2A, and the gate line 2 are in the same layer and made of the same material; the first source electrode T1B, the first drain electrode T1C, the second source electrode T2B, the second drain electrode T2C, and the data line 3 are in the same layer and made of the same material; the heating structure J is located between the layers where the data line 3 and the pixel electrode 4 are located. In this embodiment, the first control electrode T1A of the first photosensitive structure S1 and the second control electrode T2A of the second photosensitive structure S2 can be formed simultaneously with the formation of the gate line 2; the first source electrode T1B and the first drain electrode T1C of the first photosensitive structure S1, and the second source electrode T2B and the second drain electrode T2C of the second photosensitive structure S2 can be formed simultaneously with the formation of the data line 3. This simplifies the manufacturing process of the display substrate and reduces the manufacturing cost of the display substrate while enabling the detection of ambient light.

[0115] In one possible implementation, as shown in FIG2A, the display substrate further includes: a plurality of first sector-shaped trace groups F1; wherein the plurality of first sector-shaped trace groups F1 are located in a first peripheral area BB1; the first sector-shaped trace group F1 includes: a plurality of first leads F10; the first leads F10 are electrically connected to one end of the data line 3; and the first sub-photosensitive structure S11 is located in the gap between two adjacent first sector-shaped trace groups F1.

[0116] In this embodiment of the present disclosure, a first sub-light-sensing structure S11 can be provided in the first peripheral area BB1 of the display substrate, which can detect the ambient light at the location of the first peripheral area BB1. Moreover, the first sub-light-sensing structure S11 is located in the gap between two adjacent first fan-shaped trace groups F1, which can avoid the multiple first leads F10 of the first fan-shaped trace group F1 from blocking the external ambient light, so that the first sub-light-sensing structure S11 can effectively detect the ambient light at the location of the first peripheral area BB1.

[0117] In one possible implementation, referring to FIG2B, the first sector-shaped trace group F1 includes: a first sub-sector-shaped trace group F11 and a second sub-sector-shaped trace group F12; the second sub-sector-shaped trace group F12 is located on the side of the first sub-sector-shaped trace group F11 away from the display area AA; the first sub-sector-shaped trace group F11 includes: multiple first sub-leads F110; the second sub-sector-shaped trace group F12 includes: multiple second sub-leads F120;

[0118] The display substrate also includes: a plurality of first anti-static structures ESD1 and a plurality of first bonding groups DP; the first anti-static structures ESD1 are located between the first sub-fan-shaped trace group F11 and the second sub-fan-shaped trace group F12, and the first bonding groups DP are located on the side of the second sub-fan-shaped trace group F21 away from the first sub-fan-shaped trace group F11; the first anti-static structures ESD1 include: a plurality of first anti-static units ESD10 arranged along the first direction X; as shown in FIG1, the first bonding groups DP include: a plurality of first bonding terminals DP0 arranged along the first direction X;

[0119] One end of the first sub-lead F110 is connected to the data line 2, and the other end is electrically connected to one end of the first anti-static unit ESD10; one end of the second sub-lead F120 is electrically connected to the other end of the first anti-static unit ESD10, and the other end of the second sub-lead F120 is electrically connected to the first bonding terminal DP0.

[0120] The first sub-fan-shaped trace group F11 includes: a first outer edge e1 extending along the first direction X and away from the display area AA (the area above the dotted line in Figure 2B is the display area) (that is, the lower edge of the first sub-fan-shaped trace group F11); the second sub-fan-shaped trace group F12 includes: a second outer edge e2 extending along the first direction X and close to the display area AA (that is, the upper edge of the second sub-fan-shaped trace group F12); the first sub-light-sensing structure S11 is located in the area between the extension line of the first outer edge e1 and the extension line of the second outer edge e2.

[0121] In this embodiment of the present disclosure, the first sector-shaped trace group F1 includes: a first sub-sector-shaped trace group F11 and a second sub-sector-shaped trace group F12. That is, the first sector-shaped trace group F1 is divided into a first sub-sector-shaped trace group F11 and a second sub-sector-shaped trace group F12 along the second direction Y, so that there is more space between the two first sector-shaped trace groups F1 in the first direction X, so as to facilitate the setting of the first sub-photosensitive structure S11.

[0122] In one possible implementation, as shown in FIG2B, the display substrate further includes: a first common electrode 5 located on the side of the second sub-fan-shaped wiring group F12 away from the display area AA, and a plurality of first photosensitive leads 6 connected to the first sub-photosensitive structure S11.

[0123] The first light-sensing lead 6 connected to the first sub-light-sensing structure S11 includes: a first light-sensing trace 61; the first light-sensing trace 61 is located on the side of the first sub-light-sensing structure S1 away from the display area AA and extends along the second direction Y; specifically, the portion of the first light-sensing lead 6 that extends along the second direction Y can be used as the first light-sensing trace 61.

[0124] The first common electrode 5 includes a first sub-common electrode 51 and a second sub-common electrode 52 distributed along the first direction X; the first sub-common electrode 51 and the second sub-common electrode 52 are located on different sides of the first sub-photosensitive trace portion 61.

[0125] In this embodiment of the present disclosure, the first common electrode 5 includes a first sub-common electrode 51 and a second sub-common electrode 52 distributed along the first direction X. The first sub-common electrode 51 and the second sub-common electrode 52 are located on different sides of the first sub-photosensitive wiring portion 61, that is, the first common electrode 5 is divided into a first sub-common electrode 51 and a second sub-common electrode 52. In this way, the first photosensitive wiring portion 61 can run wiring from the middle of the first sub-common electrode 51 and the second sub-common electrode 52, and then connect to the bonding terminal of the first peripheral area BB1. This avoids the problem of increased signal line resistance caused by using other electrodes (e.g., electrodes of the common electrode layer or pixel electrode layer) for jumper connection when the first photosensitive lead 6 needs to cross the first common electrode 5, and prevents signal distortion during transmission.

[0126] In one possible implementation, as shown in FIG2B, the first sub-common electrode 51 and the second sub-common electrode 52 can be a mesh structure, and each can have multiple common openings 50.

[0127] In one possible implementation, as shown in FIG2B, the first photosensitive lead 6 includes: a first sub-photosensitive lead G1, a second sub-photosensitive lead S1, and a third sub-photosensitive lead D1; wherein, as shown in FIG2F, the first sub-photosensitive lead G1 can be connected to the first control electrode T1A of the first transistor T1, the second sub-photosensitive lead S1 can be connected to the first source electrode T1B of the first transistor T1, and the third sub-photosensitive lead D1 can be connected to the first drain electrode T1C of the first transistor T1;

[0128] The second sub-photosensitive lead S1, the third sub-photosensitive lead D1, the first sub-lead F110 and the data line 3 are in the same layer and made of the same material; the first sub-photosensitive lead G1, the second sub-lead F120, the first common electrode 5 and the gate line 2 are in the same layer and made of the same material.

[0129] In one possible implementation, as shown in FIG2B, the first photosensitive lead 6 may further include: a fourth sub-photosensitive lead G2, a fifth sub-photosensitive lead S2, and a sixth sub-photosensitive lead D2; wherein, as shown in FIG2F, the fourth sub-photosensitive lead G2 may be connected to the first control electrode T2A of the second transistor T2, the fifth sub-photosensitive lead S2 may be connected to the first source electrode T2B of the second transistor T2, and the sixth sub-photosensitive lead D2 may be connected to the first drain electrode T2C of the second transistor T2; the fourth sub-photosensitive lead G2 is in the same layer and made of the same material as the first sub-photosensitive lead G1; the fifth sub-photosensitive lead S2 and the sixth sub-photosensitive lead D2 are in the same layer and made of the same material as the second sub-photosensitive lead S1.

[0130] In one possible implementation, as shown in Figure 2B, the first sub-control light-sensing structure S21 is located on the side of the first sub-control light-sensing structure S11 away from the display area AA, and the two are distributed in two rows with their ends aligned; the first light-sensing leads 6 (such as the first sub-light-sensing lead G1, the second sub-light-sensing lead S1, and the third sub-light-sensing lead D1) connected to the first sub-control light-sensing structure S11 can be led out from one end of the first fan-shaped wiring group F1 near one side (such as the left side) of the first sub-control light-sensing structure S11, and connected to the first sub-control light-sensing structure S11. The first photosensitive lead 6 (such as the fourth sub-photosensitive lead G2, the fifth sub-photosensitive lead S2, and the sixth sub-photosensitive lead D2) connected to the photosensitive structure S21 can be led out from one end of the first fan-shaped trace group F1 near the other side (such as the right side) of the first sub-reference photosensitive structure S21. The two are distributed in a roughly symmetrical manner to avoid the problem of increased resistance of the first photosensitive lead 6 due to winding if all the first photosensitive leads 6 are set on the same side of the first sub-photosensitive structure S11 (or the first sub-reference photosensitive structure S21).

[0131] In one possible implementation, as shown in FIG2B, the display substrate further includes: a plurality of floating pixel electrodes 40 located in the first peripheral region BB1 and arranged along the first direction X; the length d2 of the floating pixel electrodes 40 in the second direction Y is one-quarter to three-quarters of the length d1 of the pixel electrode 4 in the second direction Y; optionally, the length d2 of the floating pixel electrodes 40 in the second direction Y is one-half of the length d1 of the pixel electrode 4 in the second direction Y. In this embodiment of the present disclosure, by compressing the length d2 of the floating pixel electrodes 40 in the second direction Y, more space is provided for the setting of the first sub-photosensitive structure S11 in the second direction Y, thereby enabling the first sub-photosensitive structure S11 to be placed within the second opening VA (the second opening VA can be the opening area of ​​the ink on the cover plate).

[0132] In one possible implementation, as shown in Figures 2A and 2C, the plurality of second heating traces J2 include: a plurality of first sub-heating traces J21; the plurality of first sub-heating traces J21 extend along a first direction X and are arranged sequentially along a second direction Y, and the plurality of first sub-heating traces J21 are located on the side of the first sub-photosensitive structure S11 away from the display area AA; the line width j21 of the first sub-heating traces J21 is greater than the line width j1 of the first heating traces J1.

[0133] In this embodiment, multiple first sub-heating traces J21 are located on the side of the first sub-photosensitive structure S11 away from the display area AA, so as to avoid the first sub-photosensitive structure S11 and achieve unobstructed view of the first sub-photosensitive structure S11. Moreover, since the peripheral area BB dissipates heat faster, when the peripheral area BB is at a lower temperature, the area of ​​the display area AA near the peripheral area BB is more prone to display defects due to liquid crystal viscosity. By setting the line width j21 of the first sub-heating trace J21 to be greater than the line width j1 of the first heating trace J1, the heat of the peripheral area BB (first peripheral area BB1) can be increased faster, thus improving the problem that the area of ​​the display area AA near the peripheral area BB is more prone to display defects when the temperature is low.

[0134] In one possible implementation, as shown in Figures 2A and 2B, multiple first sub-heating traces J21 are located on the side of the first sub-reference photosensitive structure S21 away from the display area AA. This allows the multiple first sub-heating traces J21 to avoid the first sub-reference photosensitive structure S21, achieving unobstructed view of the first sub-reference photosensitive structure S21. Furthermore, the first sub-reference photosensitive structure S21 and the first sub-photosensitive structure S11 have substantially the same peripheral structure on the display substrate side, except for differences in their corresponding configurations in the black matrix layer, thereby improving detection accuracy.

[0135] In one possible implementation, referring to Figures 1 and 3A-3E, Figures 3A-3E are schematic diagrams of a single layer or stacked layer at the dashed frame C2 in Figure 1, Figure 3A is a schematic diagram of the display substrate with a heating structure, Figure 3B is a schematic diagram of the display substrate without a heating structure, Figure 3C is a schematic diagram of a single layer with a heating structure, Figure 3D is a schematic diagram of the display panel with a black matrix layer, and Figure 3E is a schematic diagram of a single film layer of the black matrix layer. Referring to Figure 1, the display substrate further includes: a plurality of second fan-shaped wiring groups F2; ​​the plurality of second fan-shaped wiring groups F2 are located in the second peripheral area B2; referring to Figures 3A and 3B, the second fan-shaped wiring group F2 includes: a plurality of second leads F20; the second leads F20 are connected to one end of the gate line 2; the first photosensitive structure S1 further includes: a second sub-photosensitive structure S12; the second sub-photosensitive structure S12 is located in the second peripheral area BB2 and is located in the gap between two adjacent second fan-shaped wiring groups F2.

[0136] In this embodiment of the present disclosure, a second sub-light-sensing structure S12 can be provided in the second peripheral area BB2 of the display substrate, which can realize the detection of ambient light at the location of the second peripheral area BB2. Moreover, the second sub-light-sensing structure S12 is located in the gap between two adjacent second fan-shaped trace groups F2, which can avoid the multiple second leads F20 of the second fan-shaped trace group F2 from blocking the external ambient light, so that the second sub-light-sensing structure S12 can effectively detect the ambient light at the location of the second peripheral area BB2.

[0137] In one possible implementation, as shown in FIG3B, the second photosensitive structure S2 may include: a second sub-reference photosensitive structure S22 located on the side of the second sub-photosensitive structure S12 away from the display area AA; when the display substrate is applied to the display panel, as shown in FIG3D and FIG3E, the orthographic projection of the first opening BMK on the substrate overlaps with the orthographic projection of the first photosensitive structure S1 (e.g., the second sub-photosensitive structure S12) on the substrate, that is, the second sub-photosensitive structure S12 can be disposed at the first opening BMK to achieve effective detection of external light; the orthographic projection of the blocking portion BM1 on the substrate covers the orthographic projection of the second photosensitive structure S2 (e.g., the second sub-reference photosensitive structure S22) on the substrate, that is, the first sub-reference photosensitive structure S12 is blocked from light so that the second sub-photosensitive structure S12 is used for detection and the second sub-reference photosensitive structure S22 is used as a reference, thereby eliminating the leakage current caused by other factors from being miscalculated as optical leakage current and affecting the detection accuracy.

[0138] In one possible implementation, as shown in FIG3B, the plurality of second heating traces J2 include: a plurality of second sub-heating traces J22; the plurality of second sub-heating traces J22 are located in the second peripheral region BB2 and extend along the second direction Y and are arranged sequentially along the first direction X; as shown in FIG3C, the linewidth j22 of the second sub-heating traces J22 is greater than the linewidth of the first heating trace j1; at least a portion of the second sub-photosensitive structure S12 projected onto the substrate 1 (e.g., it may be an active pattern in the second sub-photosensitive structure S12) is located within the orthographic projection of the substrate 1 in the gap between two adjacent second sub-heating traces J22; optionally, the entire second sub-photosensitive structure S12 projected onto the substrate 1 is located within the orthographic projection of the substrate 1 in the gap between two adjacent second sub-heating traces J22.

[0139] In this embodiment, at least a portion of the second sub-photosensitive structure S12 projected onto the substrate 1 is located within the gap between two adjacent second sub-heating traces J22, in order to avoid obstructing the first sub-photosensitive structure S11. Moreover, since the peripheral area BB dissipates heat faster, the area near the peripheral area BB in the display area AA is more prone to display defects due to liquid crystal viscosity when the temperature is low. By setting the linewidth j22 of the second sub-heating trace J22 to be greater than the linewidth of the first heating trace j1, the heat of the peripheral area BB (second peripheral area BB1) can be increased faster, thus improving the problem that the area near the peripheral area BB in the display area AA is more prone to display defects when the temperature is low.

[0140] In one possible implementation, referring to Figures 1 and 4, Figure 4 can be an enlarged schematic diagram of Figure 1 at the dashed frame C3. The display substrate further includes: a plurality of third sector-shaped trace groups F3; the plurality of third sector-shaped trace groups F3 are located in the third peripheral area BB3; the third sector-shaped trace group F3 includes: a plurality of third leads F30; the third leads F30 are connected to the other end of the gate line 2; the first photosensitive structure S1 includes: a third sub-photosensitive structure S12; the third sub-photosensitive structure S13 is located in the third peripheral area BB3 and is located in the gap between two adjacent third sector-shaped trace groups F3.

[0141] In this embodiment of the present disclosure, a third sub-light-sensing structure S13 can be provided in the third peripheral area BB3 of the display substrate, which can realize the detection of ambient light at the location of the third peripheral area BB3. Moreover, the third sub-light-sensing structure S13 is located in the gap between two adjacent third fan-shaped trace groups F3, which can avoid the multiple third leads F30 of the third fan-shaped trace group F3 from blocking the external ambient light, so that the third sub-light-sensing structure S13 can effectively detect the ambient light at the location of the third peripheral area BB3.

[0142] In one possible implementation, as shown in FIG4, the second photosensitive structure S2 may include: a third sub-reference photosensitive structure S23 located on the side of the third sub-photosensitive structure S13 away from the display area AA; when the display substrate is applied to the display panel, the orthographic projection of the first opening BMK on the substrate overlaps with the orthographic projection of the first photosensitive structure S1 (e.g., the third sub-reference photosensitive structure S13) on the substrate, that is, the third sub-reference photosensitive structure S13 can be disposed at the first opening BMK to achieve effective detection of external light; the orthographic projection of the blocking portion BM1 on the substrate covers the orthographic projection of the second photosensitive structure S2 (e.g., the third sub-reference photosensitive structure S23) on the substrate, that is, the third sub-reference photosensitive structure S13 is blocked from light so that the third sub-reference photosensitive structure S13 is used for detection and the third sub-reference photosensitive structure S23 is used as a reference, thereby eliminating the leakage current caused by other factors from being mistakenly calculated as optical leakage current and affecting the detection accuracy.

[0143] In one possible implementation, as shown in Figures 1 and 4, the plurality of second heating traces J2 include: a plurality of third sub-heating traces J23; the plurality of third sub-heating traces J23 are located in the third peripheral region BB3 and extend along the second direction Y and are arranged sequentially along the first direction X; at least a portion of the third sub-photosensitive structure S13 in the orthographic projection of the substrate 1 (e.g., it may be an active pattern in the third sub-photosensitive structure S13) is located in the gap between two adjacent third sub-heating traces J23 within the orthographic projection of the substrate 1.

[0144] In one possible implementation, referring to Figures 1 and 5A-5D, Figures 5A-5D are schematic diagrams of a single layer or stacked layers at the dashed frame C4 in Figure 1, Figure 5A is a schematic diagram of the display substrate with a heating structure, Figure 5B is a schematic diagram of a single layer of the heating structure, Figure 5C is a schematic diagram of the display panel with a black matrix layer, and Figure 5D is a schematic diagram of a single film layer of the black matrix layer. The display substrate further includes: multiple fourth fan-shaped wiring groups F4; the multiple fourth fan-shaped wiring groups F4 are located in the fourth peripheral area BB4; the fourth fan-shaped wiring group F4 includes: multiple fourth leads F40; one end of the fourth lead F40 is connected to one end of the first heating wiring J1; the first photosensitive structure S1 includes: a fourth sub-photosensitive structure S14; the fourth sub-photosensitive structure S14 is located in the fourth peripheral area BB4 and is located on the side of the fourth fan-shaped wiring group F4 facing the display area AA.

[0145] In this embodiment, a fourth sub-light-sensing structure S14 can be provided in the fourth peripheral area BB4 of the display substrate, which can detect the ambient light at the location of the fourth peripheral area BB4. Moreover, the fourth sub-light-sensing structure S14 is located in the gap between two adjacent fourth fan-shaped trace groups F4, which can avoid the multiple fourth leads F40 of the fourth fan-shaped trace group F4 from blocking the external ambient light, so that the fourth sub-light-sensing structure S14 can effectively detect the ambient light at the location of the fourth peripheral area BB4.

[0146] In one possible implementation, as shown in FIG5A, the second photosensitive structure S2 may include a fourth sub-reference photosensitive structure S24, which may be located in the same row as the fourth sub-reference photosensitive structure S14. When the display substrate is applied to the display panel, the orthogonal projection of the blocking portion BM1 onto the substrate covers the orthogonal projection of the second photosensitive structure S2 (e.g., the fourth sub-reference photosensitive structure S24) onto the substrate. That is, the fourth sub-reference photosensitive structure S24 is shielded from light so that the fourth sub-reference photosensitive structure S14 is used as a detector and the fourth sub-reference photosensitive structure S24 is used as a reference, thereby eliminating the leakage current caused by other factors from being mistakenly calculated as optical leakage current and affecting the detection accuracy.

[0147] In one possible implementation, as shown in Figures 5C and 5D, the first opening BMK can have multiple sub-openings BMK0, with a shielding portion BM1 between adjacent sub-openings BMK0. This is to prevent metallic reflection from occurring under strong light when the fourth sub-light-sensing structure S24 and the fourth sub-light-sensing structure S14 are designed in the same row. If a long strip of the first opening BMK is set at the position of the fourth sub-light-sensing structure S14, it will reduce the contrast and affect the product experience. Therefore, in order to reduce the impact of metallic reflection, the first opening BMK can have multiple sub-openings BMK0. That is, there is a gap between the two first transistors T1, and the position between the first transistors T1 is shielded by the shielding portion BM1. In this way, the grooves in the black matrix layer at this position are some intermittent small holes, which can reduce the metallic reflection effect and improve the product display effect.

[0148] In one possible implementation, as shown in Figures 2A, 2C, 5A, and 5B, the display substrate includes: a plurality of pixel electrode columns extending along the second direction Y and arranged along the first direction X, and a plurality of first heating trace groups JZ arranged along the first direction X. Figure 2C can be a schematic diagram of the first heating trace group JZ near the first peripheral region BB1, and Figure 5B can be a schematic diagram of the first heating trace group JZ near the fourth peripheral region BB4. The pixel electrode columns include: a plurality of pixel electrodes 4 arranged along the second direction Y. The first heating trace group JZ includes: a plurality of first heating traces J1. The orthographic projection of the first heating trace J1 onto the substrate 1 is located at the orthographic projection of the gap between a portion of two adjacent pixel electrode columns onto the substrate 1. Optionally, each pixel (a pixel may include three sub-pixels) may have one first heating trace J1. In the same first heating trace group JZ, the ends of each first heating trace J1 near the first peripheral region BB1 are electrically connected, and the ends of some adjacent first heating traces J1 near the fourth peripheral region BB4 are electrically connected.

[0149] In this embodiment of the disclosure, the display substrate has multiple first heating trace groups JZ. In the same first heating trace group JZ, the ends of each first heating trace J1 near the first peripheral area BB1 are electrically connected, and the ends of some adjacent first heating traces J1 near the fourth peripheral area BB4 are electrically connected. That is, by connecting some of the first heating traces J1 in parallel, the density of the first heating traces J1 can be reduced. Therefore, the spacing between the first heating traces J1 coming out of the display area AA is large, and the fourth sub-photosensitive structure S14 can be placed between the heating wire straight fan-out.

[0150] For large-size screens, due to bonding and other processes, the chip-on-flex (COF) film for heating is required to be segmented, meaning multiple COFs are bonded separately. This results in uneven heating temperatures between the COFs. In other words, in related technologies, the area between the two fourth sector groups F4 is not designed with heating wires. Since the edge area dissipates heat faster than the center area, the area between the two fourth sector groups F4 lacks heating wires to supplement the heat of this area. As a result, the temperature of the display area AA near this area rises lower than that inside the display area AA, leading to uneven temperature distribution in the display area AA and causing low-temperature display problems. In view of this, referring to Figures 6A, 6B, 7A, and 7B, where Figure 6B is an enlarged view of Figure 6A at the dashed box C5, and Figure 7B is an enlarged view of Figure 7A at the dashed box C6, the display substrate also includes: a plurality of fourth bonding groups RP located in the fourth peripheral area BB4; the fourth bonding group RP includes: a plurality of fourth bonding terminals R-P0 arranged along the first direction X; the other end of the fourth lead F40 is electrically connected to the fourth bonding terminal R-P0; the plurality of second heating traces J2 also include: auxiliary heating traces JF; the auxiliary heating traces JF are located between two adjacent fourth sector trace groups RP.

[0151] In this embodiment of the present disclosure, the multiple second heating traces J2 further include: auxiliary heating traces JF; the auxiliary heating traces JF are located between two adjacent fourth sector trace groups RP, which can heat the area between the two adjacent fourth sector trace groups RP, improve the phenomenon that the temperature rise of the display area AA near this area is lower than that inside the display area AA, resulting in uneven temperature of the display area AA and causing poor low-temperature display.

[0152] In one possible implementation, referring to Figures 6A and 6B, the fourth bonding group RP further includes: a fifth bonding terminal R-P1; the auxiliary heating trace JF includes: a first auxiliary heating trace J24; one end of the first auxiliary heating trace J24 is electrically connected to the fifth bonding terminal R-P1 of the RP in one fourth bonding group, and the other end is electrically connected to the fifth bonding terminal R-P1 of another fourth bonding group RP;

[0153] The first auxiliary heating wiring J24 includes: a plurality of first winding units D1 arranged along the first direction X and interconnected with each other; the first winding unit D1 includes: two first winding portions D11 extending along the second direction Y, and a first connecting portion D12 connecting the two first winding portions D11 away from the end of the display area AA.

[0154] In the first auxiliary heating wiring J24, the extension lines of the first connecting portions D12 of each first winding unit D1 coincide; and in the direction from the middle region of two adjacent fourth sector wiring groups F4 to a fourth sector wiring group F4 (as indicated by arrow E in Figure 6B), the length of each first winding unit D11 in the second direction Y gradually decreases. For example, in Figure 6B, the length g1 of the first winding unit D11 on the right in the second direction Y is less than the length g2 of the first winding unit D11 on the left in the second direction Y.

[0155] In this embodiment, the first auxiliary heating trace J24 includes: a plurality of first winding units D1; ​​each first winding unit D1 includes: the extension lines of the first connecting portion D12 of each first winding unit D1 coincide; and in the direction from the middle region of two adjacent fourth sector trace groups F4 to a fourth sector trace group F4, the length of each first winding unit D11 in the second direction Y gradually decreases, so that the first auxiliary heating trace J24 and the region between two adjacent fourth sector trace groups F4 can complement each other, thereby achieving effective heating of the region between the two fourth sector trace groups F4.

[0156] As shown in Figures 6A and 6B, an auxiliary heating wire (i.e., the first auxiliary heating wire J24) is designed between two adjacent fourth sector wiring groups F4. The positive and negative electrodes that input signals to the auxiliary heating wire come from the two fourth binding groups RP respectively, and the positive and negative electrodes can be exchanged.

[0157] In one possible implementation, as shown in Figures 7A and 7B, the display substrate further includes: a first axis k1 extending along the second direction Y and passing through the gap between adjacent fourth bonding groups RP; the fourth bonding group RP further includes: a fifth bonding terminal R-P2 and a sixth bonding terminal R-P3;

[0158] The auxiliary heating trace JF also includes: a second auxiliary heating trace J25 and a third auxiliary heating trace J26; the second auxiliary heating trace J25 is located in the area between the first axis k1 and a fourth binding group RP (the fourth binding group RP on the left in Figure 7A), and the third auxiliary heating trace J26 is located in the area between the first axis k1 and another fourth binding group RP (the fourth binding group RP on the right in Figure 7A); one end of the second auxiliary heating trace J25 is electrically connected to the fifth binding terminal R-P2 in the fourth binding group RP (the fourth binding group RP on the left in Figure 7A), and the other end is electrically connected to the sixth binding terminal R-P3 in the same fourth binding group RP (the fourth binding group RP on the left in Figure 7A); one end of the third auxiliary heating trace J26 is electrically connected to the fifth binding terminal R-P2 in another fourth binding group RP (the fourth binding group RP on the right in Figure 7A), and the other end of the third auxiliary heating trace J26 is electrically connected to the sixth binding terminal R-P3 in the same fourth binding group RP (the fourth binding group RP on the right in Figure 7A).

[0159] In the disclosed embodiments shown in Figures 7A and 7B, two sets of heating wires (second auxiliary heating wire J25 and third auxiliary heating wire J26) are arranged between two adjacent fourth sector wiring groups F4 for heating. The two terminals that input signals to the second auxiliary heating wire J25 are on the same fourth bonding terminal group RP (for example, the fourth bonding group RP on the left in Figure 7A), and are respectively positive and negative electrodes. The positive and negative electrodes (terminals of the third auxiliary heating wire J26) are on another fourth bonding terminal group RP (for example, the fourth bonding group RP on the right in Figure 7A). The second auxiliary heating wire J25 and the third auxiliary heating wire J26 are connected in parallel with the first heating wire J1 of each display area AA, and are driven by constant voltage.

[0160] In one possible implementation, as shown in FIG7B, the second auxiliary heating line J25 and the third auxiliary heating line J26 each include: a plurality of second winding units D2 arranged and interconnected along the first direction X, and a plurality of third winding units D3 arranged and interconnected along the first direction X.

[0161] The second winding unit D2 includes two second winding portions D21 extending along the second direction Y, and a second connecting portion D22 connecting the two third winding portions D21 at the ends away from the display area AA; the third winding unit D3 includes two third winding portions D31 extending along the second direction Y, and a third connecting portion D32 connecting the two third winding portions D31 at the ends away from the display area AA; the second winding unit D2 is located on the side of the third winding unit D3 away from the display area AA, and the two are nested together;

[0162] In the second auxiliary heating wiring J25 and the third auxiliary heating wiring J26, the extension lines e3 of the second connecting part D22 of each second winding unit D2 coincide, and the extension lines e4 of the third connecting part D32 of each third winding unit D3 coincide; and in the direction from the first axis k1 to the fourth sector wiring group F4 (as indicated by arrow E in Figure 7B), the length g3 of each second winding unit D2 in the second direction Y gradually decreases, and the length g4 of each third winding unit D3 in the second direction Y gradually decreases.

[0163] In this embodiment, both the second auxiliary heating trace J25 and the third auxiliary heating trace J26 include: multiple second winding units D2 arranged and interconnected along the first direction X, and multiple third winding units D3 arranged and interconnected along the first direction X; and in the direction from the first axis k1 to the fourth sector-shaped trace group F4, the length g3 of each second winding unit D2 in the second direction Y gradually decreases, and the length g4 of each third winding unit D3 in the second direction Y gradually decreases, so that the second auxiliary heating trace J25 and the third auxiliary heating trace J26 can complement the area between the two adjacent fourth sector-shaped trace groups F4, thereby achieving effective heating of the area between the two fourth sector-shaped trace groups F4.

[0164] Based on the same inventive concept, embodiments of this disclosure also provide a display panel, which includes a display substrate as provided in embodiments of this disclosure.

[0165] In related technologies, the required temperature rise for internal heating varies under different low-temperature environments. For example, at -40℃, a 30℃ temperature rise within 1 minute is needed to prevent video trailing; at -30℃, a 20℃ temperature rise within 1 minute is required for the same effect. The power consumption required to achieve the same effect in these two different environments differs. Commonly, power adjustment is achieved using pulse width modulation (PWM) circuits. PWM involves generating a square wave of a certain frequency and adjusting its duty cycle to adjust the power output. Changing the heating power during the heating process can also be achieved using PWM; adjusting the PWM pulse width or frequency to change the PWM period alters the output power. However, since PWM is an AC signal, it can interfere with the display substrate signal in the display area, causing horizontal lines, flickering, and other undesirable image quality. Using DC voltage avoids this problem, but the system terminal voltage is fixed and cannot be changed.

[0166] In view of this, referring to Figures 8A-8C, the display panel includes multiple heating circuits JO and multiple fourth bonding terminal pairs R-PO; each fourth bonding terminal pair R-PO includes two adjacent fourth bonding terminals R-P0; one end of the heating circuit JO is electrically connected to one of the fourth bonding terminals R-P0 of the fourth bonding terminal pair R-PO, and the other end of the heating circuit JO is electrically connected to the other fourth bonding terminal R-P0 of the fourth bonding terminal pair R-PO; the heating circuit JO includes: at least two first heating traces J1; at least a portion of the heating circuit JO is electrically connected. Optionally, the heating circuit JO may include a first heating trace group JZ as shown in Figures 2C and 5B; optionally, one first heating trace group JZ may serve as one heating circuit JO.

[0167] In this embodiment, the display panel includes multiple heating circuits JO and multiple fourth bonding terminal pairs R-PO; the heating circuit JO includes at least two first heating traces J1; at least a portion of the heating circuits JO are electrically connected, which can enable the heating structure J to form multiple heating levels, allowing the display panel to perform different heating levels according to the specific temperature environment. Moreover, it can avoid the interference of PWM modulation on the display substrate signal in the display area, thereby causing poor images such as horizontal stripes and flickering, as well as the problem that the DC voltage cannot be changed after the system terminal voltage is fixed, making it impossible to perform heating at different levels.

[0168] In one possible implementation, referring to FIG8A, the display panel further includes a third transistor T3 connected to at least a portion of the heating circuit JO, and M first connection lines SW1; the third transistor T3 includes: a third control electrode T3A, a third source electrode T3B, and a third drain electrode T3C; the third source electrode T3B and the third drain electrode T3C of the third transistor T3 are connected in the heating circuit JO, and the third control electrode T3A of the third transistor T3 every M heating circuit JO is connected to a first connection line SW1, and the third control electrode T3A of the third transistor T3 of adjacent heating circuit JO is sequentially connected to different first connection lines SW1.

[0169] In one possible implementation, referring to Figure 8A, the display panel can have four heating levels. All heating circuits JO in the display area AA of the display panel can be grouped into multiple circuit groups JOZ (Figure 8A illustrates this with two circuit groups JOZ). Each circuit group JOZ includes: a first heating circuit JO1, a second heating circuit JO2, a third heating circuit JO3, and a fourth heating circuit JO4. The first heating circuit JO1, the second heating circuit JO2, and the third heating circuit JO3 are all connected to a third transistor T3, while the fourth heating circuit JO4 may not be connected. The third transistor T3 of the first heating circuit JO1 in each circuit group JOZ is connected to the same first connection line SW1 (as shown in the rightmost first connection line SW1 in Figure 8A); the third transistor T3 of the second heating circuit JO2 in each circuit group JOZ is connected to another first connection line SW1 (as shown in the middle first connection line SW1 in Figure 8A); the third transistor T3 of the third heating circuit JO3 in each circuit group JOZ is connected to another first connection line SW1 (as shown in the leftmost first connection line SW1 in Figure 8A). In this way, the display panel can have four heating power levels, each with the same DC voltage. When all three first connection lines SW1 are turned on, the eight heating circuits JO are connected in parallel, and the power is P1 according to P=U*U / R. When the leftmost first connection line SW1 is turned off, the first heating circuit JO1 in each circuit group JOZ cannot form a loop and therefore cannot heat. At this time, the heating wire power is 0.75*P1. Similarly, when the leftmost and rightmost first connection lines SW1 are both turned off, the heating wire power is 0.5*P1. When all three first connection lines SW1 are turned off, the heating wire power is 0.25*P1. When designing the span of each circuit group JOZ, the heating radiation range needs to be considered, especially ensuring the heating wire radiation range at 0.25*P1. Different levels can be used according to customer needs to control the heating time. Higher power means shorter heating time. Using different levels according to the customer's usage environment can reduce power and save energy.

[0170] In one possible implementation, referring to FIG8B, the display panel further includes: a first flexible circuit board FPC; the first flexible circuit board FPC includes: M second connecting lines SW2 and a third connecting line SW3; one of the fourth bonding terminals R-PO of each M heating circuit JO connected to a fourth bonding terminal pair R-PO is connected to a second connecting line SW2, and the fourth bonding terminals R-P0 of adjacent heating circuit JO are connected to different second connecting lines SW2; the other fourth bonding terminal R-P0 of each heating circuit JO connected to a fourth bonding terminal pair R-PO is connected to a third connecting line SW3.

[0171] In one possible implementation, referring to Figure 8B, the display panel can have four heating levels. All heating circuits JO in the display area AA of the display panel can be grouped into multiple circuit groups JOZ (Figure 8B illustrates this with two circuit groups JOZ). Each circuit group JOZ includes: a first heating circuit JO1, a second heating circuit JO2, a third heating circuit JO3, and a fourth heating circuit JO4. One of the fourth bonding terminals R-P0 of the first heating circuit JO1 in each circuit group JOZ is connected to the same second connecting line SW1 (as shown in Figure 8A, the first second connecting line SW2 from the left). The second heating circuit in each circuit group JOZ... One of the fourth bonding terminals R-P0 of loop JO2 is connected to another second connecting line SW1 (as shown in Figure 8A, the second second connecting line SW2 from the left). In each loop group JOZ, one of the fourth bonding terminals R-P0 of the third heating loop JO3 is connected to another second connecting line SW1 (as shown in Figure 8A, the third second connecting line SW2 from the left). In each loop group JOZ, one of the fourth bonding terminals R-P0 of the fourth heating loop JO4 is connected to another second connecting line SW1 (as shown in Figure 8A, the fourth second connecting line SW2 from the left). In all loop groups JOZ, the other fourth bonding terminal R-P0 (such as the fourth bonding terminal R-P0 of the negative electrode) is connected to the third connecting line SW3. Thus, by grouping and paralleling the fourth bonding terminal of the display panel to R-PO on the first flexible circuit board (FPC), the number of heating wire groups that can be turned on can be adjusted according to customer needs. For example: when all four second connection lines SW2 are turned on, all heating circuits JO are working, and the heating power is P; when the first second connection line SW2 from the left is turned on, the first heating circuit JO1 in each circuit group JOZ works to heat, and the heating wire power is 1 / 4*P; when the first second connection line SW2 from the left and the third second connection line SW2 from the left are turned on, the first heating circuit JO1 and the third heating circuit JO3 in each circuit group JOZ work to heat, and the heating wire power is 1 / 2*P; in the above three methods, the heating circuits JO are evenly distributed when working. When achieving 3 / 4*P power, the activated heating circuits JO cannot be evenly distributed in the display area. However, as long as the radiation range at 1 / 4*P is well controlled, since the radiation range of the heating wire is the largest and the power is the smallest at 1 / 4*P, as long as the heating is uniform at 1 / 4*P, even though the working heating wires are not evenly distributed at 3 / 4*P, the heat from the heating wires is sufficient to ensure the normal display. More heating circuits JO can be designed in each circuit group JOZ as needed. The above four groups are just examples, and this disclosure is not limited to them.

[0172] In one possible implementation, referring to FIG8C, the display panel further includes: a first flexible circuit board FPC; the first flexible circuit board FPC includes: a fourth connecting line SW4, a fifth connecting line SW5, a sixth connecting line SW6, and a plurality of first control components G1 and a plurality of second control components G2; the first control components G1 and the second control components G2 each include: a first terminal GA and a second terminal GB.

[0173] In each of the fourth bonding terminal pairs R-PO, one of the fourth bonding terminals R-P0 is connected to the fourth connecting line SW4;

[0174] Each fourth bonding terminal in R-PO is alternately connected to the first terminal GA of the first control component G1 and the first terminal GA of the second control component G2;

[0175] The second terminal GB of each first control component G1 is connected to the fifth connection line SW5, and the second terminal GB of each second control component G2 is connected to the sixth connection line SW6.

[0176] In one possible implementation, as shown in FIG8C, the first control component G1 and the second control component G2 each include: a first resistor R, a first trace L, and a first switch K1.

[0177] One end of the first resistor R (as shown on the left) and one end of the first trace L (as shown on the left) are both electrically connected to the first end GA;

[0178] One end of the first switch K in the first control component G1 is electrically connected to the fifth connecting line SW5; the other end of the first switch K in the first control component G1 can be connected to the other end (such as the right end) of the first resistor R or the other end (such as the right end) of the first line L at different times.

[0179] One end of the first switch K in the second control component G2 is electrically connected to the sixth connecting line SW6; the other end of the first switch in the second control component can be connected to the other end of the first resistor or the other end of the first line at different times.

[0180] In the heating circuit shown in Figure 8C, the heating wires of the display area AA are divided into two groups on the first flexible circuit board (FPC). Two settings are designed on each heating circuit JO: one with a resistor R connected in series, and the other without a resistor (i.e., the first trace L). The power is controlled by adjusting the number of groups and settings as needed. When the fifth connection line SW5 and the sixth connection line SW6 are both open and the switch K is connected to the first trace L, all heating circuits JO are working, meaning all heating circuits JO are connected in parallel, resulting in minimum resistance and maximum power P. When the fifth connection line SW5 is open and the switch K is connected to the first trace L, or when the sixth connection line SW6 is open and the switch K is connected to the first resistor R, half of the heating circuits are operating. When circuit JO is working, the power is 1 / 2P. The first resistor R in series is the same as the resistance of each heating circuit JO. When the fifth connecting line SW5 is turned on and the switch K is connected to the first resistor R, half of the heating circuits JO are connected in series with a resistor element (i.e., the first resistor R) with the same resistance as the heating circuit JO. At this time, the heating wire power is 1 / 4P. When the fifth connecting line SW5 is turned on and the switch K is connected to the first resistor R, and when the sixth connecting line SW6 is turned on and the switch K is connected to the first trace L, the power is 3 / 4P. The required power can be adjusted by adjusting the resistance value of the series resistor. This embodiment is not limited to designing two levels on the heating circuit JO; it can have multiple levels, and the power can be subdivided. The advantage of this embodiment is that the heating circuits JO working in the display area AA are all evenly distributed in the display area AA.

[0181] In one possible implementation, referring to FIG9, the display panel further includes: a cover plate 300 located on the side of the opposing substrate 200 away from the display substrate 100; the cover plate 300 is provided with ink 301 on the side facing the opposing substrate 200; the ink has a second opening VA, and a first photosensitive structure S1 is located in the second opening VA.

[0182] In some embodiments, the display panel provided in this disclosure may further include a liquid crystal layer between a display substrate and a counter substrate, a first polarizer on the side of the array substrate away from the counter substrate, and a second polarizer on the side of the counter substrate away from the array substrate, wherein the polarization direction of the first polarizer and the polarization direction of the second polarizer are perpendicular to each other. Other essential components of the display panel are understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting the scope of this disclosure.

[0183] Based on the same inventive concept, this disclosure also provides a display device, comprising the display panel described above and a backlight module located on the light-incident side of the display panel. The backlight module can be a direct-lit backlight module or an edge-lit backlight module. Optionally, the edge-lit backlight module may include LED strips, stacked reflective sheets, light guide plates, diffusers, prism groups, etc., with the LED strips located on one side of the thickness direction of the light guide plate. The direct-lit backlight module may include a matrix light source, a reflective sheet, a diffuser plate, and a brightness enhancement film stacked on the light-emitting side of the matrix light source, with the reflective sheet including openings directly opposite the positions of the LEDs in the matrix light source. The LEDs in the LED strips and the LEDs in the matrix light source can be light-emitting diodes (LEDs), such as miniature LEDs (Mini LEDs, Micro LEDs, etc.).

[0184] Micro-LEDs, at the sub-millimeter or even micrometer scale, are self-emissive devices, just like organic light-emitting diodes (OLEDs). Like OLEDs, they offer a range of advantages, including high brightness, ultra-low latency, and ultra-wide viewing angles. Furthermore, because inorganic LEDs emit light based on more stable and lower-resistance metal semiconductors, they offer advantages over organic LEDs, such as lower power consumption, better resistance to high and low temperatures, and longer lifespan. When used as backlights, micro-LEDs can achieve more precise dynamic backlighting effects, effectively improving screen brightness and contrast while eliminating glare caused by traditional dynamic backlighting between bright and dark areas, thus optimizing the visual experience.

[0185] In some embodiments, the display device provided in this disclosure can be any product or component with display function, such as a projector, 3D printer, virtual reality device, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, smartwatch, fitness wristband, or personal digital assistant. Optionally, the display device provided in this disclosure includes, but is not limited to, components such as a radio frequency unit, network module, audio output & input unit, sensor, display unit, user input unit, interface unit, and control chip. Optionally, the control chip is a central processing unit, digital signal processor, system-on-a-chip (SoC), etc. For example, the control chip may also include a memory, a power module, etc., and achieve power supply and signal input / output functions through additionally provided wires, signal lines, etc. For example, the control chip may also include hardware circuits and computer-executable code. The hardware circuit may include conventional very-large-scale integrated circuits (VLSI) or gate arrays, as well as existing semiconductors or other discrete components such as logic chips and transistors; the hardware circuit may also include field-programmable gate arrays, programmable array logic, programmable logic devices, etc. Furthermore, those skilled in the art will understand that the above structure does not constitute a limitation on the display device provided in the embodiments of this disclosure. In other words, the display device provided in the embodiments of this disclosure may include more or fewer of the above components, or combine certain components, or have different component arrangements.

[0186] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0187] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations to the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A display substrate having a display area and a peripheral area located around the display area; wherein, The display substrate includes: Substrate; A heating structure, located on one side of the substrate, includes: multiple first heating lines and multiple second heating lines; the multiple first heating lines are located in the display area, and the multiple second heating lines are located in the peripheral area; A first photosensitive structure is located in the peripheral region, and at least a portion of the orthographic projection of the first photosensitive structure onto the substrate does not overlap with the orthographic projection of the second heating trace onto the substrate.

2. The display substrate as claimed in claim 1, wherein, The surrounding area includes: a first surrounding area, a second surrounding area, a third surrounding area, and a fourth surrounding area; wherein the first surrounding area and the fourth surrounding area are arranged opposite to each other, and the second surrounding area and the third surrounding area connect the first surrounding area and the fourth surrounding area; The display substrate further includes: multiple gate lines extending along a first direction, multiple data lines extending along a second direction, multiple pixel electrodes, and multiple first fan-shaped trace groups; wherein, the multiple first fan-shaped trace groups are located in the first peripheral area; the first fan-shaped trace group includes: multiple first leads; the first leads are electrically connected to one end of the data lines; The first light-sensing structure includes: a first sub-light-sensing structure; the first sub-light-sensing structure is located in the first peripheral area and in the gap between two adjacent first fan-shaped trace groups.

3. The display substrate as described in claim 2, wherein, The first sector-shaped trace group includes: a first sub-sector-shaped trace group and a second sub-sector-shaped trace group; the second sub-sector-shaped trace group is located on the side of the first sub-sector-shaped trace group away from the display area; the first sub-sector-shaped trace group includes: multiple first sub-leads; the second sub-sector-shaped trace group includes: multiple second sub-leads; The display substrate further includes: a plurality of first anti-static structures and a plurality of first bonding groups; the first anti-static structures are located between the first sub-fan-shaped trace group and the second sub-fan-shaped trace group, and the first bonding groups are located on the side of the second sub-fan-shaped trace group away from the first sub-fan-shaped trace group; the first anti-static structure includes: a plurality of first anti-static units arranged along the first direction, and the first bonding group includes: a plurality of first bonding terminals arranged along the first direction; one end of the first sub-lead is connected to the data line, and the other end is electrically connected to one end of the first anti-static unit; one end of the second sub-lead is electrically connected to the other end of the first anti-static unit, and the other end of the second sub-lead is electrically connected to the first bonding terminal; The first sub-fan-shaped trace group includes: a first outer edge extending along the first direction and away from the side of the display area; the second sub-fan-shaped trace group includes: a second outer edge extending along the first direction and close to the side of the display area; at least a portion of the first sub-photosensitive structure in the orthographic projection of the substrate, the region between the extension line of the first outer edge and the extension line of the second outer edge is located in the orthographic projection of the substrate.

4. The display substrate as described in claim 2 or 3, wherein, The display substrate further includes: a first common electrode located on the side of the second sub-fan-shaped trace group away from the display area, and a plurality of first photosensitive leads connected to the first photosensitive structure; The first photosensitive lead connected to the first sub-photosensitive structure includes: a first photosensitive trace portion; the first photosensitive trace portion is located on the side of the first sub-photosensitive structure away from the display area and extends along the second direction; The first common electrode includes a first sub-common electrode and a second sub-common electrode distributed along the first direction; the first sub-common electrode and the second sub-common electrode are respectively located on different sides of the first photosensitive trace portion.

5. The display substrate as claimed in claim 4, wherein, The first photosensitive lead includes: a first sub-photosensitive lead, a second sub-photosensitive lead, and a third sub-photosensitive lead; The second photosensitive lead, the third photosensitive lead, the first sub-lead, and the data line are all on the same layer and made of the same material; the first sub-photosensitive lead, the second sub-lead, the first common electrode, and the gate line are all on the same layer and made of the same material.

6. The display substrate according to any one of claims 2-5, wherein, The display substrate further includes: a plurality of floating pixel electrodes located in the first peripheral area and arranged along the first direction; the length of the floating pixel electrodes in the second direction is one-quarter to three-quarters of the length of the pixel electrodes in the second direction; The plurality of second heating traces include: a plurality of first sub-heating traces; the plurality of first sub-heating traces extend along the first direction and are arranged sequentially along the second direction, and the plurality of first sub-heating traces are located on the side of the first sub-photosensitive structure away from the display area; the line width of the first sub-heating traces is greater than the line width of the first heating traces.

7. The display substrate according to any one of claims 2-6, wherein, The display substrate further includes: a plurality of second sector-shaped trace groups; the plurality of second sector-shaped trace groups are located in the second peripheral area; the second sector-shaped trace group includes: a plurality of second leads; the second leads are connected to one end of the gate line; The first photosensitive structure further includes a second sub-photosensitive structure; the second sub-photosensitive structure is located in the second peripheral area and in the gap between two adjacent second fan-shaped trace groups.

8. The display substrate as claimed in claim 7, wherein, The plurality of second heating traces include: a plurality of second sub-heating traces; the plurality of second sub-heating traces are located in the second peripheral area, extend along the second direction and are arranged sequentially along the first direction; the line width of the second sub-heating traces is greater than the line width of the first heating traces; The second sub-photosensitive structure is located in at least a portion of the orthographic projection of the substrate, within the gap between two adjacent second sub-heating traces in the orthographic projection of the substrate.

9. The display substrate as claimed in claim 7 or 8, wherein, The display substrate further includes: a plurality of third sector-shaped wiring groups; the plurality of third sector-shaped wiring groups are located in the third peripheral area; the third sector-shaped wiring group includes: a plurality of third leads; the third leads are connected to the other end of the gate line; The first photosensitive structure includes a third sub-photosensitive structure; the third sub-photosensitive structure is located in the third peripheral area and in the gap between two adjacent third fan-shaped trace groups.

10. The display substrate as claimed in claim 9, wherein, The plurality of second heating traces include: a plurality of third sub-heating traces; the plurality of third sub-heating traces are located in the third peripheral area, extend along the second direction and are arranged sequentially along the first direction; the line width of the third sub-heating traces is greater than the line width of the first heating traces; At least a portion of the third sub-photosensitive structure is located within the orthographic projection of the substrate, and the gap between two adjacent third sub-heating traces is located within the orthographic projection of the substrate.

11. The display substrate according to any one of claims 2-10, wherein, The display substrate further includes: a plurality of fourth sector-shaped wiring groups; the plurality of fourth sector-shaped wiring groups are located in the fourth peripheral area; the fourth sector-shaped wiring group includes: a plurality of fourth leads; one end of the fourth lead is connected to one end of the first heating wiring; The first light-sensing structure includes a fourth sub-light-sensing structure; the fourth sub-light-sensing structure is located in the fourth peripheral area and on the side of the fourth fan-shaped wiring group facing the display area.

12. The display substrate as claimed in claim 11, wherein, The display substrate further includes: a plurality of fourth bonding groups located in the fourth peripheral region; the fourth bonding group includes: a plurality of fourth bonding terminals arranged along the first direction; the other end of the fourth lead is electrically connected to the fourth bonding terminal; The plurality of second heating traces also include: auxiliary heating traces; the auxiliary heating traces are located between two adjacent fourth sector trace groups.

13. The display substrate as claimed in claim 12, wherein, The fourth binding group further includes: a fifth binding terminal; the auxiliary heating wiring includes: a first auxiliary heating wiring; one end of the first auxiliary heating wiring is electrically connected to the fifth binding terminal in one of the fourth binding groups, and the other end is electrically connected to the fifth binding terminal in another of the fourth binding groups; The first auxiliary heating trace includes: a plurality of first winding units arranged along the first direction and interconnected with each other; the first winding unit includes: two first winding portions extending along the second direction, and a first connecting portion connecting the two first winding portions away from the end of the display area; In the first auxiliary heating wiring, the extension lines of the first connecting portions of each of the first winding units coincide; and in the direction from the middle region of two adjacent fourth sector wiring groups to one of the fourth sector wiring groups, the length of each of the first winding units in the second direction gradually decreases.

14. The display substrate as claimed in claim 12, wherein, The display substrate further includes: a first axis extending along the second direction and passing through the gap between adjacent fourth bonding groups; the fourth bonding group further includes: a fifth bonding terminal and a sixth bonding terminal; The auxiliary heating trace includes a second auxiliary heating trace and a third auxiliary heating trace; the second auxiliary heating trace is located in the region between the first axis and one of the fourth bonding groups, and the third auxiliary heating trace is located in the region between the first axis and another of the fourth bonding groups; one end of the second auxiliary heating trace is electrically connected to the fifth bonding terminal in one of the fourth bonding groups, and the other end is electrically connected to the sixth bonding terminal in the same fourth bonding group; one end of the third auxiliary heating trace is electrically connected to the fifth bonding terminal in another of the fourth bonding groups, and the other end of the third auxiliary heating trace is electrically connected to the sixth bonding terminal in the same fourth bonding group.

15. The display substrate as claimed in claim 14, wherein, Both the second auxiliary heating trace and the third auxiliary heating trace include: a plurality of second winding units arranged and interconnected along the first direction, and a plurality of third winding units arranged and interconnected along the first direction; The second winding unit includes: two second winding portions extending along the second direction, and a second connecting portion connecting the two third winding portions away from the end of the display area; the third winding unit includes: two third winding portions extending along the second direction, and a third connecting portion connecting the two third winding portions away from the end of the display area; the second winding unit is located on the side of the third winding unit away from the display area, and the two are nested together; In the second auxiliary heating wiring and the third auxiliary heating wiring, the extension lines of the second connecting portion of each second winding unit coincide, and the extension lines of the third connecting portion of each third winding unit coincide; and in the direction from the first axis to the fourth fan-shaped wiring group, the length of each second winding unit in the second direction gradually decreases, and the length of each third winding unit in the second direction gradually decreases.

16. The display substrate according to any one of claims 2-15, wherein, The display substrate includes: a plurality of pixel electrode columns extending along the second direction and arranged along the first direction, and a plurality of first heating trace groups arranged along the first direction; the pixel electrode columns include: a plurality of pixel electrodes arranged along the second direction; the first heating trace groups include: a plurality of first heating traces; The first heating trace is projected onto the substrate at the point where the gap between two adjacent pixel electrode columns is projected onto the substrate; in the same group of first heating traces, the ends of each first heating trace near the first peripheral region are electrically connected, and the ends of some adjacent first heating traces near the fourth peripheral region are electrically connected.

17. The display substrate according to any one of claims 1-16, wherein, The display substrate further includes: a second light-sensing structure; The first photosensitive structure includes: a plurality of first transistors; each first transistor includes: a first control electrode, a first source electrode, and a first drain electrode; the first control electrodes of the plurality of first transistors are interconnected, the first sources of the plurality of first transistors are interconnected, and the first drain electrodes of the plurality of first transistors are interconnected. The second photosensitive structure includes: a plurality of second transistors; each second transistor includes: a second control electrode, a second source electrode, and a second drain electrode; the second control electrodes of the plurality of second transistors are interconnected, the second sources of the plurality of second transistors are interconnected, and the second drain electrodes of the plurality of second transistors are interconnected.

18. The display substrate as claimed in claim 17, wherein, The data line is located on the side of the gate line opposite to the substrate; the pixel electrode is located on the side of the data line opposite to the gate line; The first control electrode, the second control electrode, and the gate line are in the same layer and made of the same material; The first source electrode, the first drain electrode, the second source electrode, the second drain electrode, and the data line are in the same layer and made of the same material; the heating structure is located between the data line and the layer containing the pixel electrode.

19. A display panel, wherein, Includes the display substrate as described in any one of claims 1-18.

20. The display panel as claimed in claim 19, wherein, The display panel includes multiple heating circuits and multiple fourth bonding terminal pairs; each fourth bonding terminal pair includes two adjacent fourth bonding terminals; one end of each heating circuit is electrically connected to one of the fourth bonding terminals of the fourth bonding terminal pair, and the other end of the heating circuit is electrically connected to the other fourth bonding terminal of the fourth bonding terminal pair; each heating circuit includes at least two first heating traces; At least a portion of the heating circuit is electrically connected.

21. The display panel as claimed in claim 20, wherein, The display panel also includes a third transistor connected to at least a portion of the heating circuit, and M first connection lines; The third transistor includes a third control electrode, a third source electrode, and a third drain electrode; the third source electrode and the third drain electrode of the third transistor are connected in the heating circuit; the third control electrode of the third transistor in every M heating circuits is connected to a first connection line, and the third control electrode of the third transistor in adjacent heating circuits is sequentially connected to different first connection lines.

22. The display panel as claimed in claim 20, wherein, The display panel further includes: a first flexible circuit board; the first flexible circuit board includes: M second connecting lines and a third connecting line; In every M intervals of the fourth bonding terminal pairs connected to the heating circuits, one of the fourth bonding terminals is connected to a second connecting line, and the fourth bonding terminals of adjacent heating circuits are connected to different second connecting lines; the other fourth bonding terminal in each of the fourth bonding terminal pairs connected to the heating circuits is connected to a third connecting line.

23. The display panel as claimed in claim 20, wherein, The display panel further includes: a first flexible circuit board; the first flexible circuit board includes: a fourth connecting line, a fifth connecting line, a sixth connecting line, a plurality of first control components, and a plurality of second control components; the first control component and the second control component each include: a first end and a second end; In each of the fourth bonding terminal pairs, one of the fourth bonding terminals is connected to the fourth connecting line; In each of the fourth bonding terminal pairs, the other fourth bonding terminal is alternately connected to the first end of the first control component and the first end of the second control component; The second end of each of the first control components is connected to the fifth connection line, and the second end of each of the second control components is connected to the sixth connection line.

24. The display panel as claimed in claim 23, wherein, Both the first control component and the second control component include: a first resistor, a first trace, and a first switch; One end of the first resistor and one end of the first trace are both electrically connected to the first end; One end of the first switch in the first control component is electrically connected to the fifth connecting line; One end of the first switch in the second control component is electrically connected to the sixth connecting line.

25. The display panel according to any one of claims 19-24, wherein, The display panel further includes: a counter substrate disposed with the display substrate; the display substrate has a second photosensitive structure; the counter substrate includes: a black matrix layer; the black matrix layer includes: a blocking portion and a plurality of first openings; The orthographic projection of the first opening on the substrate overlaps with the orthographic projection of the first photosensitive structure on the substrate; the orthographic projection of the blocking portion on the substrate covers the orthographic projection of the second photosensitive structure on the substrate.

26. The display panel as claimed in claim 25, wherein, The second light-sensing structure is located on the side of the first light-sensing structure away from the display area; the first opening is strip-shaped.

27. The display panel as claimed in claim 25, wherein, The second photosensitive structure and the first photosensitive structure are arranged along the first direction; the first opening includes: a plurality of sub-openings.

28. The display panel according to any one of claims 25-27, wherein, The display panel further includes: a cover plate located on the side of the opposing substrate away from the display substrate; the cover plate having ink on the side facing the opposing substrate; the ink having a second opening, and the first photosensitive structure being located in the second opening.

29. A display device, wherein, Includes the display panel as described in any one of claims 19-28.

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