Display substrate and display apparatus

Abstract

The present disclosure provides a display substrate and a display apparatus. The display substrate comprises a base substrate (100), and a first insulating layer (110), a conductive layer (120), a second insulating layer (130), and a first wiring layer (140) which are disposed on one side of the base substrate (100). The side of the first insulating layer (110) away from the base substrate (100) is provided with a groove (111) located in a bending region (BEND). The second insulating layer (130) is provided with an opening (131) in the bending region (BEND). The first wiring layer (140) comprises a plurality of first wires (141), and an insulating protection layer is disposed between the first wiring layer (140) and a side surface of the groove (111).

Description

Display substrate and display device Cross-reference to related applications

[0001] This application claims priority to Chinese Patent Application No. 202510200638.8, filed February 21, 2025, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0002] The present disclosure relates to the technical field of display, and in particular, to a display substrate and a display device. BACKGROUND

[0003] In order to achieve a full-screen effect, a bending area is usually arranged on one side of the display area of a flexible display product to bend a binding area for connecting a circuit to the backlight side of the display substrate. The bending area is covered with a protective glue, such as MCL (Micro Coating Layer) glue, which serves to protect the bending area. However, the protective glue is relatively thick, which is not conducive to the thinning of the display product, and even less conducive to the narrowing of the lower frame of the display product. Therefore, the width of the lower frame can be reduced by thinning or skipping the protective glue of the bending area. SUMMARY

[0004] Some embodiments of the present disclosure provide a display substrate and a display device, which are conducive to improving the reliability of the bending area wiring of the display substrate.

[0005] In a first aspect, some embodiments of the present disclosure provide a display substrate, comprising a display area and a fan-out area and a bending area located on one side of the display area. The display substrate comprises: a substrate substrate; a first insulating layer arranged on one side of the substrate substrate, covering the display area and the fan-out area, and the side of the first insulating layer away from the substrate substrate is provided with a groove located in the bending area; a second insulating layer arranged on the side of the first insulating layer away from the substrate substrate, the second insulating layer being an organic material layer, covering the display area and the fan-out area, and provided with an opening in the bending area, the opening and the bottom surface of the groove at least partially overlap in the substrate substrate; a conductive layer arranged between the first insulating layer and the second insulating layer; and a first wiring layer arranged on the side of the second insulating layer away from the substrate substrate, the first wiring layer comprising a plurality of first wires arranged at intervals, the first wires comprising a main body segment and an overlapping segment connected to each other, the main body segment being located in the bending area and being arranged on the groove bottom surface exposed from the opening, the overlapping segment extending from the bending area to the fan-out area and being arranged on the second insulating layer on top of the first insulating layer, and an insulating protective layer being arranged between the first wiring layer and the side surface of the groove.

[0006] In some embodiments, a distance between a bottom end of a side surface of the recess and a central axis of the recess is less than a distance between a top end of the side surface of the recess and the central axis of the recess, the central axis of the recess is an axis passing through a geometric center point of a bottom surface of the recess and perpendicular to the substrate, the bottom end of the side surface is an end of the side surface close to the substrate, and the top end of the side surface is an end of the side surface away from the substrate. The insulating protective layer covers an edge region of the bottom surface of the recess close to the side surface of the recess, a corner region between the side surface of the recess and the bottom surface of the recess, and at least a partial region of the side surface of the recess.

[0007] In some embodiments, the side surface and the bottom surface of the recess form a stepped structure, the stepped structure includes a first tread surface, a first slope surface, a second slope surface, and a second tread surface connected between the first slope surface and the second slope surface, the first tread surface is the bottom surface of the recess, and a bottom end of the first slope surface is connected to the first tread surface. The insulating protective layer covers an edge region of the first tread surface close to the first slope surface, a corner region between the first tread surface and the first slope surface, and a corner region between the second tread surface and the second slope surface.

[0008] In some embodiments, the stepped structure further includes a third slope surface and a third tread surface connected between the second slope surface and the third slope surface, the second slope surface is closer to the substrate than the third slope surface. The insulating protective layer further covers the first slope surface, the second tread surface, the second slope surface, the third tread surface, the third slope surface, and a corner region between the third tread surface and the third slope surface.

[0009] In some embodiments, the display substrate further includes a driving circuit layer disposed on a side of the substrate away from the substrate and located in the display area. The driving circuit layer includes a first source-drain metal layer, a first planar layer disposed on a side of the first source-drain metal layer away from the substrate, and a second source-drain metal layer disposed on a side of the first planar layer away from the substrate. The first insulating layer includes an inorganic insulating layer between the first source-drain metal layer and the substrate, the conductive layer is disposed in the same layer as the first source-drain metal layer, the second insulating layer includes the first planar layer, the opening is disposed in the first planar layer, and the first wiring layer is disposed in the same layer as the second source-drain metal layer.

[0010] In some embodiments, a lower port of the opening has a footprint on the substrate that is within a footprint of a bottom surface of the recess on the substrate, the lower port being an open area near a surface of a side of the substrate. The first planar layer includes a flat portion and a ramp portion connected to the flat portion, the flat portion covering the display area and the fan-out area, and the ramp portion covering a side surface of the recess. The insulating protective layer includes the ramp portion, and the overlapping segment of the first trace is disposed on the ramp portion and extends to a top of the flat portion.

[0011] In some embodiments, a footprint of the ramp portion on the substrate is a first projection area, and a footprint of the side surface of the recess on the substrate is a second projection area, the second projection area being within the first projection area.

[0012] In some embodiments, a distance between a first boundary line of the first projection area and a second boundary line of the second projection area is 8-15 microns, wherein the first boundary line is a boundary line of the first projection area near the bending area, and the second boundary line is a boundary line of the second projection area near the bending area.

[0013] In some embodiments, a surface of the ramp portion facing the bending area includes a first slope surface and a second slope surface connected to the first slope surface, a bottom end of the first slope surface is connected to the bottom surface of the recess, and an angle of slope of the first slope surface is greater than an angle of slope of the second slope surface.

[0014] In some embodiments, a surface of the ramp portion facing the bending area includes a first slope surface, a second slope surface, and a connecting surface connecting the first slope surface and the second slope surface, a bottom end of the first slope surface is connected to the bottom surface of the recess, an angle of slope of the connecting surface is less than an angle of slope of the first slope surface, and an angle of slope of the second slope surface is greater than or equal to the angle of slope of the first slope surface.

[0015] In some embodiments, a footprint of the bottom surface of the recess on the substrate is within a footprint of a lower port of the opening on the substrate. The display substrate further includes a cover layer located in the bending area, disposed on a side of the first trace layer near the substrate, covering at least part of the bottom surface of the recess and the side surface of the recess, and the insulating protective layer includes the cover layer between the side surface of the recess and the first trace layer.

[0016] In some embodiments, the first planar layer covers a portion of the side surface of the groove near the top end, the cover layer covers a portion of the side surface of the groove near the bottom end, and the insulating protective layer includes the cover layer and the first planar layer between the side surface of the groove and the first trace layer.

[0017] In some embodiments, the side surface and the bottom surface of the groove form a stepped structure including a first tread surface, a first slope surface, a second slope surface, and a second tread surface connected between the first slope surface and the second slope surface, the first tread surface being the bottom surface of the groove, and the bottom end of the first slope surface being connected to the first tread surface. The cover layer covers a corner region between the first tread surface and the first slope surface, the first slope surface, the second tread surface, and a corner region between the second tread surface and the second slope surface.

[0018] In some embodiments, the cover layer is an inorganic insulating material layer, and the thickness of the cover layer in a direction perpendicular to the substrate is less than 3000 angstroms.

[0019] In some embodiments, the driving circuit layer further includes a passivation layer disposed between the first source-drain metal layer and the first planar layer, covering the first source-drain metal layer, and the cover layer and the passivation layer are disposed in the same layer.

[0020] In some embodiments, the display substrate further includes a binding area, the fan-out area includes a first fan-out area and a second fan-out area, the first fan-out area is located between the bending area and the display area, the second fan-out area is located on a side of the bending area away from the display area, and the binding area is located on a side of the second fan-out area away from the display area. The display substrate further includes a second trace layer located in the first fan-out area and including a plurality of second traces, and a third trace layer located in the second fan-out area and including a plurality of third traces. The binding area is provided with a plurality of binding pads, the third traces are electrically connected to the binding pads, the overlapping portions of the first traces on a side close to the first fan-out area are electrically connected to the second traces through vias, and the overlapping portions of the first traces on a side close to the second fan-out area are electrically connected to the third traces through vias.

[0021] In some embodiments, the first insulating layer includes a plurality of inorganic layers stacked, and the depth of the groove is greater than or equal to the sum of the thicknesses of the plurality of inorganic layers in a direction perpendicular to the substrate.

[0022] In some embodiments, the display substrate further comprises a pixel defining layer and a plurality of light emitting devices, the pixel defining layer is disposed on a side of the second insulating layer away from the substrate, the pixel defining layer has a plurality of pixel openings arranged at intervals, the pixel openings are located in the display area, and the light emitting devices are arranged at the pixel openings.

[0023] In a second aspect, some embodiments of the present disclosure provide a display device comprising the display substrate provided in the first aspect of the present disclosure.

[0024] The above description is only a summary of the technical solutions provided by the embodiments of the present disclosure. In order to enable one of ordinary skill in the art to better understand the technical means of the embodiments of the present disclosure, the contents of the specification can be implemented, and in order to make the above and other purposes, characteristics and effects of the embodiments of the present disclosure more obvious and easy to understand, the specific implementation manner of the embodiments of the present disclosure is described below. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed in the following embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present disclosure, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0026] FIG. 1 shows a schematic plan view of a display substrate according to some embodiments of the present disclosure;

[0027] FIG. 2 shows a schematic view of the A area in FIG. 1;

[0028] FIG. 3A shows an exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2;

[0029] FIG. 3B shows a schematic view of the structure of the groove in FIG. 3A;

[0030] FIG. 4 shows a cross-sectional view along the B-B cross-sectional line in FIG. 2;

[0031] FIG. 5 shows another exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2;

[0032] FIG. 6 shows still another exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2; and

[0033] FIG. 7 shows a schematic view of a display device according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0034] Exemplary embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure can be embodied in various forms without being limited by the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.

[0035] It should be noted that the "and / or" as used herein is merely used to associate associated objects, and means that three relationships can exist, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. The phrase "at least one" includes one or more than one, and "multiple" includes two or more than two. The terms "comprise" or "include" or similar terms mean that the elements or objects appearing before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. "Up", "down", "left", "right", and the like are merely used to indicate relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0036] As used herein, "about" includes the recited value and the average value within an acceptable range of deviation from the particular value, wherein the acceptable range of deviation is determined by a person of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., limitations of the measurement system).

[0037] As used herein, "parallel", "perpendicular", "equal", "same" include the recited case and the approximate case similar to the recited case, and the approximate case is within an acceptable range of deviation, wherein the acceptable range of deviation is determined by a person of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and approximate parallel, wherein the acceptable range of deviation of approximate parallel can be, for example, within 5°; "perpendicular" includes absolute perpendicular and approximate perpendicular, wherein the acceptable range of deviation of approximate perpendicular can also be, for example, within 5°. "Equal", "same" includes absolute equality and approximate equality, wherein the acceptable range of deviation of approximate equality can be, for example, that the difference between the two equalities is less than or equal to 5% of either one.

[0038] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or there can be an intervening layer between the layer or element and the other layer or substrate.

[0039] The "positive projection of B is within the positive projection range of A" described herein refers to that the boundary of the positive projection of B falls within the boundary of the positive projection of A, or the boundary of the positive projection of A overlaps with the boundary of the positive projection of B.

[0040] The bottom surface of the groove described herein refers to the surface opposite to the opening of the groove, and the bottom surface of the groove is closer to the substrate than the opening of the groove. The side surface of the groove refers to the surface connected with the bottom surface of the groove and extending from the bottom surface of the groove to the opening of the groove. The "top end of the side surface" described herein is the end of the side surface away from the substrate, and the "bottom end of the side surface" is the end of the side surface close to the substrate.

[0041] The "A and B are disposed in the same layer" described herein refers to that A and B are formed at the same time by the same patterning process. For example, the forming process can include: first forming at least one film layer by the same film forming process, and then performing the same patterning process on the at least one film layer to form a layer structure containing a specific pattern. According to different specific patterns, the patterning process can include multiple coating, exposure, development or etching processes, and the specific patterns in the formed layer structure can be continuous or discontinuous, and the specific patterns can also be at different heights (or thicknesses).

[0042] The "slope angle" described herein refers to the included angle between the slope surface and the plane parallel to the surface of the substrate.

[0043] With the development of display technology, display products are constantly updated and iterated, and users have higher and higher requirements for display products. In addition to high requirements for the display performance (such as definition, color gamut, viewing angle, and brightness) of the screen, higher requirements are also put forward for the frame width. The frame width is one of the key indicators for measuring the design aesthetics and technical strength of display products, and the overall display product is developing towards narrow frame. For example, in the current mobile phone technology development wave, QHD (Quarter High Definition, 1 / 4 of the resolution of full high-definition screen) display has the advantages of higher pixel density, better color restoration, wider field of view, and higher screen brightness, and is widely used in the field of flagship mobile phones. QHD super-narrow frame is conducive to improving the user experience.

[0044] In order to realize the full-screen effect, a pad bending area is usually arranged on one side of the display area of the flexible display substrate to bend the binding area for connecting the circuit to the backlight side of the display substrate. The pad bending area is covered with a protective glue, such as MCL glue, which plays a role in protecting the pad bending area. For example, the thickness of the protective glue can be about 90 microns.

[0045] In order to achieve an extremely narrow frame, it is necessary to narrow the border area of the screen and slim down the screen. One way to slim down the screen is to thin the protective film of the bending area, such as thinning to half, one third or one fourth of the conventional thickness, or skipping the protective film of the bending area. However, the inventors of the present application have found that in the case of thinning or skipping the protective film of the bending area, the neutral layer of the bending area will change, which will increase the risk of breakage of the signal line of the bending area. Therefore, the inventors of the present application propose that in the case of thinning or skipping the protective film of the bending area, the organic insulating layer (such as the planar layer) originally located between the signal line and the substrate can be omitted at the bending area, that is, the organic insulating layer is opened at the bending area, so that the signal line of the bending area is located in the lower film layer, thereby reducing the strain of the signal line of the bending area in the bending state, and thereby reducing the risk of breakage of the signal line of the bending area. For example, by opening the above-mentioned organic insulating layer at the bending area, the signal line of the bending area can be located in the neutral layer of the bending area to prevent the signal line from breaking.

[0046] However, the inventors of the present application have further found that in the case of not setting the above-mentioned organic insulating layer at the bending area, the risk of short circuit of the signal line of the bending area will be higher. The reason is that if the above-mentioned organic insulating layer is not set at the bending area, the signal line will directly contact the film layer below the organic insulating layer, thereby increasing the risk of short circuit caused by the contact between the signal line and the other conductive layer material remaining in the bending area.

[0047] For example, the driving circuit layer of the display substrate includes a first source-drain metal layer (SD1), a second source-drain metal layer (SD2), and a planar layer (PLN1) located between the first source-drain metal layer (SD1) and the second source-drain metal layer (SD2), and the signal line of the bending area is located in the second source-drain metal layer (SD2). In order to make the signal line located in the neutral layer of the bending area or have a smaller strain, the bending area can not have the PLN1, that is, the PLN1 is opened at the bending area. However, in actual preparation, the bending area will have a step due to the need to etch the inorganic layer material below, and the edge step of the bending area may have residual SD1 material that is not etched clean when etching the SD1. If the bending area does not have the PLN1, the signal line is easy to contact the residual SD1 material, thereby increasing the risk of short circuit.

[0048] Therefore, the display substrate of the embodiments of the present disclosure is proposed, which adopts a border area design scheme, can reduce the risk of breakage of the signal line of the bending area in the case of thinning or skipping the protective film of the bending area, and reduce the risk of short circuit caused by the contact between the signal line of the bending area and the conductive material (such as the above-mentioned SD1 material) remaining in the bending area, which is beneficial to improve the reliability of the bending area line of the display substrate.

[0049] The display substrate provided by the embodiments of the present disclosure will be described in detail below with reference to the drawings.

[0050] Some embodiments of the present disclosure provide a display substrate, which includes a display area, a fanout area and a pad bending area located on one side of the display area. From the film layer structure, the display substrate includes a substrate, a first insulating layer, a second insulating layer, a conductive layer and a first trace layer arranged on the substrate.

[0051] The first insulating layer is arranged on one side of the substrate and covers the display area and the fanout area. The side of the first insulating layer away from the substrate is provided with a groove located in the pad bending area. The second insulating layer is arranged on the side of the first insulating layer away from the substrate, the second insulating layer is an organic material layer, covers the display area and the fanout area, and is provided with an opening in the pad bending area. The opening at least partially overlaps the bottom surface of the groove in the substrate. The conductive layer is arranged between the first insulating layer and the second insulating layer. The first trace layer is arranged on the side of the second insulating layer away from the substrate, and the first trace layer includes a plurality of first traces arranged at intervals. The first trace includes a main body segment and an overlapping segment connected to each other, the main body segment is located in the pad bending area and is arranged on the bottom surface of the groove exposed from the opening of the second insulating layer. The overlapping segment extends from the pad bending area to the fanout area and is arranged on the second insulating layer on top of the first insulating layer. An insulating protective layer is arranged between the first trace layer and the side surface of the groove.

[0052] The display substrate provided by some embodiments of the present disclosure, by arranging the opening in the pad bending area on the second insulating layer, exposing at least part of the bottom surface of the groove from the opening, and arranging the main body segment of the first trace in the pad bending area on the bottom surface of the groove exposed from the opening, it is beneficial to reduce the strain of the first trace in the bending state in the pad bending area in the case of thinning the protective glue in the pad bending area or not arranging the protective glue in the pad bending area, thereby reducing the risk of fracture of the first trace in the pad bending area.

[0053] Since the first insulating layer is provided with the groove located at the bending area on the side away from the substrate, when etching the conductive layer material of the bending area, the side step of the groove can have un-etched conductive layer material remaining. Considering that the second insulating layer, which can originally insulate the remaining conductive layer material, is provided with the above-mentioned opening at the bending area, the lap section of the first trace extends from the bending area to the fan-out area, and needs to pass through the side of the groove. If the first trace is directly laid on the side of the groove, it can easily contact the conductive layer material remaining at the side of the groove, thereby increasing the risk of short circuit of the first trace of the bending area. The display substrate provided by some embodiments of the present disclosure can insulate the conductive layer material remaining at the side step of the groove by providing an insulating protective layer between the first trace layer and the side of the groove, which is conducive to reducing the risk of short circuit caused by the contact between the first trace and the remaining conductive layer material, thereby improving the reliability of the trace in the bending area of the display substrate.

[0054] In some embodiments, the distance between the bottom end of the side of the groove and the central axis of the groove is less than the distance between the top end of the side of the groove and the central axis of the groove. The central axis of the groove is an axis that passes through the geometric center point of the bottom surface of the groove and is perpendicular to the substrate.

[0055] Considering that the conductive layer material is prone to remain at the edge region of the bottom surface of the groove (i.e., the region of the bottom surface of the groove close to the side of the groove) and the corner region between the side of the groove and the bottom surface of the groove, in some embodiments, the above-mentioned insulating protective layer can cover at least part of the edge region of the bottom surface of the groove close to the side of the groove, the corner region between the side of the groove and the bottom surface of the groove, and the side of the groove. This can effectively insulate the remaining conductive layer material and reduce the risk of short circuit caused by the contact between the first trace and the conductive layer material remaining at these positions. It should be noted that the range of the above-mentioned edge region can be determined according to the remaining condition of the conductive layer material at this position in actual experiments.

[0056] In some embodiments, the step structure formed by the side surface and the bottom surface of the groove comprises at least a first tread, a first slope, a second slope, and a second tread connected between the first slope and the second slope. The first tread is the bottom surface of the groove, the bottom end of the first slope is connected to the first tread, the top end of the first slope is connected to one end of the second tread close to the central axis of the groove, and the bottom end of the second slope is connected to the other end of the second tread away from the central axis of the groove. In some embodiments, the insulating protective layer covers the edge region of the first tread close to the first slope, the corner region between the first tread and the first slope, and the corner region between the second tread and the second slope, so as to protect the conductive layer material remaining in the edge region of the first tread close to the first slope, the corner region between the first tread and the first slope, and the corner region between the second tread and the second slope.

[0057] In some embodiments, the step structure further comprises a third slope and a third tread connected between the second slope and the third slope, the second slope is closer to the substrate than the third slope, the top end of the second slope is connected to one end of the third tread close to the central axis of the groove, and the bottom end of the third slope is connected to the other end of the third tread away from the central axis of the groove. In some embodiments, the third slope can be an inclined slope, the distance between the bottom end of the slope and the central axis of the groove is less than the distance between the top end of the slope and the central axis of the groove; and the third tread can be substantially parallel to the surface of the substrate.

[0058] It is found through research that the conductive layer material mainly remains in the edge region of the first tread close to the first slope, the corner region between the second tread and the second slope, and the corner region between the first tread and the first slope. Therefore, the insulating protective layer covers the edge region of the first tread close to the first slope,

[0059] In some embodiments, in addition to covering the edge region of the first tread close to the first slope, the corner region between the first slope and the first tread, and the corner region between the second tread and the second slope, the insulating protective layer can also cover the first slope, the second tread, the second slope, the third tread, the third slope, and the corner region between the third tread and the third slope, i.e., the insulating protective layer covers the entire side step of the groove. This is conducive to more comprehensive protection and further reduces the risk of short circuit caused by the contact between the first trace and the conductive layer material remaining in the side step of the groove.

[0060] In some embodiments, the first insulating layer includes a layer of inorganic insulating material, and in actual fabrication, the layer of inorganic insulating material at the bending region needs to be etched away to ensure the bending performance of the bending region, so that the side of the first insulating layer away from the substrate will form the groove at the bending region. In some embodiments, the first insulating layer is a multi-film layer structure including a plurality of inorganic layers stacked together, and the inorganic layers are film layers that do not cover the bending region, i.e., the part of the inorganic layers at the bending region needs to be etched away during fabrication, so as to form the groove together with the underlying film layer. The side of the groove includes the side of the inorganic layers facing the bending region. In the direction perpendicular to the substrate, the depth of the groove can be greater than or equal to the thickness of the plurality of inorganic layers. For example, the depth of the groove can be substantially equal to the sum of the thicknesses of the plurality of inorganic layers.

[0061] For example, in the case where the first insulating layer includes a plurality of inorganic layers stacked together, the part of the first insulating layer at the bending region can be etched by using a two-time etching process. Alternatively, the part of the first insulating layer at the bending region can be etched by using a one-time, three-time or more than three-time etching process.

[0062] In the case where the part of the first insulating layer at the bending region is etched by using a two-time etching process, the first etching process can be referred to as edge bending step A+ILD etch (EBI), and the second etching process can be referred to as edge bending step B (EBB). The groove can include a first sub-groove and a second sub-groove, the first sub-groove is located at the side of the second sub-groove close to the substrate, and the first sub-groove communicates with the second sub-groove in the direction perpendicular to the substrate, and the orthographic projection of the opening of the first sub-groove on the substrate is located within the orthographic projection of the opening of the second sub-groove on the substrate. The second sub-groove can be formed by the EBI process, and the first sub-groove can be formed by the EBB process. The side of the first sub-groove can include the first slope, and the side of the second sub-groove can include the second slope, the third slope and the third slope.

[0063] In some embodiments, the display substrate includes a driving circuit layer disposed on one side of the base substrate. The driving circuit layer is located in the display area and is configured to form a pixel driving circuit. In some embodiments, the driving circuit layer includes a first source-drain metal layer, a first planar layer, and a second source-drain metal layer. The first planar layer is disposed on a side of the first source-drain metal layer away from the base substrate. The second source-drain metal layer is disposed on a side of the first planar layer away from the base substrate. The first insulating layer described above can include an inorganic insulating layer between the base substrate and the first source-drain metal layer, the conductive layer can be the first source-drain metal layer, the first trace layer of the bending area can be disposed in the same layer as the second source-drain metal layer, and the second insulating layer can include the first planar layer. The opening of the second insulating layer in the bending area can be disposed in the first planar layer. For example, in the case where the second insulating layer is the first planar layer, the first planar layer is not formed at the bending area during actual production, so that the first planar layer has an opening in the bending area.

[0064] In some embodiments, in addition to the first source-drain metal layer and the second source-drain metal layer, the display substrate can include a second planar layer, a third source-drain metal layer, and a third planar layer. The second planar layer is disposed on a side of the second source-drain metal layer away from the base substrate, the third source-drain metal layer is disposed on a side of the second planar layer away from the base substrate, and the second planar layer is disposed on a side of the second source-drain metal layer away from the base substrate.

[0065] In the case where the driving circuit layer includes three source-drain metal layers, in some embodiments, the first trace layer of the bending area can be disposed in the same layer as the second source-drain metal layer, the conductive layer can be disposed in the same layer as the first source-drain metal layer, the second insulating layer can be the first planar layer, the opening of the second insulating layer in the bending area can be disposed in the first planar layer, and the second planar layer covers the display area, the fan-out area, and the bending area; in other embodiments, the first trace layer of the bending area can also be disposed in the same layer as the third source-drain metal layer, the conductive layer can be disposed in the same layer as the second source-drain metal layer, the first insulating layer can include the first planar layer, the second insulating layer can include the second planar layer, the opening of the second insulating layer in the bending area can be disposed on the second planar layer, and the third planar layer covers the display area, the fan-out area, and the bending area.

[0066] FIG. 1 shows a plan view of a display substrate according to some embodiments of the present disclosure, and FIG. 2 shows a schematic view of region A in FIG. 1. It should be noted that the display substrate shown in FIG. 1 is only for illustration and does not limit the shape and size of the display substrate, which are determined according to the needs of the display product to be actually applied.

[0067] As shown in FIG. 1, the display substrate 10 can include a display area AA and a non-display area NA. For example, the non-display area NA can be located at one side of the display area AA, or can be located at multiple sides of the display area AA, such as the non-display area NA can be located around the outside of the display area AA.

[0068] In some embodiments, the display area AA can include a plurality of pixel units arranged in an array, and the actual arrangement of the pixel units can be determined according to the needs of the product. For example, the display area AA is provided with a plurality of pixel units arranged in an array in a first direction and a second direction. The first direction is a pixel row direction, and the second direction is a pixel column direction. The first direction and the second direction intersect, for example, can be perpendicular to each other. For example, the first direction can be the X-axis direction in FIG. 1, and the second direction can be the Y-axis direction in FIG. 1. For example, the plurality of pixel units can be arranged in M rows and N columns, and M and N are integers greater than or equal to 2.

[0069] Each pixel unit includes a plurality of sub-pixels, and each sub-pixel can display a single color. For example, the plurality of sub-pixels can include a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the first sub-pixel, the second sub-pixel, and the third sub-pixel are sub-pixels of different colors, such as can display one of red, green, and blue three primary colors, respectively. The brightness (gray scale) of the sub-pixels of different colors in each pixel unit can be adjusted, and a variety of colors can be displayed through color combination and superposition, thereby realizing full-color display.

[0070] Each sub-pixel can include a light emitting device and a pixel driving circuit for driving the light emitting device to emit light. For example, the light emitting device can be an electroluminescent device such as OLED or QLED (Quantum Dot Light Emitting Diodes).

[0071] The pixel driving circuit can include a plurality of transistors and capacitors and the like. For example, the pixel driving circuit can each include three transistors and one capacitor, forming a 3T1C (i.e., one driving transistor, two switching transistors, and one capacitor). It can also include more than three transistors and at least one capacitor, such as 4T1C (i.e., one driving transistor, three switching transistors, and one capacitor), 5T1C (i.e., one driving transistor, four switching transistors, and one capacitor), or 7T1C (i.e., one driving transistor, six switching transistors, and one capacitor), etc. Among them, the transistor can be a thin film transistor (Thin Film Transistor, abbreviated as TFT), a field effect transistor (metal oxide semiconductor, abbreviated as MOS), or other switching devices with the same characteristics.

[0072] It can be understood that the transistor can include a control electrode, a first electrode and a second electrode. Among them, the control electrode is the gate electrode of the transistor, the first electrode is one of the source electrode and the drain electrode of the transistor, and the second electrode is the other of the source electrode and the drain electrode of the transistor. Since the source electrode and the drain electrode of the transistor can be symmetrical in structure, the source electrode and the drain electrode of the transistor can be indistinguishable in structure, so the source electrode of the transistor is called the first electrode and can also be called the second electrode.

[0073] In some embodiments, each pixel unit can include a first color sub-pixel, a second color sub-pixel and a third color sub-pixel. The first color sub-pixel emits light of a first color, the second color sub-pixel emits light of a second color, and the third color sub-pixel emits light of a third color.

[0074] In some embodiments, the light emitting device of the first color can be configured to emit light of the first color, the light emitting device of the second color can be configured to emit light of the second color, and the light emitting device of the third color can be configured to emit light of the third color. In other embodiments, the first color sub-pixel, the second color sub-pixel and the third color sub-pixel can also use white light emitting devices, and the first color sub-pixel can emit light of the first color, the second color sub-pixel can emit light of the second color, and the third color sub-pixel can emit light of the third color by filtering through a color filter layer. For example, the first color, the second color and the third color can be one of the three primary colors (i.e., red, green and blue).

[0075] As shown in FIG. 2, the non-display area NA can include a fan-out area and a bending area BEND located on one side of the display area AA. In some embodiments, the fan-out area can include a first fan-out area FOUT1 and a second fan-out area FOUT2, the first fan-out area FOUT1 is located between the bending area BEND and the display area, and the second fan-out area FOUT2 is located on the side of the bending area BEND away from the display area. The display substrate 10 further includes a second trace layer and a third trace layer. The first trace layer 140 is located in the first fan-out area FOUT1 and includes a plurality of second traces. The third trace layer is located in the second fan-out area FOUT2 and includes a plurality of third traces. The overlapping portion of the first trace 141 on the side close to the first fan-out area FOUT1 is electrically connected to the second trace through a via, and the overlapping portion of the first trace 141 on the side close to the second fan-out area FOUT2 is electrically connected to the third trace through a via.

[0076] In some embodiments, the non-display area NA can further include a binding area located on a side of the bending area BEND away from the display area AA. In the preparation of the display module, by bending the bending area BEND, the binding area can be bent to the non-display side of the display substrate 10, so as to reduce the overall size of the display substrate 10 by utilizing the space on the non-display side of the display substrate 10. As shown in FIG. 2, the binding area can be provided, for example, on a side of the first fan-out area FOUT1 away from the display area. The binding area is provided with a plurality of binding pads, and the third traces are electrically connected to the corresponding binding pads. For example, the plurality of binding pads include data pads for receiving display data signals. The data signal lines connected to each sub-pixel in the display area AA can be connected to the corresponding data pads through the second traces of the first fan-out area FOUT1, the first traces 141 of the bending area BEND, and the third traces of the second fan-out area FOUT2.

[0077] In some embodiments, the binding area can include a first sub-binding area BOND1 and a second sub-binding area BOND2. In some embodiments, the binding pads of the first sub-binding area BOND1 can be used to bind a display driver integrated circuit (DDIC). Of course, in other embodiments, other ways can be used to package the display driver chip on the display substrate 10, which is determined according to the actual product needs, and the present disclosure does not limit this. The binding pads of the second sub-binding area BOND2 are used to bind a flexible circuit board, which is used to transmit external signals to the display driver chip.

[0078] In some embodiments, the non-display area NA can further include an electrostatic discharge area ESD located on a side of the display area AA. As shown in FIG. 2, the electrostatic discharge area ESD can be provided between the second fan-out area FOUT2 and the first sub-binding area BOND1.

[0079] FIG. 3A shows an exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2, and FIG. 3B shows a structural schematic view of the groove 111 in FIG. 3A, and FIG. 4 shows a cross-sectional view along the B-B cross-sectional line in FIG. 2.

[0080] As shown in FIG. 3A, the display substrate 10 includes a substrate 100, a first insulating layer 110, a conductive layer 120, a second insulating layer 130, and a first trace layer 140 provided on a side of the substrate 100. It should be noted that the conductive layer 120 refers to a film layer having a conductive property located below (close to the substrate 100 side) and adjacent to the first trace layer 140, that is, in actual preparation, the conductive layer 120 will be prepared before the first trace layer 140, and no other film layer having a conductive property is formed between the conductive layer 120 and the first trace layer 140.

[0081] In some embodiments, the display substrate 10 described above is a flexible display substrate, and the substrate 100 includes at least one flexible substrate. As shown in FIG. 3A, the substrate 100 can include a first flexible substrate layer 101 and a second flexible substrate layer 103, and a first barrier layer 102 which is arranged in a stack between the first flexible substrate layer 101 and the second flexible substrate layer 103. The material of the flexible substrate layer can include, for example, a PI (Polyimide) substrate, a PET (Polyethylene Terephthalate) substrate, or a PEN (Polyethylene naphthalate two formic acid glycol ester) substrate, etc.

[0082] As shown in FIG. 3A, the side of the first insulating layer 110 away from the substrate 100 is provided with a groove 111 located at the bending area BEND. For example, the groove 111 can be formed by the sidewall of the substrate 100 and the first insulating layer 110 facing the bending area BEND. The second insulating layer 130 is arranged on the side of the first insulating layer 110 away from the substrate 100, covers the display area and the fan-out area, and is provided with an opening 131 located at the bending area BEND. The conductive layer 120 is located between the first insulating layer 110 and the second insulating layer 130. The first trace layer 140 is arranged on the side of the second insulating layer 130 away from the substrate 100. The first trace layer 140 includes a plurality of first traces 141 (only one of which is shown in FIG. 3A) arranged in a space. The first trace 141 includes a main segment 1411 and an overlapping segment 1412 connected to each other, the main segment 1411 is located at the bending area BEND and is arranged on the bottom surface of the groove 111 exposed from the opening 131 of the second insulating layer 130. The overlapping segment 1412 extends from the bending area BEND to the fan-out area across the side surface 1112 of the groove 111 and is arranged on the second insulating layer 130 on top of the first insulating layer 110. An insulating protective layer is arranged between the first trace layer 140 and the side surface 1112 of the groove 111, which functions to insulate the conductive layer 120 material remaining at the step of the side surface 1112 of the groove 111 from the first trace 141, so as to reduce the risk of short circuit of the first trace 141 caused by the conductive layer 120 material remaining.

[0083] As shown in FIG. 4, the display substrate 10 can include a drive circuit layer disposed on one side of the substrate 100 and located in the display area. The drive circuit layer is configured to form pixel drive circuits of sub-pixels, for example, can form transistors and capacitors included in the pixel drive circuits and form a plurality of signal lines. For example, the plurality of signal lines can include power signal lines, data signal lines, reset signal lines, scanning signal lines (also referred to as gate lines), enable signal lines, and initialization signal lines, and the like, and specific details can be referred to in related technologies, which will not be described here. The pixel drive circuit can adopt an LTPO (Low Temperature Poly Crystalline Oxide) pixel drive circuit, or can also adopt an LTPS (Low Temperature Poly-Silicon) pixel drive circuit, which is set according to the actual product needs, and the present disclosure does not limit this. FIG. 4 is a schematic diagram taking the LTPO pixel drive circuit as an example.

[0084] In some embodiments, the drive circuit layer can include a first active layer 241, a first gate dielectric layer 242, a first gate metal layer 243, a second gate dielectric layer 244, a second gate metal layer 245, a first interlayer insulating layer 246, a second buffer layer 247, a second active layer 248, a third gate dielectric layer 249, a third gate metal layer 251, a second interlayer insulating layer 252, a first source-drain metal layer 253, a passivation layer 254, a first planarization layer 255, a second source-drain metal layer 256, a second planarization layer 257, a third source-drain metal layer 258, and a third planarization layer 259. For example, the material of the first active layer 241 includes low-temperature polysilicon to form a low-temperature polysilicon transistor. The material of the second active layer 248 includes a metal oxide such as IGZO (Indium Gallium Zinc Oxide) to form an oxide transistor. The first gate metal layer 243 (Gate1), the second gate metal layer 245 (Gate2), and the third gate metal layer 251 (Gate3) can be configured to form the gate of each transistor of the pixel drive circuit, form a capacitor, and form a scanning signal line; the first source-drain metal layer 253 (SD1) can be configured to form a data signal line and the source and drain of each transistor; the second source-drain metal layer 256 (SD2) can be configured to form a power signal line; and the third source-drain metal layer 258 (SD3) can be configured to form an anode connection portion of the light emitting device, and the pixel drive circuit can be electrically connected to the anode of the light emitting device through the anode connection portion.

[0085] It should be noted that the functional layers of the driving circuit layer shown in FIG. 4 are only schematic, and in other embodiments, the driving circuit layer can also include more or fewer functional layers, for example, it can also not include the third source-drain metal layer 258 (SD3) and the third planar layer 259, which are specifically set according to the actual product needs, and the present embodiment does not limit this.

[0086] As shown in FIG. 4, the display substrate 10 can further include a second barrier layer 210, a shield layer (Bottom Shield Metal, BSM) 220 and a first buffer layer 230 disposed between the substrate 100 and the driving circuit layer. For example, the second barrier layer 210 can include a first sub-barrier layer 211 and a second sub-barrier layer 212, the shield layer 220 can be disposed between the first sub-barrier layer 211 and the second sub-barrier layer 212, and the first buffer layer 230 is disposed between the second sub-barrier layer 212 and the first active layer 241. In some embodiments, the orthographic projection of the shield layer 220 on the substrate 100 can cover the orthographic projection of the driving transistor in the pixel driving circuit on the substrate 100, which is conducive to shielding the influence of static electricity on the driving transistor, and reducing the influence of external light incident from the side of the substrate 100 on the active layer of the driving transistor.

[0087] In the case where the conductive layer 120 and the first source-drain metal layer 253 are disposed in the same layer, the first insulating layer 110 can include an inorganic insulating layer between the substrate 100 and the first source-drain metal layer 253. For example, the display substrate 10 shown in FIG. 4, the first insulating layer 110 can include the second barrier layer 210, the first buffer layer 230, the first gate dielectric layer 242, the second gate dielectric layer 244, the first interlayer insulating layer 246, the second buffer layer 247, the third gate dielectric layer 249 and the second interlayer insulating layer 252. Accordingly, the side surface 1112 of the groove 111 can include the side surface of the second barrier layer 210, the first buffer layer 230, the first gate dielectric layer 242, the second gate dielectric layer 244, the first interlayer insulating layer 246, the second buffer layer 247, the third gate dielectric layer 249 and the second interlayer insulating layer 252 towards the bending area BEND. The depth of the groove 111 can be substantially equal to the sum of the thicknesses of the second barrier layer 210, the first buffer layer 230, the first gate dielectrical layer 242, the second gate dielectric layer 244, the first interlayer insulating 246, the second buffer layer 247, the third gate dielectric layer 249 and second interlayer insulating layer 252.

[0088] As shown in FIGS. 3A and 3B, the side surface 1112 and the bottom surface 1111 of the groove 111 form a stepped structure, which includes a first tread surface T1, a first slope surface P1, a second tread surface T2, a second slope surface P2, a third tread surface T3 and a third slope surface P3 connected in sequence.

[0089] In some embodiments, the first tread T1 can be the bottom surface 1111 of the groove 111, for example, can be a partial region of the side surface of the substrate substrate 100 close to the second barrier layer 210; the first slope P1 can be the side surface of the second barrier layer 210 facing the bending area BEND; the second tread T2 can be a partial region of the second barrier layer 210 away from the side surface of the substrate substrate 100, and the second slope P2 can include the side surface of the first buffer layer 230, the first gate dielectric layer 242, the second gate dielectric layer 244 and the first interlayer insulating layer 246 facing the bending area BEND; the third tread T3 can be a partial region of the first interlayer insulating layer 246 away from the side surface of the substrate substrate 100; and the third slope P3 can include the side surface of the second buffer layer 247, the third gate dielectric layer 249 and the second interlayer insulating layer 252 facing the bending area BEND.

[0090] In the case of the second insulating layer 130 in FIG. 3A as the first planar layer 255 and the first trace layer 140 being disposed in the same layer as the second source-drain metal layer 256, the edge position of the opening 131 of the first planar layer 255 in the bending area BEND can be controlled so that the first planar layer 255 can cover the side surface 1112 step of the groove 111, and the part of the first planar layer 255 covering the side surface 1112 step of the groove 111 can act as the above-mentioned insulating protective layer to insulate the first source-drain metal layer 253 material remaining at the side surface 1112 step of the groove 111. For example, in the case of the second insulating layer 130 in FIG. 3A as the first planar layer 255 and the first trace layer 140 being disposed in the same layer as the second source-drain metal layer 256, the film layer 150 in FIG. 3A can be a second planar layer 257, and the second planar layer 257 covers the bending area BEND.

[0091] As shown in FIG. 4A, the orthographic projection of the lower end of the opening 131 of the first planar layer 255 in the bending area BEND on the substrate substrate 100 is within the orthographic projection range of the bottom surface 1111 of the groove 111 on the substrate substrate 100. Since the first planar layer 255 has a certain thickness, due to the process, the area of the opening 131 region close to the side surface of the substrate substrate 100 can be different from the area of the opening 131 region away from the side surface of the substrate substrate 100. In order to facilitate the distinction, the upper end and the lower end are used herein to distinguish the opening 131 regions of the two side surfaces, and the lower end is the opening 131 region close to the side surface of the substrate substrate 100.

[0092] As shown in FIG. 3A, the first planar layer 255 includes a flat portion PL1 and a ramp portion PL2 connected with the flat portion PL1, the flat portion PL1 covers the display area and the fan-out area, and the ramp portion PL2 covers the side surface 1112 of the groove 111, and an end of the ramp portion PL2 close to the substrate 100 is in contact with the bottom surface 1111 of the groove 111, that is, the ramp portion PL2 covers the entire side surface of the groove 111 and the corner area of the bottom surface 1111 edge of the groove 111 and the side surface, so as to achieve a better insulation effect. The insulation protection layer includes the ramp portion PL2, for example, the ramp portion PL2 can be used as the insulation protection layer. The lap portion 1412 of the first trace 141 is arranged on the ramp portion PL2 and extends to the top of the flat portion PL1. That is, the main body portion 1411 of the first trace 141 is arranged on the bottom surface 1111 of the groove 111, so as to reduce the strain of the main body portion 1411 when the main body portion 1411 is in a bending state at the bending area BEND, and reduce the risk of breakage of the main body portion, the lap portion 1412 of the first trace 141 is electrically connected with the main body portion 1411 at the corner between the bottom surface of the groove 111 and the ramp portion PL2, and extends along the surface of the ramp portion PL2 facing the bending area BEND from the corner between the bottom surface of the groove 111 and the ramp portion PL2 towards the fan-out area, and extends to the top of the flat portion PL1 and is electrically connected with the trace in the fan-out area.

[0093] When the trace in the fan-out area (such as the second trace and the third trace described above) is arranged in the same layer as the first gate metal layer 243, or is arranged in the same layer as the second gate metal layer 245, or part of the trace is arranged in the same layer as the first gate metal layer 243 and part of the trace is arranged in the same layer as the second gate metal layer 245, the lap portion 1412 of the first trace 141 can be electrically connected with the trace in the fan-out area through a via. For example, the fan-out area can further include a switching portion arranged in the same layer as the first source-drain metal layer 253, and the lap portion 1412 can be electrically connected with the switching portion through a first via penetrating the first planar layer 255, and the switching portion is electrically connected with the trace in the fan-out area through a via.

[0094] In some embodiments, the orthographic projection of the ramp portion PL2 on the substrate 100 is a first projection area, and the orthographic projection of the side surface 1112 of the groove 111 on the substrate 100 is a second projection area, and the second projection area is located in the first projection area. That is, the ramp portion PL2 covers the entire side surface of the groove 111.

[0095] In the case of ensuring the step of the side surface 1112 of the climbing section PL2 covering the groove 111, in order to reduce the strain of the first routing line 141 in the bent state as much as possible, the opening 131 of the bending section BEND of the first flat layer 255 should be as large as possible, and therefore, the lower edge of the surface of the climbing section PL2 facing the bending section BEND and the lower edge of the side surface of the groove 111 can be adjacent to each other. The lower edge here refers to the edge close to the substrate 100. The lower edge of the side surface of the groove 111 is the edge of the side surface of the groove 111 that is connected to the bottom surface 1111 of the groove 111.

[0096] The covering distance of the climbing section PL2 to the bottom end of the side surface 1112 of the groove 111 can be determined according to the distance between the remaining first source / drain metal layer 253 material in the edge area of the actual bottom surface of the groove 111 and the bottom end of the side surface 1112 of the groove 111, so that the climbing section PL2 can cover the part of the remaining first source / drain metal layer 253 material. d1 in FIG. 3A represents the covering distance of the climbing section PL2 to the side surface of the groove 111, that is, the interval distance between the lower edge of the surface of the climbing section PL2 facing the bending section BEND and the lower edge of the side surface of the groove 111. In some embodiments, d can be 8-15 microns, for example, 8 microns, 10 microns, 13 microns or 15 microns, etc. In this way, even if there is first source / drain metal layer 253 material remaining at the step of the side surface 1112 of the groove 111, it will be covered by the climbing section PL2 of the first flat layer 255, and will not be short-circuited with the first routing line 141.

[0097] The boundary line of the first projection area close to the bending section BEND is referred to as the first boundary line, and the boundary line of the second projection area close to the bending section BEND is referred to as the second boundary line. The first boundary line and the second boundary line are adjacent to each other. The covering distance d of the climbing section PL2 to the bottom end of the side surface 1112 of the groove 111 is also the interval between the first boundary line of the first projection area and the second boundary line of the second projection area.

[0098] The surface topography of the climbing section PL2 facing the bending section BEND can be determined according to the film layer structure of the actual product and the process conditions. At least part of the surface of the climbing section PL2 facing the bending section BEND is arranged to be inclined with respect to the direction perpendicular to the substrate 100. As shown in FIG. 3A, the surface of the climbing section PL2 facing the bending section BEND can include a first inclined surface M1 and a second inclined surface M2 connected to the first inclined surface M1. The bottom end of the first inclined surface M1 is connected to the bottom surface 1111 of the groove 111. The slope angle of the first inclined surface M1 can be greater than the slope angle of the second inclined surface M2. In this way, it is beneficial to cover the step of the side surface 1112 of the groove 111 while increasing the lower end port area of the opening 131 of the bending section BEND of the first flat layer 255 as much as possible to ensure the bending performance of the bending section BEND.

[0099] For example, when the first planar layer 255 is prepared, the organic material layer for preparing the first planar layer 255 is coated in an entire layer. For example, a transparent resin material can be used. Due to the groove 111 at the bending area BEND, the organic material layer formed at the bending area BEND has a step difference with the organic material layer formed at the fan-out area and the display area, i.e., a slope is formed at the position corresponding to the side of the groove 111. Then, the organic material layer at the bending area BEND is removed to form the first planar layer 255 with the opening 131 at the bending area BEND. For example, the organic material layer at the bending area BEND is removed by etching. The first slope surface M1 is the slope formed by etching the opening 131 at the bending area BEND, the second slope surface M2 is the slope formed due to the step difference, and the slope angle of the slope formed by etching can be greater than the slope angle of the slope formed due to the step difference.

[0100] In some embodiments, during the preparation of the first planar layer 255, the ultraviolet bleaching instrument (iline Ultraviolet, IUV) can be turned on when the MASK process of the first planar layer 255 is performed, so as to reduce the slope angle of the climbing portion PL2 covering the side of the groove 111, thereby reducing the step difference at this position, reducing the risk of residual second source-drain metal layer 256 material, and reducing the risk of short circuit of the first trace 141 due to the residual second source-drain metal layer 256 material.

[0101] FIG. 5 shows another exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2. As shown in FIG. 5, the surface of the climbing portion PL2 facing the bending area BEND can include a first slope surface M1', a second slope surface M2', and a connecting surface M3 connecting the first slope surface M1' and the second slope surface M2', and the bottom end of the first slope surface M1' is connected to the bottom surface 1111 of the groove 111. The slope angle of the connecting surface M3 is smaller than the slope angle of the first slope surface M1' and the slope angle of the first slope surface M1'. For example, the connecting surface M3 can be substantially parallel to the surface of the substrate 100. In some embodiments, the slope angle of the second slope surface M2' can be greater than or equal to the slope angle of the first slope surface M1', which can cover the side 1112 of the groove 111. By providing a step on the surface of the climbing portion PL2 facing the bending area BEND, the step difference formed at the bending area BEND due to the opening 131 of the first planar layer 255 at the bending area BEND can be reduced, thereby reducing the risk of residual second source-drain metal layer 256 material when the first trace layer 140 is prepared.

[0102] For example, in the process of preparing the first planar layer 255, a halftone mask can be used above the side area of the opening 131 of the groove 111 during the etching process of removing the organic material layer of the bending area BEND, and a part of the organic material layer covering the side area can be etched away, so as to form a step on the surface of the ramp PL2 facing the bending area BEND, slow down the slope of the ramp PL2, and reduce the step formed by the first planar layer 255 in the opening 131 of the bending area BEND. For example, in the case where the first insulating layer 110 includes a plurality of inorganic layers stacked, the halftone mask can be used above the side surface 1112 of the second sub-groove 111 formed by the EBI process.

[0103] FIG. 6 shows another exemplary cross-sectional view along the A-A cross-sectional line in FIG. 2. As shown in FIG. 6, the opening 131 of the first planar layer 255 in the bending area BEND can also have an area larger than that of the bottom surface of the groove 111, i.e., the entire bottom surface of the groove 111 is exposed from the opening 131. That is, the orthographic projection of the bottom surface 1111 of the groove 111 on the substrate 100 is within the orthographic projection range of the lower end of the opening 131 on the substrate 100. The display substrate 10 further includes a cover layer 200 located in the bending area BEND and disposed on the side of the first trace layer 140 close to the substrate 100, covering at least part of the bottom surface 1111 of the groove 111 and the side surface 1112 of the groove 111. At this time, the above-mentioned insulating protective layer includes the cover layer 200 located between the side surface 1112 of the groove 111 and the first trace layer 140. It should be noted that the cover layer 200 is prepared after the above-mentioned conductive layer 120 (such as the first source / drain metal layer 253), so that the cover layer 200 covers at least part of the bottom surface 1111 of the groove 111 and the side surface

[0104] In some embodiments, the first planar layer 255 can cover part of the side surface of the groove 111 close to the top end, the cover layer 200 can cover part of the side surface of the groove 111 close to the bottom end, and the above-mentioned insulating protective layer includes the cover layer 200 and the first planar layer 255 located between the side surface 1112 of the groove 111 and the first trace layer 104. The cover layer 200 and the first planar layer 255 can be connected at the side surface 1112 of the groove 111 to realize the coverage of the entire side step of the groove 111, or the cover layer 200 and the first planar layer 255 can not be connected at the side surface 1112 of the groove 111, i.e., there is a gap between them.

[0105] In some embodiments, in the case that the side surface 1112 and the bottom surface 1111 of the groove 111 form a step structure as shown in FIG. 6, the cover layer 200 can cover the corner region between the first tread surface T1 and the first slope surface P1, the first slope surface P1, the second tread surface T2, and the corner region between the second tread surface T2 and the second slope surface P2 of the step structure, so as to cover the conductive layer 120 material possibly remaining at the step of the side surface 1112 of the groove 111 by the cover layer 200, to reduce the risk of short circuit caused by the conductive layer 120 material remaining.

[0106] In some embodiments, the cover layer 200 can be an inorganic insulating material layer, for example, the material of the cover layer 200 can include silicon oxide. In the case that the cover layer 200 is an inorganic insulating material layer, the thickness of the cover layer 200 in the direction perpendicular to the substrate substrate 100 can be less than 3000 angstroms, to reduce the influence of the cover layer 200 on the bending characteristics of the bending area BEND.

[0107] In some embodiments, in the case that the above-mentioned driving circuit layer includes a passivation layer 254 disposed between the first source-drain metal layer 253 and the first planarization layer 255, the cover layer 200 can be disposed in the same layer as the passivation layer 254. The passivation layer 254 covers the first source-drain metal layer 253 and plays a role of protecting the first source-drain metal layer 253. For example, when the passivation layer 254 is prepared, a part of the passivation layer 254 of the bending area BEND can be left without etching, to serve as the above-mentioned cover layer 200. Considering that the first planarization layer 255 of the bending area BEND is etched, over-etching usually occurs, and the thickness of the passivation layer 254 can be 3000 angstroms. After a certain thickness of the passivation layer 254 is removed due to the over-etching of the first planarization layer 255, the thickness of the remaining passivation layer 254, i.e., the thickness of the above-mentioned cover layer 200, can be less than 3000 angstroms.

[0108] In some embodiments, the display substrate 10 further includes a pixel definition layer 260 and a plurality of light emitting devices 270, the pixel definition layer 260 is disposed on the side of the second insulating layer 130 away from the substrate substrate 100, the pixel definition layer 260 has a plurality of pixel openings 261 arranged at intervals in the display area, and the light emitting devices 270 are disposed at the pixel openings 261, and the pixel openings 261 are configured to define the light emitting areas of the light emitting devices 270. For example, one light emitting device 270 can be disposed at one pixel opening 261.

[0109] In some embodiments, the pixel definition layer 260 can be disposed on the side of the driving circuit layer away from the substrate substrate 100, for example, the pixel definition layer 260 in FIG. 4 is disposed on the side of the third planarization layer 259 away from the substrate substrate 100. For example, the pixel definition layer 260 can cover the bending area BEND, and the film layer 160 in FIG. 3A can be the pixel definition layer 260.

[0110] For example, taking the OLED device 270 as an example, in the direction away from the substrate 100, the OLED device 270 can include an anode layer 271, a light-emitting layer 272, and a cathode layer 273 which are sequentially stacked. The anode layer 271 is disposed between the pixel defining layer 260 and the driving circuit layer, the anode layers 271 of two adjacent OLED devices 270 are spaced apart and insulated from each other. The anode layer 271 is electrically connected to the pixel driving circuit, and at least part of the anode layer 271 is exposed at the pixel opening 261. For example, the orthographic projection of the lower end of the pixel opening 261 (i.e., the opening 131 on the surface close to the substrate 100 side) on the substrate 100 is located within the orthographic projection range of the anode layer 271 on the substrate 100.

[0111] The light-emitting layer 272 is disposed on the side of the anode away from the substrate 100. For example, at least part of the light-emitting layer 272 is located within the pixel opening 261 of the corresponding sub-pixel and forms an electrical connection with the anode layer 271 of the OLED device 270. In some embodiments, the light-emitting layer 272 can include a light-emitting material layer (EML) and a functional material layer stacked with the light-emitting material layer. For example, the functional material layer can include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), which are arranged as needed, and the present disclosure does not limit this.

[0112] The cathode layer 273 is stacked on the side of the light-emitting layer 272 away from the substrate 100. In some embodiments, the cathode layers 273 of adjacent OLED devices 270 can be connected together, such as the whole layer shown in FIG. 4, to facilitate access to the cathode voltage signal of each OLED device 270. In other embodiments, the cathode layers 273 of each OLED device 270 can also be spaced apart from each other, and electrically connected to each other through an additional conductive structure such as a metal isolation column.

[0113] In some embodiments, the anode layer 271 can be a composite structure composed of a transparent conductive oxide film / metal film / transparent conductive oxide film which are sequentially stacked. The material of the transparent conductive oxide film can be, for example, any one of ITO (Indium tin oxide) and IZO (Indium zinc oxide), and the material of the metal film can be, for example, any one or more of aluminum (Al), silver (Ag), titanium (Ti), and molybdenum (Mo). In other embodiments, the anode layer 271 can also be a single-layer structure, and the material of the single-layer structure can be, for example, any one of aluminum (Al), silver (Ag), titanium (Ti), and molybdenum(Mo).

[0114] In some embodiments, the cathode layer 273 can adopt any one of lithium (Li), aluminum (Al), magnesium (Mg), silver (Ag), and the like, or an alloy of any of the above materials, such as a magnesium-silver alloy and an aluminum-lithium alloy, and the like. In some embodiments, the anode layer 271 can serve as a reflective electrode, and the cathode layer 273 is configured to partially transmit and partially reflect the light emitted by the light-emitting layer 272, so as to achieve a better color gamut and light-emitting efficiency of the light-emitting device 270 by using the microcavity effect.

[0115] For example, the display substrate 10 shown in FIG. 4 is prepared by sequentially forming a first flexible substrate layer 101, a first barrier layer 102, and a second flexible substrate layer 103; forming a first sub-barrier layer 211 on the second flexible substrate layer 103, forming a metal material layer on the first sub-barrier layer 211, patterning and etching the metal material layer to form a shielding layer 220, and then forming a second sub-barrier layer 212; sequentially forming a first buffer layer 230, a first active layer 241, a first gate dielectric layer 242, a first gate metal layer 243, a second gate dielectric layer 244, a second gate metal layer 245, a first interlayer insulating layer 246, a second buffer layer 247, a second active layer 248, a third gate dielectric layer 249, a third gate metal layer 251, and a second interlayer insulating layer 252 on the second sub-barrier layer 212. For example, the first buffer layer 230 and the second interlayer insulating layer 252 can have a multi-layer structure, such as a stacked structure of a silicon oxide layer and a silicon nitride layer. Then, a via of the driving circuit layer is made, and the inorganic insulating layer covering the substrate 100 of the bending area BEND is etched. Next, a first source-drain metal layer 253, a passivation layer 254, a first planarization layer 255, a second source-drain metal layer 256, a second planarization layer 257 (PLN2), a third source-drain metal layer 258, a third planarization layer 259, an anode layer 271, and a pixel definition layer 260 are formed. The above preparation process can use a total of 17 masks.

[0116] It should be noted that, in addition to the above film layer structure, the display substrate 10 can also include other film layer structures, which can be set according to the actual product needs.

[0117] In some embodiments, the display substrate 10 can further include a PS layer (Photo Spacer) (not shown in FIG. 4), which can be disposed on top of the pixel definition layer 260, i.e., in the area between adjacent pixel openings 261.

[0118] In some embodiments, the display substrate 10 can further include an encapsulation layer 280. The encapsulation layer 280 covers the plurality of light emitting devices 270 to protect the light emitting devices 270 from water and oxygen. For example, the encapsulation layer 280 can include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer can be made of inorganic insulating materials such as nitride, oxide, oxynitride, nitrate, carbide, or any combination thereof. The organic encapsulation layer can be made of organic insulating materials such as acrylic, polyacrylate, polycarbonate, or polystyrene.

[0119] In some embodiments, the display substrate 10 can further include a touch structure layer 290 disposed on a side of the encapsulation layer away from the substrate 100 to facilitate touch function. For example, the touch structure layer 290 can be prepared by FMLOC (Flexible Multi Layer On Cell) technology, which can be referred to related art. For example, the touch structure layer 290 can include a first touch metal layer, a second touch metal layer, and a touch insulating layer disposed between the first touch metal layer and the second touch metal layer. The first touch metal layer and the second touch metal layer do not overlap with the pixel opening 261 in the substrate 100. One of the first touch metal layer and the second touch metal layer is configured to dispose a first touch electrode and a second touch electrode, and the other is configured to dispose a bridge portion bridging the first touch electrode or the second touch electrode. The extension directions of the first touch electrode and the second touch electrode intersect each other, for example, can be perpendicular to each other. Taking an example that the first touch metal layer is disposed with a bridge electrode and the second touch metal layer is disposed with the first touch electrode and the second touch electrode, the second touch electrode includes a plurality of electrode units, two adjacent electrode units are disconnected at a position across the first touch electrode, and a via is provided in the touch insulating layer and bridged by the bridge electrode provided by the first touch metal layer.

[0120] In some embodiments, the display substrate 10 can further include a color filter layer and a light shielding layer (not shown in the figure) disposed on a side of the encapsulation layer away from the substrate 100. The light shielding layer can include a plurality of light transmission openings arranged at intervals, and the color filter layer can include a plurality of color filter portions. Each color filter portion is disposed at a light transmission opening. For example, the plurality of color filter portions can include red filter portions, green filter portions, and blue filter portions. The red sub-pixels correspond to the red filter portions, the green sub-pixels correspond to the green filter portions, and the blue sub-pixels correspond to the blue filter portions. In some embodiments, the light shielding layer can be formed of black light shielding material, also known as black matrix, abbreviated as BM.

[0121] In some embodiments, the display substrate 10 can further include a protective layer 300 (may also be referred to as a TOC) disposed on a side of the pixel defining layer 260 distal from the substrate 100. For example, in the case where the display substrate 10 includes the touch structure layer 290, the protective layer 300 can be disposed on a side of the touch structure layer 290 distal from the substrate 100 to protect the display substrate 10 from water and oxygen in the air. For example, the protective layer 300 can cover the display area, the fan-out area, and the bending area BEND, and be disposed as needed according to the actual product. For example, the film layer 170 in FIGS. 3A, 5, and 6 can be the protective layer TOC.

[0122] The display substrate 10 provided by some embodiments of the present disclosure can reduce the risk of short circuit caused by residues of the conductive layer 120 material (such as the first source-drain metal layer 253 material described above) and / or the first trace layer 140 material (such as the second source-drain metal layer 256 material described above) without increasing the number of masks.

[0123] FIG. 7 shows a structural schematic diagram of a display device according to some embodiments of the present disclosure. As shown in FIG. 7, the display device 1000 provided by some embodiments of the present disclosure includes the display substrate 10 provided by any one of the embodiments described above. Thus, the display device 1000 has technical effects corresponding to the beneficial technical effects of the display substrate 10 described above.

[0124] For example, the display device 1000 can be any electronic product or component having a display function, such as a mobile phone, a notebook computer, a tablet computer, a wearable display device (such as a smart watch or smart glasses, etc.), a television, a digital photo frame, etc.

[0125] In the above description, the technical details such as the patterning of the layers of the product are not described in detail. However, those skilled in the art should understand that the layers, regions, etc. of the desired shape can be formed by various technical means. In addition, those skilled in the art can also design methods that are not exactly the same as the methods described above to form the same structure. Although each embodiment is described above separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination.

[0126] It should be noted that the drawings of the embodiments of the present disclosure only relate to the structures involved in the embodiments of the present disclosure, and other structures can be referred to the usual design. The embodiments of the present disclosure and the features in the embodiments can be combined with each other to obtain new embodiments without conflict.

[0127] Although some embodiments of the present disclosure have been described, those skilled in the art can make additional changes and modifications to these embodiments once they understand the basic inventive concept. Therefore, the appended claims are intended to include the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

Claims

1. A display substrate, comprising a display area and a fan-out area and a bending area located on one side of the display area, the display substrate comprising: Substrate; A first insulating layer is disposed on one side of the substrate, covering the display area and the fan-out area. A groove located in the bending area is provided on the side of the first insulating layer away from the substrate. A second insulating layer is disposed on the side of the first insulating layer away from the substrate. The second insulating layer is an organic material layer that covers the display area and the fan-out area. An opening is provided in the bending area, and the opening at least partially overlaps with the orthographic projection of the bottom surface of the groove on the substrate. A conductive layer is disposed between the first insulating layer and the second insulating layer; as well as A first wiring layer is disposed on the side of the second insulating layer away from the substrate. The first wiring layer includes a plurality of first wirings spaced apart. Each first wiring includes a main body segment and an overlapping segment connected to each other. The main body segment is located in the bending area and is disposed on the bottom surface of the groove exposed from the opening. The overlapping segment extends from the bending area to the fan-out area and overlaps the second insulating layer on top of the first insulating layer. An insulating protective layer is disposed between the first wiring layer and the side of the groove.

2. The display substrate according to claim 1, wherein, The distance between the bottom end of the side of the groove and the central axis of the groove is less than the distance between the top end of the side of the groove and the central axis. The central axis of the groove is an axis that passes through the geometric center point of the bottom surface of the groove and is perpendicular to the substrate. The bottom end of the side is the end of the side closer to the substrate, and the top end of the side is the end of the side away from the substrate. The insulating protective layer covers the edge region of the bottom surface of the groove near the side surface of the groove, the corner region between the side surface of the groove and the bottom surface of the groove, and at least a portion of the side surface of the groove.

3. The display substrate according to claim 1, wherein, The side and bottom surfaces of the groove form a stepped structure. The stepped structure includes a first tread, a first slope, a second slope, and a second tread connecting the first slope and the second slope. The first tread is the bottom surface of the groove, and the bottom end of the first slope is connected to the first tread. The insulating protective layer covers the edge region of the first tread near the first slope, the corner region between the first tread and the first slope, and the corner region between the second tread and the second slope.

4. The display substrate according to claim 3, wherein, The stepped structure further includes a third slope and a third tread connecting the second slope and the third slope, wherein the second slope is closer to the substrate than the third slope. The insulating protective layer also covers the first slope, the second tread, the third tread, the third slope, and the corner area between the third tread and the third slope.

5. The display substrate according to any one of claims 1-4, further comprising a driving circuit layer disposed on one side of the substrate and located in the display area, the driving circuit layer comprising: First source / drain metal layer; A first planarization layer is disposed on the side of the first source / drain metal layer away from the substrate. as well as The second source / drain metal layer is disposed on the side of the first planarization layer away from the substrate. The first insulating layer includes an inorganic insulating layer between the first source / drain metal layer and the substrate, the conductive layer is disposed in the same layer as the first source / drain metal layer, the second insulating layer includes the first planarization layer, the opening is disposed in the first planarization layer, and the first trace layer is disposed in the same layer as the second source / drain metal layer.

6. The display substrate according to claim 5, wherein, The orthographic projection of the lower port of the opening onto the substrate is located within the orthographic projection range of the bottom surface of the groove onto the substrate, and the lower port is an opening area on the surface close to the substrate. The first flat layer includes a flat portion and a ramp portion connected to the flat portion, the flat portion covering the display area and the fan-out area, and the ramp portion covering the side of the recess; and The insulating protective layer includes the ramp portion, the overlapping section of the first wiring is laid on the ramp portion and extends to the top of the flat portion.

7. The display substrate according to claim 6, wherein, The orthographic projection of the ramp portion onto the substrate is a first projection area, and the orthographic projection of the side of the groove onto the substrate is a second projection area, with the second projection area located within the first projection area.

8. The display substrate according to claim 7, wherein, The distance between the first boundary line of the first projection area and the second boundary line of the second projection area is 8 to 15 micrometers. The first boundary line is the boundary line of the first projection area near the bending area, and the second boundary line is the boundary line of the second projection area near the bending area.

9. The display substrate according to claim 6, wherein, The surface of the climbing section facing the bending area includes a first slope and a second slope connected to the first slope. The bottom end of the first slope is connected to the bottom surface of the groove, and the slope angle of the first slope is greater than that of the second slope.

10. The display substrate according to claim 6, wherein, The surface of the climbing section facing the bending area includes a first slope, a second slope, and a connecting surface connecting the first slope and the second slope. The bottom end of the first slope is connected to the bottom surface of the groove. The slope angle of the connecting surface is smaller than that of the first slope and the first slope. The slope angle of the second slope is greater than or equal to that of the first slope.

11. The display substrate according to claim 5, wherein, The orthographic projection of the bottom surface of the groove onto the substrate is located within the orthographic projection range of the lower port of the opening onto the substrate. The display substrate further includes a cover layer located in the bending area, disposed on the side of the first wiring layer near the substrate, covering at least a portion of the bottom surface and side surface of the groove, and the insulating protective layer includes the cover layer located between the side surface of the groove and the first wiring layer.

12. The display substrate according to claim 11, wherein, The first planarization layer covers a portion of the side of the groove near the top, the cover layer covers a portion of the side of the groove near the bottom, and the insulating protective layer includes the cover layer and the first planarization layer located between the side of the groove and the first trace layer.

13. The display substrate according to claim 11, wherein, The side and bottom surfaces of the groove form a stepped structure. The stepped structure includes a first tread, a first slope, a second slope, and a second tread connecting the first slope and the second slope. The first tread is the bottom surface of the groove, and the bottom end of the first slope is connected to the first tread. The covering layer covers the corner area between the first tread and the first slope, the first slope, the second tread, and the corner area between the second tread and the second slope.

14. The display substrate according to claim 11, wherein, The cover layer is an inorganic insulating material layer, and the thickness of the cover layer in the direction perpendicular to the substrate is less than 3000 angstroms.

15. The display substrate according to claim 11, wherein, The driving circuit layer further includes: A passivation layer is disposed between the first source / drain metal layer and the first planarization layer, covering the first source / drain metal layer, and the cover layer and the passivation layer are disposed in the same layer.

16. The display substrate according to claim 1, further comprising a bonding region, wherein the fan-out region includes a first fan-out region and a second fan-out region, the first fan-out region being located between the bending region and the display region, the second fan-out region being located on the side of the bending region away from the display region, and the bonding region being located on the side of the second fan-out region away from the display region; The display substrate further includes: The second routing layer is located in the first fan-out area and includes multiple second routing layers; The third routing layer, located in the second fan-out area, includes multiple third routing layers; The bonding area is provided with multiple bonding pads. The third trace is electrically connected to the bonding pads. The overlap portion of the first trace near the first fan-out area is electrically connected to the second trace through a via. The overlap portion of the first trace near the second fan-out area is electrically connected to the third trace through a via.

17. The display substrate according to claim 1, wherein, The first insulating layer comprises a plurality of inorganic layers stacked together, and the depth of the groove along a direction perpendicular to the substrate is greater than or equal to the sum of the thicknesses of the plurality of inorganic layers.

18. The display substrate according to claim 1, further comprising: The system includes a pixel defining layer and multiple light-emitting devices. The pixel defining layer is disposed on the side of the second insulating layer away from the substrate. The pixel defining layer has multiple pixel openings spaced apart. The pixel openings are located in the display area, and the light-emitting devices are disposed at the pixel openings.

19. A display device, comprising: The display substrate according to any one of claims 1-18.

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