Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

5 results about "Logarithmic growth" patented technology

In mathematics, logarithmic growth describes a phenomenon whose size or cost can be described as a logarithm function of some input. e.g. y = C log (x). Note that any logarithm base can be used, since one can be converted to another by multiplying by a fixed constant. Logarithmic growth is the inverse of exponential growth and is very slow. A familiar example of logarithmic growth is a number, N, in positional notation, which grows as logb (N), where b is the base of the number system used, e.g. 10 for decimal arithmetic.

Shopping system based on WeChat applet and use method

The invention relates to the technical field of Internet shopping, in particular to a shopping system based on a WeChat applet and a use method, and the method comprises the steps: obtaining shopping cart operation behavior sequence data through WeChat applet front-end event monitoring; extracting time dimension and space dimension features, and outputting a decision vector of a three-dimensional orthogonal component through a vector synthesis algorithm and orthogonal normalization; establishing a strategy template library, calculating an Euclidean distance between a decision vector and a template to match a strategy, and adjusting an intensity parameter according to the vector modulus length; according to the method, user behaviors are converted into three-dimensional orthogonal vector purchase intention intensity, price sensitivity and decision hesitance, each component is calculated through algorithms such as logarithmic growth rate, maximum time interval and standard deviation, numerical expression of behavior characteristics is achieved, limitation of a traditional binarization model is broken through, and the user experience is improved. Discrete operation behaviors are quantified into computable and comparable feature vectors, so that merchants can accurately analyze user decision tendencies from multiple dimensions.
Owner:HUNAN BOSSGEILI TECHNOLOGY CO LTD

Digital hardware circuit for efficient reduction operations using parallel matrix comparison

A digital hardware circuit and method for performing reduction operations that achieves constant timing depth regardless of input count. The invention replaces conventional sequential binary tree approaches with a parallel matrix comparison architecture where multiple comparator circuits simultaneously compare input signals against each other. Combinatorial logic circuits process comparison outputs to generate dominance signals indicating which input satisfies the reduction criteria, and selection logic outputs the final result. The parallel approach maintains exactly three logic levels regardless of number of processing inputs, enabling significantly higher clock frequencies than conventional methods whose timing depth increases logarithmically with input count. Applications include matrix multiplication engines, floating-point arithmetic units, and artificial intelligence accelerators where reduction operations for maximum / minimum finding, normalization, and other computations are performed millions of times per second. The constant timing depth enables operation at frequencies exceeding 1 GHz while providing scalable performance.
Owner:NEXTSILICON LTD

Systems and Methods for Incrementally Verifying Distributed Computation Across Multiple Untrusted Nodes

A method and system for verifying distributed computations across multiple untrusted computing nodes. A setup entity generates cryptographic reference strings including succinct non-interactive arguments (SNARGs) and batch arguments (seBARGs) for multiple proof hierarchy levels. Prover entities compute state transitions using nondeterministic inputs, generate proofs for individual computation steps, and merge proofs hierarchically to create compact proofs whose size grows logarithmically with computation length rather than linearly. A verifier entity validates the merged proofs at each level. In a zero-knowledge variant, the setup entity additionally generates encryption keys and zero-knowledge proof parameters. Prover entities encrypt all computation states and wrap proofs in zero-knowledge layers, hiding sensitive intermediate values and witnesses while maintaining verifiability.
Owner:NTT RESEARCH INC

Unified nonlinear modeling approach for machine learning and artificial intelligence (attractor assisted AI)

A method for predicting future behavior for a dynamic system using an artificial intelligence system implemented within a computer hardware system. A predetermined amount of a time series group of data from the dynamic system defining previous behavior of the dynamic system are received at the artificial intelligence system. An attractor is constructed from the time series group of data that defines the previous behavior of the dynamic system using the artificial intelligence system. The attractor models the previous behavior of the dynamic system based on the predetermined amount of the time series group of data of the dynamic system. A prediction horizon for the predetermined amount of the time series group of data is determined with the artificial intelligence system using an attractor dimension of the constructed attractor and a Lyapunov exponent of the constructed attractor. The prediction horizon increases logarithmically as a length of the predetermined amount of the time series group of data from the dynamic system increases linearly. Prediction values of future behavior of the dynamic system are generated with the artificial intelligence system using the constructed attractor and the determined prediction horizon.
Owner:NXGEN PARTNERS IP LLC