Delay switch driving circuit and system

Abstract

The present application provides a time-delay switch driving circuit and system, and relates to the technical field of switch control driving circuit. The circuit includes: a control circuit, a switch circuit and a time-delay circuit, wherein the control circuit, the switch circuit and the time-delay circuit are electrically connected in sequence, the input end of the control circuit is electrically connected to the power-off control pin, and the output end of the time-delay circuit is connected to the controlled switch power supply. Among them, the control circuit controls the disconnection or conduction of the switch circuit and the time-delay circuit through the level signal output by the power-off control pin in the enabled state or the disabled state, so that the time-delay circuit outputs a power-off signal or a restart signal to the controlled switch power supply to control the controlled switch power supply to disconnect and automatically restart. In addition, through the time-delay circuit, the controlled switch power supply can be powered off or restarted after the power-off control pin outputs a level and reaches a preset time, so that the capacitive load in the electronic device system is fully discharged before restarting, thereby avoiding damage to the controlled switch power supply.

Description

Technical Field

[0001] The present invention relates to the technical field of switch control drive circuits, and in particular to a time-delay switch drive circuit and system. Background Art

[0002] With the continuous advancement and development of science and technology, people's lives have become inseparable from electronic devices. During the use of electronic devices, when encountering situations such as freezing or resource updates, it is inevitable to restart the electronic device system to ensure the normal operation of the electronic device.

[0003] In existing electronic equipment systems, when the system is powered off and restarted, a method of immediately powering on the system after the system is powered off is often adopted.

[0004] However, the internal architecture of electronic equipment systems has different levels of complexity. If the electronic equipment system is powered on immediately after a power outage, the system may not be fully discharged and then powered on again, which may cause the electronic equipment system to fail to start normally. Summary of the invention

[0005] The purpose of the present invention is to provide a time-delay switch driving circuit and system to address the deficiencies in the above-mentioned prior art, so as to solve the problem in the prior art that, during the power-off and restart process of the electronic system, the power is immediately turned on after power failure, and the load in the system is not completely discharged before the second power-on, resulting in the system failing to start normally, thereby affecting the performance of the electronic equipment system.

[0006] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] In a first aspect, an embodiment of the present application provides a time-delay switch driving circuit, comprising: a control circuit, a switch circuit and a time-delay circuit;

[0008] The input end of the control circuit is electrically connected to the power-off restart control pin, the output end of the control circuit is electrically connected to the input end of the switch circuit, the output end of the switch circuit is electrically connected to the input end of the delay circuit, and the output end of the delay circuit is electrically connected to the controlled switch power supply;

[0009] The control circuit is used to control the switch circuit to disconnect from the delay circuit based on the first state of the power-off restart control pin, so that the delay circuit outputs a power-off signal to the controlled switch power supply after a first preset delay time, and the controlled switch power supply powers off the system under the action of the power-off signal;

[0010] When the system is in a power-off state, the power-off restart control pin switches from the first state to the second state; the control circuit controls the switch circuit to be connected to the delay circuit based on the second state of the power-off restart control pin, so that the delay circuit outputs a restart signal to the controlled switch power supply after a delay of a second preset time, and the controlled switch power supply powers on the system under the action of the restart signal.

[0011] Optionally, the control circuit includes a comparison circuit;

[0012] The comparison circuit compares the level output by the power-off restart control pin in the first state or the second state with a preset threshold voltage, and controls the connection state of the switch circuit and the delay circuit according to the comparison result.

[0013] Optionally, the delay circuit is used to discharge when the switch circuit is disconnected from the delay circuit, and output a power-off signal to the controlled switch power supply after the voltage is discharged to be lower than the threshold voltage of the enable pin of the controlled switch power supply; and is also used to charge when the switch circuit is connected to the delay circuit, and output a restart signal to the controlled switch power supply after the voltage is charged to reach the threshold voltage;

[0014] The duration of the discharging is the first preset time, and the duration of the charging is the second preset time.

[0015] Optionally, the first state of the power-off restart control pin is a low level, and the second state is a high level;

[0016] When the power-off restart control pin is in the first state, the output level of the comparison circuit is a high level, and the switch circuit is disconnected from the delay circuit; when the power-off restart control pin is in the second state, the output level is a low level, and the switch circuit is connected to the delay circuit.

[0017] Optionally, the comparison circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor;

[0018] The non-inverting input terminal of the operational amplifier is connected to the first power supply through the fourth resistor, and the non-inverting input terminal of the operational amplifier is also grounded through the fifth resistor; the output terminal of the operational amplifier is connected to the non-inverting input terminal of the operational amplifier through the third resistor;

[0019] The inverting input terminal of the operational amplifier is connected to the first power supply through the first resistor, and the inverting input terminal of the operational amplifier is also grounded through the second resistor;

[0020] The input end of the comparison circuit is the inverting input end of the operational amplifier, and the output end of the comparison circuit is the output end of the operational amplifier.

[0021] Optionally, the comparison circuit further includes: a filter circuit; and the first power supply is grounded through the filter circuit.

[0022] Optionally, the switch circuit includes: a switch tube, a sixth resistor, and a seventh resistor; the output end of the switch circuit is the drain of the switch tube;

[0023] The output end of the comparison circuit is connected to the gate of the switch tube through the seventh resistor, the source of the switch tube is connected to the second power supply, and the drain of the switch tube is grounded through the sixth resistor.

[0024] Optionally, the delay circuit includes: a current limiting resistor and a storage capacitor;

[0025] The output end of the delay circuit is one end of the storage capacitor;

[0026] The output end of the switch circuit is connected to one end of the storage capacitor through the current limiting resistor, and the other end of the storage capacitor is grounded; the current limiting resistor is used to limit the charging and discharging current of the storage capacitor.

[0027] Optionally, the switch tube is a MOSFET field effect tube.

[0028] In a second aspect, an embodiment of the present application further provides a time-delay switch driving system, comprising: a controller, the time-delay switch driving circuit described in the first aspect above, and a controlled switch power supply;

[0029] The controller is connected to the input end of the control circuit in the delay switch driving circuit via a power-off restart control pin;

[0030] The output end of the delay circuit in the delay switch driving circuit is connected to the enable pin of the controlled switch power supply.

[0031] The beneficial effects of the present application are as follows: the control circuit outputs a level signal in the first state through the power-off restart control pin, the switch circuit is disconnected from the delay circuit, the delay circuit outputs a power-off signal to the controlled switch power supply after a preset delay time to power off the system, after the system is powered off, the power-off restart control pin switches from the first state to the second state, the control circuit outputs a level signal in the second state through the power-off restart control pin, the switch circuit is connected to the delay circuit, and the delay circuit outputs a restart signal to the controlled switch power supply after a preset delay time to restart the system, thereby causing the system to automatically restart after the preset power-off time.

[0032] In the delay switch driving circuit, the delay circuit is designed so that there is a certain interval time before the system is powered off and powered on again, so as to ensure that the capacitive load in the system has enough time to discharge before the second power-on during the system power-off restart process, and the capacitive load is discharged as completely as possible to ensure the normal startup of the system after the second power-on, thereby improving the performance of the electronic equipment system.

[0033] Secondly, the control circuit in this application uses a dual threshold voltage to determine the logical state of the control signal, which can effectively filter out the jitter of the control signal, avoid the hidden danger of repeated switching caused by the jitter of the control signal, and ensure the logical stability and strong driving capability of the level signal output by the control circuit to the switching circuit.

[0034] In addition, the switching circuit is designed in the previous stage of the delay circuit, which ensures the fast turn-on and turn-off characteristics of the switching tube in the switching circuit, and does not cause the signal of the switching tube driving stage to rise too slowly, causing the switching tube to be in the amplification area for a short time, thereby avoiding the crossover loss of the switching tube in the switching circuit. At the same time, it also avoids other unpredictable risks caused by the parasitic parameters of the switching tube itself during the slow turn-on and turn-off period.

[0035] Finally, in this application, the components used are all conventional general-purpose components, which have high mass manufacturability and cost advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 A schematic diagram of a delay switch driving circuit structure provided in an embodiment of the present application;

[0038] Figure 2 A schematic diagram of another delay switch driving circuit structure provided in an embodiment of the present application;

[0039] Figure 3 A schematic diagram of a time-delay switch driving system provided in an embodiment of the present application;

[0040] Figure 4 A schematic diagram of another time-delay switch driving system provided in an embodiment of the present application.

[0041] Icon: 100-delay switch driving circuit; 10-control circuit; 110-comparison circuit; 120-switching circuit; 130-delay circuit; 200-controller; 300-controlled switching power supply. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0043] Figure 1 A schematic diagram of a delay switch driving circuit structure provided in an embodiment of the present application; Figure 1 As shown, the delay switch driving circuit 100 includes: a control circuit 10, a switch circuit 120 and a delay circuit 130; wherein the input end of the control circuit 10 is electrically connected to the power-off restart control pin, the output end of the control circuit 10 is electrically connected to the input end of the switch circuit 120, the output end of the switch circuit 120 is electrically connected to the input end of the delay circuit 130, and the output end of the delay circuit 130 is electrically connected to the controlled switch power supply; wherein the control circuit 10 controls the disconnection or conduction of the switch circuit 120 and the delay circuit 130 through the level signal output by the power-off restart control pin in the first state or the second state, so that the delay circuit 130 outputs a power-off signal or a restart signal to the controlled switch power supply to control the controlled switch power supply to disconnect and automatically restart. The delay circuit 130 can further control the time of disconnection or restart of the controlled switch power supply, thereby effectively avoiding damage to the controlled switch power supply.

[0044] Optionally, the control circuit 10 is used to disconnect the switch circuit 120 from the delay circuit 130 based on the first state of the power-off restart control pin, so that the delay circuit 130 outputs a power-off signal to the controlled switch power supply after a delay of a first preset time, and the controlled switch power supply powers off the system under the action of the power-off signal; when the system is in a power-off state, the power-off restart control pin switches from the first state to the second state; the control circuit 10 is used to connect the switch circuit 120 with the delay circuit 130 based on the second state of the power-off restart control pin, so that the delay circuit 130 outputs a restart signal to the controlled switch power supply after a delay of a second preset time, and the controlled switch power supply powers on the system under the action of the restart signal.

[0045] It should be noted that the state of the above-mentioned power-off restart control pin may include an enabled state and a disabled state, and the level signal output by the power-off restart control pin is different for different states. Optionally, the first state of the power-off restart control pin may be an enabled state or a disabled state. When the first state of the power-off restart control pin is an enabled state, the second state of the corresponding power-off restart control pin may be a disabled state, and when the first state of the power-off restart control pin is a disabled state, the second state of the corresponding power-off restart control pin may be an enabled state. Among them, for different designs of power-off restart control pins, the level signal corresponding to the enabled state of the power-off restart control pin may also be different, for example: the level signal corresponding to the enabled state of the power-off restart control pin in the present application is a low level, and the level corresponding to the disabled state of the power-off restart control pin is a high level. Of course, for different designs of power-off restart control pins, the level signal corresponding to the enabled state of the power-off restart control pin may also be a high level, and the level corresponding to the disabled state of the power-off restart control pin may also be a low level.

[0046] It should be noted that in the present application scheme, the state of the power-off and restart control pin includes an enabled state and a disabled state. When the electronic device system needs to be powered off and restarted, that is, when the power-off and restart control pin receives a power-off and restart signal sent by the controller, the power-off and restart control pin is in the enabled state, and when the electronic device system is in the power-off state, the restart state, and the working state after power-on, the power-off and restart control pin is in the disabled state.

[0047] Optionally, the implementation principle of the delay switch driving circuit provided in the present embodiment is as follows: when the electronic device system freezes or the like and needs to be powered off and restarted, the power-off control pin receives a power-off and restart signal, and the power-off control pin is in a first state (enabled state). When the control circuit 10 is in the first state of the power-off control pin, the control switch circuit 120 is disconnected from the delay circuit 130. After delaying for a first preset time, the delay circuit 130 outputs a power-off signal to the controlled switch power supply, thereby powering off the electronic device system controlled by the controlled switch power supply; at this time, the system power supply stops working and no longer provides power to the outside, thereby enabling the control circuit 10 to The controller of the power-off restart control pin stops working, and the power-off restart control pin is no longer controlled by the controller. Its state switches from the first state to the second state, and the level output by the power-off restart control pin is calculated according to the voltage-dividing resistor preset in the circuit structure. At the same time, when the power-off restart control pin is in the second state, the control circuit 10 controls the switch circuit 120 to be connected with the delay circuit 130. After the delay of the second preset time, the delay circuit 130 outputs a restart signal to the controlled switch power supply, so that the electronic device system controlled by the controlled switch power supply restarts, that is, the process from power off to automatic restart is completed. Until the power-off restart control pin receives the power-off restart signal again, it enters the next power-off automatic restart cycle.

[0048] In summary, the delay switch driving circuit provided by the embodiment of the present application, the control circuit controls the switch circuit to disconnect from the delay circuit through the level signal output by the power-off restart control pin in the first state, and the delay circuit outputs a power-off signal to the controlled switch power supply after the preset delay time to power off the system. After the system is powered off, the power-off restart control pin switches from the first state to the second state, and the control circuit controls the switch circuit to be connected to the delay circuit according to the level signal output by the power-off restart control pin in the second state, and the delay circuit outputs a restart signal to the controlled switch power supply after the preset delay time to restart the system, so that the system automatically restarts after the preset power-off time. Among them, through the design of the delay circuit, there is a certain interval time before the system restarts after power failure, so as to ensure that the capacitive load in the system can be completely discharged before the system restarts, thereby avoiding damage to the controlled switch power supply and improving the performance of the electronic equipment system.

[0049] Furthermore, the control circuit 10 may include a comparison circuit 110; the comparison circuit 110 compares the level output by the power-off restart control pin in the first state or the second state with a preset threshold voltage, and controls the connection state of the switch circuit 120 and the delay circuit 130 according to the comparison result.

[0050] Optionally, the preset threshold voltage may include: a first preset threshold voltage or a second preset threshold voltage, wherein the first preset threshold voltage may be smaller than the second preset threshold voltage, and the first preset threshold voltage and the second preset threshold voltage may be obtained according to the actual circuit structure of the control comparison circuit 110 .

[0051] Optionally, the comparison circuit 110 in the present application uses a hysteresis comparator to determine the logical state of the control level signal output by the power-off restart control pin, which can effectively filter out the jitter of the control signal and ensure the logical stability and strong driving capability of the level signal output by the comparison circuit 110 to the switching circuit 120.

[0052] In some embodiments, the comparison circuit 110 compares the first level with the first preset threshold voltage based on the first level output by the power-off restart control pin in the first state. According to the comparison principle of the hysteresis comparator, since the first level output by the power-off restart control pin in the first state is a low level, which is less than the first preset threshold voltage, at this time, the output level of the comparison circuit 110 is a high level, and the switch circuit 120 is disconnected from the delay circuit 130; in other embodiments, the comparison circuit 110 compares the second level with the second preset threshold voltage based on the second level output by the power-off restart control pin in the second state. Since the second level output by the power-off restart control pin in the second state is a high level, which is greater than the second preset threshold voltage, at this time, the output level of the comparison circuit 110 is a low level, and the switch circuit 120 is connected to the delay circuit 130.

[0053] Among them, when the power-off and restart control pin of the control circuit 10 is in the first state, the control switch circuit 120 is disconnected from the delay circuit 130, and the delay circuit 130 outputs a power-off signal to the controlled switch power supply. At this time, the controlled switch power supply is powered off and no longer provides power to the outside. The power-off and restart control pin is switched from the first state to the second state. At this time, the control circuit 10 controls the switch circuit 120 to be connected with the delay circuit 130 based on the level signal output by the power-off and restart control pin, and the delay circuit 130 outputs a restart signal to the controlled switch power supply, thereby realizing the power-off and automatic restart process of the controlled switch power supply under the action of the power-off and restart control pin, the control circuit 10, the switch circuit 120 and the delay circuit 130.

[0054] Optionally, the delay circuit 130 is used to discharge when the switch circuit 120 is disconnected from the delay circuit 130, and output a power-off signal to the controlled switch power supply after the discharge voltage is lower than the threshold voltage of the enable pin of the controlled switch power supply; and is also used to charge when the switch circuit 120 is connected to the delay circuit 130, and output a restart signal to the controlled switch power supply after the charge voltage reaches the threshold voltage.

[0055] The duration of the discharge is the first preset time, and the duration of the charge is the second preset time. That is, when the discharge time of the delay circuit 130 reaches the first preset time, the voltage thereof reaches a requirement lower than the threshold voltage of the enable pin of the controlled switch power supply, thereby sending a power-off signal to the controlled switch power supply; and when the charge time of the delay circuit 130 reaches the second preset time, the voltage thereof reaches a requirement higher than the threshold voltage of the enable pin of the controlled switch power supply, thereby sending a restart signal to the controlled switch power supply.

[0056] It should be noted that in the present application, a delay circuit 130 is cascaded in the latter stage of the control circuit 10 and the switch circuit 120, so that when the controlled switch power supply is powered off, a power-off signal is output after a certain delay, and when the controlled switch power supply is restarted, a restart signal is output after a certain delay, so that the capacitive load in the system can be completely discharged when the system is restarted after power off, thereby avoiding the risk of the system failing to start normally due to incomplete system discharge before the second power-on, thereby ensuring the stability of the system restart.

[0057] Optionally, in the present application, the first state of the power-off restart control pin is a low level, and the second state is a high level; when the power-off restart control pin is in the first state, the comparison circuit 110 outputs a high level, and the switch circuit 120 is disconnected from the delay circuit 130; when the power-off restart control pin is in the second state, the output level is a low level, and the switch circuit 120 is connected to the delay circuit 130.

[0058] It should be noted that when the power-off restart control pin is in the first state (enabled state, low level), the input level of the comparison circuit 110 is low level. The comparison result of the low level and the first preset threshold voltage makes the comparison circuit 110 output a high level. At this time, the switch circuit 120 is disconnected from the delay circuit 130, and the delay circuit 130 outputs a power-off signal to the controlled switch power supply, and the controlled switch power supply is powered off and stops working. At this time, the controlled switch power supply no longer provides power to the outside, and the controller that controls the power-off restart control pin stops working. The power-off restart control pin switches from the first state to the second state (disabled state, high level). The comparison result of the high level and the second preset threshold voltage makes the comparison circuit 110 output a low level. At this time, the switch circuit 120 is connected to the delay circuit 130, and the delay circuit 130 outputs a restart signal to the controlled switch power supply, and the controlled switch power supply is powered off and restarts. Thus, the power-off and automatic restart of the system are completed.

[0059] Figure 2 Another schematic diagram of the structure of a delay switch driving circuit provided in an embodiment of the present application is as follows: Figure 2As shown, the comparison circuit 110 includes: an operational amplifier U1A, an inverting input circuit, a non-inverting input circuit and a feedback circuit; the input end of the comparison circuit 110 is the inverting input end of the operational amplifier U1A, and the output end of the comparison circuit 110 is the output end of the operational amplifier U1A; the input voltage of the comparison circuit 110 is the voltage of the inverting input end of the operational amplifier U1A.

[0060] The inverting input terminal of the operational amplifier U1A is connected to the inverting input circuit, the non-inverting input terminal of the operational amplifier U1A is connected to the non-inverting input circuit, and the output terminal of the operational amplifier U1A is connected to the non-inverting input terminal through a feedback circuit.

[0061] The inverting input circuit includes: a first resistor and a second resistor; the inverting input terminal of the operational amplifier U1A is connected to the first power supply through the first resistor, and the inverting input terminal of the operational amplifier U1A is also grounded through the second resistor. The non-inverting input circuit includes: a fourth resistor and a fifth resistor; the non-inverting input terminal of the operational amplifier U1A is connected to the first power supply through the fourth resistor, and the non-inverting input terminal of the operational amplifier U1A is also grounded through the fifth resistor. The feedback circuit includes: a third resistor; the output terminal of the operational amplifier U1A is connected to the non-inverting input terminal of the operational amplifier U1A through the third resistor.

[0062] As can be seen from the above, the input end of the comparison circuit 110 is connected to the power-off restart control pin. When the electronic device system is stuck due to a fault, the system is automatically restarted by changing the state of the power-off restart control pin so that the system can operate normally.

[0063] Optionally, when the system triggers a power-off restart signal, the power-off restart control pin is in a first state and outputs a low-level signal, that is, the input end of the comparison circuit 110 receives a low-level signal, the input voltage is 0V, and the input voltage is compared with a first preset threshold voltage, and the input voltage is lower than the first preset threshold voltage of the reverse input end of the operational amplifier U1A. At this time, the output of the operational amplifier U1A is a high level, so that the switch circuit 120 is disconnected from the delay circuit 130, and the delay circuit 130 outputs a power-off signal to the controlled switch power supply, and the controlled switch power supply is powered off and stops working. At this time, the controlled switching power supply no longer provides power to the outside, the controller controlling the power-off restart control pin stops working, and the power-off restart control pin switches from the first state to the second state. At this time, the input voltage of the comparison circuit 110 is calculated based on the voltage division of the first resistor and the second resistor. The calculated input voltage of the comparison circuit 110 is higher than the second preset threshold voltage. The level signal output by the power-off restart control pin is a high level. At this time, the output end of the comparison circuit 110 outputs a low level signal, so that the switch circuit 120 is connected to the delay circuit 130, and the delay circuit 130 outputs a restart signal to the controlled switching power supply, so that the controlled switching power supply switches from the power-off state to the restart state.

[0064] Among them, the preset threshold voltage can be calculated based on the threshold reference voltage (reference voltage) and the jitter range of the estimated signal high and low levels of the actual circuit (i.e., the signal noise amplitude), and the preset threshold voltage includes a first preset threshold voltage (low threshold voltage) or a second preset threshold voltage (high threshold voltage). When the input voltage of the comparison circuit 110 is lower than the low threshold voltage, the output level of the comparison circuit 110 is a high level, and when the input voltage of the comparison circuit 110 is higher than the high threshold voltage, the output level of the comparison circuit 110 is a low level. Optionally, when the output level of the comparison circuit 110 is a high level, the switch circuit 120 is disconnected from the delay circuit 130, and when the output level of the comparison circuit 110 is a low level, the switch circuit 120 is connected to the delay circuit 130.

[0065] In the present application, when determining the logic state of the control signal, the operational amplifier U1A used is a hysteresis comparator structure. Compared with a single logic determination threshold, the hysteresis comparator uses a dual determination threshold value, including a high threshold voltage and a low threshold voltage, which avoids frequent signal jitters during voltage comparison, and the level output by the control circuit 10 keeps jumping, causing the switch circuit 120 to be repeatedly disconnected and turned on, resulting in the instability of the entire delay switch driving circuit 100. That is, in the present application, by using a hysteresis comparator, the jitter of the control signal can be effectively filtered out, ensuring the logical stability and strong driving ability of the drive signal output to the subsequent switch circuit 120. In addition, considering the output state of the comparator after power failure, and combining the actual structure of the comparison circuit 110 in this embodiment, the comparator uses a hysteresis comparator with a clockwise structure, which meets the actual requirements in terms of power failure and restart logic. At the same time, the basic operational amplifier U1A constituting the comparator needs to use a device with rail voltage output characteristics to ensure that in the case of high-level output, the switch circuit 120 of the subsequent stage can be partially in a completely closed state.

[0066] Of course, when implementing the logic of the present application, it is not limited to selecting a clockwise hysteresis comparator. In some cases, a counterclockwise hysteresis comparator may also be selected. Accordingly, it is also necessary to adjust the resistance value of each component in the comparison circuit 110 to satisfy the comparison circuit 110's control over the connection status of the switch circuit 120 and the delay circuit 130.

[0067] Optionally, the high threshold voltage and the low threshold voltage can be calculated according to the estimated voltage noise range and the reference voltage. Further, the resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 can be matched and estimated according to the calculated threshold voltage and the low threshold voltage. The reference voltage can be calculated according to the preset high level voltage and the low level voltage. Generally, for different circuit structures, the corresponding high level voltage is different. In the delay switch driving circuit 100 provided in the present application, the high level voltage V CC is 3.3V, low level voltage V EE If the reference voltage is 0 V, then the middle value of the high voltage and the low voltage can be taken as the reference voltage, that is, as the reference voltage, that is, in this embodiment, the reference voltage can be 1.65 V. Optionally, for the calculation of the reference voltage, the high voltage and the low voltage of the actual circuit can be adaptively adjusted, and no specific limitation is made here.

[0068] Optionally, the high threshold voltage and the low threshold voltage may be determined according to the noise amplitude that may exist in the circuit signal and the reference voltage of the circuit.

[0069] Optionally, in the delay switch driving circuit 100 provided in the present application, according to the actual situation of the circuit, the estimated noise amplitude of the circuit is obtained to be 1V, then correspondingly, the high threshold voltage U a Can be 2.65V, low threshold voltage U b It can be 0.65V.

[0070] Accordingly, when determining the high threshold voltage U a and low threshold voltage U b After that, the resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 can be further calculated, so that the resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 in the comparison circuit 110 can be set according to the calculated resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5, so that the high threshold voltage and the low threshold voltage meet the high threshold voltage U determined as above. a is 2.65V, the low threshold voltage U b is 0.65V.

[0071] For the comparison circuit 110 in the delay switch driving circuit 100 provided in the present application, it can be deduced from the calculation formula of the positive feedback system K in the basic structure of the conventional hysteresis operational amplifier U1A that the calculation formula of the positive feedback coefficient K of the comparison circuit of the present application is: In addition, according to the threshold voltage fluctuation range U WD =U a -U b =(V CC +V EE )*K, so, It can be concluded that K*3.3=2, so the K value can be calculated. Further, according to the calculated relationship between the K value and the third resistor R3, the fourth resistor R4 and the fifth resistor R5, the resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 can be adaptively matched. Among them, the resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are not unique, as long as the relationship is satisfied. That's it.

[0072] In addition, it should be noted that for different circuits, the corresponding estimated noise amplitudes are different, which results in different determined high threshold voltages and low threshold voltages, and the corresponding matching resistance values ​​of the third resistor R3, the fourth resistor R4 and the fifth resistor R5 are also different, which is specifically determined according to the actual circuit.

[0073] After obtaining the high threshold voltage, the low threshold voltage and the input voltage of the operational amplifier U1A corresponding to different control signals, the voltage values ​​can be compared, so as to obtain the output level signal of the operational amplifier U1A according to the comparison result, and then control the connection status of the subsequent switch circuit 120 and the delay circuit 130 accordingly.

[0074] Among them, when the power-off restart control pin is in the disabled (high level) state, the input voltage U2 of the operational amplifier U1A is calculated based on the first resistor R1 and the second resistor R2 and the power supply voltage. When the power-off restart control pin is in the enabled (low level) state, the input voltage U2 of the operational amplifier U1A is 0. By comparing U2 with the calculated high threshold voltage and low threshold voltage respectively, when U2 is greater than the high threshold voltage, the output level of the operational amplifier U1A is a low level, and when U2 is less than the low threshold voltage, the output level of the operational amplifier U1A is a high level.

[0075] Furthermore, the comparison circuit 110 further includes: a filter circuit; and the power supply is also grounded through the filter circuit.

[0076] In some embodiments, the filter circuit may include a capacitor C1 for filtering the voltage output from the power supply pin. The filter capacitor C1 is an energy storage device for reducing the AC ripple coefficient and smoothing the DC output. The filter capacitor C1 can not only stabilize the DC output of the power supply and reduce the impact of the alternating ripple on the electronic circuit, but also absorb the current fluctuations generated during the operation of the electronic circuit and the interference introduced through the AC power supply, so that the working performance of the electronic circuit is more stable. Optionally, the above-mentioned filter circuit is not limited to a filter capacitor, but can also be other filter elements to achieve a filtering effect on the power supply.

[0077] Furthermore, if Figure 2 As shown, the switch circuit 120 may include: a switch tube Q1, a sixth resistor R6, and a seventh resistor R7; the output end of the switch circuit 120 is the drain of the switch tube Q1; the output end of the comparison circuit 110 is connected to the gate of the switch tube Q1; the output end of the comparison circuit 110 is connected to the gate of the switch tube Q1 through the seventh resistor R7. The source of the switch tube Q1 is connected to the second power supply, and the drain of the switch tube Q1 is grounded through the sixth resistor R6.

[0078] Optionally, when the power-off restart control pin is in the first state, in the comparison circuit 110, when the output level of the operational amplifier U1A is high, the switch tube Q1 is turned off, and the switch circuit 120 is disconnected from the delay circuit 130; and when the power-off restart control pin is switched from the first state to the second state, when the output level of the operational amplifier U1A is low, the switch tube Q1 is turned on, and at this time, the switch circuit 120 is connected to the delay circuit 130. In addition, the drain of the switch tube Q1 is grounded through the sixth resistor R6, and the sixth resistor R6 is used to limit the current when the switch tube Q1 is turned on.

[0079] It should be noted that, combined with Figure 2 In the specific structure of the switch tube Q1, the switch tube Q1 is turned off, that is, the source 3 and the drain 2 of the switch tube Q1 are disconnected, and correspondingly, the switch tube Q1 is turned on, that is, the source 3 and the drain 2 of the switch tube Q1 are connected.

[0080] Optionally, the seventh resistor R7 is used to limit the current, so as to make the switch circuit 120 more stable, thereby ensuring that the switch tube Q1 can be stably turned on or off.

[0081] Furthermore, if Figure 2 As shown, the delay circuit 130 may include: a current limiting resistor R8 and a storage capacitor C2; the output end of the delay circuit 130 is one end of the storage capacitor C2; the output end of the switch circuit 120 is connected to one end of the storage capacitor C2 through the current limiting resistor R8, and the other end of the storage capacitor C2 is grounded; the current limiting resistor R8 is used to limit the charging and discharging current of the storage capacitor C2.

[0082] The storage capacitor R8 is used to discharge when the switch circuit 120 is disconnected from the delay circuit 130, and output a power-off signal to the controlled switch power supply after the discharge reaches a first preset time; it is also used to charge when the switch circuit 120 is connected to the delay circuit 130, and output a restart signal to the controlled switch power supply after the charging reaches a second preset time.

[0083] Optionally, in order to allow the capacitive load in the electronic device system to be completely discharged before the controlled switching power supply is powered off and restarted, and to avoid damage caused by a direct restart of the controlled switching power supply, in the present application, a delay circuit 130 is also cascaded one level after the switching circuit 120 to ensure that the controlled switching power supply is disconnected or restarted at a preset time, thereby improving the performance of the system.

[0084] Among them, the above-mentioned first preset time is the time when the capacitor C2 discharges to a voltage lower than the threshold voltage value of the enabled pin of the controlled switch power supply, and the second preset time is the time when the capacitor C2 charges to a voltage higher than the threshold voltage value of the enabled pin of the controlled switch power supply. Optionally, when the switch circuit 120 is disconnected from the delay circuit 130, the capacitor C2 is discharged, and when the capacitor C2 is discharged to a voltage lower than the threshold voltage value of the enabled pin of the controlled switch power supply, the delay circuit 130 outputs a power-off signal to the controlled switch power supply. When the switch circuit 120 is connected to the delay circuit 130, the capacitor C2 is charged, and when the capacitor C2 is charged to a voltage higher than the threshold voltage value of the enabled pin of the controlled switch power supply, the delay circuit 130 outputs a restart signal to the controlled switch power supply. Thereby, the controlled switch power supply is switched from the power-off state to the restart state. While capacitor C2 is charging, other capacitive loads in the electronic device system are in the process of discharging, thereby ensuring that other loads in the system are completely discharged after the controlled switching power supply is powered off and before it is restarted (powered on again), thereby ensuring the stability of the system restart.

[0085] Furthermore, the switch tube Q1 is a MOSFET field effect tube.

[0086] Optionally, the switch tube Q1 used in this embodiment is a P-type MOS tube, which carries a large load current, has a fast response rate, and has a small structure. Considering the overall structure of the delay switch driving circuit 100 of the present application, it is more appropriate to select this MOS tube. However, the selection of the switch tube Q1 is not limited to the P-type MOS tube. For example, an N-type MOS tube, an IGBT switch tube Q1, etc. can also be used as the switch tube Q1 in the present application.

[0087] Optionally, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the current-limiting resistor R8 involved in the above embodiments of the present application can be composed of an independent resistor, or can be composed of multiple resistors connected in series or in parallel, or can be composed of other circuit element connection methods, and the resistance value of the composed resistor meets the preset resistance value requirements, and the present application does not make any specific restrictions.

[0088] Similarly, the filter capacitor C1 and the storage capacitor C2 are composed in the same manner as the above-mentioned resistors, and may also be composed of a single capacitor, or a plurality of capacitors connected in series or in parallel, which is not specifically limited here.

[0089] Optionally, the MOSFET switch tube Q1 is placed in the previous stage of the delay circuit 130, which ensures the fast turn-on and turn-off characteristics of the MOSFET used as a switch, and does not cause the power tube to be in the amplification area for a short time due to the slow rise of the signal of the power tube driving stage, thereby increasing the crossover loss of the switch tube Q1. At the same time, it also avoids other unpredictable risks during the slow turn-on and turn-off due to the existence of the parasitic parameters of the power tube itself.

[0090] In order to solve the problem of abnormal secondary power-on caused by incomplete discharge after power failure, the present application adopts MOSFET as the main body of the switch, combined with the delay circuit 130 as the structure of the output stage of the switch control, and well realizes the large current discharge of the output stage of the switch in the power-off state. The discharge speed is accelerated as much as possible to ensure the rapid shutdown of the controlled switch power supply. On the other hand, after power failure, the MOSFET switch controlled by the hardware state is in the on state, and the power supply controls the time size of the output terminal level to reach the preset power-on enable level value through the delay circuit 130. During the delay period, the system is fully discharged after power failure to ensure the normal power-on process next time.

[0091] The working process of the overall circuit of the delay switch driving circuit 100 provided in this application is as follows:

[0092] The working process of the whole circuit starts from the control signal outputted by the comparison circuit 110 when the power-off restart control pin is in the first state (enabled state) and is low level. When the control signal output is low level, (i.e., the input of the comparison circuit 110 is low level), since the hysteresis comparator used in the present application is a clockwise hysteresis comparator, the output of the comparison circuit 110 is high level at this time. At the same time, since the operational amplifier U1A is an amplifier with a rail voltage output characteristic, it is ensured that the voltage difference between the high level outputted by the comparison circuit 110 and the source voltage of the switch tube Q1 in the switch circuit 120 is minimal, and it is ensured that Q1 is in a completely off state when the comparison circuit 110 outputs a high level. At this time, the switch circuit 120 is disconnected from the delay circuit 130, and the sixth resistor R6, the current limiting resistor R8 and the capacitor C2 form a discharge circuit. During the continuous discharge of the capacitor C2, the voltage value of the positive electrode of the capacitor C2 continues to decrease. When the voltage value of the positive electrode of the capacitor C2 drops below the threshold voltage value of the enable pin (EN pin) of the subsequent controlled switch power supply, the delay circuit 130 outputs a power-off signal to the controlled switch power supply, the subsequent power supply stops working and does not output to the outside, the controller controlling the power-off restart control pin is powered off and stops working, and the power-off restart control pin is switched from the enabled state to the disabled state. At this time, the control signal is not controlled by the controller, but is controlled by the voltage division of the first resistor R1 and the second resistor R2. At this time, the level of the control signal belongs to the voltage division of the power supply through the first resistor R1 and the second resistor R2. The values ​​of the first resistor R1 and the second resistor R2 need to match the corresponding values ​​according to the preset threshold voltage of the in-phase input terminal of the operational amplifier U1A, so as to ensure that the input voltage value of the comparison circuit 110 after voltage division is greater than the high threshold voltage of the operational amplifier U1A. At this time, the output of the operational amplifier U1A is at a high level, the subsequent switching circuit 120 is connected to the delay circuit 130, and the delay circuit 130 can be charged normally. When the capacitor C2 in the delay circuit 130 is charged until the voltage reaches the threshold voltage value of the enable pin (EN pin) of the subsequent controlled switching power supply, the delay circuit 130 outputs a restart signal to the controlled switching power supply, and the subsequent power supply can be started normally, thereby completing the process of the system from power failure to automatic restart after a certain delay time.

[0093] In summary, the delay switch driving circuit provided by the embodiment of the present application, the control circuit outputs a level signal through the power-off restart control pin in the first state, the switch circuit is disconnected from the delay circuit, the delay circuit outputs a power-off signal to the controlled switch power supply after the preset delay time to power off the system, after the system is powered off, the power-off restart control pin is switched from the first state to the second state, the control circuit is connected to the delay circuit according to the level signal output by the power-off restart control pin in the second state, the switch circuit is connected to the delay circuit, and the delay circuit outputs a restart signal to the controlled switch power supply after the preset delay time to restart the system, so that the system automatically restarts after the preset power-off time. Among them, through the design of the delay circuit, there is a certain interval time before the system restarts after power failure, so as to ensure that the capacitive load in the system can be completely discharged before the system restarts, thereby avoiding damage to the controlled switch power supply and improving the performance of the electronic equipment system. Secondly, the control circuit in the present application uses a hysteresis comparator to judge the logical state of the control signal, which can effectively filter out the jitter of the control signal and ensure the logical stability and strong driving ability of the level signal output by the control circuit to the switch circuit. In addition, the switch circuit is designed in the previous stage of the delay circuit, which ensures the fast turn-on and turn-off characteristics of the MOSFET field effect tube used as a switch, and does not cause the power tube to be in the amplification area for a short time due to the slow rise of the signal of the power tube driving stage, thereby increasing the crossover loss of the switch tube. At the same time, it also avoids other unpredictable risks during the slow turn-on and turn-off due to the existence of the parasitic parameters of the power tube itself. Finally, in this application, the components used are all conventional general-purpose components with high mass production and cost advantages.

[0094] Figure 3 A schematic diagram of a time-delay switch driving system provided in an embodiment of the present application, Figure 4 A schematic diagram of another time-delay switch driving system provided in an embodiment of the present application; Figure 3 As shown, the delay switch driving system provided in the embodiment of the present application includes: a controller 200, the delay switch driving circuit 100 mentioned above, and a controlled switch power supply 300; Figure 4 As shown, the controller 200 is connected to the input end of the control circuit 10 in the delay switch driving circuit 100 through the power-off restart control pin; the output end of the delay circuit 130 in the delay switch driving circuit 100 is connected to the enable pin of the controlled switch power supply 300.

[0095] Specifically, the functional implementation principle of the time-delay switch driving system has been specifically described in the aforementioned explanation of the working principle of the time-delay switch driving circuit 100, and will not be repeated here.

[0096] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0097] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0098] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

Claims

1. A time-delay switch driving circuit, characterized in that: include: Control circuit, switch circuit and delay circuit; The input end of the control circuit is electrically connected to the power-off restart control pin, the output end of the control circuit is electrically connected to the input end of the switch circuit, the output end of the switch circuit is electrically connected to the input end of the delay circuit, and the output end of the delay circuit is electrically connected to the controlled switch power supply; The control circuit is used to control the switch circuit to disconnect from the delay circuit based on the first state of the power-off restart control pin, so that the delay circuit outputs a power-off signal to the controlled switch power supply after a first preset delay time, and the controlled switch power supply powers off the system under the action of the power-off signal; When the system is in a power-off state, the power-off restart control pin switches from the first state to the second state; the control circuit controls the switch circuit to be connected to the delay circuit based on the second state of the power-off restart control pin, so that the delay circuit outputs a restart signal to the controlled switch power supply after a delay of a second preset time, and the controlled switch power supply powers on the system under the action of the restart signal; The switch circuit comprises: a switch tube, a sixth resistor and a seventh resistor; The delay circuit is used to discharge when the switch circuit is disconnected from the delay circuit, and output a power-off signal to the controlled switch power supply after the voltage is discharged to be lower than the threshold voltage of the enable pin of the controlled switch power supply; and is also used to charge when the switch circuit is connected to the delay circuit, and output a restart signal to the controlled switch power supply after the voltage is charged to reach the threshold voltage; The duration of the discharging is the first preset time, and the duration of the charging is the second preset time.

2. The circuit according to claim 1, characterized in that The control circuit includes a comparison circuit; The comparison circuit compares the level output by the power-off restart control pin in the first state or the second state with a preset threshold voltage, and controls the connection state of the switch circuit and the delay circuit according to the comparison result.

3. The circuit according to claim 2, characterized in that The first state of the power-off restart control pin is a low level, and the second state is a high level; When the power-off restart control pin is in the first state, the output level of the comparison circuit is a high level, and the switch circuit is disconnected from the delay circuit; when the power-off restart control pin is in the second state, the output level is a low level, and the switch circuit is connected to the delay circuit.

4. The circuit according to claim 2, characterized in that The comparison circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The non-inverting input terminal of the operational amplifier is connected to the first power supply through the fourth resistor, and the non-inverting input terminal of the operational amplifier is also grounded through the fifth resistor; the output terminal of the operational amplifier is connected to the non-inverting input terminal of the operational amplifier through the third resistor; The inverting input terminal of the operational amplifier is connected to the first power supply through the first resistor, and the inverting input terminal of the operational amplifier is also grounded through the second resistor; The input end of the comparison circuit is the inverting input end of the operational amplifier, and the output end of the comparison circuit is the output end of the operational amplifier.

5. The circuit according to claim 4, characterized in that The comparison circuit further includes: a filter circuit; and the first power supply is grounded through the filter circuit.

6. The circuit according to claim 5, characterized in that The output end of the switch circuit is the drain of the switch tube; The output end of the comparison circuit is connected to the gate of the switch tube through the seventh resistor, the source of the switch tube is connected to the second power supply, and the drain of the switch tube is grounded through the sixth resistor.

7. The circuit according to any one of claims 1 to 3, characterized in that The delay circuit comprises: a current limiting resistor and a storage capacitor; The output end of the delay circuit is one end of the storage capacitor; The output end of the switch circuit is connected to one end of the storage capacitor through the current limiting resistor, and the other end of the storage capacitor is grounded; the current limiting resistor is used to limit the charging and discharging current of the storage capacitor.

8. The circuit as claimed in claim 6, characterized in that The switch tube is a MOSFET field effect tube.

9. A time-delay switch driving system, characterized in that: include: A controller, a delay switch driving circuit according to any one of claims 1 to 8, and a controlled switching power supply; The controller is connected to the input end of the control circuit in the delay switch driving circuit via a power-off restart control pin; The output end of the delay circuit in the delay switch driving circuit is connected to the enable pin of the controlled switch power supply.

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