Transmission and reception device with broadband high-frequency power amplifier, in particular an N-channel Doherty amplifier with active load modulation

Abstract

The invention relates to a transmission and reception device with a broadband HF power amplifier, in particular an N-way Doherty amplifier with active load modulation. The object of the invention is to provide a high-power transmission and reception device suitable for high-power and broadband applications and having a transmission power of more than 10 Watts to approximately 2000 Watts by means of appropriate design measures in combination with electronic components, starting from a transmission and reception device with a module (GSZ) having a configurable HF high-power amplifier (HPA) that operates between and below two power back-off points and comprises a main power amplifier (DM) with an amplifier core and at least one peak power amplifier (DP1) with an amplifier core, wherein a digital input signal distributor (ET) is provided, which is connected to the input of the main power amplifier (DM) and to the input of the at least one peak power amplifier (DP1) and has a plurality of outputs, and an output combiner connected to the output of the amplifier core of the main power amplifier and the output of the at least one peak power amplifier is provided. This object is achieved according to the invention, in which an additional multiharmonic transformation line (LAH) is provided at the amplifier core output of a main power amplifier (DM) and at the amplifier core output of at least one peak power amplifier (DP1) and a circulator (Z1) connected to the output of an impedance converter (AN1) or an output combiner (C). By means of the circulator (Z1), the upstream main power amplifier (DM) and at least one peak power amplifier (DP1) are protected from overvoltage and overcurrent on the output side, because the circulator (Z1) transfers energy to a collecting resistor (W1) connected to the circulator (Z1). The invention belongs to the field of broadband amplifiers, in particular broadband Doherty amplifier circuits.

Description

Technical Field

[0001] According to the present application, the present invention relates to a transmission and reception device having a module, the module having a configurable RF high power amplifier, the configurable RF high power amplifier operating between and below two power back-off points, having a main power amplifier with an amplifier core and at least one peak power amplifier with an amplifier core, wherein a digital input signal distributor connected to the input of the main power amplifier and the input of at least one peak power amplifier is provided with a plurality of outputs, and an output combiner connected to the output of the amplifier core is provided for the outputs of the main power amplifier and the at least one peak power amplifier. Background Art

[0002] In the technical field of radio technology, especially in mobile radio or cellular base stations, satellite communications and other communication and radio systems, many radio frequency carriers distributed over a large bandwidth are amplified simultaneously by the same high-power amplifier. For RF or HF power amplifiers (RF: radio frequency, HF: high frequency), this has the effect of causing very large and very fast variations in the instantaneous transmission power. In addition, airspace has become a scarce resource that must be shared among multiple subscribers. Today, flight traffic management plays an important role. It controls the airspace, provides path guidance for aircraft and, most importantly, guarantees a high level of safety for all airspace users. Nevertheless, the airspace is often congested due to the large number of users and the use of folded airspace electronic systems. Therefore, the modernization of airspace electronic systems plays a vital role in increasing airspace capacity and reducing "en-route" delays. Modern aviation increasingly relies on data link communications. Digital communication systems have replaced their analog predecessors in order to achieve a safer and more reliable travel experience. The design of a multi-purpose power amplifier that meets the requirements of all standards (especially those for transmissions near and within the L-band frequency range) presents a major challenge, as high power, efficient amplification, linearity and broadband operation must be served by one amplifier. The transmission standards of interest in this regard are L-DACS1, UAT, DME, Mode-S, ADS-B and SSR.

[0003] One way to improve the efficiency of RF power amplifiers (especially HF power amplifiers) is to use the Doherty principle. In its basic form, a Doherty amplifier uses two amplifier stages (also called amplifier cores), a main amplifier and an auxiliary amplifier (also called carrier and maximum amplifiers). The load is connected to the auxiliary amplifier and the main amplifier is connected to the load via an impedance converter, which is usually a quarter-wavelength transmission line or an equivalent composite network (with gyrator behavior / impedance inverter as a result of the λ / 4 line).

[0004] Doherty power amplifiers (DPA-Doherty power amplifiers) offer high average efficiency for modulated waveforms, but only provide narrow bandwidth efficiencies of 5% to 10% [see, e.g., JH Qureshi: “A Wide-Band 20W LMOS Doherty Power Amplifier”, IMS 2010]. Mainly responsible for the bandwidth limitation is the impedance inverter, which enables load regulation. However, the impedance inverter does not represent the only element responsible for the low bandwidth, and the output capacitance of the active device also contributes to this. In order to achieve the maximum bandwidth, the parasitic characteristics of the drain terminal must be overcome with the aid of suitable broadband techniques. A comprehensive analytical study of the transfer function must be considered [see, e.g., K. Bathich, AZ Markos, G. Boeck: “Frequency Response Analysis and Bandwidth Extension of the Doherty Amplifier” IEEE Transactions on Microwave Theory and Techniques, Vol. 59, No. 4, April 2011]. Offset lines are often used to compensate for parasitic properties of the drain [see, for example, R. Quaglia, M. Pirola, C. Ramella: “Offset Lines in Doherty Power Amplifiers: Analytical Demonstration and Design” IEEE Microwave and Wireless Components Letters, Vol. 23, No. 2, February 2013, or B Kim, J. Kim, I. Kim, J. Cha: “The Doherty power amplifier” IEEE Microwave Magazine, Vol. 7, No. 5, October 2006]. In the article by R. Giofrè, L. Piazzon, P. Colantonio, F. Giannini: “A closed-form design technique for ultra-wideband Doherty power amplifiers” IEEE Transactions on Microwave Theory and Techniques, Vol. 62, No. 12, December 2014, it has been shown that offset lines do not necessarily represent a bandwidth-limiting structure. By using two λ / 4 microstrip lines at the peaking power amplifier, the load regulation and bandwidth potential of the DPA are improved. A closed-loop method for calculating the necessary characteristic impedance of the offset lines is given.This approach has been summarized and further improved by A. Barakat, M. Thian, V. Fusco in the article “Toward generalized Doherty power amplifier design for wideband multi-mode operation” SBMO / IEEE MTTS International Microwave and Optoelectronics Conference (IMOC), 2015 [see A. Barakat, M. Thian, V. Fusco, S. Bulja, L. Guan: “Toward a More Generalized Doherty Power Amplifier Design for Broadcast Operation” IEEE Transactions on Microwave Theory and Techniques, Vol. 65, No. 3, March 2017]. Additional constraints are introduced related to the power divider and phase balancing circuit on the Doherty power amplifier DPA. With the analog power dividers and phase compensation circuits removed and replaced with digital versions, each amplifier core can now be individually controlled with respect to its amplitude and phase position, which results in an increase in bandwidth and linearity, as reported by R. Darraji, P. Mousavi, FMGhannouchi in “Doherty Goes Digital: Digitally Enhanced Doherty Power Amplifiers” IEEE Microwave Magazine, Vol. 17, No. 8, August 2016 or by JC Cahuana, P. Landin, D. Gustafsson, C. Fager, T. Eriksson in “Linearization of dual-input Doherty power amplifiers” International Workshop on Integrated Nonlinear Microwave and Millimetre-wave Circuits, April 2014.The removal of the analog power divider was first reported by W.CENeo, J.Qureshi, M.J.Pelk, J.R.Agadharsing, and L.C.N.de Vreede in “A Mixed-Signal Approach Towards Linear and Efficient N-Way Doherty Amplifiers,” IEEE Transactions on Microwave Theory and Techniques, Vol. 55, No. 5, May 2007.

[0005] The classic Doherty power amplifier consists of two amplifier cores, one representing the main power amplifier and the other representing the peak power amplifier, hereinafter referred to as an "active load modulator". The main power amplifier is usually used in AB mode, while the peak amplifier is used in C mode. The main power amplifier is connected to the peak power amplifier via an impedance inversion electrical element.

[0006] The impedance inverter is usually implemented by a λ / 4 microstrip line. First, the power of the main power amplifier is ramped up until its drain current is saturated. This point is called the back-off point. For higher output powers, the active load modulator now captures the power. The impedance of the main amplifier changes due to the fed current. If the phase difference between the current of the main power amplifier and the active load modulator is set correctly, the impedance at the main amplifier decreases. Due to this effect, the current fed at the main amplifier must increase to keep it in saturation. This means that the main power amplifier has high efficiency over the entire load modulation range and its output power increases. The described arrangement can in principle be extended to any desired number of active load modulators and enables high efficiency to be achieved over a wide power range.

[0007] Although W.H. Doherty's original publication was related to tube amplifiers, current technology is used to use power transistors. In order to increase the relative bandwidth, digital control is used. This type of control was first published by W.C.E. Neo, J. Qureshi, M.J. Pelk, J.R. Gajadharsing, L.C.N. de Vreede in "A Mixed-Signal Approach Towards Linear and Efficient Nway Doherty Amplifiers" IEEE Transactions on Microwave Theory and Techniques, Vol. 55, No. 5, May 2007. Instead of using a static power divider, the main amplifier and active load modulator are individually controlled by specially adapted power and phase distribution. The control of all inputs is combined into a unit and is referred to as a control function hereinafter.

[0008] For the control function, this results in a [2*N-1]-dimensional space, where at least one static function must be found that satisfies the optimization criteria regarding efficiency, linearity, and bandwidth. The variable N is the number of amplifier inputs. Since the characteristics of the output network change significantly toward the band edge, the center frequency of the signal or set of signals currently to be amplified should be used to track the control function.

[0009] For example, a broadband Doherty amplifier with a broadband converter is known from WO 2013006941 A1. The broadband Doherty amplifier includes a main amplifier and an auxiliary amplifier and a broadband impedance converter, the main amplifier can be operated to amplify a first part of an input signal, wherein the auxiliary amplifier can be operated to turn on and amplify a second part of the input signal, the amplitude of the second part of the input signal exceeds a threshold amplitude, and the broadband impedance converter is connected between the outputs of the main amplifier and the auxiliary amplifier. The broadband impedance converter generates a transformed output signal of the main amplifier based on the output of the main amplifier. The broadband impedance converter generates a transformed output of the main amplifier based on the output of the main amplifier, wherein the broadband impedance converter includes a quarter-wavelength matching line coupled to a directional coupler, wherein the directional coupler has the same electrical length as the quarter-wavelength adjustment line matching line. In one embodiment, a high-frequency power amplifier having a Doherty amplifier architecture is disclosed. The high-frequency power amplifier includes a signal distributor that splits an input high-frequency signal into a first signal and a second signal, a first amplifier that amplifies the first signal to form a third signal, a second amplifier that amplifies the second signal to form a signal (fourth signal), and a broadband impedance converter that converts the third signal into a fifth signal. The broadband impedance converter includes a quarter-wavelength matching line coupled to a directional coupler, the directional coupler having the same electrical length as the quarter-wavelength matching line. In particular, the directional coupler is a wide-side coupled line coupler. In summary, WO 2013006941A1 describes a Doherty amplifier whose bandwidth is increased by a special design of an impedance inverter. In the Doherty architecture, an impedance inverter is required to convert a current source provided by a power transistor into a voltage source. One way of saying it is slewing behavior. For this purpose, λ / 4 lines have been used so far. However, slewing behavior cannot be achieved in broadband using previous λ / 4 lines because the wavelength changes when the frequency changes, so the mechanical length must also change. The use of a directional coupler increases the bandwidth over which acceptable slewing behavior can be achieved.

[0010] In order to improve the linearity of a composite amplifier provided with a Doherty output network over a wide frequency band, the composite amplifier known from DE 60124 728 T2 comprises a main power amplifier and a power auxiliary amplifier connected to a load via a Doherty output network and other components for simulating and compensating the nonlinear behavior of the output current of the power auxiliary amplifier in the input signal of the main amplifier. Components for equalizing or compensating the frequency response of the composite amplifier are also provided, as well as components for cross-coupling and subtracting a filtered version of the input signal for the auxiliary amplifier from the input signal of the main amplifier. The cross-coupling filter simulates the impedance of the auxiliary amplifier and compensates for the through impedance or transimpedance between the main amplifier and the auxiliary amplifier. In addition, a cross-coupling filter can be provided, which simulates the transimpedance from the auxiliary amplifier to the output node and compensates for the transimpedance from the main amplifier to the output node. Finally, an input side filter is provided for equalizing the frequency response of the main amplifier and the auxiliary amplifier. Therefore, in the composite amplifier known from DE 601 24 728 T2, a nonlinear function of the input signal simulating the nonlinear output current of the auxiliary amplifier is subtracted from the driver signal of the main amplifier. This has the advantage that nonlinear components in the output can be eliminated or compensated without scanning the amplifier efficiency. The nonlinear function can be obtained from a model of the power function of the auxiliary amplifier (if the auxiliary amplifier provides the nonlinear current by operating in class C) or, in an amplified form, can be prefabricated and used both as a drive signal for the auxiliary amplifier (which can then be biased to operate in linear class B or AB) and for cross-coupling via filters. In summary, DE 601 24 728 T2 describes an N-way Doherty amplifier in which the amplitude and phase of the input signal to the associated amplifier core are influenced in a targeted manner by cross-coupled filters in a nonlinear manner, so that a favorable phase and amplitude as a function of the output power are generated at the output of the nonlinear amplifier core, which then, in combination with the N-way combiner, leads to a maximization of efficiency and bandwidth. The network at the input of the nonlinear amplifier core with the cross-coupled filters (which can also be partially active, i.e., amplifying) can be regarded as a nonlinear analog predistortion or analog control function.

[0011] Another broadband Doherty amplifier circuit is known from US 2008 / 0 007 331 A1. The amplifier circuit comprises a signal summing node, a main amplifier, a transmission line coupling the output of the main amplifier to the signal summing node, a peak amplifier having an output coupled to the signal summing node, and a broadband impedance converter having a wider end coupled to the signal summing node and a narrower end forming a terminal node. In summary, US 2008 / 0 007 331 A1 shows a Doherty amplifier having a multi-band impedance inverter, by means of which a gyration behavior can be achieved in multiple frequency bands. Thus, a large continuous frequency range is not shown. In addition, the impedance inverter consists of a line segment with a length in the order of the wavelength and with a constant width.

[0012] Another similar broadband Doherty amplifier circuit is known from DE 10 2012 202 870 A1. More specifically, the amplifier circuit comprises a signal summing node, a first amplifier configured to operate in a first mode, an impedance inverter configured to provide impedance transformation and load modulation to the first amplifier, a second amplifier configured to operate in a second mode, a second amplifier having an output coupled to the signal summing node, and a broadband impedance converter. The broadband impedance converter has a first end coupled to the signal summing node and a second end forming a connection node, wherein the broadband impedance converter is designed to represent an actual impedance over at least 25% of the high-frequency bandwidth of the amplifier circuit for the first amplifier. The broadband impedance converter is tapered and the first end coupled to the signal summing node is wider than the second end, wherein the taper extends continuously over the length of the broadband impedance converter. In addition, an impedance converter is provided, which couples the output of the second amplifier to the signal summing node. The output of the second amplifier is directly connected to the first end of the broadband impedance converter at the summing junction. In particular, the broadband impedance converter is designed to ensure an actual impedance over at least 30% of the high-frequency bandwidth of the amplifier circuit. The impedance inverter is a λ / 4 wavelength transmission line having a first end connected to a first end of a broadband impedance converter at a signal summing node and a second end connected to an output of a main amplifier. Furthermore, DE 10 2012 202 870 A1 discloses a method for operating an amplifier circuit, the amplifier circuit comprising a signal summing node, a first amplifier and a second amplifier, the method comprising the following method steps in a first mode: coupling the output of the first amplifier to the signal summing node via the impedance inverter, operating the first amplifier in a first mode, providing impedance transformation and load transformation for the first amplifier via the impedance inverter, coupling the output of the second amplifier to the signal summing node, operating the second amplifier. In a second mode, the method comprises the following steps: coupling the first end of the broadband impedance converter to the signal summing node, coupling the second end of the broadband impedance converter to a terminal impedance, and representing the actual impedance of the first amplifier over at least 25% of the radio frequency bandwidth of the amplifier circuit via the broadband impedance converter. Specifically, coupling the output of the second amplifier to the signal summing node via the impedance converter, and connecting the output of the second amplifier directly to the first end of the broadband impedance converter at the signal summing node. In summary, DE 10 2012 202 870 A1 discloses an output transformer at the output of an impedance converter / combiner, which enables the impedance at the combiner's star point to be selected to deviate from the original, usually 50 Ohm, at the amplifier output. However, this does not interfere with the power exchange at the harmonics between the amplifier cores.

[0013] Another similar broadband Doherty amplifier circuit is known from EP 2 879 291 A1, in particular a broadband power amplifier with active load modulation. Active load modulation improves the back-off efficiency of the power amplifier, which is related to the overall efficiency, for example of a mobile base station. In particular, the broadband power amplifier has a main amplifier core and at least one auxiliary amplifier core, an input signal divider connected to the input of the main amplifier and the input of the at least one auxiliary amplifier core, and an output combiner connected to the output of the amplifier core for the main amplifier core and the output of the at least one auxiliary amplifier core. The input signal divider is designed to divide the input signal into a first signal for the main amplifier core and at least a second signal for the at least one auxiliary amplifier core according to a frequency-dependent nonlinear input control function. The output combiner is configured to combine the output signals of the main amplifier core and the at least one auxiliary amplifier core and provide a continuum of optimal termination impedances of the main amplifier core for a fundamental frequency and at least one harmonic frequency over a predetermined operating bandwidth in a low power range, wherein the low power region is defined as the region in which at least one auxiliary amplifier core is inactive. The output combiner is configured to enable mutual load modulation between the amplifier cores within a high power range defined by the two active amplifier cores, so that efficient waveform shaping can be maintained under load modulation. Therefore, the deviation of the virtual terminal impedance at the active components of the amplifier core from the continuum of the optimal termination impedance for the fundamental frequency component and at least one harmonic frequency component is minimized. In addition, the output combiner is configured to minimize the deviation of the virtual terminal impedance in the active components of the amplifier core from the continuum of the optimal termination impedance for the fundamental frequency component and at least one harmonic frequency component by maintaining the deviation below a predetermined threshold. The output combiner includes an impedance converter provided for the main amplifier core and / or the auxiliary amplifier core, and is configured to achieve the desired continuous multi-harmonic termination condition and capability, and maintain it under load modulation by using elements of a low-pass structure in an impedance inverter. The output combiner has an output converter circuit provided at the output of the output combiner, and is configured to achieve the continuous multi-harmonic termination condition and the ability to maintain it under load modulation by using elements of a low-pass structure in the output converter circuit. The low-pass structure is achieved by an impedance step in a microstrip transmission line of the circuit structure of the device. Based on this technique, the impedance inverter can provide a desired impedance level in the fundamental frequency band while absorbing the parasitic elements of the main amplifier transistor devices and at the same time minimizing the transmission / exchange of harmonic frequency components between the connected amplifier cores. Thus, unwanted load modulation effects at the harmonic frequencies are minimized and a suitable reflection phase is provided for at least one harmonic frequency component at the main amplifier core (depending on the multi-harmonic termination continuum used). In particular, the input divider is configured to provide an input control function for the respective amplifier cores as a function of frequency and instantaneous power such that:

[0014] a) The power level at which the auxiliary amplifier core operation starts depends on the residual fluctuations of the real part of the load impedance of the main amplifier core load and is frequency dependent in the low power range and / or

[0015] b) Controlling the complex relationship between the output currents of the main amplifier core and the auxiliary amplifier core in the high power range in such a way that the deviation of the virtual termination impedance at the active components of the amplifier core from the continuum of optimal termination impedances for the fundamental frequency component and at least one harmonic frequency component is minimized. In order to minimize the deviation of the virtual termination impedance from the optimal termination continuum for the fundamental frequency component and at least one harmonic frequency component, the deviation is kept below a predetermined threshold. The input control function for the respective amplifier core can be implemented with the aid of analog (cross-coupled filters) or digital signal processing circuits, using unequal drain biases for the main amplifier core and the auxiliary amplifier core. The continuum of optimal termination impedances specifies a continuous space of combinations of termination impedances at multiple harmonic frequencies, which are mapped to a continuous space of output voltage waveforms at the intrinsic reference plane of the active devices (transistors) in order to produce constant output power and optimal efficiency from these waveforms. Based on an ideal model limited to two harmonic frequency components, such an optimal continuum is given, for example, by Class-J theory, as described in the literature (e.g., in "On the Continuity of High Efficiency Modes in Linear RF Power Amplifiers", see IEEE Microwave and Wireless Components Letters, Vol. 19, No. 10, pp. 665-667, 2009, and Wright, P., Lees, J., Benedikt, J., Tasker, P. J., Cripps, SC, "A Methodology for Realizing High Efficiency Class-J in a Linear and Broadcast PA", IEEE Transactions on Microwave Theory and Techniques, Vol. 57, No. 12, Part 2, 2009). This terminal continuum forms a waveform continuum at the intrinsic drain (or collector) of the active device (e.g., transistor) with constant output power and constant high efficiency over the entire range of the continuum. In one embodiment, unequal drain bias voltages are used for the main amplifier core and the auxiliary amplifier core in such a manner that the transformation ratio (i.e., wave resistance) of the impedance inverter(s) can be changed in such a manner that continuous multi-harmonic termination conditions can be achieved more easily or over a larger bandwidth. Using the above method to implement class J high-efficiency broadband RF power amplification with the concept of active load modulation in linear and broadband power amplifiers improves the back-off efficiency of the power amplifier and enables high-efficiency power amplification over a large relative bandwidth >30%.In summary, EP 2 879 291 A1 shows a solution with an impedance inverter and a combiner which already contains wavelength-dependent stub elements as a replacement for discrete capacitors and inductors.

[0016] Furthermore, a broadband Doherty amplifier circuit with a constant impedance combiner is known from DE102012105260 A1. The embodiments described therein use a constant impedance combiner, the characteristic impedance of which is equal to the high impedance state of the desired load modulation of the main amplifier in the three-way broadband Doherty amplifier circuit when the first and second peak amplifiers are turned off. In this narrowband case, the main amplifier is presented with minimal band limitation. When operating in the back-off power region, most of the band limitation is removed from the main amplifier path, thereby producing a more constant power above the frequency and a more constant efficiency above the frequency at a fixed back-off power level. The amplifier embodiments described therein are very suitable for broadband applications, so that the amplifier circuit can cover two or more adjacent operating bands at the same time, or can be more consistent over the entire operating band than the existing architecture for registering DE102012105260 A1. In one embodiment of the amplifier circuit, the amplifier circuit includes a main amplifier biased in a class B or AB mode, a first peak amplifier biased in a class C mode, a second peak amplifier biased in a class C mode, and a constant impedance combiner. The constant impedance combiner has a first node connected to the output of the main amplifier, a second node connected to the output of the first peak amplifier, a third node connected to the output of the second peak amplifier, and a fourth node connected to the load. The constant impedance combiner is operable to transform (e.g., change) the load impedance at the fourth node to a transformed impedance at the third node and provide the same transformed impedance at the first, second, and third nodes. According to an embodiment of the method for operating an amplifier circuit, the method described in DE102012105260A1 comprises:

[0017] - pre-tensioning of the main amplifier in class B or AB mode,

[0018] - bias the second peak amplifier in Class C mode,

[0019] - bias the second peak amplifier in Class C mode,

[0020] - connecting a first node of the constant impedance combiner to the output of the main amplifier, connecting a second node of the constant impedance combiner to the output of the first peak amplifier, connecting a third node of the constant impedance combiner to the output of the second peak amplifier and connecting a fourth node of the constant impedance combiner to the load, and

[0021] - transforming the load impedance at the fourth node into a transformed impedance at the third node such that the same transformed impedance is provided at the first, second and third nodes.

[0022] According to another embodiment of the amplifier circuit, the amplifier circuit comprises a first amplifier operable to be turned on at a first power level, a second amplifier operable to be turned on at a second power level lower than the first power level, and a third amplifier operable to be maintained at all power levels. The first power combiner is operable to combine the output of the third amplifier with the output of the second amplifier at a first power combination node to form a first combined amplifier output. The second power combiner is operable to combine the amplifier output of the first combination with the output of the first amplifier at a second power combination node to form a second combined amplifier output. The impedance converter is operable to transform the load impedance of the amplifier circuit into a transformed impedance at the second power combination node, wherein the transformed impedance is adapted to, for example, the same impedance of the first and second power combiners. According to another exemplary embodiment of the method for operating an amplifier circuit, the method described in DE 102012105260A1 comprises:

[0023] - switching on the first amplifier at a first power level,

[0024] - switching on the second amplifier at a second power level lower than the first power level,

[0025] - switching on the third amplifier at all power levels,

[0026] - combining the output of the third amplifier with the output of the second amplifier at a first power combining node to form a first combined amplifier output,

[0027] - combining the first combined amplifier output with the output of the first amplifier at a second power combining node to form a second combined amplifier output; and

[0028] - transforming the load impedance of the amplifier circuit into a transformed impedance at the second power combining node, wherein no impedance transformation occurs from the second power combining node to the first power combining node.

[0029] Finally, according to an embodiment of a three-way broadband Doherty amplifier circuit described in DE 102012105260 A1, the circuit includes a first peak amplifier operable to turn on at a first power level, a second peak amplifier operable to turn on at a second power level lower than the first power level, and a main power amplifier operable to turn on at all power levels. When the first and second peak amplifiers are turned off, the main power amplifier has a high impedance load modulation state. The Doherty amplifier circuit also includes a constant impedance combiner connected to the output of each amplifier. The constant impedance combiner has a characteristic impedance that adapts to the impedance of the main amplifier with high impedance in the load modulation state, with or without an output adaptation device that connects the output of the main amplifier to the constant impedance combiner, as seen from the output of the main amplifier.

[0030] Furthermore, DE 10 2010 018 274 A1 describes a method for designing an electronic circuit with a matching network, in particular for use in a Doherty power amplifier, the purpose of which is to optimize active load modulation. The invention relates to a method for designing characteristic variables of an electronic circuit, such as S parameters or small signal noise figures or effective input reflection factors or effective output reflection factors or effective output resistance or flip stability factors or n-order power amplification or intermodulation products or n-order harmonic distortion or distortion factors or efficiency of power amplification or noise figures or compression points or compression power or compression of power amplification or average values ​​of small signal characteristics or integrals of small signal characteristics, which can be performed in a fully automatic manner, in particular in a computer-controlled manner. For this purpose, measured data of components of the circuit (such as transistors, impedances, etc.) are determined by measurement. The measured data are input in a program sequence for calculating the components of the matching network of the electronic circuit. This enables the calculation of, for example, capacitive or inductive components of the matching network. The method for designing a circuit has several steps. In a first step, a first value of a first transformed source reflection factor and a second value of a first transformed load reflection factor are determined. Several sub-steps are provided to determine the first value and the second value. Multiple first distances are determined. The first distance is not the Euclidean distance, but the so-called Poincare distance. In the method described in DE10 2010 018 274 A1, an arbitrary or predeterminable number of first pairs of points are determined as the first pair of points on the first circle and the second pair of points on the second circle. The first pair of points on the first circle is determined as the first transformed source reflection factor, and the second pair of points on the second circle is determined as the first transformed load reflection factor. The value of the first characteristic variable is assigned to each of the first point pairs. For example, the assignment can be performed by calculation based on a model and / or measurement of the characteristic variable of the circuit. In the subsequent steps of the method described in DE 10 2010 018 274 A1, the matching network is determined based on the first value of the transformed source reflection factor, the second value of the transformed load reflection factor, the source reflection factor and the load reflection factor. The step of determining the matching network can also be performed in an automatic manner. For example, a topology is selected, that is, the arrangement of the capacitance and inductance of the first matching network. Subsequently, the capacitance and inductance values ​​of the matching network are calculated according to the transformed first value of the source reflection factor, the transformed second value of the load reflection factor, the source reflection factor and the load reflection factor. However, in summary, it can be determined that this method is limited to the adaptation conditions in the fundamentals and does not describe the influence of harmonics.

[0031] Furthermore, DE 10 2014 115 315 A1 shows an input adaptation of an RF power transistor, i.e. a solution for dealing with the typical low impedance input behavior of an RF power transistor. This problem is solved in the claimed amplifier architecture by designing a transformer by means of a classical line transformer, which electrically decouples the input of the RF power transistor from the input lead and couples the inductance to disable signals with frequencies below the RF frequency range of the RF power transistor, so that the low frequency signals are not amplified by distortions in the forward voltage gain at low frequencies. In another embodiment, the transformer is configured to disable signals below the RF frequency range of the RF power transistor and forward signals within the RF frequency range of the RF power transistor by electrically decoupling the gate of the RF power transistor from the input lead and coupling the inductance.

[0032] Furthermore, DE 10 2014 213 684 A1 shows a broadband Doherty amplifier architecture which is implemented differentially with respect to the amplifier core as well as the impedance inverter and the combiner. The differential design implicitly leads to the termination of the second harmonic at the amplifier core. The termination of the second harmonic does not require a special network. This avoids the problem of having to design a dispersion network that correctly terminates the highest fundamental frequency and the lowest second harmonic. If these two frequencies are very close, it is necessary that the network must suddenly change its behavior along the frequency axis. This is not possible for quality reasons, thus limiting the bandwidth of the system. Even though at first glance it seems advantageous that the differential line guidance implicitly leads to the termination of the 2nd harmonic, it is obvious that its dispersion behavior will not be specifically affected, so no extended amplifier class (class J, class F in succession) is possible.

[0033] Furthermore, DE 10 2016 106 278 A1 describes a broadband Doherty amplifier circuit with an integrated transformation line balun. In the Doherty architecture shown, all components are housed in a housing. The folded line simultaneously acts as a balun for the transition from symmetrical to asymmetrical signals and as an impedance converter. Furthermore, the impedance inverter is designed as a simple λ / 4 line. The combiner in the form of a transmission line transformer-balun automatically presents a high impedance at the second harmonic, thereby achieving a greater bandwidth. The termination of the second harmonic does not require an additional network, and the termination is implicitly given.

[0034] Furthermore, DE 10 2016 123 932 A1 shows a Doherty amplifier circuit integrated into a component package, in which the impedance inverter is replaced by a T network instead of a λ / 4 line. The second harmonic is terminated by a series resonant circuit (sucking circuit / harmonic trap) in each case. Thus, power exchange at the second harmonic between the amplifier cores is avoided, which increases efficiency. The bandwidth of the termination thus defines the bandwidth over which high efficiency can be achieved.

[0035] Furthermore, DE 10 2016 105 742 A1 shows a Doherty architecture with an impedance inverter and an output line transformer in the form of a classic λ / 4 line. Due to the high raw values ​​and high frequencies, the line lengths are short enough to place them in the package. No special network is disclosed for providing a specific termination profile at the second harmonic.

[0036] As is evident from the above prior art, many broadband Doherty amplifier circuits, in particular with active load modulation, have long been known for various applications. For example, RF power amplifiers are used for transmission signals in the aviation L-band (960MHz-1215MHz), in particular for transmission, positioning and output stage amplifiers for secondary radar standards for flight radio SSR, Mode-S, UAT, L-DACS, ADS-B and DME. In addition, digital transmission and reception equipment is used in the field of radio-based flight traffic control, which is a platform for services such as ADS-B (angle estimation, time difference) in SSR and UAT standards or communication and navigation in L-DACS standards. The received and transmitted data can be exchanged with one or more central servers by means of a communication interface. Thus, in practice, there is a need for a multi-purpose power amplifier that meets the requirements of all standards, in particular based on a digital transmission and reception module combined with an integrated electronic device, which can withstand harsh external / outdoor use as well as internal operation, and is therefore intended to enable long-life operation. Examples of external or environmental influences are:

[0037] Weather effects (e.g. ambient temperature),

[0038] Electrical influences (e.g. lightning strikes, overvoltage, overcurrent),

[0039] Installation site influences (e.g., antenna cable length, pollution, industrial dust)

[0040] wait.

[0041] In the area of ​​amplifier design, the goals are:

[0042] High efficiency of modulation waveform

[0043] Peak power

[0044] High relative bandwidth

[0045] High linearity

[0046] By means of suitable structural measures in combination with electronics, the architecture for high-performance and broadband applications is designed to be suitable for suppressing parasitic effects, in particular compensation of drain parasitics, and to achieve a simple construction, which ensures a cost-effective and robust product. Summary of the invention

[0047] By means of suitable structural measures in combination with electronic components, the object of the invention is to provide a high-power transmission and reception device which is suitable for high-power and broadband applications and has a transmission power of more than 10 Watts up to approximately 2000 Watts.

[0048] According to the present application, this object is achieved and is hereby issued, wherein, in each case, an additional multiharmonic transformation line is provided at the amplifier core output of the main power amplifier and at the amplifier core output of at least one peak power amplifier, and a circulator connected to the output of the impedance converter or the output combiner is provided, wherein the upstream main power amplifier and the at least one peak power amplifier are protected from overvoltage and overcurrent on the output side by means of the circulator, wherein the circulator distributes energy to a sump resistor connected to the circulator in the following manner: the circulator has a terminating impedance of 50 ohms for the output combiner, the module has both a high relative bandwidth and a high efficiency at a pulsed transmission power of approximately 2000 Watts, enabling fanless operation of the module and protecting the module from lightning strikes.

[0049] By means of this embodiment of the invention, a digital, energy efficient, fanless, configurable, high power transmission and reception device for transmission powers exceeding 1000 Watts is provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Further advantages and details can be gathered from the following description of preferred embodiments of the invention with reference to the accompanying drawings, in which:

[0051] Figure 1 shows a block diagram of an embodiment of a transmission and reception device according to the present invention,

[0052] Figure 2 shows a block diagram of a transceiver for an application case airport,

[0053] Figure 3 A diagram showing the PAE (Power Added Efficiency) over the transmission frequency of an RF power amplifier according to the present invention,

[0054] Figure 4shows a circuit configuration for measuring RF transmission power according to OTA testing (over-the-air testing),

[0055] Figure 5 The printed circuit board housing of the exhaust gas bushing of the module GSZ according to the invention is shown in a sectional view,

[0056] Figure 6 The plan view shows the Figure 5 The printed circuit board housing,

[0057] Figure 7 An electrical equivalent circuit diagram of an embodiment of an active load modulated RF power amplifier is shown,

[0058] Figure 8 shows different antenna configurations of a transmission and reception device according to the invention,

[0059] Fig. 9 The 3-way Doherty architecture with additional microstrip lines according to the present invention is shown.

[0060] FIG10 shows the relative bandwidth of a basic two-way Doherty without a transformer (prior art),

[0061] Fig.11 Graphs illustrating the relative bandwidth of two-way base dopants with offset lines at the main power amplifier and active load modulator / peak power amplifier according to the present invention,

[0062] FIG12 shows the relative bandwidth of a basic three-way dopant without a transformer (prior art),

[0063] Fig.13 shows the relative bandwidth of a basic three-way dopant with offset lines at the main power amplifier and active load modulator / peak power amplifier according to the present invention,

[0064] Fig.14 shows a three-input structure with a drive function,

[0065] Fig.15 is a layout of a first embodiment of an output combiner (load matched combiner LMC),

[0066] Fig.16 is a layout of a second embodiment of an output combiner (wideband back-off combiner WBC),

[0067] Fig.17 Shows Fig.15 The average power efficiency PAE of the output combiner at the back-off point is

[0068] Fig.18 Shows that there is Fig.15The efficiency and gain of the output combiner RF power amplifier HPA at different frequencies,

[0069] Fig.19 The average power efficiency PAE for the Rayleigh distributed voltage waveform is shown.

[0070] Fig. 20 Shows Fig.16 The average power efficiency PAE of the output combiner at the back-off point is

[0071] Fig.21 Shows that there is Fig.16 The efficiency and gain of the output combiner RF power amplifier HPA at different frequencies,

[0072] Fig. 22 The average power efficiency PAE of the Rayleigh distributed voltage waveform is shown.

[0073] Fig.23 A graph showing the gate current and compression level of a GaN HEMT power amplifier is shown.

[0074] Fig.24 Transistor model with drain parasitics,

[0075] Fig.25 Transistor model with absorption network,

[0076] Fig.26 shows the equivalent circuit diagram of a nonlinear transistor with an absorption network and a voltage supply,

[0077] Fig. 27 The equivalent circuit diagram of a two-way Doherty power amplifier based on a converter is shown.

[0078] Fig.28 shows the relative bandwidth for the static splitter and the control function,

[0079] Fig.29 shows the relative bandwidth of a two-way RF high power amplifier with a converter according to the invention and the associated parameter σ (for setting the performance of the power transistor) of the optimization curve,

[0080] Fig.30 A three-way Doherty power amplifier with three reference levels (prior art) is shown, and

[0081] Fig.31 A partial network for each individual amplifier (model) is shown,

[0082] Fig.32 is a layout of an embodiment of a module of the present invention,

[0083] Fig.33 is a cross-sectional view of the structural design details of the module according to the present invention,

[0084] Fig.34 is a cross-sectional view of another embodiment of the detail,

[0085] Fig.35 is a block diagram of an embodiment for drain current measurement, and

[0086] Fig.36 is a block diagram of an embodiment for gate current measurement. DETAILED DESCRIPTION

[0087] Figure 2 A block diagram of an embodiment of a transceiver for the application case airport (ground station) is shown, which consists of four components, namely an uninterruptible power supply unit UPS and a subsequent module GSZ on the input side, a switchable low-noise amplifier circuit LNA and an antenna A. The housing of all components of the system (transceiver system) is of potential-free construction. The housing can either assume the potential of the protective earth (PE protective earth, protective conductor) or can be designed as a Faraday cage (i.e., as a housing closed on all sides, acting as an electrical shield), which is field-free in the inner area. The electronic components of the components are electrically insulated from the housing potential.

[0088] The UPS module is an uninterruptible power supply unit and is powered by an AC power supply. On the output side, the power supply unit UPS supplies a 48V DC telecommunication voltage (DC direct current, i.e., DC voltage). The power supply unit UPS can exchange useful data with the module GSZ either via PLC (power line communication) or via a COM interface (communication equipment). According to the invention, the output enables a potential-separated installation. In this way, the electronic devices powered by the telecommunication voltage have no PE (protective earth) potential. This power supply concept ensures protection from overcurrents and overvoltages that may occur on the PE line. Another advantage is that the DC power supply lines (VDC and GND) are physically and electrically decoupled from the interference characteristics of the protection conductor (PE), thereby enabling an increase in the SNR (signal-to-noise ratio). Therefore, a low-interference transmission of PLC- and COM-signals is ensured, because no coupling occurs from the interference signals of the protection conductor (PE).

[0089] The transmission / reception system also has an energy-efficient HF high power amplifier HPA according to the invention, which is suitable for transmission signals in the aviation L-band (960 MHz-1215 MHz) with a maximum transmission power of approximately 63 dBm (approximately 2000 watts) (i.e., a pulsed transmission power of approximately 2000 watts). The latter is used as an output stage amplifier for the transmission standards SSR, Mode-S, UAT, L-DACS and DME for flight radio. The HF high power amplifier HPA is a component of the module GSZ, which is designed as an indoor / outdoor ground station with three receivers and one high-power transmitter as an inexpensive digital transmission and reception device for use in the field of radio-based flight traffic control. The transmission and reception device is a platform for services such as ADS-B (angle estimation, time difference) in the SSR and UAT standards or communication and navigation in the L-DACS standard. Receiving and transmitting data can be exchanged with one or more central servers by means of a communication interface. According to the invention, the GSZ module is a digital, energy-saving, fanless transmission and / or reception device for the aeronautical L-band with a transmission power of up to 63 dBm. The modular construction principle of the module GSZ allows different configurations, from a 1x transmission or reception device with a high-power transmitter via a 7x receiver to a 3x receiver.

[0090] The module GSZ connected to the module UPS output can be configured in two embodiments, i.e. indoor operation via a compact 19" rack, and outdoor / outdoor use in a rugged, compact IP67 outdoor housing (IP 67: dustproof and waterproof). By increasing the efficiency of the HF high power amplifier HPA and thus reducing the power losses, the cooling of the module GSZ is purely passive, i.e. both housing types can be designed without fans according to the invention. This reduces the maintenance work and, on the other hand, prolongs the service life.

[0091] Connected to the output of the module GSZ is a switchable low noise amplifier circuit LNA (see Figure 2), which has a low noise amplifier (LNA) for amplifying the received signal, two filters / duplexers (one in the transmission string and one in the reception string) and a switching circuit. All receiver channels and the test loop circuit have controlled voltage supplies for switching on, off and switching the low noise amplifier (LNA), the switching circuit and the two filters / duplexers. The switching circuit can short-circuit the transmission string and the reception string either at the module input or downstream of the filter / duplexer together with the LNA. In addition, the test loop circuit can also be short-circuited with the reception string. Together with the OTA test (Over the Air), the correct functioning of the individual components (cable, filter / duplexer, LNA, plug, antenna) is tested. The structure of the transmission / reception system according to the invention makes it possible to selectively determine the error between the module GSZ and the antenna A. The time required for maintenance and fault analysis is thus greatly reduced, since only the faulty components are replaced or repaired.

[0092] In summary, the functions of the LNA / switch / duplexer in the module LNA are as follows. The LNA (switchable low noise amplifier circuit) module includes an LNA (low noise amplifier) ​​integrated in the receive path. In receive mode, the LNA can be switched on or off. When the LNA is switched on, the received signal is additionally amplified. This can be used either in the case of weak received signal power or to compensate for the cable between the module GSZ and the antenna module A (e.g. RX cable RXK or TX cable TXK, see Figure 4 ) is completed due to the loss on the

[0093] Furthermore, the module LNA comprises either a duplexer or a filter, in each case in the transmission and reception string. The duplexer or the filter are purely passive components.

[0094] A number of switches are installed in the LNA module for testing and maintenance purposes. The switches allow the transmission string to be short-circuited with the reception string. If the switch is short-circuited at the input of the LNA module, an analysis can be performed on the cable between the module GSZ and the LAN module. The switch matrix allows short-circuiting from and to the LNA. Thus, the quality and amplification of the LNA can be performed online or at specific time intervals. In addition, the switch matrix enables antenna testing. In this case, the transmission signal is sent out into the transmission antenna SA via a test loop and is received via free space coupling at the reception antenna EA. The transmission power from the test loop can be set to a permissible small level so that no communication interference is generated during the antenna test.

[0095] The structure of the antenna A depends on the configuration of the modules GSZ, which can be connected in parallel so that the number of possible antenna configurations is increased. This makes it possible to operate the antenna in a planar structure. Various antenna configurations are Figure 8 Shown in.

[0096] For the application case airports, in particular for the current aviation L-band (currently 1 GHz to 2.6 GHz) in the positioning method using transit time measurement (secondary radar principle), the following reference is made to the attached Figure 1 A more detailed description and explanation of the RF high power amplifier HPA as part of the module GSZ. The transmitter of the secondary radar device is usually designed for flight protection with a pulse power of 2000 Watts, but the transmission power can be reduced in steps of 3 dB. Within the scope of the invention, it can be used in the current mobile radio standards of the third generation LTE (called Long Term Evolution, also known as 3.9G) or the future extension LTE-Advanced or 4G, in the Next Generation Mobile Network project (NGMN) or in the VHF flight radio band (currently 117.975 MHz to 137 MHz for navigation radio services with rotating radio beacons (Very High Frequency Omnidirectional Radio Class VOR)) or Instrument Landing Systems (ILS) (currently 108 MHz to 117.975 MHz).

[0097] The efficiency of the module GSZ depends on the PAE (power added efficiency) of the high power RF amplifier HPA. High power classical high power amplifiers with high power efficiency PAE have poor linearity. Low linearity causes the transmission signal to undergo power-dependent amplitude and phase modulation. The modulation generates transmission signal distortion as well as in-band and out-of-band interference. In the case of modulation schemes such as OFDM (Orthogonal Frequency Division Multiplexing), transmission signal distortion can lead to the fact that the signal on the receiving side cannot be demodulated, which means that communication is interrupted.

[0098] In order to achieve high PAE value and linear output characteristics of RF high power amplifier HPA, the RF output stage amplifier is designed as a three-way Doherty amplifier with a maximum output power of 63dBm. The high power RF amplifier HPA has an average power efficiency PAE of 56% (see Figure 3 : Average PAE of 10db PAPR signal) and linear output characteristics with two power back-off points, and implemented in JFont-like operation. The impedance of the RF bandwidth of the RF high power amplifier HPA is represented by the output combiner C connected to the three amplifier outputs. The impedance at the output connection node of the output combiner C is 50Ω.

[0099] According to the Doherty principle, when the transmission signal reaches a peak value, three amplifiers, namely the main power amplifier DM, the first peak power amplifier DP1 and the second peak power amplifier DP2, operate and are each provided with load modulation, which allows the highest output power. If the power of the transmission signal decreases, the second peak power amplifier DP2 is turned off, and only two amplifiers (i.e., the main power amplifier DM and the first peak power amplifier DP1) operate, which is called the first power back-off. As the power of the transmission signal continues to decrease, the first peak power amplifier DP1ab is turned off, and only the main power amplifier DM is operating, which is called the second power back-off. The peak power amplifiers DP1 and DP2 are turned off at the reduced transmission power in order to achieve optimal load modulation. This ensures a high degree of efficiency and high amplification. The RF high power amplifier HPA only amplifies the fundamental wave of the modulated transmission signal and short-circuits the higher harmonics as widely as possible (opposite behavior, i.e., the fundamental wave is capacitive, while the harmonics are inductive). In this way, both high bandwidth and high efficiency are achieved. Therefore, high linearity is another feature of the RF high power amplifier HPA according to the present invention (see Fig.18 and 21 ). Thus, all modulation methods can be used in the generation of the transmission signal, such as AM, GPSK, OFDM (other methods are also conceivable), and this over the entire aeronautical L-band. The definition of the method for specific frequencies within the L-band is only limited by the standard.

[0100] The aviation L-band is between 960 MHz and 1215 MHz. The high power amplifier HPA (high power amplifier) ​​according to the present invention achieves high efficiency and linearity throughout the L-band, which is not so simple. The parasitic inductance and capacitance of the GaN transistor and the conductor track structure (absorption network ABN, impedance converter AN1, λ / 2 and λ / 4 microstrip lines, output combiner C) have a frequency-dependent impedance. In addition, the impedance in the high-frequency signal changes with the position. This is another challenge, because the harmonics (at least 2nd) of the HF high power amplifier HPA according to the present invention can be short-circuited. An embodiment of the RF high power amplifier HPA according to the present invention is now designed in the following way: with an impedance-matched conductor track structure in the L-band. In particular, the RF high power amplifier HPA according to the present invention is not only suitable for the design frequency, but also for the complete L-band including the band limitation (in order to achieve this, a suitable control function is necessary). Therefore, the HF high power amplifier HPA according to the present invention is broadband, which is a feature compared to the prior art.

[0101] Relative bandwidth efficiency is the size of different amplifiers or filters compared to each other.

[0102] Furthermore, in the present description, at side 41 / 42, a relative bandwidth efficiency BE of the RF high power amplifier HPA according to the invention is specified, which is significantly higher than, for example, known from the disclosure described for the input side. The bandwidth efficiency BE is the point of maximum efficiency loss of 10% and can be calculated as:

[0103] BE = 2*(fo-fu) / (fo+fu).

[0104] The classic "barely bone" three-way Doherty power amplifier DPA is extended by applying additional λ / 4 impedance inverters to the peak power amplifier cores DP1, DP2 and the main amplifier core DM. The architecture of the 3-way Doherty with additional microstrip lines is Fig. 9 The length of all microstrip lines is L = λ d / 4.

[0105] These equations are derived by using ABCD parameters (also called chain matrix). In order to solve a given network for the designed frequency, it is decomposed into three different sub-networks. The first sub-network A connects the main amplifier DM to the first peak power amplifier DP1. The second sub-network B connects the main amplifier DM to the second peak power amplifier DP2, while C connects the two peak power amplifiers DP1, DP2 to each other. The ABCD matrix of the sub-network is given as follows:

[0106]

[0107] The next step is to calculate the impedance at the terminals of the current source:

[0108]

[0109] The characteristic impedance Z0, Z1 and the load resistance R must be determined L Z0 is obtained by the definition of the second back-off point. In this state, only the main amplifier DM operates, so I p1 =0 and I p2 = 0. Without loss of general validity, I m The phase of is set to zero. The following equation must be satisfied:

[0110] |Z m I m2.Back-off =U DSm (11)

[0111] Take I m2.Back-off As the current of the main amplifier DM at the second back-off. Solve this equation according to Z0 and obtain:

[0112]

[0113] Next, consider the first back-off, where the main amplifier DM and the first peak power amplifiers DP1, DP2 are turned on, and I p2 = 0. Due to the impedance Z m always has a non-complex positive value, so I p2 The phase of must be -π / 2. The following relationship must be satisfied:

[0114] |Z p1 I p11.Back-off |=U DSp1 (13)

[0115] Solve according to Z1:

[0116]

[0117] Generally speaking, the current I p2 is a complex non-zero value. The phase π is the designed frequency. Finally, we can deduce R L The equation will use the individual peak powers of the amplifier cores DM, DP1, DP2 (or P in equations (15), (16) and (17) m , P p1 and P p2 ) to indicate:

[0118]

[0119] In Z E0 =Z E1 , Z E2 =Z E3 and Z E4 =Z E5 In the case of , or when the impedance transformation offset line LAH is completely ignored, the equation is simplified to the classic "as-is" three-way DPA.

[0120] The RF high power amplifier HPA according to the present invention differs from the basic Doherty amplifier in that it has a characteristic impedance Z E0 To Z E5 The offset lines LAH are each of length λ / 4, where λ is the guided wavelength (not the free space wavelength).

[0121] Equations (15), (16) and (17) enable the calculation of three impedances using the powers of the main power amplifier DM and the two peak power amplifiers DP1 and DP2; in the above equations, the active load modulator P is called p1 and P p2 . Characteristic impedance Z E0 To Z E5This forms a degree of freedom which can be used to optimize the relative bandwidth of the RF high power amplifier HPA.

[0122] The term freedom is defined in more detail below. The characteristic impedance and transformation characteristics of the microstrip line used for the offset line LAH can be changed. A high characteristic line impedance is generated by a narrow microstrip line, while a low characteristic line impedance is generated by a wide microstrip line.

[0123] In addition, due to the length λ / 4, each microstrip line has an impedance transformation characteristic.

[0124] The use of offset lines (also called offset lines) is known in the literature and has been used in the following publications (see above), for example R. Giofrè, L. Piazzon, P. Colantonio, F. Giannini: “A closed-form design technique for ultra-wideband Doherty power amplifiers” IEEE Transactions on Microwave Theory and Techniques, Vol. 62, No. 12, December 2014 or A. Barakat, M. Thian, V. Fusco: “Towards generalized Doherty power amplifier design for wideband multimode operation” SBMO / IEEE MTTS International Microwave and Optoelectronics Conference (IMOC), 2015 or A. Barakat, M. Thian, V. Fusco, S. Bulja, L. Guan: “International Microwave and Optoelectronics Conference (IMOC)” IEEE Transactions on Microwave Theory and Techniques, Vol. 65, No. 3, March 2017. In the mentioned publication, offset lines on active load modulators (hereinafter also referred to as peak power amplifiers DP1, DP2) are used to increase the relative bandwidth of the amplifier at a specific frequency. These offset lines are microstrip lines (λ / 4 lines) having the property of setting the signal at the design frequency (i.e., the specific frequency) to a specific phase offset.

[0125] In addition, each microstrip line has an impedance transformation characteristic due to its length λ / 4.

[0126] The decisive difference of the HF power high power amplifier HPA of the present invention from the prior art is the installation of an additional offset line / microstrip line LAH (which is not a transparent line, as will be described in more detail below) at the main power amplifier DM and the peak power amplifiers DP1, DP2. This extension offers great advantages in terms of amplifier efficiency, the use of modulation waveforms and the advantages of relative bandwidth at high peak powers. With the help of the additional degree of freedom (meaning the characteristic impedances ZE0 and ZE1, i.e. two degrees of freedom), according to the present invention, an optimum can be found in the design of the offset line structure, in which the bandwidth is extended or increased and a corresponding flexibility is provided. Two limiting cases can be found for this purpose.

[0127] In the first limiting case, the HF high power amplifier HPA has a very high bandwidth in the back-off. This is achieved by setting Z0_Z1_RL. Of course, the offset lines LAH of the active load modulator have parasitic effects, so their characteristic impedance must be chosen appropriately in order to maximize the overall bandwidth of the high power HF amplifier HPA. In order to adapt the HF high power amplifier HPA to a 50Ω termination, in particular an additional impedance transformer is used. Depending on the power range, such a transformer can be more or less expensive and thus require more or less printed circuit board space.

[0128] The second limiting case does not require an additional impedance transformer at the output. The transformation characteristics of the offset line LAH can be used to directly adjust the output of the high power RF amplifier HPA for RL=50Ω (or any other desired terminal impedance). In particular, exactly the same HEMT transistors, preferably for the driver stage, and exactly the same transistors are used as main and peak power amplifiers (DM, DP1, DP2, ...). Therefore, temperature, aging and similar dependencies (not only of the transistors, but also of the voltage supply) should drift in the same direction. In this case, a degree of freedom exists, which can be used to optimize the overall bandwidth of the RF high power amplifier HPA.

[0129] With regard to the maximum relative bandwidth, there is an optimum between two limiting cases. Depending on the application and boundary conditions, the RF high power amplifier HPA can be positioned between the two limiting cases. As a result, only a simple and space-saving output transformer is required instead of a large-area output transformer. The advantage is that the relative overall bandwidth of the high power HF amplifier HPA is higher.

[0130] Another advantage of the HF high power amplifier HPA according to the invention is the absorption of the transistor parasitics (see Fig.30 , Fig.31 ). The transistor has parasitic capacitance and inductance at its terminals. Transistor parasitics reduce the relative bandwidth of the amplifier. These must be properly absorbed in order to guarantee the desired functionality of the amplifier and a high relative bandwidth.

[0131] The offset line LAH at the main power amplifier DM and the active peak power amplifiers DP1 and DP2 / active load modulators Pp1 and Pp2 enables absorption of large parasitics and additionally allows multi-harmonic termination (also called offset line in the literature, in this application this is also called "multi-harmonic conversion line"), which allows a high relative bandwidth. These features make the multi-harmonic conversion line (offset line) LAH an important tool. Within the scope of the present invention, the multi-harmonic conversion line / offset line LAH has three tasks simultaneously:

[0132] a) Provide an open circuit. If the peak transistors are "off", they have a residual capacitance. This is transformed into an open circuit at the input of the offset line LAH (fundamental). Therefore, the offset line LAH is also shorter than the λ / 2 line.

[0133] b) Multi-harmonic matching. In harmonics, certain complex frequency-dependent termination impedances must be presented to the transistor in order to improve efficiency and bandwidth. Here, the term "λ / 2 line" does not satisfy the core of the matter, because the term refers only to the fundamental.

[0134] c) Transformation. The offset line LAH also transforms the impedance in the fundamental so that it can be optimally designed at the actual output combiner C.

[0135] In a purely theoretical view of the amplifier, the main amplifier (DM) and the active load modulators (DP1, DP2) are usually operated in wideband class B operation (e.g., as shown in this publication: JH Qureshi: "A Wide-Band 20W LMOS Doherty Power Amplifier" IMS 2010). This process makes it possible to characterize the amplifiers and compare them to each other. This analysis was subsequently performed on a two-way Doherty power amplifier (prior art) and a three-way Doherty power amplifier with multi-harmonic conversion line / offset line LAH (present invention).

[0136] FIG. 10 shows the relative bandwidth of a prior art basic two-way dopant without a transformer (family of curves as a function of ε according to equation (18)).

[0137]

[0138] In equation (18), the drain voltage of the amplifier cores DM, DP1, DP2 is specified as UDS, and P tot represents the peak output power of the amplifier. If UDS is set to a certain value, then the family of curves represents the relative bandwidth for different peak powers. The lower ε, the higher the peak power.

[0139] For example, the curve ε=2 for UDS=50 V represents an RF high power amplifier HPA with a peak power of 1250 W. As can be seen from the figure, reducing ε (meaning increasing the peak power) leads to a reduced relative bandwidth.

[0140] Fig.11 The performance of a two-way Doherty according to the invention is shown, i.e. the relative bandwidth of a basic two-way Doherty with offset lines at the main power amplifier DM and the active peak power amplifiers DP1 and DP2 / active load modulators Pp1 and Pp2. The high power RF amplifier HPA is optimized using the existing degrees of freedom to maximize the relative bandwidth. It will be appreciated that the family of curves are close together and generally have increasing relative bandwidth.

[0141] FIG. 12 illustrates the relative bandwidth of a prior art basic three-way Doherty.

[0142] Fig.13 The performance of a three-way Doherty according to the invention is shown, i.e. the relative bandwidth of a basic three-way Doherty with multi-harmonic transformation lines / offset lines LAH at the main power amplifier DM and active peak power amplifiers DP1 and DP2 / active load modulators Pp1 and Pp2. The high power radio frequency amplifier HPA is optimized using the existing degrees of freedom to maximize the relative bandwidth. It will be appreciated that the family of curves are close together and generally have an increasing relative bandwidth.

[0143] For high peak powers, or more generally for low values ​​of ε, the relative bandwidth of two-way and three-way Doherty increases according to the invention, as does generally the case for N-way Doherty.

[0144] High peak power creates a physical load due to sudden thermal heating. Microstrip lines with 70 μm copper sheath and dielectric constant εr=6.3 are used in the test structure for high thermal resistance. In addition, GaN HEMT transistors have been used for all three amplifier cores DM, DP1 and DP2 of a high-power HF amplifier HPA (e.g. with 500W), and high-precision models for ADS (Advanced Design System, a specific simulation software) are also available. These models are used for the entire design process. The gate bias of the main power amplifier DM is set to UGM=-2.7V, while the peak power amplifiers DP1 and DP2 are set to UgP=-4.5V. The drain voltage of all amplifiers DM, DP1 and DP2 is UDS=50V.

[0145] In contrast to the prior art Doherty power amplifier DPA with a single input and a single output, which consists of a static power divider and divides the input signal according to the main amplifier core DM and the peak power amplifier cores DP1 and DP2, according to the present invention, a digital input signal divider ET with multiple outputs has been used in the HF high power amplifier HPA. This type of divider is obtained by moving the static power divider from the analog range into the digital range. The digital input signal divider ET makes it possible to optimize the power division ratio and control the individual amplifier cores for each frequency and each input drive level. Therefore, each amplifier core can be driven individually in its power and phase position; this results in higher bandwidth and better efficiency. In the following, the digital input signal divider ET is referred to as the control function.

[0146] The control function ET is implemented as a lookup table in the FPGA (see the attached figure). Further components of the FPGA (field programmable gate array), namely the DSP (digital signal processor block) and the DPD (digital predistortion, digital predistortion of the transmission signal) are described in detail below. The control function ET is connected upstream of a multiplexer (multiple inputs and one output, not shown in the figure); this receives differently modulated signals at multiple inputs, such as AM (amplitude modulation), GPSK (Gaussian phase shift keying), OFDM, that is, the control function / digital input signal distributor ET at the input can convert a variety of modulation methods into control of the Doherty power amplifier. The control algorithms for other modulation methods can also be expanded by software. In addition, the control function ET enables efficient and broadband operation of the high power RF amplifier HPA at different design frequencies. The control function ET is a function of frequency and input power, and the construction of the three-input digital signal distributor ET with a drive function / control function is in Fig.14 Shown in.

[0147] Certain types of sources generate arbitrary signals in the digital domain DD (digital domain), which are fed to the control function / input signal distributor ET, which belongs to the respective amplifier core DM, DP1 and DP2. The control function ET generates the respective output and transfers it in the direction of the digital-to-analog converter DAC (digital-to-analog converter as an integrated circuit) driving the amplifier cores DM, DP1 and DP2. The control function ET represents a nonlinear function, while the superior transfer function consisting of the control function ET, the amplifier cores DM, DP1 and DP2 and the output combiner C is a linear function with respect to the continuous wave. In the context of the present invention, it is possible to have a modulated wave (see Figure 1 ) provides a DPD module (digital predistortion) in order to control the memory effect. The nonlinearity of the control function ET can represent a challenge for digital-to-analog converters DAC, since they have to meet the requirements of increasing bandwidth.

[0148] A harmonic compensation simulation is performed in order to identify the control function ET. Each input of the high power RF amplifier HPA has two degrees of freedom, including amplitude and phase. Overall, this leads to a six-dimensional space in which the optimization takes place. A suitable solution for simulating the hardware consists in performing a step-wise identification process, in which the output power is increased to a maximum value by means of small changes relative to zero at the input, and in particular the output power, phase, efficiency and gain are observed. Due to the small changes, this represents an almost risk-free process, thus avoiding the destruction of the amplifier core.

[0149] There is not only one possible control function / digital input signal distributor ET, but an infinite variety. Their behavior depends on the set of measurements considered during the identification process and the weights they are assigned. For example, it is possible to generate a maximum control function ET focused on efficiency. This control function ET is different from the associated control function whose goal is to extend the small bandwidth generated by the digital-to-analog converter DAC, or the control function focused on the low compression level of the amplifier core. Therefore, setting the goals and their weights for the identification process produces various control functions that lead to different operating lines.

[0150] The following control function / digital input signal divider ET was identified in ADS (Advanced Design System, a specific simulation software) for multiple target output powers ranging from zero to 61dBm. For each target output power, the input control profile with maximum efficiency was identified. The following points represent two important secondary goals:

[0151] Compression level: The compression level of each amplifier core DM, DP1 and DP2 is monitored indirectly by observing the gate current. According to the data sheet of GaN HEMT transistors (High Electron Mobility Transistor, a transistor with high electron mobility, which is a special design of field effect transistor for very high frequencies), the maximum gate current is 80mA. The maximum allowed current for the identification process is set to 40mA.

[0152] Intrinsic drain voltage: According to the datasheet, the intrinsic drain voltage is 125 V. To ensure long-term fail-safety, the maximum voltage was set to 120 V in the ADS design environment during the identification process.

[0153] In an N-way Doherty power amplifier, continuous compression control of the main power amplifier DM and the active peak power amplifier / load modulator DP1, DP2 is difficult. However, compression control is important because the loss of life and potential destruction of the transistors are imminent. Due to load modulation, it is not possible to change the input power in order to thereby determine the compression level of the amplifier core as in the case of a single-core amplifier according to the prior art. The entire amplifier cannot be fully identified or can only be fully identified to a limited extent through the multidimensional space of the control function / digital input signal distributor ET. In addition, there is an aging process, which will require regular re-identification. In an amplifier with two amplifier cores, strong compression may still be avoided through careful selection of the control. However, as the number of amplifier cores increases, this becomes increasingly difficult or even impossible, because it is no longer guaranteed that no amplifier core is in excessive compression.

[0154] As already explained, in the HF high power amplifier HPA according to the invention, the gate current is used as a measure of the compression level of the main power amplifier DM and the active load modulators DP1, DP2. All gate currents are measured individually by means of an electronic component. This component can be implemented by a shunt resistor or other methods. Fig.35 A block diagram of an embodiment of a DSM for drain current measurement is shown and Fig.35 An embodiment for gate current measurement GSM is shown. The DC power supply of the DSM module is designated as VDCD. Each module drain current measurement DSM has a comparator, a measuring amplifier, a switch and a resistor 2W2. Each module gate current measurement GSM has a sense amplifier and a resistor 3W3, and the DC power supply for the GSM module is designated as VDCG.

[0155] Within the scope of the invention, the architecture has been chosen in such a way that the video bandwidth of the components corresponds approximately to the instantaneous bandwidth of the transmission signal, making in situ measurements possible. If the video bandwidth is lower than this, the measurements of the compression level are averaged.

[0156] The invention is described in the example of GaN-HEMTs, but can be transferred to all power transistors with high gate currents. GaN-HEMT gate terminals are based on Schottky diodes, which allow for higher gate currents than power transistors based on LDMOS or GaAs. Depending on the peak power of the GaN-HEMT, gate currents of 5mA to 80mA may occur when the power transistor is in compression.

[0157] To prevent electromigration of the Schottky diode, the current density at the gate periphery must not become too large, so that the maximum current is not exceeded. The higher current of GaN-HEMTs compared to other technologies can be used to draw conclusions about the current compression level of the amplifier core.

[0158] Fig.35 The diagram shows the gate current and gain of a 500W GaN HEMT transistor. As the input power increases, the compression level of the GaN HEMT increases steadily. At an input level of approximately 44dBm, the compression level is 3dB. At this point, the gate current is approximately 13mA and continues to (significantly) increase as the compression level increases. Due to the Schottky diode, the current has a diode characteristic process. In the selected example, the maximum forward gate current is indicated as 84mA.

[0159] Using this approach, it is possible to achieve an individual compression control for each amplifier core that is not disturbed by the aging process. In addition, it is possible to detect defective amplifier cores. For example, a gate current that rises above the operating duration of the amplifier can be a characteristic of a defect and thus promptly indicate a ballast failure of the amplifier core. By initiating repairs in a timely manner, greater damage to the equipment or operation can be avoided and the availability of the system can be increased.

[0160] The compensation of the drain parasitic DPS is usually considered a secondary issue, which is not sufficient for power amplifiers with high peak powers. Offset lines with or without conversion characteristics for Doherty power amplifiers are fully described and analyzed in the literature, for example, see R. Giofre et al.: "A closed-form design technique for ultra-wideband Doherty power amplifiers" or A. Barakat et al.: "Towards generalized Doherty power amplifier design for wideband multimode operation" or Y. Yang et al.: "Optimum design for linearity and efficiency of microwave Doherty amplifier using a new load matching technique" or R. Quaglia et al.: "Offset Lines in Doherty Power Amplifiers: Analytical Demonstration and Design". The HF high power amplifier HPA according to the present invention is based on Fig.24The transistor model shown in and based on, for example, the publication "A new method for determining the FET small-signal equivalent circuit" IEEE Transactions on Microwave Theory and Techniques, Vol. 36, No. 7, July 1988 and RAMinasian's: "SI m plified GaAs mesfet model to 10GHz” Electronics Letters, Vol. 13, No. 18, September 1977.

[0161] The intrinsic transistor IT consists of an ideal current source Im and a parallel drain capacitance C0. The transistor body ITG has additional parasitic elements that can be imaged with sufficient accuracy by means of a series inductance L and a parallel capacitance C1. The values ​​of these components are determined by the technique of de-embedding. Fig.24 The transistor model shown in Fig.25 The basis of the offset line based absorption network ABN shown in .

[0162] Fig.25 The transistor model is shown along with the additional microstrip line and capacitor. The drain parasitic has a finite group delay time greater than zero, thus ensuring a delay through the axis. This delay can be seen as a phase shift in CW operation and has an adverse effect on load modulation. Compensation is achieved by additional elements in the absorption network ABN.

[0163] Their task is to increase the phase shift to half the wavelength, so that the absorption network ABN becomes transparent for the design frequency. Only the transformation characteristics remain. Under these conditions, the network is released and the values ​​of the components are determined by the following formula:

[0164]

[0165]

[0166] variable represents the electrical length of the microstrip line n. Inductance is represented by L and capacitance is represented by C. The circuit frequency is expressed by ω.

[0167] The degrees of freedom in the absorption network ABN form phi 0 and phi 1. These are to be chosen in the region [0;π / 2]. Therefore, there are still enough degrees of freedom to maximize the bandwidth of the RF high power amplifier HPA according to the invention. A practical absorption network ABN also requires a connection to a voltage supply. This can be achieved by means of a λ / 4 microstrip line and an offset line based absorption network ABN with transistors and a voltage supply is Fig.26 Shown in.

[0168] According to the present invention, an extremely wideband Doherty HF high power amplifier HPA based on a chip is realized. Fig. 27 As shown in. Fig. 27 The microstrip line length L=λd / 4 of the characteristic impedance Z0 shown in , and the power transistors DM and DP1 are replaced by current sources IM, IP1.

[0169] The main power amplifier DM has an ideal converter TM with a transformation ratio of 1:a, and the active load modulator DP1 has an ideal converter TP1 with a ratio of 1:b. The converters TM, TP1 are connected via an impedance inverter (represented here by a λ / 4 microstrip line). By using ideal converters TM, TP1, the invention obtains sufficient freedom to define the terminal impedance RL as desired while ensuring a high bandwidth. This principle can be extended to N-way Doherty power amplifiers without any problems, where N is the number of power transistors used. The network for the two-way Doherty can be described mathematically and can be represented by an impedance matrix Z.

[0170]

[0171] Where g0 = 1 / (2P m ) and g1=1 / (2P m +2P p ).

[0172] The supply voltage is given the name UDS, while f stands for frequency, and f d Represents the design frequency. The maximum power of the power amplifier core is called Pm (main power amplifier) ​​and Pp (active load modulator).

[0173] The frequency-dependent process as a function of σ is detected according to the matrix of equation (23). The parameter σ is an important degree of freedom by which the performance of the power transistors DM and DP1 can be adjusted. σ must be appropriately selected for optimal performance. The impedance matrix Z does not contain any of the two transformation ratios a and b. However, the degree of freedom a indirectly includes the above-mentioned σ (sigma), because σ and a are related by the following formula:

[0174]

[0175] The degree of freedom b is given by R L The choice definition is:

[0176]

[0177] The load has the name R LThe architecture has degrees of freedom represented by σ.

[0178] Since the impedance matrix Z does not include either b or R L , so R L The choice of or b does not affect the frequency response of the Doherty power amplifier, or more generally, the choice does not affect the performance of the RF high power amplifier HPA of the present invention.

[0179] In a purely theoretical view of the amplifier, the main power amplifier and the active load modulator are usually operated in wideband class B operation (eg as described in the publication JH Qureshi: "A Wide-Band 20W LMOS Doherty Power Amplifier" IMS 2010). This process enables characterization of the amplifiers and comparison of them with each other.

[0180] This is used below to obtain an estimate of the performance of the design according to the invention. In this case, a basic two-way Doherty without a converter is compared with the invention, whose family of curves is depicted in FIG10 as a function of ε (see also equation (18)). As can be seen from FIG10, the lower ε, the higher the peak power. For example, for a chip UDS = 3.3 V, this means that the curve ε = 2 is associated with a peak power of P tot =5.4W (37.36dBm), and ε = 100 corresponds to the peak power P tot =0.11 W (20.37 dBm) corresponds. In addition, it can be seen from FIG10 that the reduction of ε (which means the increase of peak power) leads to a reduction in relative bandwidth.

[0181] Fig.28 The relative bandwidth for a static splitter and a control function (drive function, as described in WC Edmund Neo et al.: “A Mixed-Signal Approach Towards Linear and Efficient N-Way Doherty Amplifiers” IEEE Transactions on Microwave Theory and Techniques, Vol. 55, No. 5, May 2007) is shown, in particular for a two-way Doherty power amplifier with a transformer according to the present invention.

[0182] It can be immediately seen that the invention is independent of ε. This means that the usual performance loss at high peak powers (typically: low ε in on-chip based Doherty HF power amplifiers HPA (RF High Power Amplifiers HPA)) is eliminated according to the invention.

[0183] Only the choice of σ has a strong influence on the bandwidth and the use of the control function ET, which significantly increases the bandwidth by one octave.

[0184] When a static power divider is used, the bandwidth of the present invention is higher than that of the basic Doherty, with a suitable choice of σ.

[0185] Fig.29 The optimized value of σ for a two-way RF high power amplifier (HF high power amplifier HPA) according to the present invention with a transformer is shown in FIG. It is noted that in the literature, a microstrip line with a characteristic impedance of Z0 is usually realized by a transformer. Therefore, in one embodiment, the transformer TM at the main power amplifier DM is merged with the microstrip line to form a component. This means that the transformer TM at the main power amplifier DM not only performs the impedance transformation described by 1:a, but also represents an impedance inverter, so that a compact and broadband RF high power amplifier HPA is realized.

[0186] However, since the control function ET represents the generality of the static power divider, the control function is used for the purpose of generality. The design complexity of the Doherty power amplifier design increases with the number of active load modulators (DP1, DP2). In order to keep the complexity within an acceptable framework, a suitable design strategy is required.

[0187] The basic idea of ​​most design methods is to decompose the power combining network in a suitable way in order to design the sections individually and finally combine them to form the overall network.

[0188] Mainly two different methods are known in the literature.

[0189] The first method is called “Real Frequency Technique” in English. In this method, nonlinear optimization tools are used to design matching networks within a predetermined frequency band.

[0190] The active components (mainly the power transistors DM, DP1, DP2) are replaced by actual measured data. Impedances subjectively selected from the measured data are used with an iterative mathematical process to generate a broadband network. The basic method is described in H.J. Carlin and J.J. Komiak: "A New Method of Broad-Band Equalization Applied to Microwave Amplifiers" IEEE Transactions on Microwave Theory and Techniques, Vol. 27, No. 2, February 1979, and was later simplified, see B.S. Yarman and H.J. Carlin: "A Simplified "Real Frequency" Technique Appliable to Broadcast Multistage Microwave Amplifiers" IEEE MTT-S International Microwave Symposium Digest 1982, and finally applied to a two-way Doherty power amplifier, see G. Sun: "Broadcast Doherty Power Amplifier via Real Frequency Technique" IEEE Transactions on Microwave Theory and Techniques, Vol. 60, No. 1, January 2012. This approach enables designing the main power amplifier DM and the active load modulators DP1 , DP2 independently of each other.

[0191] The second method uses multiple transmitted reference planes, which allows the power combining network to be removed. The impedance is selectively defined for each reference plane for which the matching network is designed. This is used, for example, in WC Edmund Neo et al.: "A Mixed-Signal Approach to Linear and Efficient N-Way Doherty Amplifiers" IEEE Transactions on Microwave Theory and Techniques, Vol. 55, No. 5, May 2007. The impedance of the reference plane is set to 50 ohms.

[0192] A design method that improves on the reference plane method is described and explained below. In the above publications, the reference plane is used only for the design frequency. For broadband design, the impedance of the reference plane must be frequency dependent. Any or subjective selection of impedance over the frequency band is either impossible or will lead to suboptimal results.

[0193] Therefore, these impedances must be determined in advance to be as close as possible to the following physical curves.In the context of digital Doherty power amplifiers, the impedances not only need to be frequency dependent, but also additionally need to vary (in the drive function DF) with variations in the control function ET.

[0194] When a static power divider is used, the control function ET has the characteristics of a static power divider.

[0195] The control functions themselves can be selected accordingly, i.e., they can be selected in such a way that their behavior is similar to that of a static power divider, or that they are fully adapted to an arbitrarily selected criterion. The type of control function ET selected is undeterminable for the functionality of the design method. However, due to their flexibility, they represent the general case of conventional static power dividers, and therefore they are used for the improved design method.

[0196] The design methodology provides for the use of N reference planes in an N-way Doherty. A reference plane is located at each output of the matching network AN of the main power amplifier DM and the active load modulators DP1, DP2.

[0197] In the case of a three-way Doherty power amplifier, the three reference planes RA, RB and RC are located as follows Fig.30 The position shown in (according to the prior art).

[0198] The power transistors are abstracted as current sources (Im, Ip1, Ip2). To ensure a realistic representation, the drain parasitics DPS are included in the model. In the case of active load modulators DP1, DP2, the input impedance of the reference plane must be as high as possible. In contrast to the real-frequency technique, no subjective choice of impedance is required here. Only the transistor drain parasitics DPS must be known, which is not an obstacle due to the current transistor modeling.

[0199] The impedances ZM(f,ET), ZP1(f,ET) and ZP2(f,ET) are frequency dependent and control function dependent functions. By using any control function ET drive Fig.30The impedance is found by taking the network depicted in and determining the voltages and currents at the corresponding reference planes A, B, C (RA, RB, RC). The impedance is calculated from the voltages and currents. This is repeated for all frequencies. In principle, it is possible to determine the impedance at the reference planes A, B, C (RA, RB, RC) for any number of frequencies f and control functions ET. In practice, this should be limited to practical numbers, since the simulation speed at the design stage decreases with each frequency f and control function ET.

[0200] The improved design method envisages limiting N-1 back-off points and the peak powers of the corresponding N Doherty power amplifiers DM, DP1, DP2 in the control function ET, and using an appropriate number of frequencies f according to the width of the selected frequency band.

[0201] By using reference planes A, B, C (RA, RB, RC), the matching network AN (output combiner C) can be divided into sub-networks, such as Fig.31 These sub-networks can be designed separately. The main amplifier DM and the active load modulators DP1, DP2 are now designed independently of each other and finally assembled to form the matching network AN (output combiner C).

[0202] In principle, the main amplifier DM and the active load modulators DP1, DP2 can be designed independently of each other and finally assembled to form the matching network AN (output combiner C). However, if improved accuracy is required, then first the load modulators DP1, DP2 must be designed and assembled into the power combining network without the main amplifier. This is in contrast to the case of a power combining network without the current source IM, its drain parasitics and the matching network AN (output combiner C). Fig.30 Corresponding. The impedance ZM(f,ET) at the reference plane "A" is now determined. In the measurement, the current sources (IM, IP1, IP2) and the drain parasitics DP should be replaced by nonlinear transistor models. Therefore, the newly measured impedance ZM(f,ET) is more accurate than the previous impedance, which was determined only via a linear model. As a result of the "design option", the performance of the back-off can be significantly improved. The resulting layout of the second embodiment of the output combiner C is Fig.16 Shown in.

[0203] With the aid of the above CAD-based approach, two RF high power amplifiers HPA corresponding to the above constraints are designed. Fig.15 , the layout of the output combiner C (load regulated combiner LMC) with a length of approximately 15.1 cm and a height of approximately 9.3 cm from the first limiting case is shown in FIG. Fig.16The layout of the output combiner C from the second limiting case with a length of approximately 14.9 cm and a height of approximately 10.4 cm (wideband back-off combiner WBC) is depicted in . Both amplifiers were analyzed in a CAD tool using the control function ET. Fig.15 The relative bandwidth of the high power RF amplifier HPA depicted in FIG. 1 is 36.4%, while Fig.16 The relative bandwidth of the high power RF amplifier HPA shown in FIG. 4 reaches 43.5%. Over the entire bandwidth, the peak power of the two RF high power amplifiers HPA of 61dBm fluctuates by less than dB, which will be described and explained in more detail below, wherein the load matching combiner LMC ( Fig.15 ) and similar wideband backoff combiner WBC( Fig.16 ) is a special form of the output combiner C.

[0204] Fig.15 The output combiner C depicted in FIG. 1 is intended to obtain the peak efficiency of the second back-off (where only the main power amplifier DM operates) over the entire frequency band. It is referred to as the load matched combiner (LMC) below. Obtaining an efficient back-off point over the entire bandwidth improves the average efficiency (peak-to-average power ratio signal ratio) of the modulated high PAPR waveform.

[0205] It is well known that microstrip lines with high transformation ratios reduce bandwidth, which is known as the "Bode Fano limit". Broadband behavior is achieved by reducing the transformation ratio of the λ / 4 line. Taking into account the second back-off, the maximum bandwidth is achieved by minimizing the impedance change, which requires Z0≈Z1≈RL.

[0206] Fig.15 The output combiner C depicted as an LMC in FIG. 5 can meet this requirement by exploiting three of the six degrees of freedom. Due to the additional transformation offset line LAH at the main power amplifier DM, three degrees of freedom are retained, which can be used to maximize the bandwidth behavior. In the case of extremely high peak output powers, for example greater than 61 dBm, the output resistance is less than 6 Ω. This requires a broadband impedance inverter with a transformation ratio greater than 8.33 for 50 Ω load balancing. In order to adjust the low output resistance with 50 Ω termination, a broadband three-stage λ / 4 transmission line impedance converter is used.

[0207] A control function ET is identified for the output combiner C as LMC from 0.9 GHz to 1.3 GHz in steps of 25 MHz, which corresponds to a relative bandwidth of 36.4%. The peak output power for each frequency is in the range of 60.4 dBm to 61 dBm. Fig.17 The power added efficiency PAE at the back-off point is shown in FIG.

[0208] have Fig.15The output of the combiner C high power RF amplifier HPA has a high efficiency and gain at various frequencies between 0.95 GHz and 1.25 GHz. Fig.18 Shown in.

[0209] This power is comparable to the power of an ideal class B amplifier with a maximum efficiency of π / / 4. The RF high power amplifier HPA shows the typical behavior of Doherty with a clear efficiency plateau for output powers greater than 53dBm or 54dBm. The control function ET clearly shows that there are peak efficiency points at each frequency, which are related to the second back-off. It should be noted at this point that, contrary to the ideal theory, only two maximum peaks are observed. The maximum efficiency peak of the second peak power amplifier core DP2 is not present, once at the center frequency. This is expected for non-center frequencies due to the universal attenuation of the Doherty principle. The first back-off point is shifted to a higher back-off value, which is the reason. Studies have shown that the missing peak efficiency position does not have much impact on the average efficiency of the modulated waveform.

[0210] It can be determined that the amplified curve experiences a drop at the point where load modulation begins. In the case of a conventional power amplifier, such a sudden change in the output would produce a strong nonlinearity that must be linearized. This is different from the connection using a digital RF high power amplifier HPA according to the present invention. The control function ET linearizes the DPA output. Higher bandwidth requirements only require requirements for the digital-to-analog converter DAC. In order to answer the reason for the rapid change in gain, it must be taken into account that the given gain curve is the combined gain of all three amplifier cores DM, DP1 and DP2, rather than the individual gain of each individual amplifier core. Individual gains do not experience any such spontaneous changes, but instead have more static tendencies. The overall gain is reduced because the peak power amplifier cores DP1 and DP2 are biased as class C and therefore have a lower gain than the main amplifier core DM. The input power of the peak power amplifier cores DP1 and DP2 quickly exceeds the input power of the main amplifier DM, causing the overall gain to drop rapidly.

[0211] Fig.19 The average power efficiency PAE at the back-off point for the Rayleigh distribution waveform is shown. It can be determined that the PAE remains above 40% over a wide range. Fig.15The broadband back-off combiner LMC shown in has the advantage of a clear high efficiency peak at the second back-off, which provides high average efficiency over the entire bandwidth. The flip side is that the additional broadband matching network greatly increases the area requirement. Also, since most microstrip lines are 13mm to 16mm wide, the low impedance environment in the output combiner C presents difficulties in designing the circuit board layout. This reduces the reliability of the S-parameter form for the wide ports as they are less accurate. This is, of course, a major challenge for high power amplifiers with very high powers, as the microstrip lines become thinner as the maximum output power decreases. In summary, it can be said that Fig.15 The broadband back-off combiner LMC shown in has the advantage of a good back-off operating behavior over the entire bandwidth, but to this extent also has some disadvantages, since it is used for superstructures with very high powers. In order to avoid broadband impedance inverters and also load tuning combiners (according to Fig.15 The reduction of the microstrip line width in the LMC) must utilize the impedance inverter power capability in the output combiner C.

[0212] exist Fig.16 In the second limiting case shown in , the transformation characteristics of the combiner architecture are used to tune the three-way Doherty power amplifier DPA directly to the desired 50Ω load impedance. Fig.15 The load tuned combiner (LMC) shown in Figure 1 uses Fig.16 The same architecture as the Wideband Backoff Combiner (WBC) shown in , only the values ​​of the components are changed.

[0213] The control function ET was identified from 0.9 GHz to 1.4 GHz in steps of 25 MHz, which corresponds to a relative bandwidth of 43.5%, and was identified to achieve maximum efficiency at each power level. The peak output power at each frequency ranged from 60.3 dBm to 61 dBm. Fig. 20 Shown according to Fig.16 The average power efficiency PAE of the output combiner C in the "full state" and at the back-off point (1. back-off, 2. back-off). Fig.21 In, there is a basis Fig.16 The efficiency and amplification of the RF high power amplifier HPA of the output combiner C at different frequencies (f c =0.95GHz, f c =1.1GHz and f c =1.25GHz). In addition, Fig. 22 The average power efficiency PAE at the back-off point is shown for Rayleigh distribution waveforms for PAPR=7dB and PAPR=10dB. The ideal Class-B curve (dashed horizontal line) is shown for PAPR=7dB.

[0214] and Fig.15 The main difference of the load tuning combiner (LMC) shown in Figure 1 is the higher bandwidth. Another important difference is the general increase in the average power efficiency PAE, specifically over the load modulation range. c = 1.1 GHz, the efficiency curves of the two combiners LMC are similar. For all other frequencies, the difference in the average power efficiency PAE is approximately 5% to 10%, mainly in favor of Fig.16 The wideband back-off combiner (WBC) shown in FIG. Fig.15 The load tuning combiner (LMC) shown in Fig.16 The wideband back-off combiner (WBC) shown in , but the higher efficiency is not achieved due to the higher precession during the design process. The width of the T-connection port and the width of all other connections are significantly smaller. The widest port used is 11mm compared to 16mm in the wideband back-off combiner (WBC). Therefore, Fig.16 The load tuned combiner (LMC) shown in represents a better choice for high power amplifiers with very high powers. In particular, in the output combiner C according to the invention, both the main power amplifier DM and the peak power amplifiers DP1, DP2 are provided with the same drain bias. Since only the drain bias is required, the construction and development and maintenance costs are significantly reduced. The same HEMT transistors are also used, which is an economic advantage on the one hand and on the other hand it is assumed that temperature and aging fluctuations drift in the same direction. This is a significant advantage over the prior art.

[0215] In order to measure the transmission power and the transmission signal quality, the RF high power amplifier HPA has a second directional coupler R2 (see the attached figure). The coupling between the transmission microstrip line and the second directional coupler R2 (see the attached figure) is approximately -40 dB. Directional couplers are electrically passive components in the field of high-frequency technology, for which purpose power splitters include power combiners, in particular in high-frequency amplifiers or in the case of reverse operation. The measurement device implemented for measuring the transmission signal is purely inductive and no additional losses occur in the transmission signal, which in turn does not reduce the efficiency.

[0216] Circuits for measuring RF transmission power are used for OTA (Over the Air) testing. Specifically, Figure 4 The structure for OTA testing implemented in an RF high power amplifier HPA is shown. The test signal is inductively coupled into the transmission channel via the second directional coupler R2 (see Figure 1). This test setup allows all transmission and reception components connected to the module GSZ in transmission and reception direction to be tested, i.e. TX cable TXK, RX cable RXK, transmission antenna SA and reception antenna EA. The transmission signal is received via free space propagation (OTA) at the reception antenna EA. OTA tests can be performed cyclically at specific time points (e.g. daily) or when the transmission of the useful signal is suspended.

[0217] Circulator Z1 is connected to the output of impedance transformer AN1 (see Figure 1 ), which can be implemented as an HF circulator made of ferrite using waveguide or strip conductor technology. With regard to the desired high bandwidth, the star point of the output combiner C should see a reliable, constant termination impedance. This is ensured according to the invention by the circulator Z1. In the prior art, passive circulators are designed as flat components with an HF-sealed housing and three coaxial sleeves (connectors, ports). Within the scope of the invention, depending on the transmission power, broadband, ferrite-free and magnetic field-free circulators or active circulators (e.g. composed of operational amplifiers (voltage-controlled current sources with differential inputs)) can also be used. According to the invention, the circulator Z1 has two functions. On the one hand, it protects the upstream Doherty amplifier with the main power amplifier DM, the first peak power amplifier DP1 and the second peak power amplifier DP2 from overvoltages and overcurrents on the output side, because the circulator Z1 can release / circulate the energy flowing into the electronics from the plug to the collecting resistor W1. On the other hand, with the help of the circulator Z1, the returned HF power is measured by the first directional coupler R1 (see Figure 1 ). For example, in the transmission channel, the measuring device consists of a 40 dB directional coupler and the returned HF power is an indicator of the status of the plug S1 or the antenna cable / TX cable TXK (see Figure 4 ).

[0218] That is, the returned HF power is proportional to the VSWR (standing wave ratio) at the plug. Therefore, physical and electrical faults (e.g. cable break, short circuit, idle, etc.) on the plug and on the TX cable TXK can be detected. This allows efficient error monitoring without having to change to a test mode during which the useful signal transmission is interrupted. Error monitoring is performed either cyclically or at any time.

[0219] The output combiner C thus has several functions.

[0220] On the one hand, it is intended to ensure the peak efficiency of the second back-off point over the entire bandwidth of the amplifier, that is, only the main power amplifier DM operates without an RF signal fed into the input and the peak power amplifiers DP1, DP2 are only pre-stretched at the gate (not only without load modulation). This function is achieved by implementing a broadband multi-stage transformation line multi-harmonic transformation line (offset line) for load adaptation.

[0221] In addition, the output combiner C should also transform the impedance from the low impedance environment of the amplifier output (DM, DP1 and DP2) to the output impedance (50 ohms) of the RF high power amplifier HPA at the first back-off point and during full power control. Since the signal is considered as a forward propagating wave, it is also necessary to consider the reflection and the loss caused by the superposition principle. Therefore, the output combiner C requires a 50 ohm termination to avoid reflections.

[0222] The circulator Z1 has a 50 ohm controlled termination impedance over the entire bandwidth of the HPA. Thus, the circulator Z1 is considered not only as a protection element and a measuring instrument, but also as a terminal for the output combiner C.

[0223] The output of the high power RF amplifier HPA is protected from lightning strikes by a gas arrester G1 (see Figure 1 ). The gas arrester G1 is integrated on the printed circuit board HFL of the RF high power amplifier HPA; the layout of the single-sided or double-sided RF printed circuit board is Fig.32 According to the invention, this is a printed circuit board housing LG which is soldered directly onto the printed circuit board HFL using SMD technology and corresponds to protection class IP67, see Figure 5 . The gas discharge sleeve GH of the gas arrester G can be removed or inserted via a screw S1. The screw S1 has ground potential and is pressed flat against the left connecting pole of the gas discharge sleeve GH by a spring. The screw S1 is screwed into an annular contact RK, which can be soldered to the edge of the printed circuit board. The screw seal SD, on the one hand, presses the screw S1 against the annular contact RK, and on the other hand, is to prevent the penetration of moisture, dust and dirt. There is a groove on the outer surface of the annular contact RK, into which groove an annular seal RD (preferably a circular seal) is inserted. The seal RD ensures that no moisture, dust and dirt can penetrate into the interior of the printed circuit board housing LG.

[0224] The front part of the printed circuit board housing LG is designed so that the printed circuit board housing LG can be tightly screwed together with the front plate of the device housing (screws S1 and fastening holes BB), such as Figure 6 . The right connecting pole of the gas discharge bushing GH is mechanically connected to an electrical contact designated as base contact BK. The base contact BK has two pads LP1, LP2 and is connected to either the first pad LP1 or the second pad LP2 of the lead to be protected, but not to both pads at the same time. According to the invention, the freedom of design of the device housing is achieved by means of two pads, since the height of the printed circuit board housing LG relative to the printed circuit board HFL can thereby be selected.

[0225] Compared with the conventional lightning protection box, the printed circuit board housing LG has the following advantages. According to the present invention, the base contact BK is directly connected to the conductor track to be protected from lightning strikes, while the commercially available lightning protection box is installed between the output connector of the HF power amplifier and the antenna cable. As a result, the RF transmission signal undergoes additional attenuation at each connector of the lightning protection box. When the channel damping of the plug is 0.8dB to 1dB, the total attenuation of the two connecting plugs is between 1.6dB and 2dB. This corresponds to a 31% or 37% reduction in transmission power. Using the circuit board housing LG for the gas exhaust bushing GH according to the present invention instead of the lightning protection box greatly reduces power losses and improves the efficiency of the module GSZ / HF-high power amplifier HPA and the entire transmission and receiving device. The printed circuit board housing LG is also used in three receiving lines.

[0226] The protection circuit system of the Rx input (RF high power amplifier HPA) is implemented in two stages. (See the Figure 1 ). The gas arrester G1 protects the device from lightning strikes on the antenna side coarse protection. In case of a lightning event, the current (energy) is diverted to ground potential (ground rail ES). The second stage U1 protects the Rx input from transient overvoltages fine protection U1. In this case, the energy is exported to the reference potential. The fine protection U1 counteracts both in case of transients generated externally (e.g. from an external LNA (low noise amplifier)) and in case of transients coming from the internal electronics.

[0227] The Tx output has two gas arresters G1 (see the Figure 1 ). The first gas arrester G1 is connected between the TX useful signal line and the ground potential, while the second gas arrester G2 is connected between the reference potential and the ground potential. In this way, the RF high power amplifier HPA is protected from lightning strikes in the antenna A or the inner line of the antenna cable, and is protected from lightning strikes entering the reference potential. There is no Tx output for fine protection in the classical sense. Protection from external transient overvoltages is achieved with the help of the circulator Z1. The transient voltage in the pass region of the circulator Z1 is transferred to the collecting resistor W1. The circulator Z1 greatly attenuates the transient voltage outside the pass region.

[0228] The module GSZ / RF high power amplifier HPA according to the invention must be calibrated during startup. For calibration, the receive / monitor channel is used with a second directional coupler R2 (see Figure 1 ). This allows detection of RF power, DC power (drain-source voltage, drain current, and gate current), signal quality, and efficiency.

[0229] A control function ET for the main power amplifier DM and the two peak power amplifiers DP1, DP2 is generated from the data set. During the ongoing transmission operation, a fine calibration running in parallel in the background is performed in order to compensate for influences such as temperature fluctuations, aging and transmission frequency changes, thereby always ensuring the highest efficiency and the best signal quality. In applications based on active load modulation, compression control of multiple power amplifier cores is very difficult. Compression control is very important for the service life and even possible damage of the power transistors. The initial identification of an amplifier with three power amplifier cores (DM, DP1, DP2) in five-dimensional space is only possible to a limited extent. With the help of an aging process, a re-identification would then be necessary, which contradicts the reliable and continuous operation of the amplifier.

[0230] According to the invention, a gate current for determining the compression level of the power amplifier core (DM, DP1, DP2) is used in each case. Power transistors based on Schottky diodes have high gate currents, such as GaN-HEMT transistors (high electron mobility transistor). The GaN-HEMT (gallium nitride) used is very suitable for high-frequency applications due to the high charge carrier mobility. Similar to metal semiconductor field effect transistors, the components are controlled by means of a metal gate connected to the gallium nitride layer. The high gate current is used to monitor the current compression level of the power amplifier core. Fig.23 The ratio between the gate current and the compression level of a power amplifier using a GaN-HEMT is shown. In this way, in-situ compression control of each power amplifier core DM, DP1, DP2 is achieved without having to perform an initial identification and without the need for subsequent re-identification. This type of compression control is not disturbed by aging processes and enables the detection of defective amplifier cores or missing faulty amplifier cores. Maintenance expenses and investment costs are thereby reduced and the service life of the corresponding HF power amplifiers DM, DP1, DP2 is extended. Alternatively, material systems with aluminum gallium nitride (AlGaN) or aluminum indium nitride (AlInN) can also be used, which allow higher operating voltages before field breakdown occurs due to their relatively high band gaps. This material combination has proven to be particularly advantageous for the production of power transistors, since the output impedance increases at the same power, thereby simplifying the output (adaptation) of the power. On silicon carbide (SiC), it additionally has a lower thermal resistance than the GaAs material combination, which has a positive impact on the maximum power loss or service life and reliability.

[0231] The construction of the HF high power amplifier HPA improves efficiency and reduces thermal power losses. The hot spots are the main power amplifier DM and the two peak power amplifiers DP1, DP2. All three power amplifiers DM, DP1, DP2 are mechanically and electrically connected to the source connection on the heat sink HSK, in particular a copper heat sink. The heat sink HSK (see Fig.33 , Fig.34 ) is connected to the device housing of the module GSZ over a large area via an electrically insulating solder paste / adhesive film / adhesive or thermally conductive film LPA. The heat is thus dissipated via the device housing. This thermal management design allows the GSZ module to adopt a fanless structure, suitable both for indoor spaces and for outdoor / outdoor use, which has economic advantages and reduces maintenance costs.

[0232] Fig.33 A cross-sectional view of a structural design detail of an HF high power amplifier HPA according to the invention is shown to illustrate the thermal management. The high efficiency of the high power HF amplifier HPA is achieved in particular by the construction. The construction is used to dissipate heat from the HF high power amplifier HPA, in particular the transistor TR, particularly well. The module / module GSZ is constructed so that all components (passive components PBE, plugs, transistors TR and conductor track structures) have a good thermal connection to a single copper cooling surface HSK. The contact surface for the transistor TR, in particular the passive element PBE, is designated KF, and the printed circuit board HFL can have a 1-sided or 2-sided construction. Each transistor TR additionally has a heat sink TRK connected to the transistor TR via transistor mounting screws TBS. In addition, ventilation holes / (one or more) air gaps LUS are provided in the heat sink HSK (also for solder paste LPA or overpressure and large build-up due to flux during production). This building technology ensures that hot spots (transistor chips) can have high heat dissipation. High heat dissipation of the transistor chip has the advantage of increasing the efficiency of the HF high power amplifier HPA.

[0233] Another construction possibility is to mount the component on the solder side of the printed circuit board and use it in conjunction with the transistor die TRD (see Fig.34). The transistor die TRD is adapted with flip-chip technology, ventilation holes being provided in the heat sink HSK (also for overvoltage and large build-ups due to solder paste LPA or flux in production). Thus, two significant advantages over standard construction techniques are achieved. With flip-chip technology, the transistor chip reduces parasitic inductance, thereby improving the quality of the transmitted signal and shortening the development time of the conductor track structure. The transistor die TRD is electrically and thermally connected to the copper cooling surface (of the heat sink TRK) directly or with the aid of solder paste LPA. This eliminates the thermal resistance of the transistor housing. Thus, better heat dissipation of the transistor TRD is obtained and therefore more current can flow through the transistor TR, i.e. the efficiency of the transistor TR is increased and the transistor saturation point is further moved upwards.

[0234] The device housing of the module GSZ is an insulated structure, i.e. it can either have ground potential or be floating (Faraday cage principle). All power terminals, antenna plugs and communication plugs are isolated from the device housing, which improves the SNR, since no interfering signals are coupled to each other and to the PE line (see Figure 2 ).

[0235] The applicant's integrated DLC-3AD (ASIC) takes over the power line communication, measurement and diagnostic tasks of the transmission and receiving device according to the invention. The DLC-3AD is a redundant communication interface (configurable by software) and therefore an additional time synchronization. The use of the DLC-3AD reduces the number of cables and thus the plug connections. The quality and service life of the entire system are thereby improved.

[0236] As already explained, an HF High Power Amplifier (HPA) is an electronic device representing an RF power amplifier with active load modulation (according to the Doherty principle). The HF High Power Amplifier (HPA) has three drive inputs, each connected to a power transistor, one for the main power amplifier DM and two for the two peak power amplifiers DP1, DP2 as active load modulators. The outputs of the power transistors DM, DP1, DP2 are connected to a multi-harmonic power combining network / output combiner C, the output of which is connected to a load / plug / antenna A, as Figure 7 The way in which the power transistor delivers its power to the network is determined by the amplitude and phase at the control input.

[0237] The High Power HF Amplifier (HPA) has three inputs that are individually controlled in amplitude and phase (see Fig.14). The control unit forms the function of the control function ab / digital input signal distributor ET. Since each power amplifier is driven individually, the control function has six degrees of freedom (five-dimensional space). In contrast to a classic Doherty amplifier, in which the control function is implemented with an analog power distributor, the control function ET of the HF high power amplifier (HPA) according to the invention is installed in the digital range DD (digital domain). In this way, any desired amount and any phase of the drive signal can be set at each individual input.

[0238] The control function ET in the digital domain has an almost infinite number of solutions in a five-dimensional space, where at least one static function can be found that satisfies the optimization criteria in terms of efficiency, linearity and bandwidth. Moreover, the task of the control function is to minimize the complexity of the DPD (digital predistortion) and the dynamic memory effects of the GaN-HEMT transistors used. Adding the control function ET to the digital domain has the additional advantage that there is no shoot-through attenuation of the analog power divider.

[0239] Figure 8 Four antenna installation variants are shown, namely, in the first row, variant 1 as a round pole for L-band (the rod antenna is located in the center of the pole tip), in the second row, variant 1b as a round pole for L-band and GPS (in this case, the rod antenna is located in the center of the pole tip and the GPS rod antenna is located on the L-band rod antenna), in the third row, variant 1c adopts an arrangement of an L-band rod antenna located laterally on the pole tip and a GPS rod antenna located laterally on the pole tip next to the L-band rod antenna, in the fourth row, variant 2 adopts an arrangement of the rod antenna for L-band and GPS located on the side of the pole instead of on the top of the pole, and in the fifth row in plan view is a 3x planar antenna A, each of which consists of up to six L-band antenna elements Ant.1 to Ant.n. The corresponding installation variants of antenna A determine the propagation or division of the electromagnetic field emitted or received by antenna A. The advantages of the transceiver system according to the invention are Figure 8 All the variants depicted in can be covered with the system.

[0240] In summary, the output combiner C with impedance inverters connected to all amplifier cores DM, DP1, DP2, ... according to the present invention enables elimination of parasitic harmonics and optimization of broadband performance. The first output combiner C for obtaining the peak efficiency of the second back-off (in which only the main power amplifier DM operates) will be obtained over the entire frequency band, and the first output combiner C is also called a load tuned combiner (LMC) (e.g. Fig.15), requiring a broadband multi-stage transformation line for load adaptation and providing high back-off efficiency over the target bandwidth. This embodiment of the HF high power amplifier HPA according to the present invention achieves a relative bandwidth of 36.4% and a peak output power of 61 dBm with a ripple of less than 1 dB. Fig.16 The second output combiner C shown in FIG. 1 , also known as a wideband back-off combiner (WBC), transforms the low impedance environment into a desired load termination. It is suitable for the purpose of achieving the design target over the entire frequency band and even covers a wide area outside the frequency band. It has a relative bandwidth of 43.5%, a peak output power of 61dBm, and a ripple of less than 1dB.

[0241] Based on this, according to the invention, a digital, energy-efficient, fanless, high-power transmission and reception device is provided for the current aviation L-band, which is protected from lightning strikes. The layout of the single-sided or double-sided HF printed circuit board HFL of the module GSZ according to the invention is Fig.32 As shown in . HFP1 is the RF signal input of the first peak power amplifier DP1, HFP1 is the HF signal input of the second peak power amplifier DP2, HFM is the HF signal input of the main power amplifier DM, HFO is the HF high power amplifier output of the high power amplifier HPA (high power amplifier), DCV is the DC power supply terminal for impedance adaptation, DK is a discrete capacitor, ITN is an impedance transformation network for input adaptation, TKK1 is a T-type cross combiner 1 with a microstrip line of length λ / 4, TKK2 is another T-type cross combiner 2, W1 is a resistor 1 (also called a collector resistor), and AGT is an output converter and an interstage network (gate and drain matching with impedance transformation).

[0242] According to the invention, a special network is provided for providing a special termination profile at the second harmonic, in particular for realizing an extended broadband amplifier class, wherein the imaginary part at the second harmonic is opposite to the imaginary part of the fundamental and additionally proportional along the frequency axis. With the architecture according to the invention, the amplifier cores of the main power amplifier DM, the first peak power amplifier DP1 and the second peak power amplifier DP2 are subjected to these broadband termination conditions at the fundamental and harmonics. In this architecture, the impedance inverters are composed of short line elements as short as the wavelength λ, which can be regarded as a substitute for lumped components (such as capacitors and coils) and cannot be regarded as lines. The problem of local harmonic termination at the output of the amplifier core is also solved, because the line segments are linearly transformable and not lumped due to their length.

[0243] exist Fig.15 , 16In the layout of 32, a higher-order multi-stage network according to the invention can be seen from the multiple directly continuous extensions of the conductor tracks. In the combiner of the main power amplifier DM, the first peak power amplifier DP1 and the second peak power amplifier DP2, the transformation of the harmonics is also taken into account and intentionally influenced, changing the width of the line for this purpose. Due to the higher order of the local network on the amplifier core in the described architecture, the termination condition can operate at multiple harmonics and the correct phase position. In this way, the exchange of power (in the case of harmonics generated by capacitors and inductors) can be greatly reduced or suppressed not only at one harmonic, but also at multiple harmonics, which further improves the efficiency. In the case of high output powers of more than 500 W, the control of even more harmonics is performed according to the invention to reduce waste heat.

[0244] Compared to the Doherty amplifier described in WO 2013006941 A1 without a directional coupler / circulator Z1 in the combiner (output combiner C), the second harmonic is transparently guided via the combiner, so that the main amplifier and the peak amplifier exchange power at the second harmonic, which is prevented in the architecture according to the invention because this reduces efficiency. According to the invention, all amplifier cores of the main power amplifier DM, the first peak power amplifier DP1 and the second peak power amplifier DP2 are terminated locally with respect to their harmonics with the correct phase position, so that only little or no power exchange can occur at the harmonics.

[0245] Compared to the composite amplifier described in DE 601 24 728 T2, a digital predistortion DPD or a digital control function ET is used according to the invention. The input of the digital predistortion DPD is connected to the output of the digital signal processor block DSP, and the output of the digital predistortion DPD is connected to the control function / digital input signal distributor ET (see Figure 1 ). DSP is a digital signal processor module, which is responsible for preparing the digital transmission signal, ie encoding the transmission signal for the corresponding communication standard.

[0246] The digital predistortion DPD is not part of the control function ET. The DPD is a digital predistortion of the transmission signal, wherein the digital predistortion DPD is located upstream of the control function / digital input signal distributor ET (see Figure 1 ). Digital pre-distortion DPD is designed to counteract / negate memory effects present in the amplifier core. Memory effects are not static but dynamic. These depend on temperature, modulation method, aging, drain voltage, etc.

[0247] The transmission signal is transmitted through the directional coupler R2 (see Figure 1) is monitored, thus allowing real-time predistortion of the digital data stream. The use of digital predistortion DPD increases the linearity of the Doherty amplifier. The combination of digital predistortion DPD and control function / digital input signal distributor ET allows efficient, broadband and linear operation of the high power HF amplifier HPA and a significant improvement in the SNR. Therefore, operation using analog predistortion techniques and static control functions (only the phase position between the main power amplifier DM and the peak power amplifier DP1 or DP2) is not possible.

[0248] With the digital predistortion DPD, it is also possible to correct for memory-affecting effects, which is achieved by a clever combination of a static control function and memory DPD (memory-affecting digital predistortion), and which is only possible with great expense or not at all using analog predistortion networks. The architecture according to the invention with its digital control function ET thus has more degrees of freedom than the composite amplifier described in DE 601 24 728 T2 with an analog control function.

[0249] In order to convert the control function from the analog domain to the digital domain, the control function ET is implemented in the FPGA. The digital transmission signal from the control function ET is converted into an analog transmission signal by a digital-to-analog converter DAC (see Figure 1 ).

[0250] The typical impedance of the analog transmission train at the output of the digital-to-analog converter DAC is 50 ohms. The impedance at the input of the driver stage ( Fig.32 ) is a low impedance because the main power amplifier HPA is biased as a class B amplifier and the peak power amplifiers DP1 and DP2 are biased as class C amplifiers. An impedance transformation network ITN with impedance converters AN1 and AN2 is arranged between the signal inputs of the main power amplifier DM, the peak power amplifier DP1 and the peak power amplifier DP2 and the amplifier cores of the corresponding driver stages. Specifically, AN2 is a (second) matching network, which is the same (second) matching network for the peak power amplifier DP1 and the peak power amplifier DP2, respectively. The (first) matching network / impedance converter AN1 of the main power amplifier HPA is different from the (second) matching network AN2 of DP1 and DP2 and has another physical line-guiding structure, like the impedance converter AN1, because this structure for optimal efficiency and maximum bandwidth of the HF high power amplifier HPA is developed at the design frequency. This is also generally applicable to two-way Doherty power amplifiers.

[0251] In addition, the main power amplifier DM and the peak power amplifiers DP1 / DP2 are biased differently at the gates (DP1 and DP2 are equal). This results in different input impedances at the main power amplifier DM and the peak power amplifiers DP1 / DP2.

[0252] The impedance transformation network ITN transforms the 50 ohm impedance into the impedance at the input of the driver stage amplifier core, thereby avoiding reflections at the input of the HF high power amplifier HPA at the design frequency.

[0253] As described above, the outputs of power transistors DM, DP1, DP2 (in the context of the present invention, n-way Doherty amplifiers) are connected to a multi-harmonic power combining network / output combiner C / impedance converter AN1 having an output, to which circulator Z1 is connected and to which the output is connected to a load / antenna A via a gas shunt G1 (integrated on a printed circuit board HFL arranged in a printed circuit board housing LG), a switchable low noise amplifier circuit LNA. The software-defined digital amplifier enables configuration of a low-loss three-way Doherty amplifier, online calibration (control function, digital predistortion DPD), digital adaptation of phase position and amplitude (online). In addition, flexible configuration for different antenna variants is possible. The switching operation between transmission and reception can be controlled by a controlled voltage power supply (on / off), and testing of the infrastructure can be performed online. The printed circuit board housing LG or the module GSZ acts as an additional cooling element (so both housing types can be designed without a fan) and the integrated gas lightning arrester G1 is able to exchange services. The power supply lines VCC and GND are insulated from the ground, overvoltage dissipation occurs relative to the ground potential, so the potentials are tied or installed separately, thereby improving the signal-to-noise ratio because the ground does not enable (on) coupling and potential separation installation is enabled. In addition, the high-power transmission / reception device according to the present invention reduces cables and thus plug-in connections, enabling indoor and outdoor variants to be configured using exactly the same assembly and plug assignment. According to the present invention, the directional coupler R2 (see Figure 1 ) can be used twice, i.e. also for test signals. Further advantages derive from the use of a special power line transmission (DLC) with redundancy advantages (i.e. additional optional time synchronization) and from the reduction in cables and the resulting reduction in plug-in connections. Due to the reduced energy consumption of the high-power transmitting and receiving device according to the invention, operating costs can be reduced and fanless operation (passive cooling) both indoors and outdoors becomes possible. The reduction in losses also means a greater range of the transmitter (GaN-HEMT transistors are used for all three amplifier cores DM, DP1 and DP2 of the HF high power amplifier (HPA) with 500 W) and a better SNR on the receiving side.

[0254] Compared to the concepts described in the technical literature, see in particular Neo, WCEdmund [inter alia] A mixedsignal approach towards linear and efficient N-way Doherty amplifiers, the high-bandwidth HF high power amplifier (HPA) is an important distinguishing feature. In the technical literature of Neo et al. mentioned above, a digital input divider has been used to achieve improved characteristics at the design frequency. In particular, the reduction of the high compression of the main power amplifier (DM) is mentioned here. In order to build a Doherty with a high bandwidth, the technical literature of Neo et al. is not used, but the concept of a digital input divider is introduced there and its advantages are demonstrated; everything is at the design frequency. It can be determined that there are almost no publications dealing with control functions, as there are concerning broadband Doherty with a digital input divider.

[0255] The offset line of length λ / 2 and the digital input splitter ET are different approaches to the same problem, namely, achieving high bandwidth Doherty at very high powers.

[0256] The digital input splitter increases the bandwidth by adjusting the input power and phase according to the carrier frequency and the target output power. The additional multi-harmonic transformation line / offset line (LAH) according to the present invention enables the construction of an output combiner C with transformation characteristics, which allows considerable bandwidth gain even when using static splitters. Therefore, these are different approaches with the same goal, and both are aimed at broadband high-power Doherty.

[0257] The protection of the amplifier in the Neo et al. technical document mentioned above is based on avoiding strong compression of the main power amplifier, and the circulator protects the Doherty output from return power in the case of severe antenna mismatch. The Neo et al. technical document does not address incorrect adaptation at the output, but is based on an ideal 50 ohm load. Incorrect adaptation and return power are not the subject of the Neo et al. technical document, and the circulator ensures that the Doherty always sees a well-adapted load, which is beneficial for practical applications.

[0258] In the prior art disclosed in the paragraph from the last paragraph of page 9 to page 12 of this application (i.e. DE102012105260 A1), a broadband Doherty amplifier circuit with a constant impedance combiner in a classical operating mode such as class AB and class C is described. In the case of the transmission and reception device / HF high power amplifier HPA according to the invention, harmonics with respect to the broadband are also included, which is also referred to in this article as multi-harmonic matching.

[0259] Class J therefore represents a further development of class B, which can also be called a "class B continuum" based on the extension of class F to the class F continuum. It is assumed that it is not possible to keep the impedance constant above frequency. All attempts in the prior art have been compromised to keep the impedance constant as a function of f. In the case of the continuous mode solution according to the invention, it is instead determined how the reactive components of the impedance at the harmonics and in the fundamental behave relative to each other.

[0260] In the class J = class B continuum, it is required that the reactive part at the fundamental and the second harmonic should have opposite behavior (inductive <-> capacitive) and that the value of the reactive part at the second harmonic should vary up to twice as strong as in the fundamental case. The advantage of this is that an increase in bandwidth is achieved, but the higher voltage at the drain is disadvantageous here. However, in GaN this is assumed, however, that is to say that the peak voltage in class J is 3 times the supply, while in class B it is 2 times the supply.

[0261] However, by constant impedance, DE102012105260 A1 also means that the impedance at the three nodes of the circuit 132 / 134 / 136 is the same. In particular, a high bandwidth is achieved for a specific back-off power point, i.e., only for the point of output power / design frequency. In contrast, in the solution according to the invention, a high bandwidth and a high efficiency are achieved over the entire output power range.

[0262] Finally, according to DE102012105260 A1, the combiner has no low-pass behavior. In the transmission and reception device / RF high power amplifier HPA according to the invention, power exchange at harmonics between the amplifier cores DM, DP1, DP2, ... (applicable in the context of the invention to N-way Doherty amplifiers) is prevented. Therefore, preventing harmonic termination relies on the visibility of each core, because the other amplifier cores are controlled. However, correct harmonic termination is essential to maximize the efficiency of each core. According to the invention, this is done in continuous mode in order to obtain high efficiency over the maximum possible bandwidth.

[0263] Furthermore, the invention is not limited so far to the combination of features defined in claim 1, but can also be defined together by any other combination of certain features of all individual features disclosed. This means that essentially every individual feature of claim 1 can be omitted or replaced by at least one individual feature disclosed elsewhere in the application.

[0264] List of reference numerals:

[0265] A Antenna

[0266] ABN Absorption Network (Drain Parasitic)

[0267] AGT Output Transformer

[0268] AMLR "Adaptive Multi-channel L-Band Radio"

[0269] AN Adaptation Network

[0270] AN1 First matching network / impedance converter

[0271] AN2 Second matching network / impedance converter

[0272] BB attachment hole

[0273] BK Base contact

[0274] C Output Combiner

[0275] C0 Drain capacitance

[0276] C1 capacitor

[0277] DAC Digital to Analog Converter

[0278] DCV DC Power Supply

[0279] DD Digital Domain

[0280] DK Discrete Capacitors

[0281] DM Main Power Amplifier (Doherty)

[0282] DPA Three-way Doherty Power Amplifier

[0283] DPD control function (digital pre-distortion)

[0284] DP1 First Peak Power Amplifier (Doherty)

[0285] DP2 Second Peak Power Amplifier (Doherty)

[0286] DPS Drain Parasitic

[0287] DSM drain current measurement

[0288] EA Receiving Antenna

[0289] ET Digital Input Signal Distributor

[0290] ES Ground Rail

[0291] FPGA Field Programmable Gate Array

[0292] G1 Gas Arrester

[0293] GF Housing FET

[0294] GH Gas Exhaust Sleeve

[0295] GSM gate current measurement

[0296] GSZ module

[0297] HFL single-sided or double-sided HF printed circuit board

[0298] HFP1 HF signal input first peak power amplifier

[0299] HFP2 HF signal input second peak power amplifier

[0300] HFM HF signal input to main power amplifier

[0301] HFO HF-High Power Amplifier Output

[0302] HPA HF High Power Amplifier

[0303] HSK copper heat sink

[0304] I M (I M ) (Ideal) Current Source (to Main Power Amplifier DM) I p1 (Ideal) current source (to the first peak power amplifier DP1) I p2 (Ideal) current source (to the second peak power amplifier DP2) IT Intrinsic Transistor (Model)

[0305] ITG (IT) transistor housing

[0306] ITN Impedance Transformation Network for Input Matching

[0307] KF contact surface

[0308] L Inductor

[0309] LAH Multi-harmonic conversion line / offset line / offset line

[0310] LMC Load Matching Combiner

[0311] LNA switchable low noise amplifier circuit

[0312] LG PCB Housing

[0313] LP1 Pad 1

[0314] LP2 Pad 2

[0315] LPA Solder Paste / Adhesive Film / Adhesive

[0316] LUS Air Gap

[0317] OTA Wireless / Radio Coupling (Over the Air)

[0318] PAE Power Added Efficiency

[0319] PAPR is the ratio of the peak power to the average power of the signal.

[0320] PBE Passive Devices

[0321] R1 First directional coupler

[0322] R2 Second directional coupler

[0323] RA Reference plane A

[0324] RB Reference plane B

[0325] RC Reference Plane C

[0326] RD Ring Seals

[0327] RK Ring Contact

[0328] RL Termination Impedance

[0329] Rx Receiver

[0330] RX Single or multiple receivers

[0331] RXK RX cable

[0332] S1 Screw 1

[0333] SD Screw Seals

[0334] SA Transmit Antenna

[0335] TBS transistor fastening screw

[0336] TKK1 T-type crossover combiner 1

[0337] TKK2 T-type crossover combiner 2

[0338] TM Converter (Main Power Amplifier DM)

[0339] TP1 converter (first peak power amplifier DP1)

[0340] TR Transistor

[0341] TRD Transistor Die

[0342] TRK Transistor Heat Sink

[0343] Tx Transmitter

[0344] TY Single or multiple transmitters

[0345] TXK TX cable

[0346] U1 Fine Protection

[0347] UPS Uninterruptible Power Supply

[0348] VDCG DC power gate

[0349] VDCD DC power supply drain

[0350] WBC Wideband Fallback Combiner

[0351] W1 Resistor 1

[0352] W2 Resistor 2

[0353] W3 Resistor 3

[0354] Z1 Circulator

Claims

1. A transmission and reception device comprising a module (GSZ) with a configurable high-frequency high-power amplifier (HPA), the configurable high-frequency high-power amplifier (HPA) comprising a main power amplifier (DM) with an amplifier core and at least one peak power amplifier (DP1) with an amplifier core, wherein a digital input signal distributor (ET) with a plurality of outputs and an output combiner are provided, the digital input signal distributor (ET) being connected to a switching element connected to an input of the main power amplifier (DM) and to an input of the at least one peak power amplifier (DP1), the output combiner being connected to an output of the amplifier core of the main power amplifier (DM) and to an output of the at least one peak power amplifier (DP1), wherein in each case a digital input signal distributor (ET) having a plurality of outputs and an output combiner are provided at the output of the amplifier core of the main power amplifier (DM) and at the output of the at least one peak power amplifier (DP1). DP1) and a circulator (Z1) connected to the output element, the circulator (Z1) being arranged at the output of the impedance converter (AN1) or at the output of the output combiner (C), wherein by means of the circulator (Z1), the upstream main power amplifier (DM) and the at least one peak power amplifier (DP1) are protected from overvoltage and overcurrent on the output side, wherein the circulator (Z1) derives energy to the collecting resistor (W1) connected to the circulator (Z1) in the following manner: the circulator (Z1) represents a 50 ohm terminating impedance for the output combiner (C), the module (GSZ) has a high relative bandwidth and a high efficiency at a pulsed transmission power of approximately 2000 watts, enabling fanless operation of the module (GSZ), and the module (GSZ) is protected from lightning strikes.

2. The transmission and receiving device according to claim 1, characterized in that For compression control purposes, the gate current measured by means of the electrical circuit can be used as a measure of the compression level of the main power amplifier (DM) and of the at least one peak power amplifier (DP1).

3. The transmission and reception device according to any one of claims 1 and 2, characterized in that To compensate the drain parasitics, an absorption network (ABN) connected to the amplifier core and a voltage supply to the amplifier core are provided by means of a λ / 4 microstrip line.

4. The transmission and reception device according to any one of claims 1 and 2, characterized in that A transformer (TM) is arranged on the main power amplifier (DM), which transformer is used both for impedance transformation with a transfer factor of 1:a and as an impedance inverter.

5. The transmission and receiving device according to any one of claims 1 and 2, characterized in that In order to perform over-the-air testing, the high-frequency high power amplifier (HPA) has a second directional coupler (R2) which is arranged at the output of the output combiner (C) or the impedance converter (AN1) and is capable of inductively coupling a test signal into the transmission channel.

6. The transmission and reception device according to any one of claims 1 and 2, characterized in that To measure the returned high frequency power, the circulator (Z1) is connected to the first directional coupler (R1).

7. The transmission and reception device according to any one of claims 1 and 2, characterized in that The output of a high-frequency high-power amplifier (HPA) is protected from lightning strikes by a gas lightning arrester (G1) connected to a circulator (Z1), wherein the gas lightning arrester (G1) is arranged on a printed circuit board of the high-frequency high-power amplifier (HPA) and integrated in a printed circuit board housing (LG) of a module (GSZ) directly soldered using surface mount device technology.

8. The transmission and receiving device according to claim 7, characterized in that The printed circuit board is provided with a heat sink (HSK) which is thermally connected to the main power amplifier (DM) and the at least one peak power amplifier (DP1), the main power amplifier (DM) and the at least one peak power amplifier (DP1) being mechanically and electrically connected to source connections on the heat sink (HSK), which act as additional cooling elements, so that, when used in combination with its high-frequency high-power amplifier (HPA) with reduced energy consumption, the module (GSZ) can be operated without a fan even at a maximum transmission power of approximately 2000 W and an average power efficiency (PAE) of 56% can be achieved.

9. The transmission and receiving device according to claim 7, characterized in that The gas arrester (G1) has a gas discharge bushing (GH) which can be removed or inserted via a screw (S1) with ground potential.

10. The transmission and receiving device according to claim 5, characterized in that During startup, the module (GSZ) can be calibrated with the aid of a second directional coupler (R2), wherein control functions for the main power amplifier (DM) and the at least one peak power amplifier (DP1) can be generated with the aid of a digital input signal distributor (ET), and a fine calibration running in parallel in the background can be performed during ongoing transmission operation.

11. The transmission and reception device according to any one of claims 1 and 2, characterized in that Connected upstream of the digital input signal distributor (ET) is a multiplexer, the inputs of which can each be supplied with a different modulated signal.

12. The transmission and reception device according to any one of claims 1 and 2, characterized in that A digital predistortion (DPD) is connected upstream of the digital input signal distributor (ET), and wherein the input of the digital predistortion (DPD) is connected to the output of a digital signal processor block (DSP), to which a modulated transmission signal can be provided.

13. The transmission and reception device according to any one of claims 1 and 2, characterized in that An impedance transformation network (ITN) having impedance transformers (AN1, AN2) is arranged between the signal inputs from the main power amplifier (DM) and the at least one peak power amplifier (DP1) and the amplifier core of the corresponding driver stage.

14. The transmission and reception device according to claim 13, characterized in that The impedance converter (AN1) of the main power amplifier (DM) is different from the impedance converter (AN2) of each peak power amplifier (DP1, DP2) and has another physical line guide structure.

15. The transmission and reception device according to claim 13, characterized in that The main power amplifier (DM) and the peak power amplifiers (DP1, DP2) and drivers can operate with the same drain supply voltage.

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