External analog quantity detection circuit, method and device

Abstract

The present application relates to an external analog quantity detection circuit, method and device, which includes: a first circuit, a second circuit and a third circuit. Among them, the first circuit accesses the external analog quantity through an analog quantity interface and detects the first voltage of the external analog quantity; the second circuit accesses the modulation signal through the modulation interface and generates a second voltage as a comparison voltage of the external analog quantity voltage according to the modulation signal; the third circuit connects the first circuit and the second circuit respectively to access the first voltage and the second voltage, compares the first voltage and the second voltage, and generates and outputs a comparison result signal. In the present application, the modulation signal can be adjusted so that the first voltage is equal to the second voltage, and the value of the first voltage, that is, the analog voltage value of the external analog quantity, can be determined according to the corresponding relationship between the adjusted adjustment signal and the voltage value. The detection circuit in the present application can complete the detection of the external analog quantity without the need for an analog chip, and has a simple structure and high practicality.

Description

Technical Field

[0001] The present application relates to the technical field of electrical isolation analog quantity detection, and in particular to an external analog quantity detection circuit, method and device. Background Art

[0002] When the controller performs analog voltage detection on analog quantities, it cannot be detected directly due to safety protection issues, and electrical safety isolation must be performed through an isolation detection circuit. The existing isolation detection circuit collects analog quantities through analog chips, and then reports the collected analog quantities through electrical isolation devices. However, the isolation detection circuit equipped with an analog chip has a relatively complex structure and low practicality. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide an external analog detection circuit, method and device to solve the problem in the prior art that the isolation detection circuit needs to be equipped with an analog chip for analog detection, resulting in a complex structure of the isolation detection circuit and low practicality.

[0004] According to a first aspect of an embodiment of the present invention, there is provided an external analog quantity detection circuit, comprising:

[0005] a first circuit, a second circuit, and a third circuit;

[0006] The first circuit is connected to an external analog quantity through an analog quantity interface and detects a first voltage of the external analog quantity;

[0007] The second circuit receives a modulation signal through a modulation interface and generates a second voltage according to the modulation signal;

[0008] The third circuit is connected to the first circuit and the second circuit respectively, and is used to compare the first voltage and the second voltage, and generate and output a comparison result signal.

[0009] Preferably, the first circuit includes: a first voltage output port;

[0010] The second circuit includes: a second voltage output port;

[0011] The third circuit includes: a voltage comparator;

[0012] The first voltage output port is connected to the analog interface;

[0013] The second voltage output port is connected to the modulation interface;

[0014] The voltage comparator is connected to the first voltage output port and the second voltage output port respectively.

[0015] Preferably, the first circuit further comprises: a first resistor and a second resistor;

[0016] The analog interface is connected to the first power supply, connected to the analog ground terminal through the first resistor, and connected to the first voltage output port through the second resistor.

[0017] Preferably, the second circuit further comprises: a third resistor, a fourth resistor, a first capacitor and a first signal isolator;

[0018] The modulation interface is connected to the first signal input port of the first signal isolator;

[0019] The second signal input port of the first signal isolator is connected to a second power supply;

[0020] The first signal output port of the first signal isolator is connected to a first power supply;

[0021] The second signal output port of the first signal isolator is connected to the second voltage output port through the third resistor;

[0022] The third resistor is connected to the analog ground terminal through the fourth resistor;

[0023] The first capacitor and the fourth resistor are connected in parallel and connected to the second voltage output port.

[0024] Preferably, the third circuit further comprises: a fifth resistor, a sixth resistor and a second signal isolator;

[0025] The positive input terminal of the voltage comparator is connected to the first power supply and the second voltage output port respectively;

[0026] The negative input terminal of the voltage comparator is connected to the analog ground terminal and the first voltage output port respectively;

[0027] The output end of the voltage comparator is connected to the first signal input port of the second signal isolator;

[0028] The second signal input port of the second signal isolator is connected to the first power supply;

[0029] The first signal output port of the second signal isolator is connected to the second power supply and also outputs a comparison result signal;

[0030] The second signal output port of the second signal isolator is grounded;

[0031] The fifth resistor is connected in parallel to the positive input terminal and the output terminal of the voltage comparator;

[0032] The sixth resistor is connected in parallel to the negative input terminal and the output terminal of the voltage comparator.

[0033] Preferably, the first circuit further comprises: a second capacitor and a third capacitor;

[0034] The second capacitor and the third capacitor are both connected in parallel with the first resistor;

[0035] The third capacitor is connected in series with the second resistor.

[0036] Preferably, the second circuit further includes: a seventh resistor, an eighth resistor, a ninth resistor and a first switch;

[0037] The seventh resistor is connected in parallel to the first port and the second port of the first switch;

[0038] The first port of the first switch is connected to the modulation interface through the eighth resistor;

[0039] The second port of the first switch is grounded;

[0040] The third port of the first switch is connected to the first signal input port of the first signal isolator through the ninth resistor.

[0041] Preferably, the third circuit further includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second switch, a fourth capacitor and a fifth capacitor;

[0042] The first port of the second switch is connected to the output end of the voltage comparator;

[0043] The second port of the second switch is connected to the analog ground terminal;

[0044] The third port of the second switch is connected to a tenth resistor;

[0045] The tenth resistor is connected to the first power supply through the thirteenth resistor, and is also connected to the first signal input port of the second signal isolator;

[0046] The first signal output port of the second signal isolator is connected to the second power supply through the eleventh resistor, and also outputs a comparison result signal through the twelfth resistor;

[0047] The fourth capacitor is connected in parallel to the signal output port of the second signal isolator;

[0048] The fifth capacitor is connected in parallel to the signal input port of the second signal isolator.

[0049] According to a second aspect of an embodiment of the present invention, there is provided a method for detecting an external analog quantity, comprising:

[0050] Sending a modulation signal to an external analog detection circuit so that the external analog detection circuit generates a comparison voltage according to the modulation signal;

[0051] receiving a comparison result signal fed back by an external analog detection circuit, wherein the comparison result signal is generated by the external analog detection circuit comparing a detected external analog voltage with the comparison voltage;

[0052] Adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage;

[0053] The external analog voltage is determined according to the adjusted modulation signal.

[0054] Preferably, the adjusting the modulation signal includes:

[0055] The PWM (Pulse Width Modulation) duty cycle of the modulation signal is adjusted.

[0056] Preferably, the adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage includes:

[0057] When the comparison result is that the comparison voltage is greater than the external analog voltage, reducing the PWM duty cycle of the modulation signal until the comparison voltage is equal to the external analog voltage;

[0058] When the comparison result is that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is equal to the external analog voltage.

[0059] Preferably, the adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage includes:

[0060] When the comparison result is that the comparison voltage is greater than the external analog voltage, reducing the PWM duty cycle of the modulation signal until the comparison voltage is less than the external analog voltage, at which point the comparison result is deemed to satisfy that the external analog voltage is equal to the comparison voltage;

[0061] When the comparison result is that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is greater than the external analog voltage. At this time, the comparison result is considered to satisfy that the external analog voltage is equal to the comparison voltage.

[0062] Preferably, determining the external analog voltage according to the adjusted modulation signal includes:

[0063] According to the predetermined correspondence between the PWM duty cycle of the modulation signal and the comparison voltage, a voltage value corresponding to the adjusted PWM duty cycle of the modulation signal is determined as the external analog voltage.

[0064] According to a third aspect of an embodiment of the present invention, there is provided an external analog quantity detection device, comprising: a processor, and an external analog quantity detection circuit as described in any one of the above items;

[0065] The processor sends a modulation signal to the external analog detection circuit;

[0066] The external analog detection circuit generates a comparison voltage according to the modulation signal, compares the detected external analog voltage with the comparison voltage to generate a comparison result signal, and sends the comparison result signal to the processor;

[0067] The processor receives the comparison result signal, adjusts the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage, and determines the external analog voltage according to the adjusted modulation signal.

[0068] The technical solution provided by the present application may include the following beneficial effects: the external analog quantity detection circuit in the present application includes: a first circuit, a second circuit and a third circuit. Among them, the first circuit is an analog quantity voltage detection circuit, which is connected to the external analog quantity through the analog quantity interface and detects the first voltage of the external analog quantity; the second circuit is a comparison voltage generation circuit, which is connected to the modulation signal through the modulation interface and generates a second voltage as a comparison voltage of the external analog quantity voltage according to the modulation signal; the third circuit is a comparison circuit, which is connected to the first circuit and the second circuit respectively to connect the first voltage and the second voltage, compare the first voltage and the second voltage, and generate and output a comparison result signal. In the present application, the modulation signal can be adjusted so that the first voltage is equal to the second voltage, and the value of the first voltage, that is, the analog voltage value of the external analog quantity, can be determined according to the corresponding relationship between the adjusted adjustment signal and the voltage value. The detection circuit in the present application can complete the detection of the external analog quantity without the need for an analog chip, and has a simple structure and high practicality.

[0069] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0071] Figure 1 is a structural diagram of an external analog quantity detection circuit according to an exemplary embodiment;

[0072] Figure 2 is a schematic diagram showing a corresponding relationship between different duty cycles of a modulation signal and a voltage value of a generated voltage according to an exemplary embodiment;

[0073] Figure 3 is a schematic diagram of a circuit structure of a first circuit according to an exemplary embodiment;

[0074] Figure 4 is a schematic diagram of a circuit structure of a second circuit according to an exemplary embodiment;

[0075] Figure 5 is a schematic diagram of a circuit structure of a third circuit according to an exemplary embodiment;

[0076] Figure 6 is a flow chart of a method for detecting an external analog quantity according to an exemplary embodiment;

[0077] Figure 7 The figure is a schematic structural diagram of an external analog quantity detection device according to an exemplary embodiment.

[0078] Figure 1: First circuit 11; Second circuit 12; Third circuit 13; First voltage output port V1; Second voltage output port V2; External analog quantity R; First resistor R1; Second resistor R2; Third resistor R3; Fourth resistor R4; Fifth resistor R5; Sixth resistor R6; Seventh resistor R7; Eighth resistor R8; Ninth resistor R9; Tenth resistor R10; Eleventh resistor R11; Twelfth resistor R12; Thirteenth resistor R13; First capacitor C1; Second capacitor C2; Third capacitor C3; Fourth capacitor C4; Fifth capacitor C5; First power supply VCC1; Second power supply VCC2; First switch Q1; Second switch Q2; First signal isolator U1; Second signal isolator U2; Analog ground terminal AGND; Processor 31; External analog quantity detection circuit 32. DETAILED DESCRIPTION

[0079] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0080] Example 1

[0081] Figure 1 is a schematic structural diagram of an external analog detection circuit according to an exemplary embodiment. Figure 1 , an external analog detection circuit, comprising:

[0082] A first circuit 11, a second circuit 12, and a third circuit 13;

[0083] The first circuit 11 is connected to an external analog quantity R through an analog quantity interface and detects a first voltage of the external analog quantity R;

[0084] The second circuit 12 receives the modulation signal through the modulation interface and generates a second voltage according to the modulation signal;

[0085] The third circuit 13 is connected to the first circuit 11 and the second circuit 12 respectively, and is used to compare the first voltage and the second voltage, and generate and output a comparison result signal.

[0086] It should be noted that the external analog quantity detection circuit in this embodiment is used in the process of electrically isolated analog quantity detection. The external analog quantity R can be a sensor, a thermistor, etc.

[0087] It can be understood that the first circuit 11 in this embodiment is an analog voltage detection circuit, which is connected to the external analog quantity R through the analog interface and detects the first voltage of the external analog quantity R; the second circuit 12 is a comparison voltage generation circuit, which is connected to the modulation signal through the modulation interface and generates a second voltage as a comparison voltage of the external analog quantity R voltage according to the modulation signal; the third circuit 13 is a comparison circuit, which is connected to the first circuit 11 and the second circuit 12 respectively to connect to the first voltage and the second voltage, compare the first voltage and the second voltage, and generate and output a comparison result signal.

[0088] It should be noted that Figure 2 For the corresponding relationship between different duty cycles of the modulation signal and the voltage value of the generated voltage, see Figure 2 The modulation signal can be a PWM signal. The higher the PWM duty cycle of the modulation signal, the higher the second voltage generated by the second circuit 12 according to the modulation signal. In this embodiment, the first circuit 11 can only detect the first voltage of the external analog quantity R but cannot determine the value of the first voltage. Therefore, in this embodiment, the modulation signal is adjusted so that the first voltage is equal to the second voltage. Then, based on the correspondence between the adjusted signal and the voltage value, the value of the first voltage, i.e., the analog voltage value of the external analog quantity R, can be determined. The detection circuit in this embodiment can complete the detection of the external analog quantity R without the need for an analog chip, and has a simple structure and high practicality.

[0089] Example 2

[0090] The first circuit 11 in this embodiment includes: a first voltage output port V1;

[0091] The second circuit 12 includes: a second voltage output port V2;

[0092] The third circuit 13 includes: a voltage comparator;

[0093] The first voltage output port V1 is connected to the analog interface;

[0094] The second voltage output port V2 is connected to the modulation interface;

[0095] The voltage comparator is connected to the first voltage output port V1 and the second voltage output port V2 respectively.

[0096] It should be noted that the voltage comparator in this embodiment is a device that can perform simple voltage comparison. Commonly used voltage comparators include single-limit comparators, hysteresis comparators, window comparators, and tri-state voltage comparators. When the voltage at the positive input terminal of the voltage comparator is higher than the voltage at the negative input terminal, the voltage comparator outputs a high level. When the voltage at the positive input terminal of the voltage comparator is lower than the voltage at the negative input terminal, the voltage comparator outputs a low level. This level signal is the comparison result signal.

[0097] It should be noted that, see Figure 3 , the first circuit 11 further includes: a first resistor R1 and a second resistor R2;

[0098] The analog interface is connected to the first power supply VCC1, connected to the analog ground terminal AGND through the first resistor R1, and connected to the first voltage output port V1 through the second resistor R2.

[0099] It is understood that when the first circuit 11 is operating, if the external analog signal RR is connected, the voltage divided by the analog interface and the first resistor R1 changes, resulting in a first voltage at the analog interface. The second resistor R2 is a current-limiting resistor in the first circuit 11, used to prevent excessive current from burning out the circuit.

[0100] It should be noted that, see Figure 4 , the second circuit 12 further includes: a third resistor R3, a fourth resistor R4, a first capacitor C1 and a first signal isolator U1;

[0101] The modulation interface is connected to the first signal input port of the first signal isolator U1;

[0102] The second signal input port of the first signal isolator U1 is connected to the second power supply VCC2;

[0103] The first signal output port of the first signal isolator U1 is connected to the first power supply VCC1;

[0104] The second signal output port of the first signal isolator U1 is connected to the second voltage output port V2 via a third resistor R3;

[0105] The third resistor R3 is connected to the analog ground terminal AGND through the fourth resistor R4;

[0106] The first capacitor C1 and the fourth resistor R4 are connected in parallel and connected to the second voltage output port V2.

[0107] It is understood that the first signal isolator U1 can be an optocoupler isolation signal isolator. When the second circuit 12 receives a modulated signal through the modulation interface, the first signal isolator U1 performs isolation conversion and performs a fixed period of charging and discharging at the first capacitor C1. When the modulated signal is at a high level, the first signal isolator U1 charges the first capacitor C1. When the modulated signal is at a low level, the first capacitor C1 is discharged through the fourth resistor R4. The third resistor R3 is a current-limiting resistor in the second circuit 12, used to prevent excessive current from burning out the circuit.

[0108] It should be noted that, see Figure 5 , the third circuit 13 further includes: a fifth resistor R5, a sixth resistor R6 and a second signal isolator U2;

[0109] The positive input terminal of the voltage comparator is connected to the first power supply VCC1 and the second voltage output port V2 respectively;

[0110] The negative input terminal of the voltage comparator is connected to the analog ground terminal AGND and the second voltage output port V2 respectively;

[0111] The output end of the voltage comparator is connected to the first signal input port of the second signal isolator U2;

[0112] The second signal input port of the second signal isolator U2 is connected to the first power supply VCC1;

[0113] The first signal output port of the second signal isolator U2 is connected to the second power supply VCC2 and also outputs a comparison result signal;

[0114] The second signal output port of the second signal isolator U2 is grounded;

[0115] The fifth resistor R5 is connected in parallel between the positive input terminal and the output terminal of the voltage comparator;

[0116] The sixth resistor R6 is connected in parallel to the negative input terminal and the output terminal of the voltage comparator.

[0117] It is understood that the second signal isolator U2 can be an optocoupler isolator. The positive input of the voltage comparator is connected to the second voltage output port V2, which receives the second voltage; the negative input of the voltage comparator is connected to the first voltage output port V1, which receives the first voltage. When the first voltage is greater than the second voltage, the voltage comparator outputs a low level; when the first voltage is less than the second voltage, the voltage comparator outputs a high level. After the voltage comparator compares the first and second voltages and outputs a comparison result signal, the second signal isolator U2 performs isolation conversion and outputs it.

[0118] It can be understood that, in this embodiment, the fifth resistor R5 is used as a pull-up resistor to protect the voltage comparator, and the sixth resistor R6 is used as a pull-down resistor to protect the voltage comparator.

[0119] It should be noted that Figure 3 The FB output port in is the output port of the comparison result signal.

[0120] Example 3

[0121] See also Figure 3 , the first circuit 11 in this embodiment further includes: a second capacitor C2 and a third capacitor C3;

[0122] The second capacitor C2 and the third capacitor C3 are both connected in parallel with the first resistor R1;

[0123] The third capacitor C3 is connected in series with the second resistor R2.

[0124] It can be understood that, in this embodiment, the signal in the first circuit 11 is filtered by the second capacitor C2 and the third capacitor C3.

[0125] It should be noted that, see Figure 4 , the second circuit 12 further includes: a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a first switch Q1;

[0126] The seventh resistor R7 is connected in parallel to the first port and the second port of the first switch Q1;

[0127] The first port of the first switch Q1 is connected to the modulation interface via the eighth resistor R8;

[0128] A second port of the first switch Q1 is grounded;

[0129] The third port of the first switch Q1 is connected to the first signal input port of the first signal isolator U1 through a ninth resistor R9.

[0130] It will be appreciated that in this embodiment, the operation of the second circuit 12 is controlled by providing the first switch Q1. When the first switch Q1 is off, the modulation signal is stopped from being input, and when the first switch Q1 is on, the modulation signal can be input. The seventh resistor R7 is connected in parallel between the first port and the second port of the first switch Q1, serving as a clamping resistor for the first switch Q1. The eighth resistor R8 and the ninth resistor R9 both serve as current-limiting resistors in the second circuit 12 to prevent excessive current from damaging the circuit.

[0131] It should be noted that, see Figure 5 , the third circuit 13 further includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second switch Q2, a fourth capacitor C4 and a fifth capacitor C5;

[0132] A first port of the second switch Q2 is connected to the output terminal of the voltage comparator;

[0133] A second port of the second switch Q2 is connected to the analog ground terminal AGND;

[0134] The third port of the second switch Q2 is connected to the tenth resistor R10;

[0135] The tenth resistor R10 is connected to the first power supply VCC1 through the thirteenth resistor R13, and is also connected to the first signal input port of the second signal isolator U2;

[0136] The first signal output port of the second signal isolator U2 is connected to the second power supply VCC2 through the eleventh resistor R11, and also outputs the comparison result signal through the twelfth resistor R12;

[0137] The fourth capacitor C4 is connected in parallel to the signal output port of the second signal isolator U2;

[0138] The fifth capacitor C5 is connected in parallel to the signal input port of the second signal isolator U2.

[0139] It can be understood that in this embodiment, the operation of the third circuit 13 is controlled by setting the second switch Q2. When the second switch Q2 is turned off, the third circuit 13 cannot output the comparison result signal. When the second switch Q2 is turned on, the third circuit 13 can output the comparison result signal.

[0140] It can be understood that the tenth resistor R10 serves as a current limiting resistor in the third circuit 13, the eleventh resistor R11 serves as a pull-up current limiting resistor at the third circuit 13 connected to the second power supply VCC2, the twelfth resistor R12 serves as a current limiting resistor in the third circuit 13, and the thirteenth resistor R13 serves as a discharge resistor at the second signal isolator U2.

[0141] Example 4

[0142] Figure 6 is a flow chart of an external analog quantity detection method according to an exemplary embodiment. Figure 6 , an external analog quantity detection method, comprising:

[0143] Step S21: sending a modulation signal to an external analog detection circuit, so that the external analog detection circuit generates a comparison voltage according to the modulation signal;

[0144] Step S22: receiving a comparison result signal fed back by the external analog detection circuit, where the comparison result signal is generated by the external analog detection circuit comparing the detected external analog voltage with the comparison voltage;

[0145] Step S23: adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage;

[0146] Step S24: Determine the external analog voltage according to the adjusted modulation signal.

[0147] The method in this embodiment is applied to the process of detecting an electrically isolated analog quantity. The external analog quantity may be a sensor, a thermistor, or the like.

[0148] It will be understood that in this embodiment, a modulation signal is sent to the external analog detection circuit so that the external analog detection circuit generates a comparison voltage based on the modulation signal. A comparison result signal is received as feedback from the external analog detection circuit. The comparison result signal is generated by the external analog detection circuit comparing the detected external analog voltage with the comparison voltage. A comparison result is obtained based on the comparison result signal, and the modulation signal is adjusted based on the comparison result so that the comparison result satisfies the requirement that the external analog voltage equals the comparison voltage. In this embodiment, only the external analog voltage can be detected, but the value of the external analog voltage cannot be determined. Therefore, in this embodiment, the modulation signal is adjusted so that the external analog voltage equals the comparison voltage. The value of the external analog voltage can then be determined based on the correspondence between the adjusted signal and the voltage value. In this embodiment, the detection of the external analog quantity can be completed without an analog chip in the external analog detection circuit. The technical solution in this embodiment is simpler and more practical than the circuit structure adopted in the prior art method of detecting external analog quantities by integrating an analog chip in the detection circuit.

[0149] It should be noted that adjusting the modulation signal includes adjusting the PWM duty cycle of the modulation signal. The modulation signal may be a PWM signal. A higher PWM duty cycle of the modulation signal results in a higher second voltage generated by the second circuit based on the modulation signal, and vice versa. Therefore, in this embodiment, the comparison voltage can be adjusted by adjusting the modulation signal.

[0150] Based on this, the modulation signal is adjusted according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage, including:

[0151] When the comparison result shows that the comparison voltage is greater than the external analog voltage, the PWM duty cycle of the modulation signal is reduced until the comparison voltage is equal to the external analog voltage;

[0152] When the comparison result shows that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is equal to the external analog voltage.

[0153] It should be noted that this solution is applicable to a comparator that can determine whether two voltages are equal.

[0154] In specific practice, the PWM duty cycle that is reduced or increased each time may be 1%.

[0155] Considering the cost issue, if the comparator configured in the external analog detection circuit is a simple comparator, the simple comparator can only distinguish greater than or less than. Correspondingly, the modulation signal is adjusted according to the comparison result so that the comparison result satisfies the external analog voltage equal to the comparison voltage, including:

[0156] When the comparison result shows that the comparison voltage is greater than the external analog voltage, the PWM duty cycle of the modulation signal is reduced until the comparison voltage is less than the external analog voltage. At this time, the comparison result is considered to satisfy that the external analog voltage is equal to the comparison voltage.

[0157] When the comparison result shows that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is greater than the external analog voltage. At this time, the comparison result is considered to satisfy that the external analog voltage is equal to the comparison voltage.

[0158] In this embodiment, considering that a simple comparator can only distinguish between greater than and less than, if the comparison result shows that the comparison voltage is greater than the external analog voltage, the PWM duty cycle of the modulation signal is reduced. For example, if the current PWM duty cycle is 60%, it is reduced to 59%, and the comparison is continued. If, after the PWM duty cycle of the modulation signal is adjusted, the comparison result shows that the comparison voltage is less than the external analog voltage, this indicates that the external analog voltage is between the comparison voltage generated by the modulation signal with a 60% PWM duty cycle and the comparison voltage generated by the modulation signal with a 59% PWM duty cycle. In this embodiment, a certain error range is allowed, and in this case, the comparison result is considered to satisfy that the external analog voltage is equal to the comparison voltage.

[0159] It should be noted that determining the external analog voltage based on the adjusted modulation signal includes:

[0160] According to the predetermined corresponding relationship between the PWM duty cycle of the modulation signal and the comparison voltage, a voltage value corresponding to the adjusted PWM duty cycle of the modulation signal is determined as the external analog voltage.

[0161] It can be understood that the corresponding relationship between PWM duty cycle and comparison voltage can be found in Figure 2 In this embodiment, based on the correspondence between the predetermined PWM duty cycle of the modulation signal and the comparison voltage, the voltage value corresponding to the adjusted PWM duty cycle of the modulation signal is determined as the external analog voltage. The technical solution in this embodiment is simpler and more practical than the circuit structure adopted in the prior art method of detecting external analog quantities by installing an analog chip in the detection circuit.

[0162] Example 5

[0163] Figure 7 is a structural diagram of an external analog quantity detection device according to an exemplary embodiment. Figure 7 , an external analog quantity detection device, comprising: a processor 31, and an external analog quantity detection circuit 32 as in the above embodiment;

[0164] The processor 31 sends a modulation signal to the external analog detection circuit 32;

[0165] The external analog detection circuit 32 generates a comparison voltage according to the modulation signal, compares the detected external analog voltage with the comparison voltage to generate a comparison result signal, and sends the comparison result signal to the processor 31;

[0166] The processor 31 receives the comparison result signal, adjusts the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage, and determines the external analog voltage according to the adjusted modulation signal.

[0167] It is understood that in this embodiment, the processor 31 sends a modulation signal to the external analog detection circuit 32, so that the external analog detection circuit 32 generates a comparison voltage based on the modulation signal. The external analog detection circuit 32 compares the detected external analog voltage with the comparison voltage to generate a comparison result signal, which is then sent to the processor 31. The processor 31 obtains a comparison result based on the comparison result signal and adjusts the modulation signal based on the comparison result so that the comparison result satisfies the requirement that the external analog voltage equals the comparison voltage. In this embodiment, only the external analog voltage can be detected, but the value of the external analog voltage cannot be determined. Therefore, in this embodiment, the modulation signal is adjusted so that the external analog voltage equals the comparison voltage. The value of the external analog voltage can then be determined based on the correspondence between the adjusted signal and the voltage value. In this embodiment, the detection of the external analog quantity can be completed without the need for an analog chip in the external analog detection circuit 32. The technical solution in this embodiment is simpler and more practical than the circuit structure adopted in the prior art technical solution that detects the external analog quantity by integrating an analog chip in the detection circuit.

[0168] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0169] It should be noted that, in the description of this application, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0170] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present application belong.

[0171] It should be understood that various parts of the present application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used to implement: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0172] Those skilled in the art will understand that all or part of the steps in the method of the above embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

[0173] In addition, the functional units in the various embodiments of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into a module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0174] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0175] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0176] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. An external analog detection circuit, characterized in that: include: a first circuit, a second circuit, and a third circuit; The first circuit is connected to an external analog quantity through an analog quantity interface and detects a first voltage of the external analog quantity; The second circuit receives a modulation signal through a modulation interface and generates a second voltage according to the modulation signal; The third circuit is connected to the first circuit and the second circuit respectively, and is used to compare the first voltage and the second voltage, and generate and output a comparison result signal; The external analog detection circuit is used to: adjust the duty cycle of the modulation signal according to the comparison result signal so that the first voltage is equal to the second voltage, and determine the external analog voltage according to the adjusted modulation signal.

2. The external analog detection circuit according to claim 1, characterized in that: The first circuit includes: a first voltage output port; The second circuit includes: a second voltage output port; The third circuit includes: a voltage comparator; The first voltage output port is connected to the analog interface; The second voltage output port is connected to the modulation interface; The voltage comparator is connected to the first voltage output port and the second voltage output port respectively.

3. The external analog detection circuit according to claim 2, characterized in that: The first circuit further includes: a first resistor and a second resistor; The analog interface is connected to the first power supply, connected to the analog ground terminal through the first resistor, and connected to the first voltage output port through the second resistor.

4. The external analog detection circuit according to claim 3, characterized in that: The second circuit further includes: a third resistor, a fourth resistor, a first capacitor and a first signal isolator; The modulation interface is connected to the first signal input port of the first signal isolator; The second signal input port of the first signal isolator is connected to a second power supply; The first signal output port of the first signal isolator is connected to a first power supply; The second signal output port of the first signal isolator is connected to the second voltage output port through the third resistor; The third resistor is connected to the analog ground terminal through the fourth resistor; The first capacitor and the fourth resistor are connected in parallel and connected to the second voltage output port.

5. The external analog detection circuit according to claim 4, characterized in that: The third circuit further includes: a fifth resistor, a sixth resistor and a second signal isolator; The positive input terminal of the voltage comparator is connected to the first power supply and the second voltage output port respectively; The negative input terminal of the voltage comparator is connected to the analog ground terminal and the first voltage output port respectively; The output end of the voltage comparator is connected to the first signal input port of the second signal isolator; The second signal input port of the second signal isolator is connected to the first power supply; The first signal output port of the second signal isolator is connected to the second power supply and also outputs a comparison result signal; The second signal output port of the second signal isolator is grounded; The fifth resistor is connected in parallel to the positive input terminal and the output terminal of the voltage comparator; The sixth resistor is connected in parallel to the negative input terminal and the output terminal of the voltage comparator.

6. The external analog detection circuit according to claim 3, characterized in that: The first circuit further includes: a second capacitor and a third capacitor; The second capacitor and the third capacitor are both connected in parallel with the first resistor; The third capacitor is connected in series with the second resistor.

7. The external analog detection circuit according to claim 4, characterized in that: The second circuit further includes: a seventh resistor, an eighth resistor, a ninth resistor and a first switch; The seventh resistor is connected in parallel to the first port and the second port of the first switch; The first port of the first switch is connected to the modulation interface through the eighth resistor; The second port of the first switch is grounded; The third port of the first switch is connected to the first signal input port of the first signal isolator through the ninth resistor.

8. The external analog detection circuit according to claim 5, characterized in that: The third circuit further includes: a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a second switch, a fourth capacitor and a fifth capacitor; The first port of the second switch is connected to the output end of the voltage comparator; The second port of the second switch is connected to the analog ground terminal; The third port of the second switch is connected to a tenth resistor; The tenth resistor is connected to the first power supply through the thirteenth resistor, and is also connected to the first signal input port of the second signal isolator; The first signal output port of the second signal isolator is connected to the second power supply through the eleventh resistor, and also outputs a comparison result signal through the twelfth resistor; The fourth capacitor is connected in parallel to the signal output port of the second signal isolator; The fifth capacitor is connected in parallel to the signal input port of the second signal isolator.

9. An external analog quantity detection method, applied to the external analog quantity detection circuit according to any one of claims 1 to 8, characterized in that: include: Sending a modulation signal to an external analog detection circuit so that the external analog detection circuit generates a comparison voltage according to the modulation signal; receiving a comparison result signal fed back by an external analog detection circuit, wherein the comparison result signal is generated by the external analog detection circuit comparing a detected external analog voltage with the comparison voltage; Adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage; The external analog voltage is determined according to the adjusted modulation signal.

10. The external analog quantity detection method according to claim 9, characterized in that: The adjusting the modulated signal includes: The PWM duty cycle of the modulation signal is adjusted.

11. The external analog quantity detection method according to claim 10, characterized in that: The adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage includes: When the comparison result is that the comparison voltage is greater than the external analog voltage, reducing the PWM duty cycle of the modulation signal until the comparison voltage is equal to the external analog voltage; When the comparison result is that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is equal to the external analog voltage.

12. The external analog quantity detection method according to claim 10, characterized in that: The adjusting the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage includes: When the comparison result is that the comparison voltage is greater than the external analog voltage, reducing the PWM duty cycle of the modulation signal until the comparison voltage is less than the external analog voltage, at which point the comparison result is deemed to satisfy that the external analog voltage is equal to the comparison voltage; When the comparison result is that the comparison voltage is less than the external analog voltage, the PWM duty cycle of the modulation signal is increased until the comparison voltage is greater than the external analog voltage. At this time, the comparison result is considered to satisfy that the external analog voltage is equal to the comparison voltage.

13. The external analog quantity detection method according to any one of claims 10 to 12, characterized in that: The determining the external analog voltage according to the adjusted modulation signal includes: According to the predetermined correspondence between the PWM duty cycle of the modulation signal and the comparison voltage, a voltage value corresponding to the adjusted PWM duty cycle of the modulation signal is determined as the external analog voltage.

14. An external analog detection device, characterized in that: include: A processor, and an external analog detection circuit according to any one of claims 1 to 8; The processor sends a modulation signal to the external analog detection circuit; The external analog detection circuit generates a comparison voltage according to the modulation signal, compares the detected external analog voltage with the comparison voltage to generate a comparison result signal, and sends the comparison result signal to the processor; The processor receives the comparison result signal, adjusts the modulation signal according to the comparison result so that the comparison result satisfies that the external analog voltage is equal to the comparison voltage, and determines the external analog voltage according to the adjusted modulation signal.

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