A method for logging memory failures on a server

Abstract

This invention belongs to the field of computer firmware technology, specifically relating to a method for recording server memory faults. The method of this invention, after a server memory is missing or a memory fault occurs, obtains the server memory fault status by checking logs, thereby quickly locating the problem of the server's inability to boot normally, while minimizing the consumption of BMC system resources.

Description

Technical Field

[0001] This invention belongs to the field of computer firmware technology, and specifically relates to a method for recording memory faults in a server. Background Technology

[0002] BMC (Baseboard Management Controller) and IPMI (Intelligent Platform Management Interface) are the basic core functional subsystems of a server, responsible for core functions such as hardware status management, operating system management, health status management, and power consumption management.

[0003] BMC is a small, independent operating system separate from the server system. It's a chip integrated on the motherboard, although some products connect it via PCIe or other means. Externally, it appears as a standard RJ45 network port with its own dedicated firmware system. Server clusters typically use BMC commands or perform large-scale unattended operations, including remote server management, monitoring, installation, and restarting.

[0004] When existing servers experience memory failures, the following issues arise:

[0005] 1) The existing server's BIOS cannot function properly when DIMM0 is missing or DIMM0 is faulty. After the memory problem is resolved, the BIOS cannot record the previous DIMM0 missing or faulty logs, meaning it cannot be consistent with the server alarm logs recorded by the BMC, which is not conducive to users viewing the server's operating status.

[0006] 2) There is a risk of duplicate records when the BIOS obtains data from the BMC and logs the data.

[0007] 3) After a server memory failure, the BMC has a cumbersome method for obtaining the memory failure status. Summary of the Invention

[0008] In view of this, the present invention provides a method for recording memory faults in a server, which can solve the problem of recording memory faults.

[0009] The technical solution of this invention is:

[0010] A method for logging memory faults on a server, the steps of which include:

[0011] 1. BMC

[0012] Step 1: Power on the server. You can remotely power on the server by sending an IPMI power-on command to the BMC or by clicking the power-on button on the BMC web page.

[0013] Step 2: The timer starts counting. After determining that the server is powered on, the timer module in the BMC system starts counting and records the power-on time.

[0014] Step 3: Determine if the boot time is greater than 4 minutes and less than 8 minutes. Because different server hardware environments result in varying times for the BMC to acquire CPU IIC control, this time period is defined to apply to different servers. If the boot time is greater than 8 minutes, stop timing the boot time. If the boot time is less than 4 minutes, continue timing.

[0015] Step 4: When the power-on time meets the condition of being greater than or equal to 4 minutes and less than or equal to 8 minutes, the BMC obtains the self-test code (POST code). The BMC obtains the POST code from the CPU register (register address 0x28800024) via the IIC bus. The default value of this register is 0x20171018. A schematic diagram of the IIC topology between the BMC and the CPU is shown below. Figure 2 .

[0016] Step 5: Check if the POST code indicates a memory fault. If so, report a memory fault alarm. The definitions of POST code error codes are shown in Table 1. The BMC parses the obtained POST code. If the obtained POST code value is 0, the BMC logs "DIMM0 not present" in the system log. If the obtained POST code value is 1, the BMC logs "DIMM0 fault" in the system log.

[0017]

[0018] Table 1. Examples of POST code error code definitions

[0019] Step 6: Store the POST code and the current time.

[0020] Step 7: End the process.

[0021] 2. BIOS

[0022] Step 1: Power on the server. When the BIOS detects that DIMM0 is not in place or DIMM0 is faulty, the process ends.

[0023] Step 2: The BIOS sends an IPMI OEM command to obtain the POST code and timestamp stored in the BMC from the last boot.

[0024] Step 3: BIOS records memory alarm logs. The BIOS parses the acquired POST code. When the acquired POST code value is 0, the BIOS records a DIMM0 absence error. When the acquired POST code value is 1, the BIOS records a DIMM0 fault. The time acquired by the BIOS is used to avoid duplicate recording of memory fault logs. If the time acquired by the BIOS is the same as the time of the previously acquired POST code, no memory fault log is recorded. If the time acquired by the BIOS is different from the time of the previously acquired POST code, a memory fault log is recorded, consistent with the BMC system log.

[0025] Step 4: End the process.

[0026] The memory faults recorded by the method include those at the hardware, firmware, and operating system levels.

[0027] The hardware layer includes processor platforms, memory, and key computer components such as CPLDs.

[0028] The firmware layer is the BIOS firmware, which includes a BIOS logging module, a communication module with the BMC, a communication module with the CPLD, and a memory detection module.

[0029] The operating system layer includes a timer module, a communication module with the BIOS, a communication module with the CPLD, a self-test code parsing module, and a self-test code reading module.

[0030] The BIOS firmware communicates with the BMC via the BMC communication module; via the CPLD communication module, the BIOS sends a memory initialization completion signal to the CPLD. Upon receiving the signal, the CPLD transfers the CPU's IIC access rights to the BMC, enabling the BMC to access the CPU registers via the IIC bus; and via the memory detection module, memory fault detection is implemented. When DIMM0 is detected to be absent or DIMM0 is faulty, the BIOS cannot run.

[0031] The BMC system uses a timer module to time the server boot time. When the server boot time is between 4 and 8 minutes, the BMC obtains the POST code through the self-check code reading module and parses and stores the POST code through the POST code parsing module. The timer stops after the server boot time exceeds 8 minutes, meaning that the POST code acquisition program no longer runs after the boot time exceeds 8 minutes.

[0032] Beneficial effects

[0033] (1) A method for recording memory faults in a server according to the present invention is to remotely control the server to start up by sending an IPMI power-on command to the BMC or by clicking the power-on button on the BMC Web page when the server is powered on, start the timer and record the power-on time, determine the length of the power-on time, and detect whether the POST code indicates a memory fault.

[0034] (2) A method for recording memory faults on a server according to the present invention obtains and parses the POST code and timestamp to obtain fault logs when the POST code is 0 or 1, and records memory fault logs when the times are different, so as to make the logs consistent with those of the BMC system;

[0035] (3) A method for recording memory faults in a server according to the present invention, by dividing the recorded memory faults into layers, can more clearly obtain the fault status of the memory, thereby quickly locating the problem that the server cannot start normally and reducing the occupation of BMC system resources.

[0036] (4) The present invention provides a method for recording memory faults in a server, which details the specific hardware aspects, quickly locates the problem of the server not being able to start normally based on the fault results, and reduces the occupation of BMC system resources.

[0037] (5) The present invention provides a method for recording server memory faults, which details the specific contents at the firmware level, quickly locates the problem of the server not being able to start normally based on the fault results, and reduces the occupation of BMC system resources;

[0038] (6) The present invention provides a method for recording server memory faults, which details the specific content at the operational mindset level, quickly locates the problem of the server not being able to start normally based on the fault results, and reduces the occupation of BMC system resources;

[0039] (7) The present invention provides a method for recording server memory faults, which describes and limits the specific communication process and time of the BIOS firmware through the BMC communication module, so that after the server memory is not in place or a memory fault occurs, the server memory fault status can be obtained by checking the log, thereby quickly locating the problem that the server cannot start normally, and occupying less BMC system resources. Attached Figure Description

[0040] Figure 1 This is a general framework diagram of the present invention;

[0041] Figure 2 Schematic diagram of the IIC topology between BMC and CPU;

[0042] Figure 3This is a schematic diagram of the BMC process of the present invention;

[0043] Figure 4 This is a schematic diagram of the BIOS process of the present invention. Detailed Implementation

[0044] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0045] A method for logging server memory failures includes three levels, such as... Figure 1 As shown, at the hardware level, this invention includes the processor platform, memory, CPLD, and other key computer components. At the firmware level, this invention relates to multiple modules of the BIOS firmware, mainly including a BIOS logging module, a communication module with the BMC, a communication module with the CPLD, and a memory detection module. At the operating system level, this invention relates to multiple modules running within the BMC system, including a timer module, a communication module with the BIOS, a communication module with the CPLD, a POST code parsing module, and a POST code reading module.

[0046] In this invention, the BIOS firmware achieves information interaction with the BMC through the BMC communication module; through the CPLD communication module, the BIOS sends a memory initialization completion signal to the CPLD. After receiving the signal, the CPLD transfers the CPU's IIC access rights to the BMC, enabling the BMC to access the CPU registers through the IIC bus; through the memory detection module, memory fault detection is achieved. When DIMM0 is detected to be absent or DIMM0 is faulty, the BIOS cannot run.

[0047] The BMC system uses a timer module to track server startup time. When the server startup time is between 4 and 8 minutes, the BMC retrieves the POST code via a self-test code reading module and then parses and stores the POST code using a POST code parsing module. Once the server startup time exceeds 8 minutes, the timer stops. In other words, this invention prevents the POST code retrieval program from running after 8 minutes of startup, thus reducing the resource consumption of the BMC system.

[0048] This invention provides a method for recording memory faults in a server, such as... Figure 1 As shown, the implementation steps are explained below, in conjunction with the specific implementation process:

[0049] 1. BMC, such as Figure 3 As shown;

[0050] Step 1: Power on the server. You can remotely power on the server by sending an IPMI power-on command to the BMC or by clicking the power-on button on the BMC web page.

[0051] Step 2: The timer starts counting. After determining that the server is powered on, the timer module in the BMC system starts counting and records the power-on time.

[0052] Step 3: Determine if the boot time is greater than 4 minutes and less than 8 minutes. Because different server hardware environments result in varying times for the BMC to acquire CPU IIC control, this time period is defined to apply to different servers. If the boot time is greater than 8 minutes, stop timing the boot time. If the boot time is less than 4 minutes, continue timing.

[0053] Step 4: When the power-on time meets the condition of being greater than or equal to 4 minutes and less than or equal to 8 minutes, the BMC obtains the self-test code (POST code). The BMC obtains the POST code from the CPU register (register address 0x28800024) via the IIC bus. The default value of this register is 0x20171018. A schematic diagram of the IIC topology between the BMC and the CPU is shown below. Figure 2 .

[0054] Step 5: Check if the POST code indicates a memory fault. If so, report a memory fault alarm. The definitions of POST code error codes are shown in Table 2. The BMC parses the obtained POST code. If the obtained POST code value is 0, the BMC logs "DIMM0 not present" in the system log. If the obtained POST code value is 1, the BMC logs "DIMM0 fault" in the system log.

[0055]

[0056] Table 2 Examples of POST code error code definitions

[0057] Step 6: Store the POST code and the current time.

[0058] Step 7: End the process.

[0059] 2. BIOS, such as Figure 4 As shown;

[0060] Step 1: Power on the server. When the BIOS detects that DIMM0 is not in place or DIMM0 is faulty, the process ends.

[0061] Step 2: The BIOS sends an IPMI OEM command to obtain the POST code and timestamp stored in the BMC from the last boot.

[0062] Step 3: BIOS records memory alarm logs. The BIOS parses the acquired POST code. When the acquired POST code value is 0, the BIOS records a DIMM0 absence error. When the acquired POST code value is 1, the BIOS records a DIMM0 fault. The time acquired by the BIOS is used to avoid duplicate recording of memory fault logs. If the time acquired by the BIOS is the same as the time of the previously acquired POST code, no memory fault log is recorded. If the time acquired by the BIOS is different from the time of the previously acquired POST code, a memory fault log is recorded, consistent with the BMC system log.

[0063] Step 4: End the process.

[0064] In summary, the above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method of recording memory failures by a server, characterized by The steps implemented by the method include: Step 11, the server is powered on, and the server is remotely controlled to be powered on by sending an IPMI power-on command to the BMC or clicking a power-on button on a BMC Web page; Step 12, a timer starts timing, and after determining that the server is in a powered-on state, a timer module in the BMC system starts timing to record the powered-on time; Step 13, it is determined whether the powered-on time is greater than 4 minutes and less than 8 minutes, when the powered-on time is greater than 8 minutes, the powered-on time is stopped, and when the powered-on time is less than 4 minutes, the timing is continued; Step 14, when the powered-on time meets the condition of being greater than or equal to 4 minutes and less than or equal to 8 minutes, the BMC acquires a POST code, the BMC acquires the POST code from a CPU register through an IIC bus, and the register has a default value of 0x20171018; Step 15, it is detected whether the POST code prompts a memory fault, if there is a reported memory fault alarm, the BMC analyzes the acquired POST code, when the acquired POST code is 0, the BMC records a DIMM0 not in place log in a system log, and when the acquired POST code is 1, the BMC records a DIMM0 fault log in the system log; Step 16, the POST code and the current time are stored; The method further includes steps run in the BIOS: Step 21, the server is powered on, when the BIOS detects that the DIMM0 is not in place or the DIMM0 is faulty, the step is ended, otherwise the next step is entered; Step 22, the BIOS sends an IPMI OEM command to acquire the POST code and a time stamp stored by the BMC in the last power-on; Step 23, the BIOS records a memory alarm log, the BIOS analyzes the acquired POST code, when the acquired POST code is 0, the BIOS records a DIMM0 not in place log, when the acquired POST code is 1, the BIOS records a DIMM0 fault log, when the time acquired by the BIOS is the same as the time of the last acquired POST code, the memory fault log is not recorded, and when the time acquired by the BIOS is different from the time of the last acquired POST code, the memory fault log is recorded, and is unified with the BMC system log.

2. The method for recording a memory fault of a server according to claim 1, characterized in that: The memory fault recorded by the method includes a hardware level, a firmware level and an operating system level.

3. The method for recording a memory fault of a server according to claim 2, characterized in that: The hardware level includes a processor platform, a memory and a CPLD key component.

4. The method for recording a memory fault of a server according to claim 2 or 3, characterized in that: The firmware level is a BIOS firmware, including a BIOS log module, a communication module with the BMC, a communication module with the CPLD and a memory detection module.

5. The method for recording memory failure of a server according to claim 4, characterized in that: the operating system layer comprises a timer module, a communication module with BIOS, a communication module with CPLD, a self-check code analysis module and a self-check code reading module.

6. The method for recording memory failure of a server according to claim 5, characterized in that: the BIOS firmware realizes information interaction with BMC through a BMC communication module; makes BIOS send a signal of completion of memory initialization to CPLD through a CPLD communication module, and after receiving the signal, CPLD gives IIC access right of CPU to BMC, realizing access of BMC to CPU register through IIC bus; and realizes memory failure detection through a memory detection module, and BIOS cannot run when DIMM0 is not in place or DIMM0 fails.

7. The method for recording memory failure of a server according to claim 6, characterized in that: the BMC system realizes timing of server boot time through a timer module, and when the server boot time is in a time period of 4-8 minutes, BMC acquires POST code through a self-check code reading module, realizes analysis and storage of POST code through a POST code analysis module, and after the server boot time exceeds 8 minutes, the timing is stopped, that is, the program of acquiring POST code no longer runs after the boot time exceeds 8 minutes.

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