Photovoltaic dc boost transformer topology and control method thereof

Abstract

The application discloses a photovoltaic direct-current step-up transformer topology structure and a control method thereof in the field of direct-current transformers, and the topology structure is composed of three-level half-bridge modules, two-level half-bridges, transformer leakage inductance L, a transformer T and full-bridge rectifier modules; the three-level half-bridge modules are connected in parallel to form a low-voltage direct-current end, and the full-bridge rectifier modules are connected in series to form a high-voltage direct-current port. The application can effectively reduce the voltage stress and the current stress of the switching device by inputting the multiple three-level half-bridge modules in parallel; the control mode adopted can realize ZCS turn-on and turn-off of the two-level bridge arms and also can reduce the current stress of the device, improve the reliability of the direct-current transformer and reduce the cost and the loss of the direct-current transformer.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of direct current transformers, and particularly relates to a photovoltaic direct current step-up transformer topology and a control method thereof. BACKGROUND

[0002] With the increasingly serious problems of energy crisis, global climate warming and environmental pollution, photovoltaic power generation has been paid more and more attention in the world. Direct current transmission and distribution technology is also developing rapidly. A direct current transformer can realize interconnection of direct current transmission and distribution networks of different voltage levels and improve the flexibility of direct current transmission and distribution. However, in practical applications, there are problems such as excessive current and voltage stress of switching devices.

[0003] A multi-level circuit can significantly reduce the voltage stress of a switching device. For example, in a three-level circuit, the voltage stress of a switching device is only half of the input voltage. Therefore, the left bridge arm of a full-bridge converter is replaced by a three-level bridge arm, and the right bridge arm remains a two-level bridge arm to form a composite full-bridge three-level converter, which can reduce the voltage stress of the three-level bridge arm. However, the current stress of the switching device in the composite full-bridge three-level converter is not reduced, the reliability is not high, and the overall direct current transformer has high cost and large loss. SUMMARY

[0004] In view of the deficiencies of the prior art, the purpose of the present application is to provide a photovoltaic direct current step-up transformer topology and a control method thereof to solve the problems in the background art.

[0005] The purpose of the present application can be achieved by the following technical solutions.

[0006] A photovoltaic direct current step-up transformer topology, which is composed of a three-level half-bridge module, a two-level half-bridge, a transformer leakage inductance L, a transformer T and a full-bridge rectifier module.

[0007] The three-level half-bridge modules are connected in parallel to form a low-voltage direct current end, and the full-bridge rectifier modules are connected in series to form a high-voltage direct current port.

[0008] Preferably, the number of the three-level half-bridge modules and the transformer leakage inductance L is k, and k = 1, 2,..., n.

[0009] Preferably, the bridge arm midpoint of the three-level half-bridge module is connected to the upper end of the primary winding of the transformer T.

[0010] Preferably, the number of the primary winding of the transformer T is the same as the number of the three-level half-bridge modules and the transformer leakage inductance L.

[0011] Preferably, the lower end of the primary winding of the transformer T is connected to the midpoint of the two-level half-bridge arm, the secondary winding 1 of the transformer T is connected to the input port of the full-bridge rectifier module 1, and the secondary winding 2 of the transformer T is connected to the input port of the full-bridge rectifier module 2.

[0012] Preferably, the full-bridge rectifier module comprises a full-bridge rectifier module 1 and a full-bridge rectifier module 2.

[0013] Preferably, the output of the full-bridge rectifier module 1 constitutes a high-voltage direct-current port 1, the output of the full-bridge rectifier module 2 constitutes a high-voltage direct-current port 2, and the high-voltage direct-current port 1 and the high-voltage direct-current port 2 are connected in series.

[0014] Preferably, the photovoltaic direct-current boost transformer adopts a unipolar PWM modulation mode, compares a modulation wave with a high-frequency unipolar triangular carrier wave, and outputs a pulse sequence to control the three-level half-bridge module, thereby realizing high-frequency on-off of the three-level module.

[0015] Preferably, the two-level half-bridge arm is controlled in a low-frequency on-off mode.

[0016] A control method of a photovoltaic direct-current boost transformer topology structure, the control method has two kinds, the first control method is as follows:

[0017] At the beginning of each positive half cycle, the first switch S k1 and the second switch S k2 in the three-level half-bridge module are turned on for a time, and the negative half cycle is the same, so that the output current smoothly rises to the platform stage, and then the unipolar PWM modulation mode is realized to realize high-frequency on-off of the three-level module, so that the output current fluctuates up and down around the platform current, thereby reducing the current stress of the device. k1 and the second switch S k2 in the three-level half-bridge module are turned off in advance, and the negative half cycle is the same, so that the output current quickly becomes zero, thereby realizing ZCS turn-off of the two-level bridge arm.

[0018] The first switch S k1 and the second switch S k2 in the three-level half-bridge module are turned on at the same time, the third switch S k3 and the fourth switch S k4 are turned on at the same time, the third switch S k3 lags behind the first switch S k1 by half a low-frequency switching period and is turned on.

[0019] In each low-frequency positive half cycle, the fifth switch S5 and the third switch S k3 and the fourth switch S k4Always kept in the off state, the drive signal of the sixth switch S6 is always high, and the first switch S in the three-level half-bridge module is always high. k1 With the second switching transistor S k2 The drive signal is a high-frequency pulse signal, and the first switching transistor S of the three-level half-bridge module... k1 With the second switching transistor S k2 When turned on, the inverter bridge output voltage equals the DC input voltage, the inductor current increases linearly, and the first switching transistor S of the three-level half-bridge module... k1 With the second switching transistor S k2 When turned off, the inverter bridge output voltage is zero, and the inductor current decreases linearly.

[0020] In each low-frequency negative half-cycle, the sixth switch S6 and the first switch S in the three-level half-bridge module k1 Second switch S k2 Always kept in the off state, the drive signal of the fifth switch S5 is always high, and the third switch S in the three-level half-bridge module... k3 With the fourth switch S k4 The drive signal is a high-frequency pulse signal, and the third switch S in the three-level half-bridge module is... k3 With the fourth switch S k4 When turned on, the inverter bridge output voltage equals the negative DC input voltage, and the inductor current increases linearly in the negative direction. The third switch S in the three-level half-bridge module... k3 With the fourth switch S k4 When turned off, the inverter bridge output voltage is zero, and the inductor current decreases linearly in the negative direction;

[0021] The second control method is as follows:

[0022] At the beginning of each positive half-cycle, the first switch S in the three-level half-bridge module is increased. k1 The turn-on time, and the same applies to the negative half-cycle, allows the output current to rise smoothly to the plateau stage. Then, unipolar PWM modulation is used to achieve the first switching transistor S in the three-level module. k1 The high-frequency switching causes the output current to fluctuate around the plateau current, reducing the current stress on the device. At the end of each positive half-cycle, the first switch S in the three-level half-bridge module is turned off in advance. k1 Similarly, during the negative half-cycle, the output current quickly becomes zero, thus achieving ZCS turn-off of the two-level bridge arm.

[0023] During each low-frequency positive half-cycle, the fifth switch S5 and the third switch S in the three-level half-bridge module... k3 and the fourth switch S k4 Always kept in the off state, the sixth switch S6 and the second switch S in the three-level half-bridge module k2The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k1 The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k1 When the first switch S1 in the three-level half-bridge module is turned on, the output voltage of the inverter bridge is equal to the direct current input voltage, the inductance current linearly increases, the third switch S3 in the three-level half-bridge module is always kept in the closed state, and the fourth switch S4 in the three-level half-bridge module is always kept in the closed state. k1 When the first switch S1 in the three-level half-bridge module is turned off, the output voltage of the inverter bridge is equal to half of the direct current input voltage, and the inductance current linearly decreases.

[0024] In each low frequency negative half cycle, the sixth switch S6 and the first switch S1 in the three-level half-bridge module are always kept in the closed state, the fifth switch S5 and the third switch S3 in the three-level half-bridge module are always kept in the closed state, the fourth switch S4 in the three-level half-bridge module is always kept in the closed state, and the second switch S2 in the three-level half-bridge module is always kept in the closed state. k1 The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k2 The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k3 The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k4 The driving signal of the first switch S1 in the three-level half-bridge module is always high level, the driving signal of the second switch S2 in the three-level half-bridge module is high frequency pulse signal, the driving signal of the third switch S3 in the three-level half-bridge module is high frequency pulse signal, and the driving signal of the fourth switch S4 in the three-level half-bridge module is high frequency pulse signal. k4 When the first switch S1 in the three-level half-bridge module is turned on, the output voltage of the inverter bridge is equal to the direct current input voltage, the inductance current linearly increases, the third switch S3 in the three-level half-bridge module is always kept in the closed state, and the fourth switch S4 in the three-level half-bridge module is always kept in the closed state. k4 When the first switch S1 in the three-level half-bridge module is turned off, the output voltage of the inverter bridge is equal to half of the direct current input voltage, and the inductance current linearly decreases.

[0025] The present application has the beneficial effects that:

[0026] 1. The input parallel connection of the plurality of three-level half-bridge modules can effectively reduce the voltage stress and current stress of the switch device.

[0027] 2. The two control modes can realize the ZCS turn-on and turn-off of the two-level bridge arm, reduce the current stress of the device, improve the reliability of the direct current transformer, reduce the cost and loss of the direct current transformer, and further reduce the switching loss and improve the efficiency of the converter. DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, for those skilled in the art, other drawings can also be obtained without creative labor.

[0029] Figure 1 It is a schematic diagram of the topology structure in the present application.

[0030] Figure 2This is a schematic diagram of the three-level half-bridge module in this invention;

[0031] Figure 3 and Figure 4 This is a schematic diagram of the basic working waveform of the photovoltaic DC step-up transformer in this invention. Detailed Implementation

[0032] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Please see Figure 1 As shown, a photovoltaic DC step-up transformer topology is provided. The topology consists of multiple sets of three-level half-bridge modules, two-level half-bridge modules, transformer leakage inductance L, transformer T, and two sets of full-bridge rectifier modules. The low-voltage DC terminal is formed by n three-level half-bridge modules k connected in parallel. The outputs of full-bridge rectifier module 1 and full-bridge rectifier module 2 are connected in series to form the high-voltage DC port.

[0034] A three-level half-bridge module k (k = 1, 2, ..., n) is connected in parallel at the low-voltage input port. The midpoint of the bridge arm of the three-level half-bridge module k is connected to the transformer leakage inductance L. k Connect the upper end of the primary winding k of transformer T.

[0035] The lower end of the primary winding k (k = 1, 2, ..., n) of transformer T is connected to the midpoint of the two-level half-bridge arm. The secondary winding 1 of transformer T is connected to the input port of the full-bridge rectifier module 1, and the secondary winding 2 of transformer T is connected to the input port of the full-bridge rectifier module 2.

[0036] The output of full-bridge rectifier module 1 forms high-voltage DC port 1, and the output of full-bridge rectifier module 2 forms high-voltage DC port 2. The two high-voltage ports are connected in series for output.

[0037] Please see Figure 2 The schematic diagram of the three-level half-bridge module shown illustrates two control methods for a photovoltaic DC step-up transformer topology. The first control method is as follows:

[0038] The photovoltaic DC boost transformer adopts a single-polarity PWM modulation mode, and the output pulse sequence is used to control three-level half-bridge modules k (k = 1, 2,..., n) through comparison between a modulation wave and a high-frequency single-polarity triangular carrier, so as to realize high-frequency on-off of the three-level modules; low-frequency on-off control is performed on two-level bridge arms, so as to realize low-frequency voltage and current output of the high-frequency PWM modulated inverter. Based on this control mode, at the beginning of each positive half cycle, the first switch S k1 and the second switch S k2 are turned on for a time (the negative half cycle is the same), so that the output current is smoothly raised to a platform stage, and then the high-frequency on-off of the three-level modules is realized through the single-polarity PWM modulation mode, so that the output current fluctuates up and down around the platform current, thereby reducing the current stress of the device; at the end of each positive half cycle, the first switch S k1 and the second switch S k2 are turned off in advance (the negative half cycle is the same), so that the output current is quickly reduced to zero, thereby realizing ZCS turn-off of the two-level bridge arms.

[0039] In the three-level half-bridge module, the first switch S k1 and the second switch S k2 are turned on at the same time; the third switch S k3 and the fourth switch S k4 are turned on at the same time, and the third switch S k3 is turned on after the first switch S k1 half a low-frequency switching period.

[0040] In each low-frequency positive half cycle, the fifth switch S5 and the third switch S k3 and the fourth switch S k4 in the three-level half-bridge module are always kept in the off state, the driving signal of the sixth switch S6 is always high, and the driving signals of the first switch S k1 and the second switch S k2 in the three-level half-bridge module are high-frequency pulse signals. When the first switch S k1 and the second switch S k2 in the three-level half-bridge module are turned on, the output voltage of the inverter bridge is equal to the DC input voltage, and the inductor current linearly increases; when the first switch S k1 and the second switch S k2 in the three-level half-bridge module are turned off, the output voltage of the inverter bridge is equal to zero, and the inductor current linearly decreases.

[0041] In each low-frequency negative half cycle, the sixth switch S6 and the first switch S k1 and the second switch S k2The driving signal of the fifth switch S5 is always high level, the driving signal of the third switch S k3 and the fourth switch S k4 in the three-level half-bridge module is high frequency pulse signal. k3 The driving signal of the third switch S k4 and the fourth switch S k3 in the three-level half-bridge module is high frequency pulse signal. k4 When the third switch S k1 and the fourth switch S k1 in the three-level half-bridge module are turned on, the output voltage of the inverter bridge is equal to the negative DC input voltage, and the inductor current increases linearly in the negative direction. k1 When the third switch S k3 and the fourth switch S k4 in the three-level half-bridge module are turned off, the output voltage of the inverter bridge is zero, and the inductor current decreases linearly in the negative direction.

[0042] The second control method is as follows:

[0043] At the beginning of each positive half cycle, the turn-on time of the first switch S k1 in the three-level half-bridge module is increased, and the negative half cycle is the same, so that the output current rises smoothly to the platform stage, and then the high-frequency on-off of the first switch S k1 in the three-level module is realized by unipolar PWM modulation, so that the output current fluctuates up and down around the platform current, reduces the current stress of the device, and at the end of each positive half cycle, the first switch S k1 in the three-level half-bridge module is turned off in advance, and the negative half cycle is the same, so that the output current is quickly zero, realizing the ZCS turn-off of the two-level bridge arm;

[0044] In each low-frequency positive half cycle, the fifth switch S5 and the third switch S k3 and the fourth switch S k4 in the three-level half-bridge module are always kept off, the driving signal of the sixth switch S6 and the second switch S k2 in the three-level half-bridge module is always high level, the driving signal of the first switch S k1 in the three-level half-bridge module is high frequency pulse signal, and the first switch S k1 in the three-level half-bridge module is turned on, the output voltage of the inverter bridge is equal to the DC input voltage, and the inductor current increases linearly. k1 When the first switch S k1 in the three-level half-bridge module is turned off, the output voltage of the inverter bridge is equal to half of the DC input voltage, and the inductor current decreases linearly.

[0045] In each low-frequency negative half cycle, the sixth switch S6 and the first switch S k1 and the second switch S k2 in the three-level half-bridge module are always kept off, and the driving signal of the fifth switch S5 and the third switch S k3The driving signal of the fourth switch S k4 is a high-frequency pulse signal, and the fourth switch S k4 of the three-level half-bridge module is turned on, the output voltage of the inverter bridge equals the negative DC input voltage, and the inductive current linearly increases in the negative direction. k4 The output voltage of the inverter bridge is half of the negative DC input voltage, and the inductive current linearly decreases in the negative direction.

[0046] Please refer to Figure 3 , Figure 3 is the basic working waveform of the topology structure under the first control mode, and the working time sequence is as follows:

[0047] 1) In the t0-t1 time period, the first switch S k1 and the second switch S k2 of the three-level half-bridge module are kept on, the output voltage of the inverter bridge is positive, the inductive current i Lk starts to smoothly increase from zero and increases to a platform current value at t1;

[0048] 2) In the t1-t2 time period, the switch S6 is always in the on state, and the first switch S k1 and the second switch S k2 of the three-level half-bridge module are in the high-frequency on-off state under the high-frequency driving signal. When the first switch S k1 and the second switch S k2 are turned on, the output voltage of the inverter bridge equals the input voltage, and the inductive current in the positive direction increases; when the first switch S k1 and the second switch S k2 are turned off, the output voltage of the inverter bridge equals zero, and the inductive current in the positive direction decreases, and the inductive current fluctuates around the platform current value;

[0049] 3) In the t2-t3 time period, the first switch S k1 and the second switch S k2 of the three-level half-bridge module are turned off, and the inductive current starts to decrease and decreases to zero at t3.

[0050] 4) At t4, the lower arm switch S6 of the two-level half-bridge is turned off, and after a dead time, the upper arm switch S5 is turned on, the output voltage of the inverter bridge is reversed, the negative half cycle starts, and the working state is similar to the positive half cycle.

[0051] Please refer to Figure 4 , Figure 4 is the basic working waveform of the topology structure under the second control mode, and the working time sequence is as follows:

[0052] 1), in t0-t1 time period, the first switch tube S k1 and the second switch tube S k2 Keep on, the inverter bridge output voltage is equal to the DC input voltage, the inductance current i Lk From zero, steadily increase to the platform current value at t1 moment;

[0053] 2), in t1-t2 moment, the switch tube S6 and the second switch tube S k2 Always in the on state, and the first switch tube S k1 In the high-frequency driving signal under high-frequency pass, off state.When the switch tube S k1 Turn on, the inverter bridge output voltage is equal to the input voltage, the inductance current increases in the positive direction;The switch tube S k1 Turn off, the inverter bridge output voltage is equal to half of the input voltage, the inductance current decreases in the positive direction, and the inductance current fluctuates around the platform current value;

[0054] 3), in t2-t3 moment, the first switch tube S k1 In the three-level half bridge module, the inductance current starts to decrease, and decreases to zero at t3 moment.

[0055] 4), at t4 moment, the lower bridge arm switch tube S6 in two-level half bridge and the second switch tube S k2 Turn off, the upper bridge arm switch tube S5 is turned on after the dead time, the inverter bridge output voltage is reversed, and the negative half cycle begins, and the working state is similar to the positive half cycle.

[0056] Through the above working process, it can be seen that the two control modes adopted by the present application can make the output current quickly rise to the platform value, thereby reducing the current stress of the device;On the other hand, the ZCS opening and closing of the two-level bridge arm can be realized, thereby reducing the switching loss.In addition, the second control mode adopted by the present application has only one switch tube working in high-frequency switching state, which can further reduce the switching loss and improve the efficiency of the converter.The input parallel of the three-level half bridge module can effectively reduce the voltage stress and current stress of the switching device, thereby reducing the cost and improving the reliability of the DC transformer.

[0057] In the description of the present application, the description of the terms "one embodiment", "example", "specific example" and the like means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are contained in at least one embodiment or example of the present application.In the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0058] The foregoing is considered as illustrative only of the principles of the application. Further, since numerous modifications and changes will readily occur to those skilled in the art, it is not desired to limit the application to the exact construction and practice described. Accordingly, all such variations and modifications are intended to be included within the scope of the application as defined in the following claims.

Claims

1. A control method for a photovoltaic DC step-up transformer topology, characterized in that, The topology consists of multiple three-level half-bridge modules, a two-level half-bridge, a transformer leakage inductance L, a transformer T, and a full-bridge rectifier module. The three-level half-bridge modules are connected in parallel to form a low-voltage DC terminal, and the output of the full-bridge rectifier module is connected in series to form a high-voltage DC port. The midpoint of the bridge arm of the three-level half-bridge module is connected to the upper end of the primary winding of the transformer T via the transformer leakage inductance L. The number of primary windings of the transformer T is the same as the number of three-level half-bridge modules and the number of transformer leakage inductance L. The lower end of the primary winding of transformer T is connected to the midpoint of the two-level half-bridge arm, the secondary winding 1 of transformer T is connected to the input port of the full-bridge rectifier module 1, and the secondary winding 2 of transformer T is connected to the input port of the full-bridge rectifier module 2. The output of the full-bridge rectifier module 1 forms a high-voltage DC port 1, and the output of the full-bridge rectifier module 2 forms a high-voltage DC port 2. The high-voltage DC port 1 and the high-voltage DC port 2 are connected in series for output. There are two control methods. The first control method is as follows: At the beginning of each positive half-cycle, the first switch S in the three-level half-bridge module is increased. k1 With the second switching transistor S k2 The same principle applies to the negative half-cycle, ensuring the output current rises smoothly to the plateau stage. Then, unipolar PWM modulation is used to achieve high-frequency switching of the three-level module, causing the output current to fluctuate around the plateau current, reducing current stress on the devices. Near the end of each positive half-cycle, the first switch S in the three-level half-bridge module is turned off early. k1 With the second switching transistor S k2 Similarly, during the negative half-cycle, the output current quickly becomes zero, thus achieving ZCS turn-off of the two-level bridge arm. The first switching transistor S in the three-level half-bridge module k1 With the second switching transistor S k2 Simultaneously activated, the third switch S k3 With the fourth switch S k4 Simultaneously activated, the third switch S k3 Lag first switch S k1 Turn-on after half a low-frequency switching cycle; During each low-frequency positive half-cycle, the fifth switch S5 and the third switch S in the three-level half-bridge module... k3 and the fourth switch S k4 Always kept in the off state, the drive signal of the sixth switch S6 is always high, and the first switch S in the three-level half-bridge module is always high. k1 With the second switching transistor S k2 The drive signal is a high-frequency pulse signal, and the first switching transistor S of the three-level half-bridge module... k1 With the second switching transistor S k2 When turned on, the inverter bridge output voltage equals the DC input voltage, the inductor current increases linearly, and the first switching transistor S of the three-level half-bridge module... k1 With the second switching transistor S k2 When turned off, the inverter bridge output voltage is zero, and the inductor current decreases linearly. In each low-frequency negative half-cycle, the sixth switch S6 and the first switch S in the three-level half-bridge module k1 Second switch S k2 Always kept in the off state, the drive signal of the fifth switch S5 is always high, and the third switch S in the three-level half-bridge module... k3 With the fourth switch S k4 The drive signal is a high-frequency pulse signal, and the third switch S in the three-level half-bridge module is... k3 With the fourth switch S k4 When turned on, the inverter bridge output voltage equals the negative DC input voltage, and the inductor current increases linearly in the negative direction. The third switch S in the three-level half-bridge module... k3 With the fourth switch S k4 When turned off, the inverter bridge output voltage is zero, and the inductor current decreases linearly in the negative direction; The second control method is as follows: At the beginning of each positive half-cycle, the first switch S in the three-level half-bridge module is increased. k1 The turn-on time, and similarly for the negative half-cycle, ensures the output current rises smoothly to the plateau stage. Then, unipolar PWM modulation is used to achieve the first switching transistor S in the three-level module. k1 The high-frequency switching causes the output current to fluctuate around the plateau current, reducing the current stress on the device. At the end of each positive half-cycle, the first switch S in the three-level half-bridge module is turned off in advance. k1 Similarly, during the negative half-cycle, the output current quickly becomes zero, thus achieving ZCS turn-off of the two-level bridge arm. During each low-frequency positive half-cycle, the fifth switch S5 and the third switch S in the three-level half-bridge module... k3 and the fourth switch S k4 Always kept in the off state, the sixth switch S6 and the second switch S in the three-level half-bridge module k2 The drive signal is always high, and the first switch S in the three-level half-bridge module is always high. k1 The drive signal is a high-frequency pulse signal, and the first switching transistor S of the three-level half-bridge module... k1 When turned on, the inverter bridge output voltage equals the DC input voltage, the inductor current increases linearly, and the first switching transistor S of the three-level half-bridge module... k1 When turned off, the inverter bridge output voltage is equal to half of the DC input voltage, and the inductor current decreases linearly. In each low-frequency negative half-cycle, the sixth switch S6 and the first switch S in the three-level half-bridge module k1 Second switch S k2 Always kept in the off state, the fifth switch S5 and the third switch S in the three-level half-bridge module k3 The drive signal is always high, and the fourth switch S in the three-level half-bridge module is always high. k4 The drive signal is a high-frequency pulse signal, and the fourth switch S in the three-level half-bridge module is... k4 When turned on, the inverter bridge output voltage equals the negative DC input voltage, and the inductor current increases linearly in the negative direction. The fourth switch S in the three-level half-bridge module... k4 When turned off, the inverter bridge output voltage is half of the negative DC input voltage, and the inductor current decreases linearly in the negative direction.

2. The control method for a photovoltaic DC step-up transformer topology according to claim 1, characterized in that, The number of the three-level half-bridge module and the transformer leakage inductance L are both k, k=1,2,...,n.

3. The control method for the topology of a photovoltaic DC step-up transformer according to claim 1, characterized in that, The full-bridge rectifier module includes full-bridge rectifier module 1 and full-bridge rectifier module 2.

4. The control method for a photovoltaic DC step-up transformer topology according to claim 1, characterized in that, The photovoltaic DC step-up transformer adopts a unipolar PWM modulation method. By comparing the modulated wave with a high-frequency unipolar triangular carrier wave, the output pulse sequence controls the three-level half-bridge module to realize the high-frequency switching of the three-level module.

5. The control method for a photovoltaic DC step-up transformer topology according to claim 1, characterized in that, The two-level half-bridge arms are controlled for low-frequency on / off switching.

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