Lateral enhancement-mode gallium oxide field-effect transistor with integrated freewheeling diode

Abstract

The present invention belongs to the field of power semiconductor technology and relates to a lateral enhancement-mode gallium oxide field-effect transistor with an integrated freewheeling diode. When the gate-source voltage is zero, the work function difference between the gate-source metal and the gallium oxide semiconductor depletes the conductive channel, realizing a normally-off enhancement-mode device. During forward conduction, the voltage applied to the gate is greater than the threshold voltage, turning the transistor on; when the source voltage is zero, the work function difference between the source metal and the gallium oxide semiconductor depletes the conductive channel, turning the integrated diode off. During reverse freewheeling, the applied source voltage narrows the depletion region, turning the integrated diode on with a low turn-on voltage; when the source voltage is further increased, a high-concentration electron accumulation layer forms on the channel sidewalls, achieving a low on-state voltage drop. Compared to vertically separated field-effect transistors that need to be packaged into a chip or module with a freewheeling diode, the lateral power device of the present invention is easy to integrate, and the field-effect transistor and integrated diode processes are compatible, which facilitates widespread application in power integrated circuits and reduces parasitic parameters and module volume.

Description

Technical Field

[0001] The present invention belongs to the technical field of power semiconductors and relates to a lateral enhancement type gallium oxide field effect transistor with an integrated freewheeling diode. Background Art

[0002] With the continuous advancement of power electronics technology, power electronic devices and power supply systems are moving towards greater power, smaller size, faster speed, more functionality, and enhanced performance. Power integrated circuits integrate power semiconductor devices into a single chip or module. Compared to vertical discrete devices, which require wiring to connect to low-voltage control circuits, lateral power devices can be monolithically integrated with the low-voltage control circuit, making them the most common and viable option.

[0003] Gallium oxide (GAO) material has an ultra-wide bandgap and high breakdown electric field strength. The power figure of merit of power devices based on GAO is four times that of gallium nitride, ten times that of silicon carbide, and 3444 times that of silicon. Theoretically, it is expected to become the preferred material for high-voltage, low-resistance, and low-loss power devices, enabling smaller integrated circuit systems and promising broad application prospects. However, effective P-type doping of GAO has not yet been achieved, making it difficult to achieve normally-off enhancement-mode devices in power field-effect transistors based on GAO. Furthermore, the absence of a parasitic PN junction diode to conduct reverse current requires that GAO-based power transistors be packaged into modules with anti-parallel discrete diodes to achieve reverse freewheeling. This complicates circuit system design, introduces parasitic inductance, and increases system size, preventing the easy integration of lateral power devices. Summary of the Invention

[0004] To address the above problems, the present invention proposes a lateral enhancement mode gallium oxide field effect transistor with an integrated freewheeling diode.

[0005] The technical solution of the present invention is:

[0006] A lateral enhancement-mode gallium oxide field-effect transistor with an integrated freewheeling diode comprises a gallium oxide substrate 1, an unintentionally doped gallium oxide region 2, and an N-type gallium oxide drift region 3, stacked in sequence from bottom to top along the vertical direction of the device. Along the lateral direction of the device, the device comprises a gate-source region and a drain region, respectively. The gate-source region is located on the upper surface of the N-type gallium oxide drift region 3. The drain region comprises a highly doped gallium oxide drain region 4 located above the N-type gallium oxide drift region 3, and a drain metal 5 located on the upper surface of the highly doped gallium oxide drain region 4.

[0007] The middle part of the gate-source region is a fin-shaped gallium oxide drift region 6 in contact with the upper surface of the N-type gallium oxide drift region 3. The upper surface of the fin-shaped gallium oxide drift region 6 has a highly doped gallium oxide source region 7. The sidewalls of the fin-shaped gallium oxide drift region 6 are covered with a first insulating dielectric 8, and the first insulating dielectric 8 extends to both sides along the upper surface of the gallium oxide drift region 3, one side extending away from the highly doped gallium oxide drain region 4 to the edge of the device, and the other side extending in a direction close to the highly doped gallium oxide drain region 4 without contacting the highly doped gallium oxide drain region 4. Along the longitudinal direction of the device, the gate-source region is divided into a transistor region and a diode region. The difference between the transistor region and the diode region is that the surface of the first insulating dielectric 8 in the transistor region is covered with a gate metal 9. The surface of the gate metal 9 is covered with a second insulating dielectric 10, and the second insulating dielectric 10 extends to contact the sidewalls of the highly doped gallium oxide source region 7 in the transistor region. The surfaces of the second insulating dielectric 10, the highly doped gallium oxide source region 7, and the first insulating dielectric 8 in the diode region are covered with a source metal 11.

[0008] Furthermore, the fin-shaped gallium oxide drift region 6 is discontinuously distributed along the longitudinal direction of the device, and the gate-source region is segmented using the extension line of the center line of every two adjacent discontinuously distributed fin-shaped gallium oxide drift regions 6 as the dividing line, and each segment is numbered in sequence using positive integers, where the segments with odd numbers are transistor regions, and the segments with even numbers are diode regions.

[0009] The beneficial effects of the present invention are that the lateral field effect transistor of the present invention is an enhancement-mode device with a high threshold voltage, and the freewheeling diode has a low turn-on voltage and a low conduction voltage drop, thereby realizing the monolithic process integration of the field effect transistor and the freewheeling diode and reducing the parasitic inductance and volume of the power integration system. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a schematic structural diagram of Example 1 of the present invention;

[0011] Figure 2 is a schematic structural diagram of embodiment 1 of the present invention with auxiliary lines;

[0012] Figure 3 is a cross-sectional view along line A1A2 in Example 1;

[0013] Figure 4 is a cross-sectional view along line B1B2 in Example 1;

[0014] Figure 5 is a cross-sectional view along line C1C2 in Example 1;

[0015] Figure 6 is a schematic structural diagram of embodiment 2 of the present invention with auxiliary lines;

[0016] Figure 7is a cross-sectional view along line D1D2 in Example 2; DETAILED DESCRIPTION

[0017] The technical solution of the present invention is described in detail below with reference to the accompanying drawings and embodiments:

[0018] Example 1:

[0019] like Figure 1 As shown, this example includes a gallium oxide substrate 1, a gallium oxide unintentionally doped region 2, and an N-type gallium oxide drift region 3 stacked in sequence from bottom to top along the vertical direction of the device; along the lateral direction of the device, the two ends of the device are respectively a gate source region and a drain region, the gate source region is located on the upper surface of the N-type gallium oxide drift region 3, the drain region includes a highly doped gallium oxide drain region 4 located on the upper part of the N-type gallium oxide drift region 3 and a drain metal 5 located on the upper surface of the highly doped gallium oxide drain region 4; the middle part of the gate source region is a fin-shaped gallium oxide drift region in contact with the upper surface of the N-type gallium oxide drift region 3. Region 6, the upper surface of the fin-shaped gallium oxide drift region 6 has a highly doped gallium oxide source region 7; the sidewalls of the fin-shaped gallium oxide drift region 6 are covered with a first insulating dielectric 8, and the first insulating dielectric 8 extends to both sides along the upper surface of the gallium oxide drift region 3, one side of which extends to the edge of the device in a direction away from the highly doped gallium oxide drain region 4, and the other side extends in a direction close to the highly doped gallium oxide drain region 4 and does not contact the highly doped gallium oxide drain region 4; along the longitudinal direction of the device, the gate-source region is divided into a transistor region and a diode region. For ease of understanding, as shown in FIG. Figure 2 As shown in the figure, the components in this example are marked with auxiliary lines, including A1A2, B1B2, and C1C2. Figure 3 As shown, it is a cross-sectional view along the auxiliary line A1A2, which is the transistor region. Figure 4 As shown, it is a cross-sectional view along the auxiliary line B1B2. This part is the diode region. By comparison, it can be seen that the difference between the transistor region and the diode region is that the surface of the first insulating medium 8 in the transistor region is covered with a gate metal 9; the surface of the gate metal 9 is covered with a second insulating medium 10, and the second insulating medium 10 extends to contact the sidewall of the highly doped gallium oxide source region 7 in the transistor region; the surfaces of the second insulating medium 10, the highly doped gallium oxide source region 7 and the first insulating medium 8 in the diode region are covered with a source metal 11. Figure 5 As shown in the cross-sectional view along C1C2 , the source metal 11 completely covers the upper surface of the highly doped gallium oxide source region 7 .

[0020] This example works as follows:

[0021] The present invention proposes a lateral enhancement-type gallium oxide field-effect transistor with an integrated freewheeling diode. In the zero-bias state, the applied voltage between the gate electrode 9 and the source electrode 11 is zero, the work function difference between the electrode metal and the gallium oxide semiconductor in the fin-shaped gallium oxide drift region 6 depletes the conductive channel, and the field-effect transistor and the freewheeling diode are both turned off, realizing a normally-off enhancement-type lateral power device. In the forward blocking state, the depleted conductive channel can effectively suppress leakage current and increase the breakdown voltage. In the forward conduction state, the applied voltage of the gate electrode 9 increases, the depletion region of the fin-shaped gallium oxide drift region 6 in the transistor region shrinks toward the side wall, and current flows through the conductive channel. When the applied voltage of the gate electrode 9 is further increased, the fin-shaped gallium oxide drift region 6 in the transistor region A high-concentration electron accumulation layer is formed on the sidewall of the gallium oxide drift region 6, which enhances the forward current density and reduces the on-resistance. At this time, the applied voltage of the source electrode 11 is still zero, the conductive channel of the fin-shaped gallium oxide drift region 6 in the diode region is pinched off, and the freewheeling diode is in the off state, which does not affect the conduction performance of the field effect transistor. During reverse freewheeling, the applied voltage of the source electrode 11 is a positive voltage relative to the drain electrode 5, the depletion region of the fin-shaped gallium oxide drift region 6 in the diode region shrinks, the conductive channel is turned on, and the integrated freewheeling diode is turned on. As the applied voltage of the source electrode 11 further increases, a high-concentration electron accumulation layer is formed on the sidewall of the fin-shaped gallium oxide drift region 6 in the diode region, achieving a low turn-on voltage and a low conduction voltage drop. Therefore, the lateral field effect transistor of the present invention is an enhancement-mode device with a high threshold voltage, and the freewheeling diode has a low turn-on voltage and a low conduction voltage drop, realizing the monolithic process integration of the field effect transistor and the freewheeling diode, and reducing the parasitic inductance and volume of the power integration system.

[0022] Example 2:

[0023] like Figure 6 As shown, the difference between this embodiment and embodiment 1 is that the fin-shaped gallium oxide drift region 6 is discontinuously distributed along the longitudinal direction of the device, as shown in FIG. Figure 7 Along the shown Figure 6 In the cross-sectional view taken along lines D1D2, the gate-source region is segmented using the midline extension of each adjacent intermittently distributed fin-shaped gallium oxide drift region 6 as the dividing line. Each segment is numbered sequentially with positive integers, with odd-numbered segments representing the transistor region and even-numbered segments representing the diode region. Compared to Example 1, the intermittently distributed fin-shaped gallium oxide drift region 6 also has sidewalls along the longitudinal direction, thereby increasing the area of ​​the high-concentration electron accumulation layer, further reducing the on-resistance and increasing the current density.

Claims

1. A lateral enhancement-type gallium oxide field-effect transistor with an integrated freewheeling diode, comprising a gallium oxide substrate (1), a gallium oxide unintentionally doped region (2), and an N-type gallium oxide drift region (3) stacked in sequence from bottom to top along the vertical direction of the device; along the lateral direction of the device, two ends of the device are respectively a gate-source region and a drain region, the gate-source region is located on the upper surface of the N-type gallium oxide drift region (3), and the drain region comprises a highly doped gallium oxide drain region (4) located on the upper part of the N-type gallium oxide drift region (3) and a drain metal (5) located on the upper surface of the highly doped gallium oxide drain region (4); It is characterized by: The middle part of the gate source region is a fin-shaped gallium oxide drift region (6) in contact with the upper surface of the N-type gallium oxide drift region (3), and the upper surface of the fin-shaped gallium oxide drift region (6) has a highly doped gallium oxide source region (7); the sidewalls of the fin-shaped gallium oxide drift region (6) are covered with a first insulating medium (8), and the first insulating medium (8) extends to both sides along the upper surface of the gallium oxide drift region (3), one side of which extends to the edge of the device in a direction away from the highly doped gallium oxide drain region (4), and the other side extends in a direction close to the highly doped gallium oxide drain region (4) and does not contact the highly doped gallium oxide drain region. (4) are in contact; along the longitudinal direction of the device, the gate-source region is divided into a transistor region and a diode region, and the difference between the transistor region and the diode region is that the surface of the first insulating medium (8) located in the transistor region is covered with a gate metal (9); the surface of the gate metal (9) is covered with a second insulating medium (10), and the second insulating medium (10) extends to contact the side wall of the highly doped gallium oxide source region (7) of the transistor region; the surfaces of the second insulating medium (10), the highly doped gallium oxide source region (7) and the first insulating medium (8) of the diode region are covered with a source metal (11).

2. The lateral enhancement mode gallium oxide field effect transistor with an integrated freewheeling diode according to claim 1, characterized in that: The fin-shaped gallium oxide drift region (6) is intermittently distributed along the longitudinal direction of the device, and the gate-source region is segmented using the midline extension line of each two adjacent intermittently distributed fin-shaped gallium oxide drift regions (6) as a dividing line, and each segment is numbered in sequence using positive integers, wherein the segments with odd numbers are transistor regions, and the segments with even numbers are diode regions.

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