A high-speed and high-precision ramp generation module for CMOS image sensors

Abstract

The present invention relates to a high-speed and high-precision slope generation module for CMOS image sensors, belonging to the field of CMOS image sensors; comprising 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload, a resistor Rdummy, and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M A control signal output terminal, each output terminal is respectively connected to two input terminals of a corresponding current steering unit; one output terminal of each current steering unit is connected to a resistor Rdummy and then grounded, and the other output terminal is connected to a ramp reference voltage output point Vout; the ramp reference voltage output point Vout is respectively connected in parallel with a resistor Rload and a capacitor Cfilter; a step-shaped signal is filtered to generate a ramp; the present invention can eliminate the glitch voltage of the output point, thereby improving the noise, differential nonlinearity, and integral nonlinearity performance of the overall readout circuit, and can reduce the slope deviation between different chips.

Description

Technical Field

[0001] The present invention relates to a high-speed and high-precision slope generation module for a CMOS image sensor, and belongs to the field of CMOS image sensors; Background Art

[0002] CMOS image sensors are always developing towards higher resolution, faster frame rate and lower noise. Single slope ADC is very suitable for ultra-large array CMOS image sensors because of its simple column-level circuit structure and column-level sharing of reference slope voltage. Typical reference slope voltage can be realized by capacitor array DAC, current steering DAC and other forms. Among them, the slope generator in the form of current steering naturally has faster speed and stronger driving ability, which is suitable for high-speed ultra-large array CMOS image sensors.

[0003] However, the traditional current steering DAC adopts the control architecture of thermometer code plus binary code, which is difficult to avoid the generation of glitch, thus affecting the performance of ramp voltage noise, integral nonlinearity, differential nonlinearity, etc. For high-precision DACs that only use pure thermometer code architecture, the traditional thermometer code generation module will lead to overly complex logic structure due to its universality. Summary of the invention

[0004] The technical problem solved by the present invention is: to overcome the shortcomings of the prior art and propose a high-speed and high-precision slope generation module for a CMOS image sensor, which can eliminate the glitch voltage at the output point, thereby improving the noise, differential nonlinearity, and integral nonlinearity performance of the overall readout circuit, and can reduce the slope deviation between different chips.

[0005] The solution of the present invention is:

[0006] A high-speed and high-precision slope generation module for CMOS image sensor, comprising 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload, a resistor Rdummy and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M Control signal output end, each output end is connected to the two input ends of the corresponding current steering unit; one output end of each current steering unit is connected to the resistor Rdummy and then grounded, and the other output end is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is respectively connected in parallel with the resistor Rload and the capacitor Cfilter; the step-shaped signal is filtered to generate a ramp.

[0007] In the above-mentioned high-speed and high-precision slope generation module for a CMOS image sensor, the current steering unit includes a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and an inverter INV;

[0008] Among them, the source of the MOS tube M1 is connected to the power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to the first bias voltage V1; the drain of the MOS tube M2 is respectively connected to the source of the MOS tube M3 and the source of the MOS tube M4; the gate of the MOS tube M2 is connected to the second bias voltage V2; the gate of the MOS tube M3 is connected to the control signal output end corresponding to the unidirectional ramp control module; the drain of the MOS tube M3 is connected to the ramp reference voltage output point Vout; the drain of the MOS tube M4 is connected to the resistor Rdummy; the gate of the MOS tube M4 is connected to the output end of the inverter INV; the input end of the inverter INV is connected to the control signal output end.

[0009] In the above-mentioned high-speed and high-precision slope generation module for CMOS image sensors, each control signal output end of the unidirectional slope control module outputs two control signals, which are respectively output to the gate of the MOS tube M3 in the corresponding current steering unit and the input end of the inverter INV.

[0010] A high-speed and high-precision slope generation module for CMOS image sensor, comprising 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M Control signal output end, each output end is connected to the two input ends of the corresponding current steering unit; the output end of each current steering unit is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is respectively connected in parallel with the resistor Rload and the capacitor Cfilter; the step-shaped signal is filtered to generate a ramp.

[0011] In the above-mentioned high-speed and high-precision slope generation module for a CMOS image sensor, the current steering unit includes a MOS tube M1, a MOS tube M2, and a MOS tube M3;

[0012] Among them, the source of the MOS tube M1 is connected to the power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to the first bias voltage V1; the drain of the MOS tube M2 is connected to the source of the MOS tube M3; the gate of the MOS tube M2 is connected to the second bias voltage V2; the drain of the MOS tube M3 is connected to the ramp reference voltage output point Vout; and the gate of the MOS tube M3 is connected to the control signal output end corresponding to the unidirectional ramp control module.

[0013] In the above-mentioned high-speed and high-precision slope generation module for CMOS image sensor, the unidirectional slope control module is a shift register; the unidirectional slope control module is composed of 2 N +2 M D flip-flops are connected in series.

[0014] In the above-mentioned high-speed and high-precision ramp generation module for CMOS image sensors, an input terminal D, a clock input terminal Clk, a reset control terminal RESET and an output terminal Q are provided on the D flip-flop; wherein the input terminal D is connected to an external control input signal; the output terminal Q is connected to the input terminal D of the next D flip-flop; the clock input terminal Clk is connected to an external clock signal; and the reset control terminal RESE is connected to a reset bus.

[0015] In the above-mentioned high-speed and high-precision ramp generation module for CMOS image sensors, the output terminal Q of each D-type flip-flop outputs a control signal to the corresponding current steering unit.

[0016] In the above-mentioned high-speed and high-precision slope generation module for CMOS image sensor, the upward slope control method of the slope generation module is:

[0017] Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 1;

[0018] During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the status flags of the control signal output terminals change from 1 to 0 in sequence; the ramp reference voltage output point Vout changes to an upward ramp;

[0019] The down ramp control method of the ramp generation module is:

[0020] Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 0;

[0021] During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the state flags of the control signal output terminals change from 0 to 1 in sequence; and the ramp reference voltage output point Vout changes to a downward ramp.

[0022] In the above-mentioned high-speed and high-precision slope generation module for CMOS image sensors, the slope of the upward slope or the downward slope remains unchanged, and the height of the upward slope or the downward slope is controlled by controlling the length of the time t1-t2.

[0023] The beneficial effects of the present invention compared with the prior art are:

[0024] (1) The present invention proposes a ramp voltage generating circuit suitable for high-speed, high-precision large-array CMOS image sensors. The structure can eliminate the glitch voltage at the output point, thereby improving the noise, differential nonlinearity, and integral nonlinearity performance of the overall readout circuit, and can reduce the slope deviation between different chips;

[0025] (2) The present invention provides two circuit implementations to achieve ramp voltage. The basic units use current steering and single-channel current source structures respectively. The control structure uses a shift register. For Nbit low-range ramp, the control signal is 2 N For (N+M)bit high range ramp, the control signal is 2 N +2 M indivual;

[0026] (3) The present invention adopts an output point filtering method, which can filter the output of the N-bit precision DAC architecture to generate a (N+1) to (N+4)-bit slope reference voltage, that is, the final slope accuracy can be improved by 1 to 4 bits compared to the DAC architecture accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the ramp circuit structure of the first current steering unit of the present invention;

[0028] Figure 2 is a schematic diagram of the ramp circuit structure of the second current steering unit of the present invention;

[0029] Figure 3 It is a schematic diagram of a one-way ramp control module of the present invention;

[0030] Figure 4 A schematic diagram of a control method for a ramp voltage generated by the present invention. DETAILED DESCRIPTION

[0031] The present invention will be further described below in conjunction with the embodiments.

[0032] The present invention provides a high-speed and high-precision slope generation module for a CMOS image sensor. The structure can eliminate the glitch voltage at the output point, thereby improving the noise, differential nonlinearity, and integral nonlinearity performance of the overall readout circuit, and can reduce the slope deviation between different chips.

[0033] High-speed and high-precision ramp generation module for CMOS image sensors, such as Figure 1 As shown, including 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload, a resistor Rdummy and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2N +2 M Control signal output end, each output end is connected to the two input ends of the corresponding current steering unit; one output end of each current steering unit is connected to the resistor Rdummy and then grounded, and the other output end is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is respectively connected in parallel with the resistor Rload and the capacitor Cfilter; the step-shaped signal is filtered to generate a ramp.

[0034] The current steering unit includes a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and an inverter INV; wherein the source of the MOS tube M1 is connected to a power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to a first bias voltage V1; the drain of the MOS tube M2 is respectively connected to the source of the MOS tube M3 and the source of the MOS tube M4; the gate of the MOS tube M2 is connected to a second bias voltage V2; the gate of the MOS tube M3 is connected to a control signal output end corresponding to a unidirectional ramp control module; the drain of the MOS tube M3 is connected to a ramp reference voltage output point Vout; the drain of the MOS tube M4 is connected to a resistor Rdummy; the gate of the MOS tube M4 is connected to an output end of the inverter INV; and the input end of the inverter INV is connected to the control signal output end.

[0035] Each control signal output terminal of the unidirectional ramp control module outputs two control signals, which are respectively output to the gate of the MOS tube M3 in the corresponding current steering unit and the input terminal of the inverter INV.

[0036] Another design method of high-speed and high-precision ramp generation module is as follows Figure 2 As shown, including 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M Control signal output end, each output end is connected to the two input ends of the corresponding current steering unit; the output end of each current steering unit is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is respectively connected in parallel with the resistor Rload and the capacitor Cfilter; the step-shaped signal is filtered to generate a ramp.

[0037] The current steering unit includes a MOS tube M1, a MOS tube M2, and a MOS tube M3; wherein the source of the MOS tube M1 is connected to a power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to a first bias voltage V1; the drain of the MOS tube M2 is connected to the source of the MOS tube M3; the gate of the MOS tube M2 is connected to a second bias voltage V2; the drain of the MOS tube M3 is connected to a ramp reference voltage output point Vout; and the gate of the MOS tube M3 is connected to a control signal output terminal corresponding to a unidirectional ramp control module.

[0038] The unidirectional ramp control modules in the above two circuit forms are shift registers. Figure 3 As shown, the one-way ramp control module consists of 2 N +2 M D flip-flops are connected in series.

[0039] The D flip-flop is provided with an input terminal D, a clock input terminal Clk, a reset control terminal RESET and an output terminal Q; wherein, the input terminal D is connected to an external control input signal; the output terminal Q is connected to the input terminal D of the next D flip-flop; the clock input terminal Clk is connected to an external clock signal; and the reset control terminal RESE is connected to a reset bus.

[0040] The output terminal Q of each D flip-flop outputs a control signal to the corresponding current steering unit.

[0041] like Figure 4 As shown, the upward slope control method of the ramp generation module is:

[0042] Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 1;

[0043] During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the status flags of the control signal output terminals change from 1 to 0 in sequence; the ramp reference voltage output point Vout changes to an upward ramp;

[0044] like Figure 4 As shown, the downward slope control method of the ramp generation module is:

[0045] Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 0;

[0046] During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the state flags of the control signal output terminals change from 0 to 1 in sequence; and the ramp reference voltage output point Vout changes to a downward ramp.

[0047] The slope of the upward ramp or the downward ramp remains unchanged, and the height of the upward ramp or the downward ramp is controlled by controlling the length of the time t1-t2.

[0048] like Figure 1 As shown, the binary control code and the thermometer code, whose control signals are connected to the current steering unit structure superior, and Inverse relationship.

[0049] For the (M+N)bit current steering architecture, it is composed of (2N+2M) current steering units. Taking the first group as an example, the unit current steering structure is composed of M1, M2, M3, and M4, where M1 and M2 are connected in series to form a common source and common gate structure, and M3 and M4 form an inverting switch pair. V1 and V2 are connected to the bias voltage. The two outputs of all current steering units are connected together to form two output nodes, and the two output nodes are connected to two resistors Rload and Rdummy respectively. Vout, which is the output point of the ramp reference voltage, is connected in parallel with the capacitor Cfilter, so that the step-shaped signal is filtered to generate a ramp.

[0050] The unidirectional ramp control module, whose control signals D1, D2, ... D(2N+2M) are respectively connected to the current steering unit structure At the same time, the control signals D1, D2, ... D(2N+2M) are also connected to the inverters INV1, INV2, ... INV(2 N +2 M ) input port; INV1, INV2, ... INV(2 N +2 M ) are connected to the output ports of superior; and Inverse relationship.

[0051] like Figure 2 As shown, for the (M+N)bit current source architecture, by high (2 N +2 M ) current source units. The unit current source structure takes the first group as an example, which is composed of M1, M2, and M3, wherein M1 and M2 are connected in series to form a common source and common gate structure, and M3 constitutes a switch. V1 and V2 are connected to the bias voltage. The outputs of all current source units are connected together to form an output node, and the output node is connected to a resistor Rload. Vout, which is the output point of the ramp reference voltage, is connected in parallel with a capacitor Cfilter, so that the step-shaped signal is filtered to generate a ramp.

[0052] One-way ramp control module, its control signals D1, D2, ... D(2 N +2 M) are connected to the current source unit structure superior.

[0053] like Figure 3 As shown, the shift register is composed of D flip-flop units connected in series, and the flip-flop at least includes an input terminal D, a clock input terminal Clk, a reset control terminal RESET, and an output terminal Q; wherein the input D of the first D flip-flop is connected to the external control input signal, the output Q of the first flip-flop is connected to the input terminal D of the second flip-flop, and the output Q of the second flip-flop is connected to the input terminal D of the third flip-flop, and in this way, the series connection of N+M D flip-flops is completed; the Clk of all flip-flops is connected to an input clock; the RESET of all flip-flops is connected to a bus; the output terminal Q of each flip-flop is the output D1, D2, ... D(2 N +2 M ).

[0054] like Figure 4 As shown, Vout is Figure 1 or Figure 2 The output Vout in the unidirectional ramp control module, the clock is the clock Clk input of the unidirectional ramp control module, the control input is the control input of the unidirectional ramp control module, and the reset is the reset of the unidirectional ramp control module. for Figure 1 or Figure 2 In

[0055] Figure 4 The instructions for (1) are as follows:

[0056] Before S11 and t1, the one-way ramp control module is in the reset state under the "reset" control.

[0057] Keep all 1s;

[0058] S12, t1-t2, the one-way ramp control module changes from reset to working state, According to the changes in Table 1, Remain unchanged; the output Vout shows an Nbit upward slope;

[0059] S13, t2-t3, the one-way ramp control module enters the reset state again under the "reset" control. Keep all 1s;

[0060] S14, t3-t5, the one-way ramp control module changes from reset to working state. Among them, t3-t4, According to the changes in Table 2, remain unchanged; among which t4-t5, remain unchanged, Changes as shown in Table 3. The output Vout shows an upward slope of (N+M) bits;

[0061] After S15 and t5, the one-way ramp control module enters the reset state again under the "reset" control. Keep all 1s.

[0062] Figure 4 The instructions for operation in (2) are as follows:

[0063] Before S21 and t1, the one-way ramp control module is in the reset state under the "reset" control.

[0064] Keep all 0;

[0065] S22, t1-t2, the one-way ramp control module changes from reset to working state, According to the changes in Table 4, Remain unchanged; the output Vout shows a downward slope of Nbit;

[0066] S23, t2-t3, the one-way ramp control module enters the reset state again under the "reset" control. Keep all 0;

[0067] S24, t3-t5, the one-way ramp control module changes from reset to working state. Among them, t3-t4, According to the changes in Table 5, remain unchanged; among which t4-t5, remain unchanged, Changes as shown in Table 6. The output Vout shows a (N+M) bit downward slope;

[0068] After S25 and t5, the one-way ramp control module enters the reset state again under the "reset" control. Keep all 0s.

[0069] Table 1 Figure 4 (1) The shift register output during time t1-t2

[0070]

[0071] Table 2 Figure 4(1) The shift register output during time t3-t4

[0072]

[0073] Table 3 Figure 4 (1) The shift register output during time t4-t5

[0074]

[0075] Table 4 Figure 4 (2) The shift register output during time t1-t2

[0076]

[0077] Table 5 Figure 4 (2) Shift register output during time t3-t4

[0078]

[0079] Table 6 Figure 4 (2) Shift register output during time t4-t5

[0080]

[0081] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A high-speed and high-precision slope generation module for a CMOS image sensor, characterized in that: Includes 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload, a resistor Rdummy and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M Control signal output end, each output end is connected to the two input ends of the corresponding current steering unit; one output end of each current steering unit is connected to the resistor Rdummy and then grounded, and the other output end is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is connected in parallel with the resistor Rload and the capacitor Cfilter respectively; the step-shaped signal is filtered to generate a ramp; The current steering unit includes a MOS tube M1, a MOS tube M2, a MOS tube M3, a MOS tube M4 and an inverter INV; Among them, the source of the MOS tube M1 is connected to the power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to the first bias voltage V1; the drain of the MOS tube M2 is respectively connected to the source of the MOS tube M3 and the source of the MOS tube M4; the gate of the MOS tube M2 is connected to the second bias voltage V2; the gate of the MOS tube M3 is connected to the control signal output end corresponding to the unidirectional ramp control module; the drain of the MOS tube M3 is connected to the ramp reference voltage output point Vout; the drain of the MOS tube M4 is connected to the resistor Rdummy; the gate of the MOS tube M4 is connected to the output end of the inverter INV; the input end of the inverter INV is connected to the control signal output end.

2. The high-speed and high-precision slope generation module for a CMOS image sensor according to claim 1, characterized in that: Each control signal output terminal of the unidirectional ramp control module outputs two control signals, which are respectively output to the gate of the MOS tube M3 in the corresponding current steering unit and the input terminal of the inverter INV.

3. A high-speed and high-precision slope generation module for a CMOS image sensor, characterized in that: Includes 2 N +2 M A current steering unit, a unidirectional ramp control module, a resistor Rload and a capacitor Cfilter; wherein the unidirectional ramp control module is provided with 2 N +2 M Control signal output end, each output end is connected to the two input ends of a corresponding current steering unit; the output end of each current steering unit is connected to the ramp reference voltage output point Vout; the ramp reference voltage output point Vout is connected in parallel with the resistor Rload and the capacitor Cfilter respectively; the step-shaped signal is filtered to generate a ramp; The current steering unit includes MOS tube M1, MOS tube M2, and MOS tube M3; Among them, the source of the MOS tube M1 is connected to the power supply; the drain of the MOS tube M1 is connected to the source of the MOS tube M2; the gate of the MOS tube M1 is connected to the first bias voltage V1; the drain of the MOS tube M2 is connected to the source of the MOS tube M3; the gate of the MOS tube M2 is connected to the second bias voltage V2; the drain of the MOS tube M3 is connected to the ramp reference voltage output point Vout; and the gate of the MOS tube M3 is connected to the control signal output end corresponding to the unidirectional ramp control module.

4. A high-speed and high-precision slope generation module for a CMOS image sensor according to any one of claims 1 or 3, characterized in that: The unidirectional ramp control module is a shift register; the unidirectional ramp control module consists of 2 N +2 M D flip-flops are connected in series.

5. The high-speed and high-precision slope generation module for a CMOS image sensor according to claim 4, characterized in that: The D flip-flop is provided with an input terminal D, a clock input terminal Clk, a reset control terminal RESET and an output terminal Q; wherein, the input terminal D is connected to an external control input signal; the output terminal Q is connected to the input terminal D of the next D flip-flop; the clock input terminal Clk is connected to an external clock signal; and the reset control terminal RESE is connected to a reset bus.

6. The high-speed and high-precision slope generation module for a CMOS image sensor according to claim 5, characterized in that: The output terminal Q of each D flip-flop outputs a control signal to the corresponding current steering unit.

7. A high-speed and high-precision slope generation module for a CMOS image sensor according to any one of claims 1 or 3, characterized in that: The upward ramp control method of the ramp generation module is: Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 1; During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the status flags of the control signal output terminals change from 1 to 0 in sequence; the ramp reference voltage output point Vout changes to an upward ramp; The down ramp control method of the ramp generation module is: Before time t1, the unidirectional ramp control module is in a reset state; at this time, the state flag of each control signal output terminal is 0; During the time period t1-t2, the unidirectional ramp control module changes from reset to working state; the state flags of the control signal output terminals change from 0 to 1 in sequence; and the ramp reference voltage output point Vout changes to a downward ramp.

8. The high-speed and high-precision slope generation module for a CMOS image sensor according to claim 7, characterized in that: The slope of the upward ramp or the downward ramp remains unchanged, and the height of the upward ramp or the downward ramp is controlled by controlling the length of the time t1-t2.

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