A multi-junction end-extended silicon carbide power diode and a method of manufacturing the same

Abstract

The application discloses a multi-junction end-extended silicon carbide power diode. + The power diode is in a central-symmetrical cylindrical structure and comprises, from bottom to top, an n + type SiC substrate layer, an i type SiC epitaxial layer, a p + type SiC layer arranged in a concentric circle shape at the outer periphery of the p + type SiC layer, a p type JTE layer arranged on the top surface of the p + type SiC layer, a nano permanent magnetic particle layer arranged on the top surface of the p type JTE layer, a plurality of concentric circular groove structures etched along the p type JTE layer, and a SiO2 filling layer filled in the groove structures, and a p type SiC doped area formed between adjacent groove structures. The application combines an external magnetic field formed by the nano permanent magnetic particle and an internal magnetic field formed by the p type SiC doped area on the basis of the JTE terminal structure, and introduces the groove structure into the p type JTE layer to form a regularly arranged p type SiC doped area, thereby effectively improving the withstand voltage of the power diode.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power diodes, in particular to a multi-junction end-extended silicon carbide power diode and a preparation method thereof. BACKGROUND

[0002] The development and breakthrough of semiconductor material growth and device preparation technology often triggers a new round of industrial revolution and the rise of emerging industries. In most power electronic systems, silicon (Si) based electronic devices play a crucial role, but as the times continue to advance, people's research on Si-based devices has been very mature, and Si-based electronic power devices have been unable to fully meet the requirements of anti-breakdown, high voltage resistance, etc. in the fields of biomedical imaging, new intelligent cars, etc. under the constraints of their physical properties. The third-generation wide-bandgap semiconductor materials represented by SiC and GaN emerged as the times required, among many third-generation wide-bandgap semiconductors, silicon carbide (SiC) material has been developing rapidly in recent years due to its excellent physical and chemical properties such as wide band gap, high thermal conductivity, and high critical breakdown field, and is very suitable for making high-voltage, high-power, and high-temperature-resistant semiconductor power devices. Among the many SiC semiconductor power devices, PiN power diodes are widely used due to their faster switching speed and stronger current handling capability.

[0003] Therefore, the importance of SiC-based PiN power diodes is self-evident, and the pros and cons of their device characteristics are related to the performance of the entire power electronic system. In some special fields, such as high-voltage transmission power grids, power semiconductor devices are required to withstand high voltage. However, in actual devices, the actual withstand voltage obtained by the device is much smaller than the theoretical voltage value when we design it, the main reason being that there is a certain curvature at the edge of the PN junction. This phenomenon of edge concentration of electric field due to the existence of junction curvature at the PN junction edge is called curvature effect. Local electric field concentration causes the electric field at this point to reach the critical electric field of the device, thereby causing the device to break down prematurely. Therefore, the curvature effect has a very large side effect on the actual withstand voltage of the device.

[0004] In SiC material, because the thermal diffusion coefficient of p-type impurities is relatively small, the p-type doping of SiC-based devices is generally formed by ion implantation, and the high-temperature annealing activation process required after ion implantation does not form an ideal cylindrical or spherical junction, the PN junction edge morphology is generally approximately rectangular, and its electric field concentration effect is more serious than that of an ideal cylindrical junction, and the theoretical breakdown voltage of the device will be smaller. In order to reduce this effect, people will mostly use edge termination technology to extend the device N -The depletion region in the drift layer is depleted, so that the actual breakdown voltage obtained by the device can be higher. So far, the edge termination technology mainly includes field plate (FP) technology, junction termination extension (JTE) technology and field limiting ring (FLR) technology. The introduction of PN junction modulation electric field distribution at the edge of the device is a common terminal technology scheme, that is, junction termination extension terminal (Junction Termination Extension, JTE). Since the last century, since the 1960s, after decades of development, the junction termination extension technology has been relatively mature, and the design of the terminal structure must follow the following principles: first, the terminal must be effective to maximize the breakdown voltage; Second, its manufacture should be manufacturable and repeatable; Third, the expensive implantation step should be reduced as much as possible; Fourth, the terminal should use the smallest semiconductor area, and the terminal length needs to be minimized. If the terminal length is too large, on the one hand, it will lead to excessive chip area, increasing the manufacturing cost, on the other hand, it will also affect the integration of the chip, leading to performance degradation. Compared with other technologies, the junction termination extension technology has higher terminal protection efficiency, simpler preparation process and smaller terminal layer area, and is the most mainstream edge termination technology at present. The essence of the junction termination extension technology is to implant Al ions in the N - The drift layer forms a P - Doped layer, and then weakens the electric field edge effect of the tail end of the main junction edge. The working principle of the technology is: when a reverse bias voltage is applied to the device, the holes in the JTE layer are completely depleted, and only the immovable ionized acceptor impurity charge (negative charge) is left in the JTE layer, which is equivalent to injecting negative charge into the N - The depletion region in the drift layer is depleted, so that the main junction edge depletion region expands outward, thereby increasing the curvature radius of the main junction edge, and reducing the P + The electric field edge effect of the main junction tail end. Although the junction termination extension (JTE) terminal can weaken the electric field edge effect of the tail end of the main junction edge to a certain extent, and then alleviate the strength of the device edge electric field to improve the breakdown voltage; Then, the curvature effect of the device edge is still one of the important obstacles for the improvement of the breakdown voltage of the device. In view of this, it is necessary to provide a power diode structure which can effectively improve the breakdown voltage. SUMMARY

[0005] The purpose of the present application is to provide a multi-junction terminal extension silicon carbide power diode and a preparation method thereof, and to improve the breakdown voltage of the power diode device.

[0006] Technical scheme: a multi-junction terminal extension silicon carbide power diode provided by the present application, the power diode is in a central symmetric cylindrical structure, comprising a n + Type SiC substrate layer, i type SiC epitaxial layer; the top surface of the i type SiC epitaxial layer is provided with a circular p+ p-type SiC layer, a p-type JTE layer with a concentric circular outer periphery expanding from the inside to the outside to form a ring structure, and a nano permanent magnetic particle layer covering the top surface of the p-type JTE layer; + p-type SiC layer, a p-type JTE layer with a concentric circular outer periphery expanding from the inside to the outside to form a ring structure, and a nano permanent magnetic particle layer covering the top surface of the p-type JTE layer;

[0007] wherein a plurality of concentric circular groove structures are etched along the p-type JTE layer, and the groove structures are filled with SiO2 filling layers, and the p-type SiC doped regions are formed between adjacent groove structures.

[0008] Preferably, the p-type SiC doped regions are formed by using (Al, Fe) co-doping as a base and the doping depth is uniform.

[0009] Preferably, the p-type SiC layer, the p-type JTE layer and the nano permanent magnetic particle layer are arranged in the order of the n+ type SiC substrate layer, the i-type SiC epitaxial layer, the p+ type SiC layer, the p-type SiC layer, the p-type JTE layer and the nano permanent magnetic particle layer. + Preferably, the thicknesses of the p-type SiC layer and the p-type JTE layer decrease and are less than the thickness of the i-type SiC epitaxial layer.

[0010] Preferably, the radial length of the p-type JTE layer is equal to the radial length of the nano permanent magnetic particle layer.

[0011] Preferably, the depth, the width and the spacing of the groove structures are equal.

[0012] Preferably, the radial thickness of the nano permanent magnetic particle layer is uniform.

[0013] Preferably, the p-type SiC layer, the p-type JTE layer and the nano permanent magnetic particle layer are arranged in the order of the n+ type SiC substrate layer, the i-type SiC epitaxial layer, the p+ type SiC layer, the p-type SiC layer, the p-type JTE layer and the nano permanent magnetic particle layer. + Preferably, a Ti / Au metal top electrode is led out on the top surface of the p-type SiC layer, and a Ti / Au metal bottom electrode is led out on the bottom surface of the n+ type SiC substrate layer. + Preferably, a Ti / Au metal top electrode is led out on the top surface of the p-type SiC layer, and a Ti / Au metal bottom electrode is led out on the bottom surface of the n+ type SiC substrate layer.

[0014] A preparation method of a silicon carbide power diode, comprising the following steps:

[0015] Step S1: the doping concentration of the n+ type SiC substrate layer is 5×10 18 cm -3 ~1×10 19 cm -3 ; an i-type SiC epitaxial layer is epitaxially grown on the top surface of the n+ type SiC substrate layer, and the doping concentration of the i-type SiC epitaxial layer ranges from 1×10 14 cm -3 ~9×10 16 cm -3 ; and the thickness of the i-type SiC epitaxial layer is 8~12 μm;

[0016] Step S2: a wafer-shaped p+ type SiC layer is formed on the top surface of the i-type SiC epitaxial layer by ion implantation, and the doping concentration of the p+ type SiC layer ranges from 8×1016 cm -3 ~2×10 17 cm -3 The injection depth is 1.0μm~1.2μm;

[0017] Step S3: A uniformly doped ring-shaped p-type JTE layer is formed on the outer circumference of the p+ type SiC layer by ion implantation, wherein the length L of the p-type JTE layer is... JTE It has a diameter of 30 μm, a thickness of 0.85 μm, and a doping concentration of 3.96 × 10⁻⁶. 17 cm -3 ~4.64×10 17 cm -3 ;

[0018] Step S4: Using an etching method, several trench structures are etched along the radial direction of the p-type JTE layer. The trench structures have a depth of 300 nm, a width of 130 nm, and a spacing of 10 nm between adjacent trench structures. SiO2 is then filled into the trench structures to form a SiO2 filling layer.

[0019] Step S5: Using (Al, Fe) as doping elements, a ferromagnetic p-type SiC doped region is formed in the gap between the trench structures through co-doping.

[0020] Step S6: Anneal the device after ion implantation;

[0021] Step S7: Cobalt ferrite is prepared as nano-permanent magnetic particles by sucrose-assisted combustion, and a nano-permanent magnetic particle layer is formed on the top surface of the p-type JTE layer;

[0022] Step S8: A Ti / Au metal top electrode is deposited on the surface of the p+ type SiC layer, and a Ti / Au metal bottom electrode is deposited on the bottom surface of the n+ type SiC substrate layer, forming the multi-junction extended silicon carbide power diode.

[0023] Preferably, the specific steps of step S5 are as follows:

[0024] Step S 51 Using high-purity silicon (99.999%), carbon (99.999%), graphite, aluminum (99.999%) and iron (99.999%) powders as raw materials, a (Al, Fe) co-doped SiC mixed powder is synthesized by solid-state reaction.

[0025] Step S 52 The mixed powder is loaded into a graphite crucible, which is then transferred to an induction furnace. The furnace is then evacuated (<10). −4 Torr) and filled with 0.07 MPa of high-purity argon gas (99.999%);

[0026] Step S 53 : The induction furnace is heated to 1300 DEG C and kept for 1 hour, then the temperature is increased to 1800 DEG C at a speed of 60 DEG C / h, and finally the temperature is increased to 2200 DEG C at a speed of 175 DEG C / h, kept for 5 hours, then the power is turned off, and the induction furnace is naturally cooled to room temperature; Step S 54 : The obtained powder is treated in a solution of HF and HNO3 with a concentration of 3:1 at 150 DEG C for 2 hours, and then washed with deionized water.

[0027] Preferably, the specific steps of step S7 are as follows:

[0028] Step S 71 : A 0.12 g / ml sucrose solution is added to the stoichiometric nitrate solution at a reaction temperature of 40-80 DEG C and a stirring speed of 60-100 r / min;

[0029] Step S 72 : The pH value of the obtained mixture is adjusted to 7 by using an ammonium solution with a concentration of 0.4 g / ml, and a neutral gel is formed; 71

[0030] Step S 73 : The gel obtained in step S 72 is evaporated to dryness at 100 DEG C, then the hot plate temperature is increased to 405 DEG C until the gel is completely combusted to prepare a cobalt ferrite powder, and the powder is stored in a desiccator without further heat treatment or calcination process.

[0031] Beneficial effects: Compared with the prior art, the present application has the following outstanding advantages:

[0032] 1. The external magnetic field composed of nano permanent magnetic particles and the internal magnetic field formed by the p-type SiC doped region are introduced on the basis of the JTE terminal structure of the silicon carbide diode, so that the internal and external magnetic fields of the power diode device are organically combined, and the withstand voltage of the power diode device is effectively improved;

[0033] 2. The trench structure is introduced in the p-type JTE layer, which not only does not increase the lateral length of the JTE layer, but also can be reduced to a certain extent, so as to reduce the preparation cost; if the trench structure is used alone, it is difficult to determine the optimal value; if the magnetic field is generated in the device by doping alone, the structure and process are relatively complex; the SiC doping is introduced in the trench structure to form the internal magnetic field, but the technical complexity and difficulty are not increased;

[0034] ​3, filling SiO2 in the trench structure to form SiO2 filling layer, can form regular arrangement in p-type JTE layer, form crystalloid structure, the structure can make atomic potential field influence each other, under the action of external electric field, the electron which can penetrate the potential barrier after accumulating energy in the crystal region can keep enough energy in the meantime of carrier migration, improve the breakdown voltage of the device; in addition, SiO2 can also act as the protective film of the device, so that the internal magnetic field of the device is not affected by the outside world;

[0035] 4, the power diode of the application internalizes the magnetic field, and the performance of the power device is greatly reduced by the influence of temperature, so that the device can work at high temperature of 900K. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 It is the longitudinal section structure schematic diagram of the silicon carbide power diode of the application along the radial direction;

[0037] Figure 2 It is the three-dimensional structure schematic diagram of the silicon carbide power diode of the application;

[0038] Figure 3 It is the local longitudinal section view of the trench structure in the diode in the application; Figure 2

[0039] Figure 4 It is the relationship between lnσ and the reciprocal of absolute temperature and the applied frequency of the nano permanent magnetic particle;

[0040] Figure 5 It is the XPS spectrum diagram of p-type SiC doped with Fe and Al;

[0041] Figure 6 It is the schematic diagram of JTE terminal structure with different trenches;

[0042] Figure 7 It is the relationship between the simulated breakdown voltage and JTE dose of JTE terminal structure with different trenches;

[0043] Figure 8 It is the transverse electric field distribution curve of the power diode in the application at different JTE doping amounts;

[0044] Figure 9 It is the transverse electric potential distribution curve of the power diode in the application at different JTE region lengths;

[0045] Figure 10 It is the breakdown voltage curve of the traditional diode and the diode in the application.

[0046] Reference signs:

[0047] 1, n + ​1. Type I SiC substrate layer; 2. Type II SiC epitaxial layer; 3. Type III SiC epitaxial layer; + 4. p-type SiC layer; 5. p-type JTE layer; 6. Nanoscale permanent magnetic particle layer; 7. Trench structure; 8. p-type SiC doped region; 9. Ti / Au metal top electrode; 10. Ti / Au metal bottom electrode; 11. SiO2 filling layer. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will be described in conjunction with the accompanying drawings of the embodiments of the present invention. Figures 1-10 The technical solutions of the embodiments of the present invention will be clearly and completely described herein. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0049] Example 1:

[0050] like Figures 1-3 As shown, this invention discloses a multi-junction extended silicon carbide power diode. The power diode has a centrally symmetrical cylindrical structure, and the device performance on both sides of the vertical central axis is completely consistent. Therefore, to avoid generating a large amount of computation during simulation, the symmetry of this SiC power diode is utilized to study the 1 / 2 device structure of the longitudinal central axis section, as shown below. Figure 1 As shown, although this device structure is only a part of the entire SiC power diode, the device performance of the two is completely identical. It is entirely feasible to use half of the longitudinal central axis cross-section of the entire device to replace the entire SiC power diode for research. Figure 1 As shown, the silicon carbide power diode includes n layers stacked sequentially from bottom to top. + Type I SiC substrate 1, Type II SiC epitaxial layer 2; the top surface of Type II SiC epitaxial layer 2 has a circular p-shaped core. + Type SiC layer 3, in p +The outer periphery of the p-type SiC layer 3 expands outward in a concentric circle shape to form a p-type JTE layer 4 in a ring structure. A plurality of concentric circular groove structures 6 are radially etched along the p-type JTE layer 4, the depth, width and spacing of the groove structures 6 are equal, and the groove structures 6 are filled with SiO2 to form a SiO2 filling layer 10. A p-type SiC doped region 7 is formed between adjacent groove structures 6, the p-type SiC doped region 7 is formed by doping with Al and Fe elements based on the p-type SiC, and the doping depth of each p-type SiC doped region 7 is consistent. A nano permanent magnetic particle layer 5 is covered on the top surface of the p-type JTE layer 4, the nano permanent magnetic particle layer 5 fully covers the ring-shaped p-type JTE layer 4, the radial length of the p-type JTE layer 4 is equal to the radial length of the nano permanent magnetic particle layer 5, and the radial thickness of the nano permanent magnetic particle layer 5 is consistent. The p + The thicknesses of the p-type SiC layer 3 and the p-type JTE layer 4 decrease, and are less than the thickness of the i-type SiC epitaxial layer 2. The Ti / Au metal top electrode 8 is led out on the top surface of the p-type SiC layer 3, and the Ti / Au metal bottom electrode 9 is led out on the bottom surface of the n + The Ti / Au metal top electrode 8 is led out on the top surface of the p-type SiC layer 3, and the Ti / Au metal bottom electrode 9 is led out on the bottom surface of the n + The Ti / Au metal top electrode 8 is led out on the top surface of the p-type SiC layer 3, and the Ti / Au metal bottom electrode 9 is led out on the bottom surface of the n

[0051] Embodiment 2:

[0052] A preparation method of a silicon carbide power diode, comprising the following steps:

[0053] Step S1: the doping concentration of the n+ type SiC substrate layer 1 is 5×10 18 cm -3 , and the thickness is 3 μm; the i-type SiC epitaxial layer 2 is epitaxially grown on the top surface of the n+ type SiC substrate layer 1, the doping concentration of the i-type SiC epitaxial layer 2 ranges from 1×10 14 cm -3 , and the thickness is 8 μm;

[0054] Step S2: the p+ type SiC layer 3 in a wafer shape is formed on the top surface of the i-type SiC epitaxial layer 2 by ion implantation, the doping concentration of the p+ type SiC layer 3 ranges from 8×10 16 cm -3 , and the implantation depth is 1.0 μm;

[0055] Step S3: the p-type JTE layer 4 in a ring structure with uniform doping is formed on the outer periphery of the p+ type SiC layer 3 by ion implantation, the length L JTE of the p-type JTE layer 4 is 30 μm, the thickness is 0.85 μm, and the doping concentration is 3.96×10 17cm -3 ;

[0056] Step S4: etching a plurality of groove structures 6 along the radial direction of the p-type JTE layer 4 by etching, the groove structures 6 having a depth of 300 nm, a width of 130 nm, and a pitch of 10 nm between adjacent groove structures, and filling SiO2 in the groove structures 6 to form a SiO2 filling layer 10;

[0057] Step S5: forming a p-type SiC doped region 7 with ferromagnetism in the gap between the groove structures 6 by co-doping with (Al, Fe) as the doping elements; the specific steps are as follows:

[0058] Step S 51 : using high-purity silicon (99.999%), carbon (99.999%, graphite), aluminum (99.999%), and iron (99.999%) powders as raw materials, and using solid-phase reaction synthesis to synthesize (Al, Fe) co-doped SiC mixed powder;

[0059] Step S 52 : loading the mixed powder into a graphite crucible, transferring the crucible to an induction furnace, vacuumizing the furnace (<10 −4 Torr) and filling 0.07 MPa of high-purity argon (99.999%);

[0060] Step S 53 : heating the induction furnace to 1300℃ and keeping for 1 hour, then increasing the temperature to 1800℃ at a speed of 60℃ / h, and finally increasing the temperature to 2200℃ at a speed of 175℃ / h, keeping for 5 hours, then turning off the power and naturally cooling the induction furnace to room temperature;

[0061] Step S 54 : the obtained powder is treated in a 3:1 concentration HF and HNO3 solution at 150℃ for 2 hours, and then rinsed with deionized water.

[0062] Step S6: annealing the device after completing ion implantation;

[0063] Step S7: preparing cobalt ferrite as nano permanent magnetic particles by sucrose-assisted combustion method, and forming a nano permanent magnetic particle layer 5 on the top surface of the p-type JTE layer 4; the specific steps are as follows:

[0064] Step S 71 : adding 0.12 g / ml sucrose solution to the stoichiometric nitrate solution under the conditions of a reaction temperature of 40℃ and a stirring speed of 60 r / min;

[0065] Step S 72 : adjusting the step S71 The pH value of the obtained mixture is 7, forming a neutral gel;

[0066] Step S 73 : The gel obtained in step S 72 is evaporated to dryness at 100°C, and then the hot plate temperature is increased to 405°C until the gel is completely burned to produce a cobalt ferrite powder, which is stored in a desiccator without further heat treatment or calcination process.

[0067] Step S8: Ti / Au metal top electrode 8 is formed on the surface of the p+ type SiC layer 3, and Ti / Au metal bottom electrode 9 is formed on the bottom surface of the n+ type SiC substrate layer 1, forming a multi-junction end-extended silicon carbide power diode.

[0068] Example 3:

[0069] A method for preparing a silicon carbide power diode, comprising the following steps:

[0070] Step S1: The n+ type SiC substrate layer 1 has a doping concentration of 1×10 19 cm -3 -2 and a thickness of 6μm; an i type SiC epitaxial layer 2 is epitaxially grown on the top surface of the n+ type SiC substrate layer 1, and the i type SiC epitaxial layer 2 has a doping concentration ranging from 9×10 16 cm -3 -4 and a thickness of 12μm;

[0071] Step S2: A p+ type SiC layer 3 in the form of a wafer is formed on the top surface of the i type SiC epitaxial layer 2 by ion implantation, and the p+ type SiC layer 3 has a doping concentration ranging from 2×10 17 cm -3 -2 and an implantation depth of 1.2μm;

[0072] Step S3: A p type JTE layer 4 in the form of a ring structure with uniform doping is formed on the outer circumference of the p+ type SiC layer 3 by ion implantation, and the p type JTE layer 4 has a length L JTE of 30μm, a thickness of 0.85μm, and a doping concentration of 4.64×10 17 cm -3 -3;

[0073] Step S4: A plurality of groove structures 6 are etched along the radial direction of the p type JTE layer 4 by etching, and the groove structures 6 have a depth of 300nm, a width of 130nm, and a spacing of 10nm between adjacent groove structures, and SiO2 is filled in the groove structures 6 to form a SiO2 filling layer 10;

[0074] Step S5: Forming a p-type SiC doped region 7 with ferromagnetic properties in the gap between the trench structures 6 by co-doping with (Al, Fe) as the doping element; the specific steps are as follows:

[0075] Step S 51 : Using high-purity silicon (99.999%), carbon (99.999%, graphite), aluminum (99.999%), and iron (99.999%) powders as raw materials, (Al, Fe) co-doped SiC mixed powder is synthesized by solid-phase reaction;

[0076] Step S 52 : The mixed powder is loaded into a graphite crucible, the crucible is transferred to an induction furnace, the furnace is vacuumed (<10 −4 Torr) and filled with 0.07 MPa of high-purity argon (99.999%);

[0077] Step S 53 : The induction furnace is heated to 1300°C and held for 1 hour, then the temperature is raised to 1800°C at a rate of 60°C / h, and finally the temperature is increased to 2200°C at a rate of 175°C / h, held for 5 hours, then the power is turned off and the induction furnace is naturally cooled to room temperature;

[0078] Step S 54 : The obtained powder is treated in a solution of HF and HNO3 with a concentration of 3:1 at 150°C for 2 hours, then rinsed with deionized water.

[0079] Step S6: Annealing the device after completing ion implantation;

[0080] Step S7: Cobalt ferrite is prepared as nano permanent magnetic particles by a sucrose-assisted combustion method, and a nano permanent magnetic particle layer 5 is formed on the top surface of the p-type JTE layer 4; the specific steps are as follows:

[0081] Step S 71 : Under the conditions of a reaction temperature of 80°C and a stirring speed of 100 r / min, 0.12 g / ml of sucrose solution is added to the stoichiometric nitrate solution;

[0082] Step S 72 : The pH value of the mixture obtained in step S 71 is adjusted to 7 with an ammonium solution with a concentration of 0.4 g / ml to form a neutral gel;

[0083] Step S 73 : The gel obtained in step S 72 is evaporated to dryness at 100°C, then the hot plate temperature is increased to 405°C until the gel is completely burned to prepare cobalt ferrite powder, and stored in a desiccator without further heat treatment or calcination process.

[0084] Step S8: Ti / Au metal top electrode 8 is formed on the surface of the p+ type SiC layer 3, and Ti / Au metal bottom electrode 9 is formed on the bottom surface of the n+ type SiC substrate layer 1, thereby forming a multi-junction end-extended silicon carbide power diode.

[0085] Embodiment 4:

[0086] A method for manufacturing a silicon carbide power diode comprises the following steps:

[0087] Step S1: The n+ type SiC substrate layer 1 has a doping concentration of 8×10 18 cm -3 and a thickness of 5 μm; and an i type SiC epitaxial layer 2 is grown on the top surface of the n+ type SiC substrate layer 1, the i type SiC epitaxial layer 2 has a doping concentration ranging from 5×10 15 cm -3 and a thickness of 10 μm;

[0088] Step S2: A p+ type SiC layer 3 in the shape of a wafer is formed on the top surface of the i type SiC epitaxial layer 2 by ion implantation, the p+ type SiC layer 3 has a doping concentration ranging from 14×10 16 cm -3 and an implantation depth of 1.1 μm;

[0089] Step S3: A p type JTE layer 4 in the shape of a ring structure with uniform doping is formed on the outer circumference of the p+ type SiC layer 3 by ion implantation, the p type JTE layer 4 has a length L JTE of 30 μm, a thickness of 0.85 μm, and a doping concentration of 4.3×10 17 cm -3 ;

[0090] Step S4: A plurality of groove structures 6 are etched along the radial direction of the p type JTE layer 4 by etching, the groove structures 6 have a depth of 300 nm, a width of 130 nm, and a spacing of 10 nm between adjacent groove structures, and SiO2 is filled in the groove structures 6 to form a SiO2 filling layer 10;

[0091] Step S5: A p type SiC doping region 7 with ferromagnetism is formed in the gap between the groove structures 6 by co-doping with (Al, Fe) as doping elements; the specific steps are as follows:

[0092] Step S 51 : High-purity silicon (99.999%), carbon (99.999%, graphite), aluminum (99.999%) and iron (99.999%) powders are used as raw materials to synthesize (Al, Fe) co-doped SiC mixed powder by solid-phase reaction;

[0093] Step S 52 : The mixed powder is loaded into a graphite crucible, the crucible is transferred into an induction furnace, the furnace is vacuumed (<10 −4 Torr) and filled with high-purity argon gas (99.999%) at 0.07 MPa;

[0094] Step S 53 : The induction furnace is heated to 1300℃ and kept for 1 hour, then the temperature is increased to 1800℃ at a speed of 60℃ / h, finally the temperature is increased to 2200℃ at a speed of 175℃ / h, kept for 5 hours, then the power is turned off, and the induction furnace is naturally cooled to room temperature;

[0095] Step S 54 : The obtained powder is treated in a solution of HF and HNO3 with a concentration of 3:1 at 150℃ for 2 hours, then rinsed with deionized water.

[0096] Step S6: Annealing treatment is performed on the device after the ion implantation is completed;

[0097] Step S7: Cobalt ferrite is prepared as nano permanent magnetic particles by a sucrose-assisted combustion method, and a nano permanent magnetic particle layer 5 is formed on the top surface of the p-type JTE layer 4; the specific steps are as follows:

[0098] Step S 71 : A 0.12g / ml sucrose solution is added to the stoichiometric nitrate solution under the condition that the reaction temperature is 60℃ and the stirring speed is 80r / min;

[0099] Step S 72 : An ammonium solution with a concentration of 0.4g / ml is used to adjust the pH value of the mixture obtained in step S 71 to 7, and a neutral gel is formed;

[0100] Step S 73 : The gel obtained in step S 72 is evaporated to dryness at 100℃, then the hot plate temperature is increased to 405℃ until the gel is completely combusted to prepare cobalt ferrite powder, and the cobalt ferrite powder is stored in a desiccator without further heat treatment or calcination process.

[0101] Step S8: A Ti / Au metal top electrode 8 is formed by evaporation on the surface of the p+ type SiC layer 3, and a Ti / Au metal bottom electrode 9 is formed by evaporation on the bottom surface of the n+ type SiC substrate layer 1, thereby forming a multi-junction end-extended silicon carbide power diode.

[0102] The working principle of the silicon carbide power diode of the present application is that:

[0103] SiC-based PiN power diode is based on PiN junction structure, which is composed of three layers of semiconductor structure, respectively, high-doped p + type SiC layer 3, n + type SiC substrate layer 1 and high-resistance intrinsic i-type SiC epitaxial layer 2 arranged between the two, when the reverse bias is applied to the SiC-based PiN power diode, the doping concentration of the drift region i-type SiC epitaxial layer 2 is several orders of magnitude lower than that of the p + type SiC layer 3, the depletion region of the diode will expand rapidly in the i-type SiC epitaxial layer 2 as the reverse bias increases, resulting in the p + type SiC layer 3 and the i-type SiC epitaxial layer 2 of the p + n - junction, the electric field is too concentrated, and the local electric field is too concentrated, so that the electric field at this point reaches the critical electric field value of the device quickly, causing the device to break down early. To solve the above problems and effectively alleviate the local electric field concentration effect, first, the JTE terminal structure is introduced in the present application, and the working mechanism of the JTE terminal structure is that when the reverse bias is applied to the device, the holes in the JTE layer are completely depleted, and only the immobile ionized acceptor impurity charge (negative charge) is left in the JTE layer. It is equivalent to injecting negative charges into the depletion region in the N - drift layer, so that the depletion region at the edge of the main junction region expands outward, thereby increasing the curvature radius of the edge of the main junction region and reducing the electric field concentration effect at the end of the main junction. +

[0104] On the basis of introducing the JTE terminal structure, a magnetic field composed of nano permanent magnetic particles and SiC magnetic doping structure are introduced to realize the organic combination of the magnetic field inside and outside the device. In the present application, the magnetic field is introduced, the magnetic field adopts nano permanent magnetic particles, the nano permanent magnetic particles are covered on the oxide layer at the edge of the main junction to form a nano permanent magnetic particle layer; the purpose is to control the electric field and current in the p-type JTE space charge layer by the magnetic field, that is, the voltage breakdown point, the introduction of the magnetic field makes the electron motion direction bend, further changes the current direction generated by the electron motion, so that it is no longer gathered at the edge of the JTE layer, so that the edge of the power diode device no longer appears large current, thereby improving the breakdown resistance of the power diode. The traditional external magnet requires high magnetic field, which is difficult to realize, and the device needs to be assisted by external magnetic field when used, which is more troublesome; and the traditional permanent magnet also has a magnetic field effect on the JTE layer of the device, but since it has the same magnetism for each part of the device, the position of the maximum breakdown point will change, but it will still appear, which will still affect the withstand voltage of the device. In the present application, the nano permanent magnetic particle layer made of nano permanent magnetic particles has small volume, and the demand for electromagnetic field is smaller than that of permanent magnet, which is easier to realize, and can make the magnetic field distribution uniform everywhere. ​

[0105] But the magnetic induction strength of the nanometer permanent magnetic particles will be weakened, such as Figure 4 The lnσ of the nanometer permanent magnetic particles versus the reciprocal of the absolute temperature and the applied frequency is shown in the figure. Figure 4 It can be seen that the existence of the electron exchange inertia will cause the polarization relaxation, which is specifically manifested in that the dielectric value changes with the temperature, all the samples show the semiconductor behavior, in which the conductivity linearly increases with the temperature, from room temperature to about 380K, the initial obvious decrease of the conductivity value is caused by the desorption of the water adsorbed by the ferrite powder, and the water is an electron donor, with the increase of the temperature, the removal of the water will reduce the number of the carriers, thereby reducing the conductivity. The entire cobalt ferrite prepared by the sucrose method has a relaxation phenomenon, and the maximum high-temperature relaxation appears at about 700K, at which the cobalt ferrite synthesized by the sucrose method has the highest magnetization.

[0106] The use of the nanometer magnetic particles will cause the magnetic reduction, in order to solve the problem of the magnetic reduction, the application introduces the SiC magnetic doping technology, selects Al and transition metal (TMs), such as Fe element as the co-doped atoms to synthesize (Al, TM) co-doped to form the p-type SiC region. The X-ray diffraction and Raman analysis show that a series of single-phase co-doped 4H-SiC samples are obtained, and no Fe3Si and other types of SiC polytype and other impurity phases are found. The magnetic performance measurement results show that the Al and Fe element co-doping changes the original glass ferromagnetic (FM) characteristics in the Al-doped SiC, and a stable room-temperature FM order is generated with the increase of the Fe content, which gradually dominates the (Al, Fe) co-doped 4H-SiC. Figure 5 For x=0.011 (C3), 0.017 (C4) Si 0.9925− x Al 0.0075 Fe x The XPS spectra of C are filled with rectangles and circles respectively. The charge displacement spectrum is corrected by using the indefinite c1s photoelectron signal of 285eV, and the signal-to-noise ratio gradually increases with the increase of the Fe content, and the Fe 2+ 2p 3 / 2 and Fe 3+ 2p 3 / 2 at 709.3eV and 710.9eV (indicated by arrows) respectively, which reveals that Fe 2+ and Fe 3+ coexist in the (Al, Fe) co-doped SiC region. In addition, the XPS analysis can also prove the absence of the Fe metal cluster, because the Fe 2+ 2p 3 / 2 position of the Fe metal cluster is higher than the Fe 3+ 2p 3 / 2The above results strongly suggest that Fe atoms are successfully incorporated into the SiC lattice without forming any detectable impurity phase. The contribution of Al element to the magnetic properties of (Al, Fe) co-doped 4H-SiC can be neglected, and the magnetic origin is attributed to the induction of Fe doping. The main role of Al element is to stabilize the co-doped crystal structure to 4H crystal phase. In the present invention, the co-doping technique is used to introduce internal magnetic field on the basis of the p-type JTE layer, and the external magnetic field formed by the nano permanent magnetic particle layer forms an organic combination of internal and external magnetic fields, which strengthens the magnetism of the device, not only increases the breakdown voltage of the device, but more importantly, internalizes the magnetic field of the device, thereby improving the performance of the device and reducing the production cost.

[0107] In another aspect, the present invention introduces a trench technology, and a plurality of concentric circular trench structures 6 are etched along the p-type JTE layer 4. The trench structure 6 has a controllable depth, width and spacing between adjacent trench structures. In terms of the chip area occupied, the proposed terminal structure has cost-effectiveness. The main purpose of introducing the trench structure 6 is to relieve the electric field at the edge of the device, which can effectively alleviate the defect of magnetic reduction caused by the introduction of nano permanent magnetic particles, thereby maximizing the breakdown voltage. Figure 6 The JTE terminal structure with different trenches is shown in the figure, Figure 7 The relationship between the simulated breakdown voltage and the JTE dose of the JTE terminal structure with different trenches is shown in the figure. Figure 6 And 7 It can be seen that as the trench depth increases, the process window gradually widens, and the V BD peak gradually decreases. When the trench depth is 300 nm, the V BD peak of all three regions appears at the same dose, resulting in a large and narrow peak observed in Figure 7 ; as the trench increases, the peak voltage shifts to high dose, the process window widens, and the maximum voltage decreases; the trench with a depth of 500 nm is an extreme case, and there is a significant breakdown voltage drop in the center of the process window, which results in two narrow peak values at about 12 kV. Therefore, the JTE structure with a trench depth of 400 nm provides the best compromise between V BD and the process window. However, by good experimental control of the injection process, the JTE structure with a trench depth of 300 nm has better performance, and Figure 7It can be seen that the JTE structure with a groove depth of 300 nm provides the highest breakdown voltage, up to 96% of the maximum breakdown voltage, and when the groove depth d increases to 400 nm, the process window is increased from ±29% at 12 kV to ±37%, and the peak breakdown voltage is reduced to 93%. The SiO2 filled layer 10 can be formed by filling SiO2 in the trench structure 6, and a regular arrangement can be formed in the p-type JTE layer 4 to form a crystal-like structure. The atomic potential field interacts with each other, and under the action of an external electric field, electrons accumulated in the crystal region can penetrate the potential barrier while retaining sufficient energy, thereby improving the breakdown voltage of the device. Since the size of the dopant is less than 10 nm and the band gap is extremely wide, the conductivity of the dopant is lower than that of the JTE substrate, SiO2 has a very high conductivity barrier, and the atomic nucleus has a strong binding ability, which appears as a deep trap to the outside. When the carrier passes around SiO2, low-energy electrons are captured by the trap, the carrier concentration is reduced, and the breakdown voltage is improved. At the same time, SiO2 can also act as a protective film for the device, so that the internal magnetic field of the device is not affected by the outside. The structure reduces the manufacturing cost of the device and the occupied area of the JTE layer, and maximizes the breakdown voltage value of the device.

[0108] Figure 8 For the lateral electric field distribution curve of the diode under different JTE doping concentrations, it can be seen that when the concentration of the p-type JTE layer is increased to 4.64×10 17 cm -3 , the peak electric field size at the end of the JTE is basically the same as that at the end of the P + main junction, and the diode has the highest voltage resistance. Figure 9 For the thickness of the JTE layer of 0.85μm, the concentration of 4.64×10 17 cm -3 , the lateral electric potential distribution in the P + type SiC layer and the JTE layer of the power diode avalanche breakdown along the horizontal direction can be clearly seen. When the length of the JTE layer is too short (L JTE =15μm), the voltage resistance of the power diode is relatively poor, mainly because the lateral depletion layer in the PN junction formed by the P + type SiC layer and the JTE layer and the lateral depletion layer in the PN junction formed by the JTE layer and the N - drift layer overlap together, which reduces the area of the depletion layer and reduces the voltage resistance of the device; when the length of the JTE layer L JTE =30μm, the voltage resistance of the power diode reaches the best, which is mainly because the lateral depletion layer in the PN junction formed by the P + region and the JTE layer and the lateral depletion layer in the PN junction formed by the JTE layer and the N -The lateral depletion layers of the PN junctions of the drift layer are connected together to reach the punch-through condition (PT), the area of the depletion layer in the device reaches the maximum, and the breakdown voltage reaches the maximum; when the length of the JTE layer is further increased (L JTE =65μm), the breakdown voltage of the power diode device will no longer change significantly.

[0109] The power diode device of the present application uses nano permanent magnetic particles and SiC doping to realize the integration of the internal and external magnetic fields of the device, and introduces a groove structure to relieve the electric field at the edge of the device, realizes the internalization of the magnetic field of the power diode device, effectively controls the voltage breakdown point of the device, increases the breakdown voltage, and maximizes the breakdown voltage. Figure 10 It can be seen that the maximum breakdown voltage of the power diode of the present application is increased by about 30%, effectively increasing the maximum breakdown voltage of the device.

[0110] The above is the preferred embodiment of the present application, and it should be pointed out that for ordinary skilled persons in the art, a number of improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered within the scope of protection of the present application.

Claims

1. A multi-junction, extended-drain silicon carbide power diode, characterized by, The power diode is along the central symmetry cylindrical structure, including from bottom to top sequentially stacked n + Type SiC substrate layer (1), i type SiC epitaxial layer (2); The i type SiC epitaxial layer (2) top surface center is equipped with the p + Type SiC layer (3), the outer periphery of the p + Type SiC layer (3) is formed in the form of ring structure by the p type JTE layer (4) from inside to outside expanding in the concentric circle shape, and the top surface of the p type JTE layer (4) is covered with nano permanent magnetic particle layer (5); Wherein, a plurality of concentric circular groove structures (6) are etched along the radial direction of the p-type JTE layer (4), and the groove structures (6) are filled with SiO2 filling layer (10), and the p-type SiC doped region (7) is formed between adjacent groove structures (6), the p-type SiC doped region (7) is based on p-type SiC and formed by (Al, Fe) co-doping, and the doping depth is consistent.

2. The multi-junction, trenched, silicon carbide power diode of claim 1, wherein, The p + The thickness of the p-type SiC layer (3) and the p-type JTE layer (4) decreases and is less than the thickness of the i-type SiC epitaxial layer (2).

3. The multi-junction trenched silicon carbide power diode of claim 1, wherein, The radial length of the p-type JTE layer (4) is equal to the radial length of the nano permanent magnetic particle layer (5).

4. The multi-junction trenched silicon carbide power diode of claim 1, wherein, The depth, width and spacing of the groove structure (6) are equal.

5. The multi-junction trenched silicon carbide power diode of claim 1, wherein, The nano permanent magnetic particle layer (5) has a consistent radial thickness.

6. The multi-junction trenched silicon carbide power diode of claim 1, wherein, A Ti / Au metal top electrode (8) is led out on the top surface of the p + type SiC layer (3). A Ti / Au metal bottom electrode (9) is led out on the bottom surface of the n + type SiC substrate layer (1).

7. A method of producing a silicon carbide power diode as claimed in any one of claims 1 to 6, characterized in that The steps include: Step S1: the n + The doping concentration of the n-type SiC substrate layer (1) is 5×10 18 cm -3 ~1×10 19 cm -3 , and the thickness is 3~6 μm; the i-type SiC epitaxial layer (2) is grown on the top surface of the n + -type SiC substrate layer (1), and the doping concentration of the i-type SiC epitaxial layer (2) ranges from 1×10 14 cm -3 ~9×10 16 cm -3 , and the thickness is 8~12 μm; Step S2: forming a wafer-shaped p+ type SiC layer (3) on the center of the top surface of the i type SiC epitaxial layer (2) by ion implantation, wherein the p + The doping concentration of the p+ type SiC layer (3) ranges from 8×10 16 cm -3 ~2×10 17 cm -3 , and the implantation depth is 1.0 μm~1.2 μm; Step S3: In the p + A uniformly doped ring-shaped p-type JTE layer (4) is formed on the outer circumference of the SiC layer (3) by ion implantation, wherein the length L of the p-type JTE layer (4) is L. JTE It has a diameter of 30 μm, a thickness of 0.85 μm, and a doping concentration of 3.96 × 10⁻⁶. 17 cm -3 ~4.64×10 17 cm -3 ; Step S4: a plurality of groove structures (6) are etched along the radial direction of the p-type JTE layer (4) by etching method, the depth of the groove structure (6) is 300 nm, the width is 130 nm, the spacing between adjacent groove structures is 10 nm, and the groove structure (6) is filled with SiO2 to form SiO2 filling layer (10); Step S5: a p-type SiC doped region (7) with ferromagnetic property is formed in the gap between the groove structures (6) by co-doping with (Al, Fe) as doping elements; Step S6: after ion implantation, the device is annealed; Step S7: cobalt ferrite is prepared as nano permanent magnetic particles by sucrose assisted combustion method, and a nano permanent magnetic particle layer (5) is formed on the top surface of the p-type JTE layer (4); Step S8: Ti / Au metal top electrode (8) is formed on the surface of the p-type SiC layer (3) by evaporation. + Step S9: Ti / Au metal bottom electrode (9) is formed on the bottom surface of the n-type SiC substrate layer (1) by evaporation. + Step S10: The multi-junction extended silicon carbide power diode is formed.

8. The method of producing a silicon carbide power diode according to claim 7, wherein The specific steps of step S5 are as follows: Step S 51 : (Al, Fe) co-doped SiC mixed powder was synthesized by solid phase reaction using high purity silicon (99.999%), carbon (99.999%, graphite), aluminum (99.999%) and iron (99.999%) powders as raw materials; Step S 52 : The mixed powder was loaded into a graphite crucible, the crucible was transferred into an induction furnace, the furnace was vacuumed (<10 − 4 Torr) and filled with high-purity argon gas (99.999%) at 0.07 MPa; Step S 53 : The induction furnace is heated to 1300 °C and kept for 1 hour, then the temperature is increased to 1800 °C at a speed of 60 °C / h, finally the temperature is increased to 2200 °C at a speed of 175 °C / h, kept for 5 hours, then the power is turned off, and the induction furnace is naturally cooled to room temperature; Step S 54 The obtained powder was treated in a solution of HF and HNO3 at a concentration of 3:1 at 150°C for 2 hours and then rinsed with deionized water.

9. The method of producing a silicon carbide power diode according to claim 7, wherein The specific steps of step S7 are as follows: Step S 71 : 0.12 g / ml sucrose solution was added to the stoichiometric nitrate solution at a reaction temperature of 40-80 °C and a stirring speed of 60-100 r / min. Step S 72 : The pH of the mixture obtained in step S 71 is adjusted to 7 with an ammonium solution at a concentration of 0.4 g / ml, forming a neutral gel; Step S 73 : The gel obtained in step S 72 : The gel obtained in step S is evaporated to dryness at 100°C, then the hot plate temperature is increased to 405°C until the gel is completely burned to produce cobalt ferrite powder and stored in a desiccator without further heat treatment or calcination process.

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