LED epitaxial structure and preparation method thereof

Abstract

The application provides an LED epitaxial structure and a preparation method thereof. The LED epitaxial structure comprises, from bottom to top, a bottom buffer layer on a substrate, an etching stop layer, a first-type semiconductor layer, an active layer and a second-type semiconductor layer. The second-type semiconductor layer comprises, from bottom to top, an electron blocking layer, a second waveguide layer, a second-type confinement layer, a transition layer, a second-type window layer and a second-type ohmic contact layer. The electron blocking layer is a periodic structure formed by alternately growing a first blocking layer and a second blocking layer. The Al component of the first blocking layer in each period is higher than that of the first blocking layer in the previous period, and the Al component of the second blocking layer in each period is lower than that of the second blocking layer in the previous period. The electron blocking layer designed in the application is in a ladder type, which is beneficial to electron confinement and hole injection, thereby increasing the radiation recombination rate in the active layer and improving the light-emitting efficiency and brightness of the LED.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an LED epitaxial structure and its fabrication method. Background Technology

[0002] A light-emitting diode (LED) is an electronic device that directly converts electrical energy into light energy by generating photons through the radiative recombination of electrons in the conduction band and holes in the valence band of a semiconductor material. Compared with traditional incandescent and fluorescent lamps, LEDs have the advantages of high efficiency, energy saving, environmental friendliness, and long lifespan. They have played an important role in energy conservation, emission reduction, and green development, and are widely recognized as the next generation of green lighting sources for the 21st century.

[0003] The quantum efficiency of a light-emitting diode (LED) is determined by two factors: external quantum efficiency and internal quantum efficiency. Internal quantum efficiency refers to the efficiency with which charge carriers injected from the electrodes recombine within the active layer (light-emitting region) to generate photons. The number of charge carriers in the light-emitting region and the probability of electron-hole recombination determine the internal quantum efficiency of the LED. Although the effective mass of an electron is much smaller than that of a hole, its mobility is much greater. Some electrons not confined within the active layer will recombine outside the active layer, generating stray light. This reduces the number of charge carriers within the active layer and lowers the radiative recombination rate of electrons and holes within the active layer, thus affecting the internal quantum efficiency of the LED.

[0004] Therefore, it is necessary to provide an LED epitaxial structure and its preparation method to increase the number of electrons entering the active layer, thereby increasing the radiative recombination rate of electrons and holes and improving its luminous efficiency and brightness. Summary of the Invention

[0005] The purpose of this invention is to provide an LED epitaxial structure and its preparation method to improve the luminous efficiency and brightness of LEDs.

[0006] To achieve the above and other related objectives, the present invention provides an LED epitaxial structure comprising, from bottom to top: a bottom buffer layer, an etching stop layer, a first type semiconductor layer, an active layer, and a second type semiconductor layer on a substrate. The second type semiconductor layer comprises, from bottom to top: an electron blocking layer, a second waveguide layer, a second type confinement layer, a transition layer, a second type window layer, and a second type ohmic contact layer. The electron blocking layer is a periodic structure formed by alternating growth of the first blocking layer and the second blocking layer, wherein the Al composition of the first blocking layer in each period is higher than that of the first blocking layer in the previous period, and the Al composition of the second blocking layer in each period is lower than that of the second blocking layer in the previous period.

[0007] Optionally, in the LED epitaxial structure, the bandgap of the first blocking layer is greater than that of the second blocking layer.

[0008] Optionally, in the LED epitaxial structure, the material of the first blocking layer includes (Al m Ga 1-m ) 0.5 In 0.5 P, and the material of the second blocking layer includes (Al n Ga 1-n ) 0.5 In 0.5 P, where 0 < m < 1, 0 < n < 1, and n < m.

[0009] Optionally, in the LED epitaxial structure, the first-type semiconductor layer sequentially includes, from bottom to top: a first-type window layer, a first-type confinement layer, a first waveguide layer, and a pre-well layer, and the pre-well layer is a superlattice structure.

[0010] Optionally, in the LED epitaxial structure, the pre-well layer is a periodic structure formed by alternately growing a first high-Al composition layer, a low-Al composition layer, and a second high-Al composition layer, and the Al compositions of the first high-Al composition layer and the second high-Al composition layer are both greater than that of the low-Al composition layer.

[0011] Optionally, in the LED epitaxial structure, the material of the first high-Al composition layer includes (Al x Ga 1-x ) 0.5 In 0.5 P, the material of the low-Al composition layer includes (Al y Ga 1-y ) 0.5 In 0.5 P, and the material of the second high-Al composition layer includes (Al x Ga 1-x ) 0.5 In 0.5 P, where 0 < x < 1, 0 < y < 1, and y < x.

[0012] Optionally, in the LED epitaxial structure, the growth mode of the pre-well layer is a graded mode or a non-graded mode.

[0013] Optionally, in the LED epitaxial structure, the graded growth mode includes: in each period of the pre-well layer, (Al x Ga 1-x ) 0.5 In 0.5 P is gradually changed to (Al y Ga 1-y) 0.5 In 0.5 P, then from (Al) y Ga 1-y ) 0.5 In 0.5 P gradually changes to (Al) x Ga 1-x ) 0.5 In 0.5 P.

[0014] Optionally, in the LED epitaxial structure, the thickness of the low-Al composition layer is 20nm to 30nm; the thickness of the first high-Al composition layer is 10nm to 20nm; and the thickness of the second high-Al composition layer is 10nm to 20nm.

[0015] Optionally, in the LED epitaxial structure, the active layer is a periodic structure formed by alternating growth of a potential well layer and a potential barrier layer, wherein the material of the potential well layer includes (Al) p Ga 1-p ) 0.5 In 0.5 P, the material of the barrier layer includes (Al) q Ga 1-q ) 0.5 In 0.5 P, and 0 <p≤0.5,0.5≤q<1。

[0016] Optionally, in the LED epitaxial structure, the Al composition of the low Al composition layer is greater than the Al composition of the potential well layer, and the Al composition of the first high Al composition layer is equal to the Al composition of the second high Al composition layer and the Al composition of the barrier layer.

[0017] Optionally, in the LED epitaxial structure, the thickness of the first high-Al composition layer is equal to the thickness of the second high-Al composition layer, which is equal to the thickness of the barrier layer; the thickness of the low-Al composition layer is greater than the thickness of the well layer.

[0018] Optionally, in the LED epitaxial structure, the thickness of the potential well layer is 5nm to 10nm; and the thickness of the potential barrier layer is 20nm to 30nm.

[0019] Optionally, in the LED epitaxial structure, the Al composition of the first blocking layer in the first period of the electron blocking layer is greater than or equal to the Al composition of the barrier layer in the active layer, and the Al composition of the second blocking layer in the last period of the electron blocking layer is greater than or equal to the Al composition of the well layer in the active layer.

[0020] Optionally, in the LED epitaxial structure, the first-type semiconductor layer further includes a first-type ohmic contact layer and a first-type buffer layer that are stacked in sequence, and the first-type ohmic contact layer and the first-type buffer layer are located between the etch stop layer and the first-type window layer.

[0021] Optionally, in the LED epitaxial structure, the first-type semiconductor layer is an N-type semiconductor layer, and the second-type semiconductor layer is a P-type semiconductor layer.

[0022] To achieve the above object and other related objects, the present invention also provides a method for preparing an LED epitaxial structure, including the following steps:

[0023] Provide a substrate;

[0024] Grow a bottom buffer layer, an etch stop layer, a first-type semiconductor layer, an active layer, and a second-type semiconductor layer on the substrate in sequence. The second-type semiconductor layer includes, from bottom to top: an electron blocking layer, a second waveguide layer, a second-type confinement layer, a transition layer, a second-type window layer, and a second-type ohmic contact layer. The electron blocking layer is a periodic structure formed by alternately growing a first blocking layer and a second blocking layer, and the Al component of the first blocking layer in each period is higher than the Al component of the first blocking layer in the previous period, and the Al component of the second blocking layer in each period is lower than the Al component of the second blocking layer in the previous period.

[0025] Optionally, in the method for preparing the LED epitaxial structure, the bandgap of the first blocking layer is greater than the bandgap of the second blocking layer.

[0026] Optionally, in the method for preparing the LED epitaxial structure, the material of the first blocking layer includes (Al m Ga 1-m ) 0.5 In 0.5 P, the material of the second blocking layer includes (Al n Ga 1-n ) 0.5 In 0.5 P, where 0 < m < 1, 0 < n < 1, and n < m.

[0027] Optionally, in the method for preparing the LED epitaxial structure, the first-type semiconductor layer includes, from bottom to top: a first-type window layer, a first-type confinement layer, a first waveguide layer, and a pre-well layer, and the pre-well layer is a superlattice structure.

[0028] Optionally, in the method for preparing the LED epitaxial structure, the pre-trap layer is a periodic structure formed by alternately growing a first high-Al composition layer, a low-Al composition layer, and a second high-Al composition layer, and the Al compositions of the first high-Al composition layer and the second high-Al composition layer are both greater than the Al composition of the low-Al composition layer.

[0029] Optionally, in the method for preparing the LED epitaxial structure, the material of the first high-Al composition layer includes (Al x Ga 1-x ) 0.5 In 0.5 P, the material of the low-Al composition layer includes (Al y Ga 1-y ) 0.5 In 0.5 P, the material of the second high-Al composition layer includes (Al x Ga 1-x ) 0.5 In 0.5 P, where 0 < x < 1, 0 < y < 1, and y < x.

[0030] Optionally, in the method for preparing the LED epitaxial structure, the growth mode of the pre-trap layer is a gradient mode or a non-gradient mode.

[0031] Optionally, in the method for preparing the LED epitaxial structure, the gradient growth mode includes: in each period of the pre-trap layer, (Al x Ga 1-x ) 0.5 In 0.5 P is gradually changed to (Al y Ga 1-y ) 0.5 In 0.5 P, and then (Al y Ga 1-y ) 0.5 In 0.5 P is gradually changed to (Al x Ga 1-x ) 0.5 In 0.5 P.

[0032] Optionally, in the method for preparing the LED epitaxial structure, the thickness of the low-Al composition layer is 20 nm to 30 nm; the thickness of the first high-Al composition layer is 10 nm to 20 nm; the thickness of the second high-Al composition layer is 10 nm to 20 nm.

[0033] Optionally, in the method for fabricating the LED epitaxial structure, the active layer is a periodic structure formed by alternating growth of a potential well layer and a potential barrier layer, wherein the material of the potential well layer includes (Al) p Ga 1-p ) 0.5 In 0.5 P, the material of the barrier layer includes (Al) q Ga 1-q ) 0.5 In 0.5 P, and 0 <p≤0.5,0.5≤q<1。

[0034] Optionally, in the method for fabricating the LED epitaxial structure, the Al composition of the low Al composition layer is greater than the Al composition of the potential well layer, and the Al composition of the first high Al composition layer is equal to the Al composition of the second high Al composition layer and equal to the Al composition of the barrier layer.

[0035] Optionally, in the method for fabricating the LED epitaxial structure, the thickness of the first high-Al composition layer is equal to the thickness of the second high-Al composition layer, which is equal to the thickness of the barrier layer; the thickness of the low-Al composition layer is greater than the thickness of the well layer.

[0036] Optionally, in the method for fabricating the LED epitaxial structure, the thickness of the potential well layer is 5 nm to 10 nm; and the thickness of the potential barrier layer is 20 nm to 30 nm.

[0037] Optionally, in the method for fabricating the LED epitaxial structure, the Al composition of the first blocking layer in the first period of the electron blocking layer is greater than or equal to the Al composition of the barrier layer in the active layer, and the Al composition of the second blocking layer in the last period of the electron blocking layer is greater than or equal to the Al composition of the well layer in the active layer.

[0038] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0039] This invention incorporates an electron blocking layer between the active layer and the second waveguide layer. This electron blocking layer is a periodic structure formed by alternating growth of a first blocking layer and a second blocking layer. In each cycle, the Al composition of the first blocking layer is higher than that of the previous cycle, and the Al composition of the second blocking layer is lower than that of the previous cycle. This stepped electron blocking layer provides a higher effective barrier height for electrons, which is more conducive to confining electrons within the active layer, thus better preventing electron overflow and avoiding leakage current to the device. Simultaneously, it provides a lower effective barrier height for holes, which is more conducive to hole injection into the active layer, increasing the radiative recombination rate within the active layer and thereby improving the luminous efficiency and brightness of the LED.

[0040] Furthermore, this invention traps and confines electrons by inserting a superlattice structure pre-well layer between the first waveguide layer and the active layer. Electrons then tunnel directly from the bottom of the wide-well structure into the quantum well of the active layer, thus increasing the number of electrons entering the active layer. This, in turn, increases the radiative recombination rate of electrons and holes and reduces hole leakage to the first-type semiconductor layer, eliminating stray light generated outside the active layer. Simultaneously, the inclusion of an electron blocking layer further enhances the LED's carrier confinement capability, reducing carrier leakage into the non-active layer structure and improving the LED's luminous efficiency and brightness. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of an LED epitaxial structure according to an embodiment of the present invention;

[0042] Figure 2 This is a flowchart of a method for preparing an LED epitaxial structure according to an embodiment of the present invention;

[0043] Figure 3 This is a schematic diagram of the energy band structure of the pre-well, active layer, and electron blocking layer provided by the present invention;

[0044] Figure 4 This is another schematic diagram of the energy band structure of the front well, active layer, and electron blocking layer provided by the present invention;

[0045] Figures 1-4 middle,

[0046] 10-Substrate, 20-LED epitaxial structure, 201-Bottom buffer layer, 202-Etching stop layer, 203-Type I ohmic contact layer, 204-Type I buffer layer, 205-Type I window layer, 206-Type I confinement layer, 207-Type I waveguide layer, 208-Front well layer, 209-Active layer, 210-Electron blocking layer, 211-Second waveguide layer, 212-Type II confinement layer, 213-Transition layer, 214-Type II window layer, 215-Type II ohmic contact layer. Detailed Implementation

[0047] The LED epitaxial structure and its fabrication method proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0048] Before describing embodiments according to the present invention, the following points should be explained in advance. First, in this specification, when only "AlGaInP" is designated, it refers to any compound in which the chemical composition ratio of the sum of Al, Ga, and In to P is 1:1, and the ratio of Al, Ga, and In is not fixed. Similarly, when only "AlInP" is designated, it refers to any compound in which the chemical composition ratio of the sum of Al and In to P is 1:1, and the ratio of Al to In is not fixed.

[0049] See Figure 1 The LED epitaxial structure 20 includes, from bottom to top, a bottom buffer layer 201, an etching stop layer 202, a first type semiconductor layer, an active layer 209, and a second type semiconductor layer located on the substrate 10.

[0050] The first type of semiconductor layer, from bottom to top, includes a first type window layer 205, a first type confinement layer 206, a first waveguide layer 207, and a front well layer 208, wherein the front well layer 208 is a superlattice structure. The front well layer 208 is a periodic structure formed by alternating growth of a first high-Al content layer, a low-Al content layer, and a second high-Al content layer, wherein the Al content of both the first and second high-Al content layers is greater than the Al content of the low-Al content layer. Preferably, the Al composition of the first high Al composition layer, the Al composition of the second high Al composition layer, and the Al composition of the barrier layer of the active layer 209 of the pre-well layer 208 are equal. The thickness of the first high Al composition layer, the thickness of the second high Al composition layer, and the thickness of the barrier layer of the active layer 209 of the pre-well layer 208 are equal. The band gap and thickness of the low Al composition layer of the pre-well layer 208 are both larger than the band gap and thickness of the well layer of the active layer 209. That is, the pre-well layer 208 is a wide-well structure. Therefore, the pre-well layer 208 will not absorb the light emitted by the active layer 209. At the same time, the wide-well structure can trap electrons, reduce the electron velocity, increase the number of electrons entering the active layer 209, and thus increase the radiative recombination rate of electrons and holes.

[0051] The first type of semiconductor layer may further include a first type of ohmic contact layer 203 and a first type of buffer layer 204 stacked sequentially, and the first type of ohmic contact layer 203 and the first type of buffer layer 204 are located between the corrosion stop layer 202 and the first type of window layer 205.

[0052] The second type semiconductor layer, from bottom to top, includes: an electron blocking layer 210, a second waveguide layer 211, a second type confinement layer 212, a transition layer 213, a second type window layer 214, and a second type ohmic contact layer 215. The electron blocking layer 210 is a periodic structure formed by alternating growth of a first blocking layer and a second blocking layer. In each cycle, the Al composition of the first blocking layer is higher than that of the previous cycle, and the Al composition of the second blocking layer is lower than that of the previous cycle, forming a stepped electron blocking layer. The stepped electron blocking layer has a higher effective barrier height for electrons, which is more conducive to confining electrons within the active layer 209, thus better preventing electron leakage to the second type semiconductor layer and avoiding leakage current to the light-emitting diode. Simultaneously, the stepped electron blocking layer has a lower effective barrier height for holes, which is more conducive to hole injection into the active layer 209, increasing the radiative recombination rate within the active layer 209, thereby improving the luminous efficiency and brightness of the LED. It should be noted that the effective barrier height is the potential difference between the edge of the conduction band (or valence band) and its corresponding electron (or hole) quasi-Fermi level.

[0053] In this embodiment, the polarities of the first type semiconductor layer and the second type semiconductor layer are opposite. For example, if the first type semiconductor layer is an N-type semiconductor layer, then the corresponding second type semiconductor layer is a P-type semiconductor layer. Accordingly, the N-type semiconductor layer includes, in sequence, an N-type ohmic contact layer, an N-type buffer layer, an N-type window layer, an N-type confinement layer, a first waveguide layer, and a front well layer. The P-type semiconductor layer includes, in sequence, an electron blocking layer, a second waveguide layer, a P-type confinement layer, a transition layer, a P-type window layer, and a P-type ohmic contact layer.

[0054] See Figure 2 The method for preparing the LED epitaxial structure 20 specifically includes the following steps:

[0055] Step S1: Provide a substrate 10;

[0056] Step S2: A bottom buffer layer 201, an etching stop layer 202, a first type semiconductor layer, an active layer 209, and a second type semiconductor layer are sequentially grown on the substrate 10. The second type semiconductor layer includes, from bottom to top, an electron blocking layer 210, a second waveguide layer 211, a second type confinement layer 212, a transition layer 213, a second type window layer 214, and a second type ohmic contact layer 215. The electron blocking layer 210 is a periodic structure formed by alternating growth of the first blocking layer and the second blocking layer. The Al composition of the first blocking layer in each cycle is higher than that of the first blocking layer in the previous cycle, and the Al composition of the second blocking layer in each cycle is lower than that of the second blocking layer in the previous cycle.

[0057] The LED epitaxial structure 20 is fabricated using any one of MOCVD, molecular beam epitaxy, HVPE, plasma-assisted chemical vapor deposition, and sputtering, with MOCVD being preferred. The following specific embodiments use MOCVD as an example for illustration.

[0058] Step S1 is performed to provide the substrate 10. In this embodiment, the substrate 10 is preferably a GaAs (gallium arsenide) substrate, but is not limited thereto.

[0059] Step S2 is performed to grow a bottom buffer layer 201 on the substrate 10. The bottom buffer layer 201 can minimize the impact of surface defects on the LED epitaxial structure 20, reduce the possibility of defects and dislocations in the LED epitaxial structure 20, and provide a fresh interface for the next growth step. The material of the bottom buffer layer 201 is preferably GaAs, but not limited to it. The bottom buffer layer 201 is doped with a type-1 dopant, such as an N-type dopant, which can be at least one of silicon (Si), germanium (Ge), tin (Sn), and tellurium (Te), but is not limited to it. Further, the type-1 dopant is preferably Si.

[0060] The growth process conditions for the bottom buffer layer 201 can be as follows: a bottom buffer layer 201 with a thickness of 200 nm to 300 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 700 °C to 750 °C. For example, a bottom buffer layer 201 with a thickness of 200 nm is grown at a temperature of 700 °C.

[0061] After the step of growing the bottom buffer layer 201, an etching stop layer 202 is grown on the bottom buffer layer 201. The etching stop layer 202 is preferably made of Ga. 0.5 In 0.5 P, but not limited to. The etching stop layer 202 is doped with a type I dopant, such as an N-type dopant, which can be at least one of silicon (Si), germanium (Ge), tin (Sn), and tellurium (Te), but is not limited to. Further, the type I dopant is preferably Si.

[0062] The growth process conditions for the corrosion stop layer 202 can be as follows: a corrosion stop layer 202 with a thickness of 10 nm to 20 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 700 °C to 750 °C. For example, a corrosion stop layer 202 with a thickness of 20 nm is grown at a temperature of 700 °C.

[0063] After the step of growing the etch stop layer 202, a first type semiconductor layer is grown on the etch stop layer 202. The first type semiconductor layer includes, from bottom to top, a first type ohmic contact layer 203, a first type buffer layer 204, a first type window layer 205, a first type confinement layer 206, a first waveguide layer 207, and a front well layer 208.

[0064] Therefore, after the step of growing the etching stop layer 202, the first type ohmic contact layer 203 is grown on the etching stop layer 202. The material of the first type ohmic contact layer 203 is preferably GaAs, but not limited thereto. The first type ohmic contact layer 203 is doped with a type 1 dopant, such as an N-type dopant, which can be at least one of silicon (Si), germanium (Ge), and tin (Sn), but is not limited thereto. Further, the first type dopant is preferably Si.

[0065] The growth process conditions for the first type of ohmic contact layer 203 can be as follows: the first type of ohmic contact layer 203 with a thickness of 5 nm to 10 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 700°C to 750°C. For example, the first type of ohmic contact layer 203 with a thickness of 10 nm is grown at a temperature of 700°C.

[0066] After the step of growing the first type ohmic contact layer 203, the first type buffer layer 204 is grown on the first type ohmic contact layer 203. The material of the first type buffer layer 204 is preferably Ga. 0.5 In 0.5 P, but not limited to. The first type buffer layer 204 is doped with a first type dopant, such as an N-type dopant, which can be at least one of silicon (Si), germanium (Ge), and tin (Sn), but is not limited to. Further, the first type dopant is preferably Si.

[0067] The growth process conditions for the first type of buffer layer 204 can be as follows: a first type of buffer layer 204 with a thickness of 15 nm to 25 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 700 °C to 750 °C. For example, a first type of buffer layer 204 with a thickness of 15 nm is grown at a temperature of 700 °C.

[0068] After growing the first type buffer layer 204, a first type window layer 205 is grown on the first type buffer layer 204. The main functions of the first type window layer 205 are first type current expansion, light emission, and surface roughening. The first type window layer 205 is doped with a first type dopant, such as an N-type dopant, which can be at least one of silicon (Si), germanium (Ge), and tin (Sn), but is not limited thereto. Further, the first type dopant is preferably Si.

[0069] The growth process conditions of the first-type window layer 205 can be: in the reaction chamber of the MOCVD growth furnace, and growing the first-type window layer 205 with a thickness of 1500 nm to 3000 nm at a temperature of 700 °C to 750 °C. For example, growing the first-type window layer 205 with a thickness of 2000 nm at a temperature of 700 °C.

[0070] After the step of growing the first-type window layer 205, the first-type confinement layer 206 is grown on the window layer 205. The first-type confinement layer 206 is used to provide electrons and confine the light field distribution. The material of the first-type confinement layer 206 is preferably AlInP, but is not limited thereto. The first-type confinement layer 206 is doped with a first-type dopant. For example, the N-type dopant can be at least one of silicon (Si), germanium (Ge), and tin (Sn), but is not limited thereto. Further, the first-type dopant is preferably Si.

[0071] The growth process conditions of the first-type confinement layer 206 can be: in the reaction chamber of the MOCVD growth furnace, and growing the first-type confinement layer 206 with a thickness of 1200 nm to 1500 nm at a temperature of 750 °C to 800 °C. For example, growing the first-type confinement layer 206 with a thickness of 1500 nm at a temperature of 770 °C.

[0072] After the step of growing the first-type confinement layer 206, the first waveguide layer 207 is grown on the first-type confinement layer 206. The material of the first waveguide layer 207 is preferably (Al b Ga 1-b ) 0.5 In 0.5 P, and preferably 0 < b < 1. For example, the material of the first waveguide layer 207 is (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P. The first waveguide layer 207 is an undoped structural layer, that is, no elements are doped in the first waveguide layer 207.

[0073] The growth process conditions of the first waveguide layer 207 can be: in the reaction chamber of the MOCVD growth furnace, and growing the first waveguide layer 208 with a thickness of 60 nm to 80 nm at a temperature of 750 °C to 800 °C. For example, growing the first waveguide layer 207 with a thickness of 80 nm at a temperature of 770 °C.

[0074] After the step of growing the first waveguide layer 207, the pre-well layer 208 is grown on the first waveguide layer 207. The pre-well layer 208 is preferably a superlattice structure. Specifically, the pre-well layer 208 is a periodic structure formed by alternately growing a first high-Al component layer, a low-Al component layer, and a second high-Al component layer.

[0075] The material of the first high-Al component layer is preferably (Al x Ga 1-x ) 0.5 In 0.5 P, where 0 < x < 1; the material of the low-Al component layer is preferably (Al y Ga 1-y ) 0.5 In 0.5 P, where 0 < y < 1; the material of the second high-Al component layer is preferably (Al x Ga 1-x ) 0.5 In 0.5 P. In this embodiment, the Al component of the first high-Al component layer and the second high-Al component layer is greater than that of the low-Al component layer, that is, y < x, so that the bandgap of the low-Al component layer is smaller than that of the first high-Al component layer and the second high-Al component layer. The Al component of the first high-Al component layer in this embodiment is equal to the Al component of the second high-Al component layer, and the Al components of the two high-Al component layers are kept consistent. Further, the Al component of the first high-Al component layer and the second high-Al component layer is also kept consistent with the Al component of the first waveguide layer 207, that is, b = x.

[0076] The thickness of the first high-Al component layer and the second high-Al component layer is preferably 20 nm to 30 nm; the thickness of the low-Al component layer is preferably 10 nm to 20 nm. Further, the thickness of the first high-Al component layer is preferably equal to the thickness of the second high-Al component layer.

[0077] The Al composition of the low Al composition layer is preferably greater than that of the potential well layer in the active layer 209, i.e., y > p; the Al composition of the first high Al composition layer and the second high Al composition layer are preferably equal to the Al composition of the barrier layer in the active layer 209, x = q; the thickness of the first high Al composition layer and the second high Al composition layer are preferably equal to the thickness of the barrier layer in the active layer 209; the thickness of the low Al composition layer is preferably greater than the thickness of the potential well layer in the active layer 209. Since the band gap and thickness of the low Al composition layer are both greater than those of the potential well layer in the active layer 209, the pre-well layer 208 is a wide-well structure. The wide-well structure does not absorb the light emitted by the active layer 209, and the wide-well structure easily traps electrons, which can reduce the electron velocity and increase the number of electrons entering the active layer 209.

[0078] The number of periods in the front well layer 208 is 'a', meaning the front well layer 208 comprises 'a' combined layers, and each combined layer comprises a first high-Al composition layer, a low-Al composition layer, and a second high-Al composition layer stacked sequentially. In this embodiment, the number of periods 'a' is preferably in the range of 1 to 6; for example, the number of periods in the front well layer 208 is 3. In this embodiment, the front well layer 208 is preferably an undoped structure layer to reduce the formation of non-radiative centers.

[0079] The growth pattern of the pre-well layer 208 can be either gradient-based or non-gradual. Specifically, the first high-Al composition layer, the low-Al composition layer, and the second high-Al composition layer can be either gradient-based or non-gradual. For example, in each cycle of the pre-well layer, the first high-Al composition layer and the second high-Al composition layer are gradient-based, while the low-Al composition layer is non-gradual. That is, the Al composition of the first high-Al composition layer gradually decreases along the growth direction of the pre-well layer 208, the Al composition of the second high-Al composition layer gradually increases along the growth direction of the pre-well layer 208, while the Al composition of the low-Al composition layer remains unchanged. Preferably, in each cycle of the pre-well layer 208, it is preferable to have a growth pattern consisting of (Al...) x Ga 1-x ) 0.5 In 0.5 P gradually changes to (Al) y Ga 1-y ) 0.5 In 0.5 P, then from (Al) y Ga 1-y ) 0.5 In 0.5 P gradually changes to (Al) x Ga 1-x ) 0.5 In 0.5P. For example, in each cycle, along the growth direction of the pre-well layer 208, by (Al) 0.7 Ga 0.3 ) 0.5 In 0.5 P gradually changes to (Al) 0.3 Ga 0.7 ) 0.5 In 0.5 P, then from (Al) 0.3 Ga 0.7 ) 0.5 In 0.5 P gradually changes to (Al) 0.7 Ga 0.3 ) 0.5 In 0.5 P, that is, in each cycle of the pre-well layer 208, the Al composition of the pre-well layer 208 gradually changes from 0.70 to 0.3 along the growth direction of the pre-well layer 208, and then gradually changes from 0.3 to 0.7. In other embodiments, some cycles of the pre-well layer 208 may be gradually changed, and some cycles may be non-gradually changed.

[0080] Figure 3 The energy band structure formed when the growth mode of the front well layer 208 is non-gradual is shown. Figure 4 The diagram shows the energy band structure formed when the frontwell layer 208 is grown in a gradient manner; the width in the band structure diagram corresponds to the thickness of the layer. Compared to a non-gradient frontwell layer, the gradient frontwell layer, due to the presence of the gradient region, directly affects the ability of carriers accelerated by the built-in quasi-electric field to be trapped in the active layer. Furthermore, the presence of the gradient region results in stronger carrier trapping ability, shortening the carrier lifetime in the active layer and thus improving the internal quantum efficiency. Therefore, controlling the structure of the frontwell layer 208 is crucial for optimizing optical and device performance.

[0081] The growth process conditions for the front well layer 208 can be as follows: a front well layer 208 with a thickness of 100 nm to 300 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 700°C to 800°C. For example, the front well layer 208 is grown for three cycles at a temperature of 750°C, and in each cycle, a 25 nm thick layer of material (Al) is first grown. 0.70 Ga 0.30 ) 0.5 In 0.5 The first high-Al composition layer of P is then grown, followed by the growth of a 15nm thick material of (Al) 0.30 Ga 0.70 ) 0.5 In 0.5 A low-Al composition layer of P is then regrown with a 25nm thick material (Al). 0.70 Ga0.30 ) 0.5 In 0.5 The second highest Al group stratification of P.

[0082] In this embodiment, by introducing a pre-well layer with a superlattice structure into the first-type semiconductor to capture and confine electrons, and then allowing the electrons to directly tunnel from the bottom of the wide well to the active layer, the number of electrons entering the active layer can be increased, the electron-hole recombination rate can be increased, and thus the light-emitting efficiency and brightness can be improved.

[0083] After the step of growing the pre-well layer 208, the active layer 209 is grown on the pre-well layer 208. The active layer 209 mainly serves as a light-emitting layer. The active layer 209 is preferably a multi-quantum well structure, that is, the active layer 209 is preferably a periodic structure composed of a well layer and a barrier layer, such as [(Al p Ga 1-p ) 0.5 In 0.5 P / (Al q Ga 1-q ) 0.5 In 0.5 P] composed of a periodic structure, and the number of periods of the active layer 209 is preferably 6 to 12. The material of the well layer is preferably (Al p Ga 1-p ) 0.5 In 0.5 P, and 0 < p ≤ 0.5, such as (Al 0.2 0Ga 0.80 ) 0.5 In 0.5 P. The material of the barrier layer is preferably (Al q Ga 1-q ) 0.5 In 0.5 P, and 0.5 ≤ q < 1, such as (Al 0.70 Ga 0.30 ) 0.5 In 0.5 P.

[0084] The thickness of the active layer 209 is preferably 200 nm to 600 nm, such as 500 nm. Further, the thickness of the well layer in each period is preferably 5 nm to 10 nm, and the thickness of the barrier layer is preferably 20 nm to 30 nm. In this embodiment, it is preferred that the thicknesses of the first highest Al group stratification and the second highest Al group stratification of the pre-well layer 208 are equal and consistent with the thickness of the barrier layer of the active layer; the thickness of the low Al group stratification is greater than the thickness of the well layer of the active layer, and reference can be made to Figure 3 and Figure 4When the thicknesses of the first high-Al composition layer and the second high-Al composition layer are both equal to the thickness of the barrier layer in the active layer 209, that is, when the widths of the barrier between the pre-well layer 208 and the active layer 209 are the same, the higher the effective barrier height, the lower the probability of carrier tunneling, and the more difficult it is for carriers to pass through the barrier; the lower the effective barrier height, the higher the probability of carrier tunneling, and the easier it is for electrons trapped in the pre-well to tunnel into the active layer 209. In this embodiment, the pre-well layer 208 is coupled to the active layer 209 through a barrier. The barrier design uses the charge-asymmetric resonance tunneling phenomenon. The energy level position at the bottom of the wide-well structure must be equal to the energy level position of the smallest band in the active layer 209, allowing electrons to pass through the barrier while blocking holes. Under an applied voltage, an electrochemical potential difference exists between electrons and holes. This causes an electron current to flow from the N electrode through the first type ohmic contact layer 203, the first type buffer layer 204, the first type window layer 205, the first type confinement layer 206, and the first waveguide layer 207 into the pre-well layer 208. Then, the electrons tunnel through the barrier of the pre-well layer 208 into the active layer 209, where they recombine with holes. Meanwhile, a hole current flows from the P electrode through the second type ohmic contact layer 215, the second type window layer 214, the transition layer 213, the second type confinement layer 212, the second waveguide layer 211, and the electron blocking layer 210 into the active layer 209. The barrier of the pre-well layer 208 prevents holes in the active layer 209 from penetrating into the pre-well layer 208. Therefore, radiative recombination of electrons and holes only occurs in the active layer 209, eliminating the possibility of stray light being generated outside the active layer 209 (some electrons that are not confined in the active layer 209 will recombine and emit light outside the active layer 209, generating stray light).

[0085] In this embodiment, the Al composition of the first high-Al layer and the second high-Al layer are equal. Preferably, the Al composition of the low-Al layer is greater than the Al composition of the potential well layer. The Al composition of the first high-Al layer and the second high-Al layer is equal to the Al composition of the barrier layer, i.e., y > p, x = q. Therefore, the energy level of the low-Al layer in the front well layer 208 is greater than the energy level of the potential well layer in the active layer 210, and the energy level of the high-Al layer (first high-Al layer and second high-Al layer) in the front well layer 208 is equal to the energy level of the barrier layer in the active layer 210. (See reference...) Figure 3 and Figure 4 This structural design increases the ability to allow electrons to pass through and block holes.

[0086] The growth process conditions for the active layer 209 can be as follows: growing the active layer 209 for 6 to 12 cycles in the reaction chamber of an MOCVD growth furnace at a temperature of 700°C to 750°C. For example, growing the active layer 209 for 12 cycles at a temperature of 710°C.

[0087] After the step of growing the active layer 209, a second-type semiconductor layer is grown on the active layer 209. The second-type semiconductor layer sequentially includes, from bottom to top: an electron blocking layer 210, a second waveguide layer 211, a second-type confinement layer 212, a transition layer 213, a second-type window layer 214, and a second-type ohmic contact layer 215.

[0088] Therefore, after the step of growing the active layer 209, the electron blocking layer 210 is grown on the active layer 209. The electron blocking layer 210 is preferably a superlattice structure. Specifically, the electron blocking layer is preferably a periodic structure formed by alternately growing a first blocking layer and a second blocking layer. In this embodiment, preferably, the bandgap of the first blocking layer is greater than the bandgap of the second blocking layer. The material of the first blocking layer is preferably (Al m Ga 1-m ) 0.5 In 0.5 P, where 0 < m < 1; the material of the second blocking layer is preferably (Al n Ga 1-n ) 0.5 In 0.5 P, where 0 < n < 1. The Al composition of the first blocking layer in this embodiment is preferably greater than the Al composition of the second blocking layer, that is, preferably n < m, so that the bandgap of the first blocking layer is greater than the bandgap of the second blocking layer, to increase the electron blocking ability, while increasing the hole injection ability, thereby improving the radiative recombination rate, and improving the light emission efficiency and brightness.

[0089] The number of periods of the electron blocking layer 210 is preferably 1 - 6, and the electron blocking layer is an undoped structure layer to reduce the formation of non-radiative centers. Preferably, in the electron blocking layer, the Al component of the first blocking layer in each period is higher than that of the first blocking layer in the previous period, and the Al component of the second blocking layer in each period is lower than that of the second blocking layer in the previous period. Further preferably, the Al component of the first blocking layer in the first period is greater than or equal to the Al component of the barrier layer in the active layer 209, and the Al component of the second blocking layer in the last period is greater than or equal to the Al component of the well layer in the active layer. Such a structural design essentially forms a stepped superlattice electron blocking layer. The higher the effective barrier height, the fewer electrons can cross the barrier, which is more conducive to the confinement of electrons. The superlattice structure will reduce the effective barrier height of the electron blocking layer 210 for holes in the valence band; at the same time, electron leakage is suppressed, which means that the probability of non-radiative recombination of holes with leaked electrons in the second-type semiconductor layer will be reduced, so the hole injection efficiency in the active layer 209 is further enhanced. The stepped superlattice electron blocking layer 210 has a higher effective barrier height for electrons, which is more conducive to confining electrons in the active layer 209; it has a lower effective barrier height for holes, which is more conducive to hole injection into the active layer 209; at the same time, the electron blocking layer 210 with a superlattice structure increases the hole injection efficiency, and there are enough holes and electrons in the active layer 209 for radiative recombination.

[0090] In this embodiment, by introducing an electron blocking layer structure with a superlattice structure in the second-type semiconductor, electron leakage is reduced, and the electron transition to the second-type semiconductor layer is suppressed, thereby avoiding the problem of device leakage, and the radiative recombination rate in the active layer 209 can be increased, and the stray light generated outside the active layer 209 can be eliminated.

[0091] The Al component of the first blocking layer in this embodiment can be greater than or equal to the Al component of the barrier layer, and the Al component of the second blocking layer can be greater than or equal to the Al component of the well layer. Preferably, the Al component of the first blocking layer is greater than the Al component of the barrier layer, and the Al component of the second blocking layer is greater than the Al component of the well layer, that is, p < n, q < m. Therefore, the energy level of the electron blocking layer 210 is greater than the energy level of the active layer 209. For details, see Figure 4 , this design can reduce electron leakage while increasing hole injection.

[0092] The thickness range of the electron blocking layer 210 is preferably 25 nm - 300 nm, and the thickness of the first blocking layer in each period is preferably 20 nm - 30 nm, and the thickness of the second blocking layer is preferably 10 nm - 20 nm.

[0093] The growth process conditions for the electron blocking layer 210 can be as follows: 1 to 6 cycles of electron blocking layer 210 are grown in the reaction chamber of an MOCVD furnace at a temperature of 700℃ to 800℃. For example, three cycles of electron blocking layer 210 are grown at 750℃, with the first cycle consisting of a 20nm thick layer of Al material. 0.75 Ga 0.25 ) 0.5 In 0.5 The first barrier layer of P and the 15nm thick material are (Al) 0.50 Ga 0.5 ) 0.5 In 0.5 The second barrier layer of P, and the 20nm thick material of the second period, is (Al). 0.85 Ga 0.15 ) 0.5 In 0.5 The first barrier layer of P and the 15nm thick material are (Al) 0.40 Ga 0.60 ) 0.5 In 0.5 The second barrier layer of P, the last 20nm thick material grown in one cycle is (Al). 0.95 Ga 0.05 ) 0.5 In 0.5 The first barrier layer of P and the 15nm thick material are (Al) 0.30 Ga 0.70 ) 0.5 In 0.5 P's second barrier layer.

[0094] After the step of growing the electron blocking layer 210, the second waveguide layer 211 is grown on the electron blocking layer 210. The preferred material for the second waveguide layer 211 is (Al). w Ga 1-w ) 0.5 In 0.5 P, and 0.5≤w≤1. For example, the material of the second waveguide layer 211 is (Al). 0.95 Ga 0.05 ) 0.5 In 0.5 P. Furthermore, the material of the second waveguide layer 211 is preferably the same as that of the first blocking layer in the last cycle. The second waveguide layer 211 is an undoped structure layer, that is, no elements are doped in the second waveguide layer 211.

[0095] The growth process conditions for the second waveguide layer 211 can be as follows: a second waveguide layer 211 with a thickness of 60 nm to 80 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 750 °C to 800 °C. For example, a second waveguide layer 211 with a thickness of 80 nm is grown at a temperature of 770 °C.

[0096] After the step of growing the second waveguide layer 211, a second type confinement layer 212 is grown on the second waveguide layer 211. The second type confinement layer 212 is used to provide holes. The material of the second type confinement layer 212 is preferably AlInP, but not limited thereto. The second type confinement layer 212 is doped with a second type dopant, such as a p-type dopant, which can be at least one of magnesium (Mg), zinc (Zn), cadmium (Cd), beryllium (Be), and manganese (Mn), but is not limited thereto. Further, the second type dopant is preferably Mg.

[0097] The growth process conditions for the second type of confinement layer 212 can be as follows: a second type of confinement layer 212 with a thickness of 1200 nm to 1500 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 750 °C to 800 °C. For example, a second type of confinement layer 212 with a thickness of 1500 nm is grown at a temperature of 770 °C.

[0098] After the step of growing the second type confinement layer 212, the transition layer 213 is grown on the second type confinement layer 212. The material of the transition layer 213 is preferably AlGaInP, but not limited thereto. The second type confinement layer 212 is doped with a type II dopant, such as a p-type dopant, which can be at least one of magnesium (Mg), zinc (Zn), calcium (Ca), beryllium (Be), and manganese (Mn), but is not limited thereto. Further, the second type dopant is preferably Mg.

[0099] The growth process conditions for the transition layer 213 can be as follows: a transition layer 213 with a thickness of 5 nm to 10 nm is grown in the reaction chamber of an MOCVD growth furnace at a temperature of 750°C to 800°C. For example, a transition layer 213 with a thickness of 10 nm is grown at a temperature of 770°C.

[0100] After the step of growing the transition layer 213, the second type window layer 214 is grown on the transition layer 213. The material of the second type window layer 214 is preferably GaP, but not limited thereto. The second type window layer 213 is doped with a type II dopant, such as a p-type dopant, which can be at least one of magnesium (Mg), zinc (Zn), calcium (Ca), beryllium (Be), and manganese (Mn), but is not limited thereto. Further, the second type dopant is preferably Mg.

[0101] The growth process conditions of the second-type window layer 214 can be as follows: in the reaction chamber of a MOCVD growth furnace, and at a temperature of 800 °C to 900 °C, grow the second-type window layer 214 with a thickness of 3000 nm to 5000 nm. For example, grow the second-type window layer 214 with a thickness of 4000 nm at a temperature of 850 °C.

[0102] After the step of growing the second-type window layer 214, grow the second-type ohmic contact layer 215 on the second-type window layer 214. The second-type ohmic contact layer 215 is used to form an ohmic contact with a metal electrode. The material of the second-type ohmic contact layer 215 is preferably GaP, but is not limited thereto. The second-type ohmic contact layer 215 can be doped with C (carbon).

[0103] The growth process conditions of the second-type ohmic contact layer 215 can be as follows: in the reaction chamber of a MOCVD growth furnace, and at a temperature of 700 °C to 750 °C, grow the second-type ohmic contact layer 214 with a thickness of 100 nm to 200 nm. For example, grow the second-type ohmic contact layer 214 with a thickness of 150 nm at a temperature of 710 °C.

[0104] In summary, in the present invention, a pre-well layer with a superlattice structure is inserted between the first waveguide layer and the active layer to capture and confine electrons, and then the electrons directly tunnel from the bottom of the wide-well structure into the active layer. Therefore, the number of electrons entering the active layer can be increased, and further the electron-hole recombination rate can be increased, improving the light-emitting efficiency and brightness of the LED. At the same time, the setting of the pre-well layer can also reduce the hole leakage to the first-type semiconductor layer and eliminate the stray light generated outside the active layer.

[0105] Secondly, due to the presence of the stepped electron blocking layer in the present invention, the electron leakage to the second-type semiconductor layer is suppressed, thereby avoiding the problem of leakage current to the device, increasing the radiative recombination rate in the active layer, and eliminating the stray light generated outside the active layer.

[0106] In addition, the Al composition of the low-Al component layer in the pre-well layer of the present invention is preferably greater than the Al composition of the well layer in the active layer, that is, y > p; the Al compositions of the first high-Al component layer and the second high-Al component layer in the pre-well layer are preferably equal to the Al composition of the barrier layer in the active layer, x = q; the Al composition of the first barrier layer in the electron blocking layer is greater than the Al composition of the barrier layer in the active layer, that is, q < m; the Al composition of the second barrier layer in the electron blocking layer is greater than the Al composition of the well layer, that is, p < n. Such a structural design can increase the electron blocking ability, reduce the electron leakage to the second-type semiconductor layer, and at the same time increase the ability of holes to be injected into the active layer.

[0107] Moreover, the present invention simultaneously incorporates a front well layer and an electron blocking layer, which enables the device to have better carrier confinement capability, reduces carrier leakage in its non-active layer, and improves the luminous efficiency and brightness of the LED.

[0108] Furthermore, it is understood that although the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the present invention. For any person skilled in the art, many possible variations and modifications can be made to the technical solutions of the present invention based on the disclosed technical content, or equivalent embodiments can be modified accordingly, without departing from the scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the present invention shall still fall within the scope of protection of the present invention.

[0109] Furthermore, it should be understood that the invention is not limited to the specific methods, compounds, materials, manufacturing techniques, uses, and applications described herein, which can vary. It should also be understood that the terminology described herein is used only to describe particular embodiments and not to limit the scope of the invention. It must be noted that the singular forms “a,” “an,” and “the” used herein and in the appended claims include plural bases unless the context clearly indicates otherwise. Thus, for example, a reference to “a step” means a reference to one or more steps, and may include secondary steps. All conjunctions used should be understood in the broadest sense. Therefore, the word “or” should be understood to have the definition of logical “or” rather than logical “exclusive”, unless the context clearly indicates otherwise. Structures described herein will be understood to also refer to functional equivalents of that structure. Language that can be interpreted as approximate should be understood in that way unless the context clearly indicates otherwise.

Claims

1. An LED epitaxial structure, characterized in that, From bottom to top, the structure includes: a bottom buffer layer, an etching stop layer, a first type semiconductor layer, an active layer, and a second type semiconductor layer on the substrate. The second type semiconductor layer includes, from bottom to top, an electron blocking layer, a second waveguide layer, a second type confinement layer, a transition layer, a second type window layer, and a second type ohmic contact layer. The electron blocking layer is a periodic structure formed by alternating growth of the first blocking layer and the second blocking layer. In each period, the Al composition of the first blocking layer is higher than that of the first blocking layer in the previous period, and the Al composition of the second blocking layer in each period is lower than that of the second blocking layer in the previous period.

2. The LED epitaxial structure as described in claim 1, characterized in that, The band gap of the first barrier layer is larger than that of the second barrier layer.

3. The LED epitaxial structure as described in claim 1, characterized in that, The material of the first blocking layer includes (Al m Ga 1-m ) 0.5 In 0.5 P, and the material of the second blocking layer includes (Al n Ga 1-n ) 0.5 In 0.5 P, where 0 < m < 1, 0 < n < 1, and n < m.

4. The LED epitaxial structure as described in claim 1, characterized in that, The first type of semiconductor layer comprises, from bottom to top, a first type of window layer, a first type of confinement layer, a first waveguide layer, and a front well layer, wherein the front well layer is a superlattice structure.

5. The LED epitaxial structure as described in claim 4, characterized in that, The pre-well layer is a periodic structure formed by alternating growth of a first high-Al component layer, a low-Al component layer, and a second high-Al component layer, wherein the Al component of both the first high-Al component layer and the second high-Al component layer is greater than the Al component of the low-Al component layer.

6. The LED epitaxial structure as described in claim 5, characterized in that, The material of the first high-Al layer includes (Al x Ga 1-x ) 0.5 In 0.5 P. The material of the low-Al layer includes (Al y Ga 1-y ) 0.5 In 0.5 P. The material of the second high-Al layer includes (Al x Ga 1-x ) 0.5 In 0.5 P, where 0 < x < 1, 0 < y < 1, and y < x.

7. The LED epitaxial structure as described in claim 6, characterized in that, The growth method of the pre-well layer can be either gradual or non-gradual.

8. The LED epitaxial structure as described in claim 7, characterized in that, The gradient growth method includes: in each cycle of the pre-well layer, by (Al) x Ga 1-x ) 0.5 In 0.5 P gradually changes to (Al) y Ga 1-y ) 0.5 In 0.5 P, then from (Al) y Ga 1-y ) 0.5 In 0.5 P gradually changes to (Al) x Ga 1-x ) 0.5 In 0.5 P.

9. The LED epitaxial structure as described in claim 5, characterized in that, The thickness of the low-Al composition layer is 20nm to 30nm; the thickness of the first high-Al composition layer is 10nm to 20nm; and the thickness of the second high-Al composition layer is 10nm to 20nm.

10. The LED epitaxial structure as described in claim 5, characterized in that, The active layer is a periodic structure formed by alternating growth of a potential well layer and a potential barrier layer, wherein the material of the potential well layer includes (Al) p Ga 1-p ) 0.5 In 0.5 P, the material of the barrier layer includes (Al) q Ga 1-q ) 0.5 In 0.5 P, and 0 <p≤0.5,0.5≤q<1。 11. The LED epitaxial structure as described in claim 10, characterized in that, The Al composition of the low Al composition layer is greater than the Al composition of the potential well layer, and the Al composition of the first high Al composition layer is equal to the Al composition of the second high Al composition layer, which is equal to the Al composition of the barrier layer.

12. The LED epitaxial structure as described in claim 10, characterized in that, The thickness of the first high-Al composition layer is equal to the thickness of the second high-Al composition layer, which is equal to the thickness of the barrier layer; the thickness of the low-Al composition layer is greater than the thickness of the well layer.

13. The LED epitaxial structure as described in claim 12, characterized in that, The thickness of the potential well layer is 5 nm to 10 nm; the thickness of the potential barrier layer is 20 nm to 30 nm.

14. The LED epitaxial structure as described in claim 10, characterized in that, The Al composition of the first blocking layer in the first cycle of the electron blocking layer is greater than or equal to the Al composition of the barrier layer in the active layer, and the Al composition of the second blocking layer in the last cycle of the electron blocking layer is greater than or equal to the Al composition of the well layer in the active layer.

15. The LED epitaxial structure as described in claim 4, characterized in that, The first type of semiconductor layer further includes a first type of ohmic contact layer and a first type of buffer layer stacked sequentially, and the first type of ohmic contact layer and the first type of buffer layer are located between the etch stop layer and the first type of window layer.

16. The LED epitaxial structure as described in claim 1, characterized in that, The first type of semiconductor layer is an N-type semiconductor layer, and the second type of semiconductor layer is a P-type semiconductor layer.

17. A method for fabricating an LED epitaxial structure, characterized in that, Includes the following steps: Provide a substrate; A bottom buffer layer, an etching stop layer, a first type semiconductor layer, an active layer, and a second type semiconductor layer are sequentially grown on the substrate. The second type semiconductor layer includes, from bottom to top, an electron blocking layer, a second waveguide layer, a second type confinement layer, a transition layer, a second type window layer, and a second type ohmic contact layer. The electron blocking layer is a periodic structure formed by alternating growth of the first blocking layer and the second blocking layer. The Al composition of the first blocking layer in each cycle is higher than that of the first blocking layer in the previous cycle, and the Al composition of the second blocking layer in each cycle is lower than that of the second blocking layer in the previous cycle.

18. The method for preparing the LED epitaxial structure as described in claim 17, characterized in that, The band gap of the first barrier layer is larger than that of the second barrier layer.

19. The method for preparing the LED epitaxial structure as described in claim 17, characterized in that, The material of the first barrier layer includes (Al m Ga 1-m ) 0.5 In 0.5 P, and the material of the second barrier layer includes (Al n Ga 1-n ) 0.5 In 0.5 P, where 0 < m < 1, 0 < n < 1, and n < m.

20. The method for preparing an LED epitaxial structure as described in claim 17, characterized in that, The first type of semiconductor layer includes, from bottom to top, a first type of window layer, a first type of confinement layer, a first waveguide layer and a front well layer, and the front well layer is a superlattice structure.

21. The method for preparing an LED epitaxial structure as described in claim 20, characterized in that, The pre-well layer is a periodic structure formed by alternating growth of a first high-Al component layer, a low-Al component layer, and a second high-Al component layer, wherein the Al component of both the first high-Al component layer and the second high-Al component layer is greater than the Al component of the low-Al component layer.

22. The method for preparing an LED epitaxial structure as described in claim 21, characterized in that, The material of the first high-Al group layer includes (Al x Ga 1-x ), 0.5 In 0.5 P. The material of the low-Al group layer includes (Al y Ga 1-y ). 0.5 In 0.5 P. The material of the second high-Al group layer includes (Al x Ga 1-x ). 0.5 In 0.5 P, where 0 < x < 1, 0 < y < 1, and y < x.

23. The method for preparing the LED epitaxial structure as described in claim 22, characterized in that, The growth method of the pre-well layer can be either gradual or non-gradual.

24. The method for preparing an LED epitaxial structure as described in claim 23, characterized in that, The gradient growth method includes: in each cycle of the pre-well layer, by (Al) x Ga 1-x ) 0.5 In 0.5 P gradually changes to (Al) y Ga 1-y ) 0.5 In 0.5 P, then from (Al) y Ga 1-y ) 0.5 In 0.5 P gradually changes to (Al) x Ga 1-x ) 0.5 In 0.5 P.

25. The method for preparing an LED epitaxial structure as described in claim 21, characterized in that, The thickness of the low-Al composition layer is 20nm to 30nm; the thickness of the first high-Al composition layer is 10nm to 20nm; and the thickness of the second high-Al composition layer is 10nm to 20nm.

26. The method for preparing an LED epitaxial structure as described in claim 21, characterized in that, The active layer is a periodic structure formed by alternating growth of a potential well layer and a potential barrier layer, wherein the material of the potential well layer includes (Al) p Ga 1-p ) 0.5 In 0.5 P, the material of the barrier layer includes (Al) q Ga 1-q ) 0.5 In 0.5 P, and 0 <p≤0.5,0.5≤q<1。 27. The method for preparing an LED epitaxial structure as described in claim 26, characterized in that, The Al composition of the low Al composition layer is greater than the Al composition of the potential well layer, and the Al composition of the first high Al composition layer is equal to the Al composition of the second high Al composition layer, which is equal to the Al composition of the barrier layer.

28. The method for preparing an LED epitaxial structure as described in claim 26, characterized in that, The thickness of the first high-Al composition layer is equal to the thickness of the second high-Al composition layer, which is equal to the thickness of the barrier layer; the thickness of the low-Al composition layer is greater than the thickness of the well layer.

29. The method for preparing an LED epitaxial structure as described in claim 28, characterized in that, The thickness of the potential well layer is 5 nm to 10 nm; the thickness of the potential barrier layer is 20 nm to 30 nm.

30. The method for preparing an LED epitaxial structure as described in claim 26, characterized in that, The Al composition of the first blocking layer in the first cycle of the electron blocking layer is greater than or equal to the Al composition of the barrier layer in the active layer, and the Al composition of the second blocking layer in the last cycle of the electron blocking layer is greater than or equal to the Al composition of the well layer in the active layer.

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