Logical Hadamard gate operations and canonical fixing in subsystem code

Abstract

Systems, computer-implemented methods, and computer program products are provided for facilitating logical Hadamard gate operations and canonical fixing in subsystem codes. According to embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include a canonical fixing component that applies a canonical fixing operation to a subsystem code of encoded qubits to generate a switched subsystem code. The computer-executable components can also include a transverse component that applies a transverse Hadamard operation to the switched subsystem code to generate a rotated subsystem code.

Description

Background Technology

[0001] This disclosure relates to subsystem code, and more specifically, to logical Hadamard gate operations and gauge fixing within the subsystem code.

[0002] Quantum computing generally refers to the use of quantum mechanical phenomena to perform computation and information processing functions. Quantum computing can be compared to classical computing, which typically uses transistors to manipulate binary values. That is, classical computers operate on bits that are either 0 or 1, while quantum computers operate on qubits, which are superpositions of 0s and 1s. Multiple qubits can be entangled, and interference can be used.

[0003] Some existing quantum technologies utilize subsystem code to perform various quantum operations, such as controlled-NOT (CNOT) logic gates. One problem with these existing quantum technologies is that they cannot perform logic Hadamard gates within this subsystem code. Another problem with these existing quantum technologies is that they cannot perform gauge fixing within this subsystem code. Summary of the Invention

[0004] The following overview is presented to provide a basic understanding of one or more embodiments of the invention. This overview is not intended to identify key or essential elements, or to depict any scope of a particular embodiment or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that follows. In one or more embodiments described herein, systems, devices, computer-implemented methods, and / or computer program products are described that facilitate logical Hadamard gate operation and specification fixation in subsystem code.

[0005] According to one embodiment, a system may include: a processor that executes computer-executable components stored in memory. The computer-executable components may include: a canonical fixing component that applies canonical fixing operations to subsystem code encoding qubits to generate switching subsystem code. The computer-executable components may further include: a transverse component that applies transverse Hadamard operations to the switching subsystem code to generate rotation subsystem code. An advantage of this system is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, possessing properties that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0006] In some embodiments, the computer-executable component further includes a rotation component that rotates the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices when executing quantum code. An advantage of this system is that it can be implemented to execute fault-tolerant logic Hadamard gates that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices when executing quantum code.

[0007] According to another embodiment, a computer-implemented method may include: applying a canonical fixing operation by a system operatively coupled to a processor to subsystem code encoding qubits to generate switching subsystem code. The computer-implemented method may further include: applying a transverse Hadamard operation by the system to the switching subsystem code to generate rotation subsystem code. An advantage of this computer-implemented method is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, possessing properties that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0008] In some embodiments, the computer-implemented method may further include: rotating the rotating subsystem code by the system to generate fault-tolerant logic Hadamard gate code that performs on quantum code and has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. An advantage of this computer-implemented method is that it can be implemented to perform fault-tolerant logic Hadamard gates on quantum code and have the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0009] According to another embodiment, a computer program product is provided comprising a computer-readable storage medium containing program instructions executable by a processor to cause the processor to: apply a canonical fixing operation to subsystem code encoding qubits to generate switching subsystem code. The program instructions are also executable by the processor to cause the processor to: apply a transverse Hadamard operation to the switching subsystem code to generate rotation subsystem code. An advantage of this computer program product is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0010] In some embodiments, the program instructions are also executable by the processor to cause the processor to: rotate the rotating subsystem code to generate code that executes fault-tolerant logic Hadamard gates on quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. An advantage of this computer program product is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0011] According to one embodiment, a system may include: a processor that executes computer-executable components stored in memory. The computer-executable components may include: a canonical fixing component that applies canonical fixing operations to subsystem code encoding qubits to generate switching subsystem code. The computer-executable components may further include a lattice shifting component that shifts a lattice of the switching subsystem code to generate shift-switching subsystem code. An advantage of this system is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, possessing properties that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0012] In some embodiments, the computer-executable component may further include a traversal component that applies a lateral Hadamard operation to the shift-switching subsystem code to generate rotation subsystem code. In these embodiments, the computer-executable component may further include a rotation component that rotates the rotation subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices. An advantage of such a system is that it can be implemented to execute fault-tolerant logic Hadamard gates with characteristics that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices on quantum code.

[0013] According to another embodiment, a computer-implemented method may include: a system operatively coupled to a processor applying a canonical fixed operation to subsystem code encoding qubits to generate switching subsystem code. The computer-implemented method may further include: shifting a lattice of the switching subsystem code by the system to generate shift-switching subsystem code. An advantage of this computer-implemented method is that it can be implemented to execute fault-tolerant logic Hadamard gates on quantum code, possessing properties that reduce at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0014] In some embodiments, the computer-implemented method may further include: applying a transverse Hadamard operation by the system to the shift-switching subsystem code to generate rotation subsystem code. In these embodiments, the computer-implemented method may further include: rotating the rotation subsystem code by the system to generate code that executes a fault-tolerant logic Hadamard gate on the quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. An advantage of this computer-implemented method is that it can be implemented to execute a fault-tolerant logic Hadamard gate on the quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. Attached Figure Description

[0015] Figure 1 and Figure 2 Block diagrams of example non-limiting systems, each according to one or more embodiments described herein, are shown that facilitate logical Hadamard gate operations and specification fixation in subsystem code.

[0016] Figure 3 , Figure 4 , Figure 5 , Figure 6A , Figure 6B , Figure 6C , Figure 6D , Figure 6E , Figure 7A and Figure 7B Examples of non-limiting schematic diagrams illustrating one or more embodiments described herein that facilitate logical Hadamard gate operations and specification fixation in subsystem code are shown;

[0017] Figure 8 and Figure 9 A flowchart is shown of an example non-limiting computer implementation of a method that facilitates logical Hadamard gate operations and specification fixation in subsystem code, according to one or more embodiments described herein;

[0018] Figure 10 A block diagram is shown illustrating an example non-limiting operating environment that can facilitate one or more embodiments described herein;

[0019] Figure 11 A block diagram of an example non-limiting cloud computing environment according to one or more embodiments of the present disclosure is shown;

[0020] Figure 12 A block diagram of an example non-limiting abstract model layer according to one or more embodiments of the present disclosure is shown. Detailed Implementation

[0021] The following detailed description is illustrative only and is not intended to limit the embodiments and / or their application or use. Furthermore, it is not intended to be construed as being limited by any explicit or implicit information presented in the prior art or invention description or detailed description sections.

[0022] One or more embodiments will now be described with reference to the accompanying drawings, wherein like reference numerals are used throughout to refer to like elements. In the following description, numerous specific details are set forth for purposes of explanation in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that one or more embodiments may be practiced without these specific details in various circumstances.

[0023] In view of the problems of existing quantum technologies described above, this disclosure can be implemented to produce solutions to these problems in the form of systems, computer-implemented methods, and / or computer program products capable of facilitating logical Hadamard operations and canonical fixing in subsystem code by: applying canonical fixing operations to the subsystem code encoding qubits to generate switching subsystem code; and / or applying transverse Hadamard operations to the switching subsystem code to generate rotating subsystem code. An advantage of such systems, computer-implemented methods, and / or computer program products is that they can be implemented to execute fault-tolerant logical Hadamards on quantum code, possessing the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0024] In some embodiments, this disclosure can be implemented as a solution to the above-described problems in the form of systems, computer-implemented methods, and / or computer program products, which can further facilitate the logical Hadamard gate operation and specification fixation in the subsystem code by rotating the rotated subsystem code to generate fault-tolerant logical Hadamard gate code that has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. The advantage of such systems, computer-implemented methods, and / or computer program products is that they can be implemented as fault-tolerant logical Hadamard gates that have the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices when executing quantum code.

[0025] As mentioned herein, an “entity” can include humans, clients, users, computing devices, software applications, agents, machine learning (ML) models, artificial intelligence (AI), and / or another entity. It should be understood that when an element is referred to herein as being “coupled” to another element, it can describe one or more different types of coupling, including but not limited to chemical coupling, communication coupling, electrical coupling, electromagnetic coupling, operational coupling, optical coupling, physical coupling, thermal coupling, and / or another type of coupling.

[0026] Figure 1 and Figure 2 Block diagrams of example non-limiting systems 100 and 200, respectively, according to one or more embodiments described herein, are shown, each capable of facilitating logical Hadamard gate operations and canonical fixation in subsystem code. Systems 100 and 200 may each include a quantum gate operating system 102. Figure 1 The quantum gate operating system 102 of the system 100 depicted may include a memory 104, a processor 106, a specification fixing component 108, a crossover component 110, and / or a bus 112. Figure 2 The quantum gate operating system 102 of the system 200 depicted may also include a rotation component 202 and / or a lattice shift component 204.

[0027] It should be understood that the embodiments of this disclosure depicted in the various accompanying drawings are for illustrative purposes only, and therefore, the architecture of these embodiments is not limited to the systems, devices, and / or components depicted herein. For example, in some embodiments, system 100, system 200, and / or quantum gate operating system 102 may also include the operating environment 1000 referenced herein and... Figure 10 The various computers and / or computing-based components described herein. In several embodiments, such computers and / or computing-based components may be combined with implementations. Figure 1 , Figure 2 The system, apparatus, component, and / or computer-implemented operation shown and described in the other accompanying drawings disclosed herein may be used in combination with one or more of these.

[0028] Memory 104 may store one or more computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 106 (e.g., a classical processor, a quantum processor, and / or another type of processor), facilitate the execution of operations defined by this or these executable components and / or instructions. For example, memory 104 may store computer- and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by processor 106, facilitate the execution of various functions described herein related to quantum gate operating system 102, canonical fixing component 108, traversing component 110, rotation component 202, lattice shifting component 204, and / or another component associated with quantum gate operating system 102 described herein, with or without reference to the various accompanying drawings of this disclosure.

[0029] Memory 104 may include volatile memory (e.g., random access memory (RAM), static RAM (SRAM), dynamic RAM (DRAM), and / or another type of volatile memory) and / or non-volatile memory (e.g., read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), and / or another type of non-volatile memory) employing one or more memory architectures. Reference is made below to system memory 1016 and... Figure 10 Other examples of memory 104 are described below. Such examples of memory 104 can be used to implement any embodiment of this disclosure.

[0030] Processor 106 may include one or more types of processors and / or electronic circuits (e.g., classical processors, quantum processors, and / or another type of processor and / or electronic circuits) that can implement one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that can be stored on memory 104. For example, processor 106 may perform various operations that can be specified by such computer and / or machine-readable, writable, and / or executable components and / or instructions, including but not limited to logic, control, input / output (I / O), arithmetic, etc. In some embodiments, processor 106 may include one or more central processing units, multi-core processors, microprocessors, dual microprocessors, microcontrollers, system-on-a-chip (SoC), array processors, vector processors, quantum processors, and / or another type of processor. Reference is made to processing unit 1014 and... Figure 10 Other examples of processor 106 are described below. Such examples of processor 106 can be used to implement any embodiment of this disclosure.

[0031] The quantum gate operating system 102, memory 104, processor 106, canonical fixing component 108, traversing component 110, rotation component 202, lattice shifting component 204, and / or another component of the quantum gate operating system 102 described herein may be communicatively, electrically, operatively, and / or optically coupled to each other via bus 112 to perform the functions of system 100, system 200, quantum gate operating system 102, and / or any components coupled thereto. Bus 112 may include one or more memory buses, memory controllers, peripheral buses, external buses, local buses, quantum buses, and / or another type of bus that may employ a different bus architecture. Reference is made below to system bus 1018 and... Figure 10 Other examples of bus 112 are described below. Such examples of bus 112 can be used to implement any embodiment of this disclosure.

[0032] The quantum gate operating system 102 may include any type of components, machines, devices, facilities, apparatuses, and / or instruments, including processors and / or devices capable of communicating efficiently and / or operatively with wired and / or wireless networks. All such embodiments are contemplated. For example, the quantum gate operating system 102 may include server devices, computing devices, general-purpose computers, special-purpose computers, quantum computing devices (e.g., quantum computers), tablet computing devices, handheld devices, server-type computing machines and / or databases, laptop computers, notebook computers, desktop computers, cellular phones, smartphones, consumer appliances and / or instruments, industrial and / or commercial equipment, digital assistants, telephones with multimedia internet capabilities, multimedia players, and / or another type of device.

[0033] The quantum gate operating system 102 can be coupled (e.g., communication, electrical, operational, optical, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or another type of external system, source, and / or device) using wires and / or cables. For example, the quantum gate operating system 102 can be coupled (e.g., communication, electrical, operational, optical, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or another type of external system, source, and / or device) using data cables including, but not limited to, High Definition Multimedia Interface (HDMI) cables, Recommended Standard (RS) 232 cables, Ethernet cables, and / or other data cables.

[0034] In some embodiments, the quantum gate operating system 102 may be network-coupled (e.g., communication, electrical, operational, optical, and / or via another type of coupling) to one or more external systems, sources, and / or devices (e.g., classical and / or quantum computing devices, communication devices, and / or other types of external systems, sources, and / or devices). For example, such networks may include wired and / or wireless networks, including but not limited to cellular networks, wide area networks (WANs) (e.g., the Internet), local area networks (LANs), and / or other networks. The Quantum Gate Operating System 102 can communicate with one or more external systems, sources, and / or devices (e.g., computing devices) using virtually any desired wired and / or wireless technology, including but not limited to: Wi-Fi, Global System for Mobile Communications (GSM), Universal Mobile Telecommunications System (UMTS), Global Microwave Access Interoperability (WiMAX), Enhanced General Packet Radio Service (Enhanced GPRS), 3GPP Long Term Evolution (LTE), 3GPP2 Ultra Mobile Broadband (UMB), High Speed ​​Packet Access (HSPA), Zigbee and other 802.XX wireless technologies and / or traditional telecommunications technologies. Session Initiation Protocol (SIP) RF4CE protocol, wireless HART protocol, 6LoWPAN (IPv6 over low-power wireless local area networks), Z-Wave, ANT, ultra-wideband (UWB) standard protocol and / or other proprietary and non-proprietary communication protocols. Therefore, in some embodiments, the quantum gate operating system 102 may include hardware (e.g., central processing unit (CPU), transceiver, decoder, quantum hardware, quantum processor and / or other hardware), software (e.g., set of threads, set of processes, executing software, quantum pulse scheduling, quantum circuits, quantum gates and / or other software), or a combination of hardware and software capable of facilitating the transfer of information between the quantum gate operating system 102 and external systems, sources and / or devices (e.g., computing devices, communication devices and / or other types of external systems, sources and / or devices).

[0035] The quantum gate operating system 102 may include one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by the processor 106 (e.g., a classical processor, a quantum processor, and / or another type of processor), facilitate the execution of operations defined by such components and / or instructions. Further, in many embodiments, as described herein with or without reference to the various accompanying drawings of this disclosure, any component associated with the quantum gate operating system 102 may include one or more computer and / or machine-readable, writable, and / or executable components and / or instructions that, when executed by the processor 106, facilitate the execution of operations defined by such components and / or instructions. For example, the specification fixing component 108, the traversing component 110, the rotating component 202, the lattice shifting component 204, and / or any other component associated with the quantum gate operating system 102 as disclosed herein (e.g., communicatively, electrically, operatively, and / or optically coupled to and / or employed by the quantum gate operating system 102) may include such computer and / or machine-readable, writable, and / or executable components and / or instructions. Therefore, according to various embodiments, the quantum gate operating system 102 disclosed herein and / or any components associated therewith may employ processor 106 to execute such computer and / or machine-readable, writable, and / or executable components and / or instructions to facilitate the performance of one or more operations described herein with reference to the quantum gate operating system 102 and / or any such components associated therewith.

[0036] The quantum gate operating system 102 can facilitate (e.g., via processor 106) the execution of operations performed by the canonical fixing component 108, the traversal component 110, the rotation component 202, the lattice shifting component 204, and / or another component disclosed herein associated with the quantum gate operating system 102. For example, as described in detail below, the quantum gate operating system 102 can facilitate (e.g., via processor 106) the application of canonical fixing operations to subsystem code encoding qubits to generate switching subsystem code; and / or the application of traversal Hadamard operations to the switching subsystem code to generate rotation subsystem code. In this example, as described in detail below, the quantum gate operating system 102 can also facilitate (e.g., via processor 106) the following: rotating the rotating subsystem code to generate code that performs fault-tolerant logic Hadamard gates on the quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with the quantum device; applying canonical fixing operations to the subsystem code to switch two-body canonical operators and four-body canonical operators in a subset of the subsystem code; applying transverse Hadamard operations to the switching subsystem code to apply Hadamard gates on the data qubits and swap: X-type canonical operators and Z-type canonical operators; X-type stabilizers and Z-type stabilizers; and X-type logic operators and Z-type logic operators; and / or performing two pairwise swap gate operations between qubits that are symmetrical about each other with respect to the vertical and diagonal axes in the rotating subsystem code.

[0037] In another instance, as described in detail below, the quantum gate operating system 102 is able to facilitate (e.g., via processor 106) the application of canonical fixing operations to the subsystem code of the encoded qubits to generate switching subsystem code; and / or the lattice of shift switching subsystem code to generate shift switching subsystem code. In this example, as described in detail below, the quantum gate operating system 102 can also facilitate (e.g., via processor 106) the following: applying a lateral Hadamard operation to shift-switching subsystem code to generate rotation subsystem code; rotating the rotation subsystem code to generate code that performs a fault-tolerant logic Hadamard gate on the quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with the quantum device; applying a canonical fixation operation to the subsystem code to switch a subset of two-body canonical operators and four-body canonical operators in the subsystem code; applying a lateral Hadamard operation to the shift-switching subsystem code to apply a Hadamard gate on the data qubits and swap: an X-type canonical operator and a Z-type canonical operator; an X-type stabilizer and a Z-type stabilizer; and an X-type logic operator and a Z-type logic operator; and / or performing two pairwise swap gate operations between qubits that are symmetrical about each other about the vertical and diagonal axes in the rotation subsystem code.

[0038] The canonical fixing component 108 can apply canonical fixing operations to the subsystem code of the encoded qubits to generate switching subsystem code. For example, refer to Figure 3 Example 300 shown in the figure, the canonical fixing component 108 can apply the canonical fixing operation to the subsystem code 302 encoding the qubit (in Figure 3 (represented as C) to generate switching subsystem code 304 (in Figure 3 (represented as C').

[0039] Figure 3 Example 300, which facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For the sake of brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0040] As described above and as in Figure 3 As illustrated in Example 300, the canonical fixing component 108 can apply a canonical fixing operation to the subsystem code 302 encoding the qubits to generate the switching subsystem code 304. For example, see the following reference... Figure 4-6E As described, the canonical fixing component 108 can apply canonical fixing operations to subsystem code 302 to toggle between two-body and four-body canonical operators in a subset of subsystem code 302. For example, as Figure 3 As shown, the specification fixing component 108 can apply specification fixing operations to subsystem code 302 to swap the double-body specification operator and the quad-body specification operator in the subsystem code 302 block for both X-type and Z-type, which effectively switches subsystem code 302 to switching subsystem code 304.

[0041] exist Figure 3 In Example 300 depicted, the traversing component 110 can apply a lateral Hadamard operation to the switching subsystem code 304 to generate the rotation subsystem code 306 (in... Figure 3 (represented as C" in Chinese). For example, the traversing component 110 can apply a lateral Hadamard operation to the switching subsystem code 304 to apply a Hadamard gate to the data qubits and swap: the X-type canonical operator and the Z-type canonical operator; the X-type stabilizer and the Z-type stabilizer; and the X-type logic operator and the Z-type logic operator. That is, for example, the traversing component 110 can apply a lateral Hadamard operation to apply a Hadamard gate to all data qubits, which swaps the X-type and Z-type canonical operators and stabilizers and effectively switches the switching subsystem code 304 to the rotation subsystem code 306.

[0042] exist Figure 3In the depicted example 300, the rotation component 202 can rotate the rotating subsystem code 306 to generate code 308 that executes a fault-tolerant logic Hadamard gate on the quantum code, possessing the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. In this example embodiment, to rotate the rotating subsystem code 306 to generate code 308, the rotation component 202 can perform two pairwise swap gate operations between qubits that are symmetrical to each other about the vertical axis 310 and the diagonal axis 312 in the rotating subsystem code 306. For example, as Figure 3 As noted in the annotation, in order to rotate the rotation subsystem code 306 to generate code 308, the rotation component 202 may employ the following defined equation (1) to perform two pairwise swap gate operations between qubits that are symmetrical about each other about the vertical axis 310 and the diagonal axis 312, wherein such swap gate operations effectively achieve a 90-degree (90°) rotation.

[0043] Equation (1):

[0044]

[0045] Where m represents the row of data qubit positions in the subsystem code, n represents the column of data qubit positions in the subsystem code, and d represents the subsystem code distance, which is equal to the total number of rows and columns of data qubits in the subsystem code. According to various embodiments of this disclosure, such data qubits are represented as points 314 in the different subsystem codes shown in the accompanying drawings described herein. Figure 3 In Example 300, the rotation component 202 can perform a permutation of the qubit by performing two pairwise swap gate operations between such qubits as described above using Equation (1) as defined above, which effectively rotates the code by 90° and switches it back to subsystem code 302.

[0046] In some embodiments, for example, as referenced below Figure 7A and 7BAs described, canonical fixing component 108 can apply canonical fixing operations to the subsystem code of the encoded qubits to generate switching subsystem code, and lattice shifting component 204 can shift the lattice of the switching subsystem code to generate shift-switched subsystem code. In these embodiments, traversing component 110 can apply lateral Hadamard operations to the shift-switched subsystem code to generate rotating subsystem code, and rotating component 202 can rotate the rotating subsystem code to generate code that executes a fault-tolerant logic Hadamard gate on the quantum code, having the property of reducing at least one of frequency collisions or crosstalk errors associated with the quantum device. In these embodiments, canonical fixing component 108 can apply canonical fixing operations to the subsystem code to exchange two-body canonical operators and four-body canonical operators in a subset of the subsystem code. In these embodiments, traversing component 110 can apply lateral Hadamard operations to the shift-switched subsystem code to apply Hadamard gates on the data qubits and exchange: X-type canonical operators and Z-type canonical operators; X-type stabilizers and Z-type stabilizers; and X-type logic operators and Z-type logic operators. In these embodiments, the rotation component 202 can perform two pairwise swap gate operations between qubits that are symmetrical to each other about the vertical and diagonal axes in the rotation subsystem code.

[0047] Figure 4 Example 400 is shown that facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements and / or processes used in the corresponding embodiments are omitted.

[0048] Figure 4 The canonical operators after canonical fixation to heavy-hex code are also shown. If S(G) ≤ S(G') ≤ G' ≤ G and k(G) = k(G'), then the canonical set G' is a canonical fixation of G, where S(G) is the stabilizer of G and k(G) is the number of encoded qubits. Figure 4 In Example 400 shown, subsystem code 302 and switching subsystem code 304 are Figure 4 The Chinese character is represented as "C". BS The Bacon-Shor code is standardized.

[0049] exist Figure 4 In the example 400 shown, the bulk of subsystem code 302 includes a four-body X canonical operator (depicted as a dark gray square in subsystem code 302) and a vertical two-body Z canonical operator (depicted as a vertical light gray semicircle in subsystem code 302). In various embodiments of this disclosure, such a bulk of subsystem code 302 may constitute a subset of subsystem code 302. Figure 4In Example 400, a horizontal double-body X canonical operator (shown as a horizontal dark gray semicircle of subsystem code 302) exists on the boundary of subsystem code 302. In various embodiments of this disclosure, the boundaries of subsystem code 302 may constitute a subset of subsystem code 302.

[0050] exist Figure 4 In the example 400 shown, the body of the switching subsystem code 304 includes a four-body Z-canonical operator (depicted as a light gray square of the switching subsystem code 304) and a horizontal two-body X-canonical operator (depicted as a horizontal dark gray semicircle of the switching subsystem code 304). In various embodiments of this disclosure, this body of the switching subsystem code 304 may constitute a subset of the switching subsystem code 304. Figure 4 In Example 400, a vertical double-body Z-canonical operator (described as a vertical light gray semicircle of the switching subsystem code 304) is present on the boundary of the switching subsystem code 304. In various embodiments of this disclosure, the boundary of the switching subsystem code 304 may constitute a subset of the switching subsystem code 304.

[0051] exist Figure 4 In Example 400 shown, before applying the canonical fixing operation, the canonical fixing component 108 can split the four-body X canonical operator in the body into a pair of two-body horizontal canonical operators. Figure 4 In Example 400 shown, before applying the canonical fixing operation, the canonical fixing component 108 can merge a pair of two vertical double-body Z canonical operators in the body into a four-body canonical operator.

[0052] Figure 5 Example 500 is shown that facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements and / or processes used in the corresponding embodiments are omitted.

[0053] Figure 5 The stabilizer with the aforementioned hexagonal specification fixed is also shown. For example, in Figure 5 In Example 500 shown, subsystem code 302 illustrates the stabilizer before the specification fixing operation is applied by the specification fixing component 108, and switching subsystem code 304 illustrates the stabilizer after the specification fixing operation is applied by the specification fixing component 108.

[0054] exist Figure 5 In the body of subsystem code 302 depicted in Example 500, the four-body Z stabilizer is the product of a pair of vertical two-body Z canonical operators (represented by light gray vertical semicircles in subsystem code 302), and the X stabilizer is a two-column vertical stripe of Pauli X. Figure 5On the boundary of subsystem code 302 depicted in Example 500, there is a vertical double-body Z-canonical operator (represented by a light gray vertical semicircle in subsystem code 302).

[0055] exist Figure 5 In the body of the switching subsystem code 304 depicted in Example 500, the four-body X stabilizer is the product of a pair of horizontal two-body X canonical operators (represented by dark gray horizontal semicircles in the switching subsystem code 304), and the Z stabilizer is a two-row horizontal stripe of Pauli Z. Figure 5 On the boundary of the switching subsystem code 304 depicted in Example 500, there is a horizontal double-body X canonical operator (represented by a dark gray horizontal semicircle in the switching subsystem code 304).

[0056] According to one or more embodiments of the present disclosure described herein, in order to facilitate the application of a canonical fixing operation to the subsystem code of the encoded qubit (e.g., subsystem code 302) to generate a switching subsystem code (e.g., switching subsystem code 304), the canonical fixing component 108 may employ a canonical fixing protocol as defined below.

[0057] Standardized Fixed Protocol

[0058] (1) For the main body, the specification fixed component 108 measures all two-body X specification operators and can further infer the four-body X stabilizer eigenvalues ​​(e.g., recorded as M).

[0059] If M = +1, then the standard fixed component 108 does not require calibration.

[0060] If M = -1, then the specification fixing component 108 can apply Pauli Z to correct the stabilizer.

[0061] In this way, the original four-body X canonical operator in subsystem code 302 is fixed to the stabilizer in switching subsystem code 304.

[0062] Without measuring noise, the specification fixing component 108 can perform the above operation in one (1) cycle.

[0063] In the presence of measurement noise, the specification fixing component 108 can perform d cycles of measurement to decode and apply Z correction.

[0064] (2) For the boundary, when performing the body measurement, the specification fixing component 108 can simultaneously measure all the two-body X boundary stabilizers (e.g., recorded as M) and further apply corrections (e.g., in the same manner as the operation performed on the body as described above).

[0065] In this way, the original two-body X canonical operator in subsystem code 302 is fixed to the boundary stabilizer in switching subsystem code 304.

[0066] (3) In the presence of measurement error, the specification fixing component 108 also applies the measurement of d cycles of the four-body Z specification operator (e.g., the opposite of a (1) cycle without measurement error).

[0067] Each cycle of the Z measurement can be applied by the specification fixing component 108 after each cycle of the X measurement.

[0068] Therefore, the specification fixing component 108 can apply X corrections after decoding the syndrome history of d cycles.

[0069] Figure 6A and Figure 6B Examples 600a and 600b, respectively, illustrating one or more embodiments described herein, each facilitating logical Hadamard gate operation and specification fixation in subsystem code. For brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0070] Figure 6A and 6B Examples 600a and 600b depicted in the diagram illustrate controlled-NOT (CNOT) gate scheduling that can be used by the specification fixing component 108 to measure the X-canonical operator (e.g., X-corrector measurement) as described above in two (2) consecutive loops, where example 600a depicts loop 1 and example 600b depicts loop 2. To facilitate such CNOT gate scheduling that can be used by the specification fixing component 108 to measure the X-canonical operator (e.g., X-corrector measurement) as described above in two (2) consecutive loops, the specification fixing component 108 can employ the following and... Figure 6C The corresponding circuit is shown in the figure.

[0071] Figure 6C Example 600c, which facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For the sake of brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0072] To facilitate the CNOT gate scheduling described above, as shown in Examples 600a and 600b, which can be used by the canonical fixing component 108 to measure the X canonical operator (e.g., X corrector measurement (e.g., body)) as described above in two (2) consecutive cycles, the canonical fixing component 108 may employ... Figure 6C The corresponding circuit depicted in Example 600c is shown. Figure 6CExample 600c shown may include measurement circuitry for the two-body X canonical operator in the body of subsystem code (e.g., the body of subsystem code 302 and / or switching subsystem code 304). In some embodiments, the canonical fixing component 108 may use standard circuitry comprising two (2) CNOT gates to measure the boundary two-body X canonical operator.

[0073] Figure 6D Example 600d, which facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For the sake of brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0074] Figure 6C Example 600c depicted illustrates a CNOT gate schedule that can be used by the canonical fixing component 108 to measure the Z-canonical operator (e.g., Z-compensator measurement) in a third loop, wherein example 600c depicts loop 3. To facilitate such a CNOT gate schedule that can be used by the canonical fixing component 108 to measure the Z-canonical operator (e.g., Z-compensator measurement) in loop 3, the canonical fixing component 108 can employ the following description and... Figure 6E The corresponding circuit is shown in the figure.

[0075] Figure 6E Example 600e, which facilitates logical Hadamard gate operation and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For the sake of brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0076] To facilitate the aforementioned CNOT gate scheduling shown in Example 600d, which can be used by the canonical fixing component 108 to measure the Z-canonical operator (e.g., Z-corrector measurement (e.g., body)) in loop 3, the canonical fixing component 108 may employ... Figure 6E The corresponding circuit depicted in Example 600e is shown in the figure. Figure 6E Example 600e shown may include measurement circuitry for a dual-body Z-specification operator in the body of a subsystem code (e.g., the body of subsystem code 302 and / or the body of switching subsystem code 304).

[0077] Figure 7A and 7B Examples 700a and 700b, respectively, illustrating one or more embodiments described herein, are shown that each facilitates logical Hadamard gate operation and specification fixation in subsystem code. For brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0078] In some embodiments, the canonical fixing component 108 can apply a canonical fixing operation to the heavy hexagonal lattice. In these embodiments, to perform a canonical fixing operation on the heavy hexagonal lattice, the qubit lattice can be shifted by a lattice constant after the canonical fixing operation is applied. In these embodiments, to apply a canonical fixing operation to the heavy hexagonal lattice, the canonical fixing component 108 can apply a canonical fixing operation to the subsystem code encoding the qubits to generate a switching subsystem code, and the lattice shifting component 204 can shift the lattice of the switching subsystem code to generate a shift-switching subsystem code. For example, as in Figure 7A and 7B As shown in the schematics 700a and 700b respectively, the specification fixing component 108 can apply specification fixing operations to subsystem code 702 to generate as described above. Figure 1-6E The example embodiment shown describes a switching subsystem code where the lattice shifting component 204 can shift the qubit lattice of the switching subsystem code to generate a shift-switching subsystem code 704. As in Figure 7A and 7B As shown in Examples 700a and 700b respectively, such a qubit lattice may include multiple (e.g., twenty-five (25)) qubits (represented by gray circles in Examples 700a and 700b).

[0079] To shift such a qubit lattice, the lattice shifting component 204 can implement the following SWAP protocol to shift the qubit lattice, for example, by a lattice constant of one (1). For example, as in Figure 7A and 7B As shown in Examples 700a and 700b respectively, in order to shift the qubit lattice to a lattice constant of one (1), the lattice shifting component 204 can add an additional row of data qubits 706 to the bottom of the qubit lattice depicted in Example 700a, and can also add corresponding additional ancilla qubits 708a, 708b (represented by white and black circles respectively in Examples 700a and 700b) to the qubit lattice. For clarity, all additional ancilla qubits 708a, 708b are not annotated in Examples 700a and 700b. In one example, in order to shift the qubit lattice to a lattice constant of one (1), the lattice shifting component 204 can apply the first step of SWAP (represented by arrow 710 in Example 700a) to all data qubits in the qubit lattice to move the quantum information of such data qubits to the additional ancilla qubits 708a, where such quantum information is represented by numbers 1-25 in Examples 700a and 700b. In this example, in order to perform such a qubit lattice shift operation, the lattice shift component 204 can apply the second step of SWAP to move the quantum information to the additional data qubit 706 located in the next row.

[0080] In the above example, by implementing the aforementioned specification fixing operation and SWAP protocol, the specification fixing component 108 and the grid shifting component 204 can be generated as follows: Figure 7B The shift switching subsystem code 704 shown in Example 700b includes a shifted qubit lattice and a switching subsystem code that can be generated by performing the two steps of the SWAP described above and the canonical fixing operation. It should be understood that the canonical fixing component 108 and the lattice shifting component 204 can respectively perform the canonical fixing operation and the SWAP protocol to meet one or more hardware standards of a quantum device that can be used to execute the subsystem code (e.g., heavy hexagonal code).

[0081] In embodiments where the specification fixing component 108 and the grid shifting component 204 respectively perform the aforementioned specification fixing operation and SWAP protocol, the specification fixing component 108 can apply the aforementioned specification fixing operation to (e.g., as referenced above). Figure 1-6E The described subsystem code 702 is used to exchange the two-body canonical operator and the four-body canonical operator in a subset (e.g., the body) of the subsystem code 702. In these embodiments, the traversing component 110 can apply a traversing Hadamard operation to (e.g., as referenced above). Figure 1 , Figure 2 and Figure 3 The described shift switching subsystem code 704 is used to generate the rotation subsystem code (not in...). Figure 7A or Figure 7B (as shown in the diagram). In these embodiments, the traversing component 110 can apply a lateral hadamard operation to (e.g., as referenced above). Figure 1 , Figure 2 and Figure 3 The described shift switching subsystem code 704 is used to apply a Hadamard gate to data qubits (e.g., data qubits in a qubit lattice) and swap: an X-type canonical operator and a Z-type canonical operator; an X-type stabilizer and a Z-type stabilizer; and an X-type logic operator and a Z-type logic operator. In these embodiments, the rotation component 202 can be performed between qubits that are symmetrical about each other with respect to the vertical and diagonal axes in the rotation subsystem code (e.g., as referenced above). Figure 1 , Figure 2 and Figure 3 The described two-pair exchange gate operation. In these embodiments, the rotating assembly 202 can be rotated (e.g., as referenced above). Figure 1 , Figure 2 and Figure 3 The described rotating subsystem code is used to generate fault-tolerant logic Hadamardian code for quantum code execution, which has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices (not in...). Figure 7A or Figure 7B (as shown in the image).

[0082] Figure 8 A flowchart of an example non-limiting computer implementation of a method 800, which facilitates logical Hadamard gate operations and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0083] At 802, the computer-implemented method 800 may include applying a gauge-fixing operation to subsystem code (e.g., subsystem code 302) of encoded qubits by a system (e.g., via quantum gate operating system 102 and / or gauge-fixing component 108) operatively coupled to a processor (e.g., processor 106) to generate switching subsystem code (e.g., switching subsystem code 304). For example, as referenced above... Figure 1-6E As described, the specification fixing component 108 can apply specification fixing operations to subsystem code 302 to generate switching subsystem code 304.

[0084] At 804, the computer-implemented method 800 may include applying a transverse Hadamard operation by a system (e.g., via quantum gate operating system 102 and / or transgression component 110) to the switching subsystem code to generate rotational subsystem code (e.g., rotational subsystem code 306). For example, as referenced above. Figure 1 , Figure 2 and Figure 3 As described, the traversal component 110 can apply a lateral Hadamard operation to the switching subsystem code 304 to generate the rotation subsystem code 306.

[0085] In some embodiments, although not in Figure 8 As illustrated in the exemplary embodiments shown, but the computer-implemented method 800 may further include rotating the rotating subsystem code (e.g., rotating subsystem code 306) by a system (e.g., via quantum gate operating system 102 and / or rotating component 202) to generate fault-tolerant logic Hadamard gate code (e.g., code 308) that performs operations on the quantum code and has the property of reducing at least one of frequency collisions or crosstalk errors associated with the quantum device. For example, as referenced above... Figure 1 , Figure 2 and Figure 3 As described, the rotating component 202 can rotate the rotating subsystem code 306 to generate fault-tolerant logic Hadamard gate code 308 that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices during quantum code execution.

[0086] Figure 9A flowchart of an example non-limiting computer implementation of a method 900, which facilitates logical Hadamard gate operations and specification fixation in subsystem code according to one or more embodiments described herein, is shown. For brevity, repeated descriptions of similar elements and / or processes employed in the corresponding embodiments are omitted.

[0087] At 902, the computer-implemented method 900 may include applying a gauge-fixing operation to subsystem code (e.g., subsystem code 702) of encoded qubits by a system (e.g., via quantum gate operating system 102 and / or gauge-fixing component 108) operatively coupled to a processor (e.g., processor 106) to generate switching subsystem code (not shown in the figure). For example, as referenced above... Figure 7A and 7B As described, the specification fixing component 108 can apply specification fixing operations to subsystem code 702 to generate switching subsystem code (not shown in the figure).

[0088] At 904, the computer-implemented method 900 may include shifting a lattice (e.g., a qubit lattice) of subsystem code from a system (e.g., via quantum gate operating system 102 and / or lattice shifting component 204) to generate shift-switching subsystem code (e.g., shift-switching subsystem code 704). For example, as referenced above... Figure 7A and 7B As described, the lattice shifting component 204 can use the aforementioned SWAP protocol to shift the qubit lattice of the switching subsystem code generated by the specification fixing component 108 to generate the shift switching subsystem code 704.

[0089] In some embodiments, although not in Figure 9 As illustrated in the exemplary embodiments shown, however, the computer-implemented method 900 may further include applying a transverse Hadamard operation to the shift-switching subsystem code by a system (e.g., via quantum gate operating system 102 and / or traversing component 110) to generate rotation subsystem code (not shown in the figures). For example, as referenced above... Figure 7A and Figure 7B As described, the traversing component 110 can apply a lateral hadamard operation to (e.g., as referenced above). Figure 1 , Figure 2 and Figure 3 The described shift switching subsystem code 704 is used to generate the rotation subsystem code (not shown in the figure).

[0090] In some embodiments, although not in Figure 9As described in the exemplary embodiments shown, the computer-implemented method 900 may further include rotating the rotating subsystem code by a system (e.g., via quantum gate operating system 102 and / or rotating component 202) to generate fault-tolerant logic Hadamard gate code that performs quantum code and has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices. For example, as referenced above Figure 7A and 7B As described, the rotating component 202 can rotate (e.g., see above). Figure 1 , Figure 2 and Figure 3 The described rotating subsystem code is used to generate fault-tolerant logic Hadamard gate code (not shown in the figure) that has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices.

[0091] The quantum gate operating system 102 can be associated with various technologies. For example, the quantum gate operating system 102 can be associated with quantum computing technology, quantum hardware and / or software technology, quantum gate scheduling technology, quantum algorithm technology, machine learning technology, artificial intelligence technology, cloud computing technology and / or other technologies.

[0092] The quantum gate operating system 102 can provide technical improvements to systems, devices, components, operating procedures, and / or processing steps associated with the various techniques identified above. For example, the quantum gate operating system 102 can: apply a canonical fixing operation to the subsystem code encoding qubits to generate switching subsystem code; apply a transverse Hadamard operation to the switching subsystem code to generate rotating subsystem code; and / or rotate the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that performs quantum code and has the property of reducing at least one of frequency collisions or crosstalk errors associated with quantum devices (e.g., quantum processors and / or quantum computers that execute code and / or quantum code).

[0093] The quantum gate operating system 102 can provide technical improvements to processing units associated with it (e.g., processor 106, a quantum processor, and / or another processor). For example, as described above, the quantum gate operating system 102 can: apply a canonical fixing operation to subsystem code encoding qubits to generate switching subsystem code; apply a transverse Hadamard operation to the switching subsystem code to generate rotating subsystem code; and / or rotate the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of the frequency collisions or crosstalk errors associated with quantum devices (e.g., quantum processors and / or quantum computers executing the code and / or the quantum code). In this example, the quantum gate operating system 102 is thereby able to reduce at least one of the frequency collisions or crosstalk errors associated with quantum devices (e.g., quantum processors executing such code and / or such quantum code). In this example, by reducing at least one of the frequency conflicts or crosstalk errors associated with a quantum processor, such as executing such code and / or such quantum code, the quantum gate operating system 102 is able to thereby improve at least one of the performance, accuracy, and / or fidelity associated with the quantum processor, and reduce the computational cost associated with the quantum processor.

[0094] One practical application of the quantum gate operating system 102 is that it can be implemented using quantum computing devices (e.g., quantum processors and / or quantum computers) to generate code that executes fault-tolerant logic Hadamard gates on quantum code to compute one or more solutions (e.g., heuristics) to various problems (e.g., estimation problems, optimization problems, and / or other problems) of varying complexity in various fields (e.g., finance, chemistry, medicine, and / or another field). For example, one practical application of the quantum gate operating system 102 is that it can be implemented using quantum computing devices (e.g., quantum processors and / or quantum computers) to generate code that executes fault-tolerant logic Hadamard gates on quantum code to compute one or more solutions (e.g., heuristics) to estimation problems and / or optimization problems in the fields of chemistry, medicine, and / or finance, where such solutions can be used to design, for example, new compounds, new drugs, and / or new option prices.

[0095] It should be understood that the Quantum Gate Operating System 102 provides a new approach driven by relatively new quantum computing technologies. For example, the Quantum Gate Operating System 102 provides a novel method for generating code that performs fault-tolerant logic Hadamard gates on quantum code (e.g., subsystem code, such as, for example, heavy hexagonal code).

[0096] The quantum gate operating system 102 can employ hardware or software to solve problems that are inherently highly technical, non-abstract, and cannot be performed by humans as a set of mental actions. In some embodiments, one or more processes described herein can be executed by one or more dedicated computers (e.g., dedicated processing units, dedicated classical computers, dedicated quantum computers, and / or another type of dedicated computer) to perform the defined tasks associated with the various technologies described above. The quantum gate operating system 102 and / or its components can be used to solve new problems arising from advancements in the technologies described above and the application of quantum computing systems, cloud computing systems, computer architectures, and / or other technologies.

[0097] It should be understood that the quantum gate operating system 102 can utilize combinations of various electrical components, mechanical components, and circuits that cannot be replicated in the human mind or executed by a human, because the various operations that the quantum gate operating system 102 and / or its components can perform are beyond the capabilities of the human mind. For example, the amount of data processed by the quantum gate operating system 102 within a given period, the speed at which it processes this data, or the types of data it processes can be greater than, faster than, or different from the amount, speed, or types of data that the human mind can process within the same period.

[0098] According to several embodiments, the quantum gate operating system 102 may also be fully operable for performing one or more other functions (e.g., full power-on, full execution, and / or another function) while simultaneously performing the various operations described herein. It should be understood that such simultaneous multi-operation execution is beyond the capabilities of the human mind. It should also be understood that the quantum gate operating system 102 may include information that an entity (e.g., a human user) cannot manually obtain. For example, the type, quantity, and / or variety of information included in the quantum gate operating system 102, the canonical fixing component 108, the traversing component 110, the rotation component 202, and / or the lattice shifting component 204 may be more complex than information manually obtainable by a human user.

[0099] In some embodiments, the quantum gate operating system 102 may be associated with a cloud computing environment. For example, the quantum gate operating system 102 may be associated with the following references. Figure 11 The cloud computing environment described is 1150 and / or the following references Figure 12 One or more functional abstraction layers (e.g., hardware and software layer 1260, virtualization layer 1270, management layer 1280, and / or workload layer 1290) are described.

[0100] The quantum gate operating system 102 and / or its components (e.g., gauge fixing component 108, traversal component 110, rotation component 202, lattice shifting component 204, and / or another component) may employ the following references Figure 11The described cloud computing environment 1150 includes one or more computing resources and / or the following references. Figure 12 One or more functional abstraction layers (e.g., quantum software) are described to perform one or more operations according to one or more embodiments of the present disclosure described herein. For example, cloud computing environment 1150 and / or such one or more functional abstraction layers may include one or more classical computing devices (e.g., classical computers, classical processors, virtual machines, servers, and / or other classical computing devices), quantum hardware, and / or quantum software (e.g., quantum computing devices, quantum computers, quantum processors, quantum circuit simulation software, superconducting circuits, and / or other quantum hardware and / or quantum software), which may be used by quantum gate operating system 102 and / or components thereof to perform one or more operations according to one or more embodiments of the present disclosure described herein. For example, quantum gate operating system 102 and / or components thereof may employ one or more classical and / or quantum computing resources to perform one or more classical and / or quantum: mathematical functions, calculations and / or equations; calculation and / or processing scripts; algorithms; models (e.g., artificial intelligence (AI) models, machine learning (ML) models, and / or another type of model); and / or another operation according to one or more embodiments of the present disclosure described herein.

[0101] It should be understood that although this disclosure includes a detailed description of cloud computing, the implementation of the teachings described herein is not limited to a cloud computing environment. Rather, embodiments of the invention can be implemented in conjunction with any other type of computing environment now known or developed hereafter.

[0102] Cloud computing is a service delivery model that enables convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, network bandwidth, servers, processing, storage, applications, virtual machines, and services) that can be rapidly provisioned and released with minimal management effort or interaction with service providers. This cloud model may include at least five features, at least three service models, and at least four deployment models.

[0103] The features are as follows:

[0104] On-demand self-service: Cloud consumers can unilaterally and automatically provide computing power, such as server time and network storage, as needed, without requiring manual interaction with the service provider.

[0105] Extensive network access: Capabilities are available on the network and accessed through standard mechanisms that facilitate use by heterogeneous thin or thick client platforms (e.g., mobile phones, laptops, and PDAs).

[0106] Resource pooling: A provider's computing resources are pooled to serve multiple consumers using a multi-tenant model, where different physical and virtual resources are dynamically allocated and reallocated based on demand. Location independence has significance because consumers typically do not control or know the exact location of the resources provided, but can specify the location at a higher level of abstraction (e.g., country, state, or data center).

[0107] Rapid Flexibility: In some cases, the ability to scale outwards and inwards quickly and flexibly can be provided. For consumers, the available capacity often appears unlimited and can be purchased in any quantity at any time.

[0108] Measurement services: Cloud systems automatically control and optimize resource usage by leveraging metering capabilities at a level of abstraction appropriate to the service type (e.g., storage, processing, bandwidth, and active user accounts). Resource usage can be monitored, controlled, and reported, providing transparency for both service providers and consumers.

[0109] The service model is as follows:

[0110] Software as a Service (SaaS): The capability offered to consumers is the ability to use the provider's applications running on cloud infrastructure. Applications can be accessed from various client devices through thin client interfaces such as web browsers (e.g., web-based email). Consumers do not manage or control the underlying cloud infrastructure, including the network, servers, operating system, storage, or even individual application capabilities, with possible exceptions such as limited user-specific application configuration settings.

[0111] Platform as a Service (PaaS): This provides consumers with the ability to deploy consumer-created or acquired applications onto cloud infrastructure using programming languages ​​and tools supported by the provider. Consumers do not manage or control the underlying cloud infrastructure, including networks, servers, operating systems, or storage, but they have control over the deployed applications and the configuration of any application hosting environments.

[0112] Infrastructure as a Service (IaaS): This provides consumers with the capability to deliver processing, storage, networking, and other basic computing resources that enable them to deploy and run arbitrary software, which may include operating systems and applications. Consumers do not manage or control the underlying cloud infrastructure, but they do have control over the operating system, storage, deployed applications, and possibly limited control over selected networking components (e.g., host firewalls).

[0113] The deployment model is as follows:

[0114] Private cloud: Cloud infrastructure operated solely by an organization. It can be managed by the organization or a third party and can exist on-site or off-site.

[0115] Community cloud: Cloud infrastructure shared by several organizations and supporting a specific community with shared concerns (e.g., tasks, security requirements, policies, and compliance considerations). It can be managed by an organization or a third party and can exist on-site or off-site.

[0116] Public cloud: Cloud infrastructure available to the general public or large industrial groups and owned by organizations that sell cloud services.

[0117] Hybrid cloud: A cloud infrastructure is a combination of two or more clouds (private, community, or public) that remain a single entity but are bound together by standardized or proprietary technologies that enable data and applications to be ported together (e.g., cloud bursting for load balancing between clouds).

[0118] Cloud computing environments are service-oriented, focusing on statelessness, loose coupling, modularity, and semantic interoperability. At the heart of cloud computing is the infrastructure of a network of interconnected nodes.

[0119] For simplicity of explanation, the computer-implemented method is depicted and described as a series of actions. It should be understood and recognized that the subject matter innovation is not limited to the actions shown and / or the order of the actions; for example, actions may occur in different orders and / or simultaneously, and may occur with other actions not presented and described herein. Furthermore, not all actions shown are necessary to implement the computer-implemented method according to the disclosed subject matter. Moreover, those skilled in the art will understand and appreciate that the computer-implemented method may alternatively be represented as a series of interrelated states via state diagrams or events. Furthermore, it should be understood that the computer-implemented method disclosed below and throughout this specification can be stored on an article of art to facilitate the transfer and assignment of such a computer-implemented method to a computer. As used herein, the term "article of art" is intended to cover a computer program accessible from any computer-readable device or storage medium.

[0120] In order to provide context for the various aspects of the disclosed subject, Figure 10 The following discussion is intended to provide a general description of the suitable environment in which the various aspects of the disclosed subject matter can be realized. Figure 10 A block diagram is shown that illustrates an example non-limiting operating environment that can facilitate one or more embodiments described herein. For the sake of brevity, repeated descriptions of similar elements employed in other embodiments described herein are omitted.

[0121] refer to Figure 10The suitable operating environment 1000 for implementing various aspects of this disclosure may also include a computer 1012. The computer 1012 may further include a processing unit 1014, system memory 1016, and a system bus 1018. The system bus 1018 couples system components, including but not limited to system memory 1016, to the processing unit 1014. The processing unit 1014 may be any of a variety of available processors. Dual microprocessors and other multiprocessor architectures may also be used as the processing unit 1014. The system bus 1018 may be any of several types of bus architectures, including memory buses or memory controllers, peripheral buses or external buses, and / or local buses using any of the various available bus architectures, including but not limited to Industry Standard Architecture (ISA), Micro Channel Architecture (MSA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), FireWire (IEEE 1394), and Small Computer System Interface (SCSI).

[0122] System memory 1016 may also include volatile memory 1020 and non-volatile memory 1022. The Basic Input / Output System (BIOS) is stored in the non-volatile memory 1022, and the BIOS contains basic routines for transferring information between components within the computer 1012, such as during startup. The computer 1012 may also include removable / non-removable, volatile / non-volatile computer storage media. Figure 10 Disk storage device 1024 is shown, for example. Disk storage device 1024 may also include, but is not limited to, devices such as disk drives, floppy disk drives, magnetic tape drives, Jaz drives, Zip drives, LS-100 drives, flash memory cards, or Memory Sticks. Disk storage device 1024 may also include storage media, either alone or in combination with other storage media. To facilitate connection of disk storage device 1024 to system bus 1018, a removable or non-removable interface, such as interface 1026, is typically used. Figure 10 Software that acts as an intermediary between the user and the basic computer resources described in the suitable operating environment 1000 is also described. Such software may also include, for example, an operating system 1028. The operating system 1028, which may be stored on a disk storage device 1024, is used to control and allocate the resources of the computer 1012.

[0123] System application 1030 utilizes resource management by operating system 1028 through program modules 1032 and program data 1034 stored, for example, on system memory 1016 or disk storage device 1024. It should be understood that this disclosure can be implemented using various operating systems or combinations of operating systems. Users input commands or information into computer 1012 via input device 1036. Input device 1036 includes, but is not limited to, pointing devices such as mice, trackballs, pens, touchpads, keyboards, microphones, joysticks, gamepads, disc satellite dishes, scanners, TV tuner cards, digital cameras, digital camcorders, webcams, etc. These and other input devices are connected to processing unit 1014 via interface port 1038 through system bus 1018. Interface port 1038 includes, for example, serial ports, parallel ports, game ports, and Universal Serial Bus (USB). Output device 1040 uses some of the same type of ports as input device 1036. Thus, for example, a USB port can be used to provide input to computer 1012 and to output information from computer 1012 to output device 1040. Output adapter 1042 is provided to illustrate that, in addition to other output devices 1040 that require special adapters, there are other output devices 1040, such as monitors, speakers, and printers. By way of illustration and not limitation, output adapter 1042 includes video cards and sound cards that provide a means of connection between output devices 1040 and system bus 1018. It should be noted that other devices and / or systems of devices provide both input and output capabilities, such as remote computer 1044.

[0124] Computer 1012 can operate in a networked environment using a logical connection to one or more remote computers (such as remote computer 1044). Remote computer 1044 can be a computer, server, router, network PC, workstation, microprocessor-based appliance, peer-to-peer device, or other public network node, and typically may also include many or all of the elements described relative to computer 1012. For simplicity, memory storage device 1046 is described using only remote computer 1044 as an example. Remote computer 1044 is logically connected to computer 1012 via network interface 1048 and then physically connected via communication connection 1050. Network interface 1048 includes wired and / or wireless communication networks, such as local area network (LAN), wide area network (WAN), cellular network, and / or another wired and / or wireless communication network. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Wire Distributed Data Interface (CDDI), Ethernet, Token Ring, etc. WAN technologies include, but are not limited to, point-to-point links, circuit-switched networks (such as Integrated Services Digital Network (ISDN)) and their variants, packet-switched networks, and Digital Subscriber Line (DSL). Communication connection 1050 refers to the hardware / software used to connect network interface 1048 to system bus 1018. Although communication connection 1050 is shown inside computer 1012 for clarity, it may also be outside computer 1012. For illustrative purposes only, the hardware / software used to connect to network interface 1048 may also include internal and external technologies such as modems, including conventional telephone-grade modems, cable modems and DSL modems, ISDN adapters and Ethernet cards.

[0125] See now Figure 11 This describes an illustrative cloud computing environment 1150. As shown, the cloud computing environment 1150 includes one or more cloud computing nodes 1110 to which local computing devices used by cloud consumers can communicate. These local computing devices are, for example, personal digital assistants (PDAs) or cellular phones 1154A, desktop computers 1154B, laptop computers 1154C, and / or automotive computer systems 1154N. Although... Figure 11 As not shown, cloud computing node 1110 may also include a quantum platform (e.g., a quantum computer, quantum hardware, quantum software, and / or another quantum platform), with which the local computing devices used by cloud consumers can communicate. Nodes 1110 can communicate with each other. They can be physically or virtually grouped (not shown) in one or more networks, such as private clouds, community clouds, public clouds, or hybrid clouds, or combinations thereof, as described above. This allows cloud computing environment 1150 to provide Infrastructure as a Service, Platform as a Service, and Software as a Service without requiring cloud consumers to maintain resources on their local computing devices. It should be understood that... Figure 11The types of computing devices 1154A-N shown are for illustrative purposes only, and computing node 1110 and cloud computing environment 1150 can communicate with any type of computerized device via any type of network and network-addressable connection (e.g., using a web browser).

[0126] See now Figure 12 This demonstrates the 1150 cloud computing environment ( Figure 11 This provides a set of functional abstractions. It should be understood beforehand that... Figure 12 The components, layers, and functions shown are for illustrative purposes only, and embodiments of the invention are not limited thereto. As depicted, the following layers and corresponding functions are provided:

[0127] The hardware and software layer 1260 includes hardware and software components. Examples of hardware components include: a host 1261; a server 1262 based on a RISC (Reduced Instruction Set Computer) architecture; a server 1263; a blade server 1264; a storage device 1265; and network and networking components 1266. In some embodiments, software components include network application server software 1267, database software 1268, and quantum platform routing software (…). Figure 12 (not shown in the image) and / or quantum software ( Figure 12 (Not shown in the image).

[0128] The virtualization layer 1270 provides an abstraction layer from which the following examples of virtual entities can be provided: virtual server 1271; virtual storage device 1272; virtual network 1273, including virtual private network; virtual application and operating system 1274; and virtual client 1275.

[0129] In one example, management layer 1280 may provide the following functionalities: Resource Provisioning 1281 Provides dynamic procurement of computing resources and other resources used to perform tasks within the cloud computing environment. Metering and Pricing 1282 Provides cost tracking as resources are utilized within the cloud computing environment and bills or invoices for the consumption of these resources. In one example, these resources may include application software licenses. Security Provides authentication for cloud consumers and tasks, as well as protection for data and other resources. User Portal 1283 Provides consumers and system administrators with access to the cloud computing environment. Service Level Management 1284 Provides allocation and management of cloud computing resources to ensure that required service levels are met. Service Level Agreement (SLA) Planning and Fulfillment 1285 Provides pre-scheduling and procurement of cloud computing resources, anticipating future requirements for those resources according to the SLA.

[0130] Workload layer 1290 provides examples of functionalities that can leverage a cloud computing environment. Non-limiting examples of workloads and functionalities that can be provided from this layer include: mapping and navigation 1291; software development and lifecycle management 1292; virtual classroom education delivery 1293; data analysis and processing 1294; transaction processing 1295; and quantum gate operation software 1296.

[0131] This invention can be a system, method, apparatus, and / or computer program product at any possible level of technical detail integration. A computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions thereon for causing a processor to execute aspects of the invention. A computer-readable storage medium may be a tangible device capable of retaining and storing instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media may also include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices such as punch cards or recessed structures with instructions recorded thereon, and any suitable combinations of the foregoing. As used herein, computer-readable storage media should not be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., optical pulses through fiber optic cables), or electrical signals transmitted through wires.

[0132] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network) to an external computer or external storage device. The network may include copper transmission cables, optical fiber transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the corresponding computing / processing device. The computer-readable program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages ​​(including object-oriented programming languages ​​such as Smalltalk, C++, etc.) and procedural programming languages ​​(e.g., the "C" programming language or similar programming languages). Computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network (including a local area network (LAN) or a wide area network (WAN)) or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of the invention, electronic circuits including, for example, programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs) may execute computer-readable program instructions to personalize the electronic circuits by utilizing state information of the computer-readable program instructions.

[0133] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. These computer-readable program instructions can also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and / or other device to operate in a particular manner, such that the computer-readable storage medium in which the instructions are stored includes an article of writing comprising instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. The computer-readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational arrangements to be performed on the computer, other programmable apparatus, or other device to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus, or other device, implement the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams.

[0134] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions comprising one or more executable instructions for implementing a specified logical function. In some alternative embodiments, the functions indicated in the blocks may occur in a non-consecutive order as shown in the figures. For example, depending on the functions involved, two consecutively shown blocks may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order. It will also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified function or action or executes a combination of dedicated hardware and computer instructions.

[0135] While the subject matter has been described above in the general context of computer-executable instructions for a computer program product running on one or more computers, those skilled in the art will recognize that this disclosure may also be implemented in combination with other program modules. Typically, program modules include routines, programs, components, data structures, and / or other program modules that perform a specific task and / or implement a specific abstract data type. Furthermore, those skilled in the art will recognize that the computer implementation of the methods of the present invention can be implemented using other computer system configurations, including single-processor or multi-processor computer systems, small computing devices, mainframe computers, and computers, handheld computing devices (e.g., PDAs, telephones), microprocessor-based or programmable consumer or industrial electronics, etc. The aspects shown can also be implemented in a distributed computing environment, where tasks are performed by remote processing devices linked via a communication network. However, some (if not all) aspects of the present invention can be implemented on a standalone computer. In a distributed computing environment, program modules may reside in both local and remote memory storage devices. For example, in one or more embodiments, the computer-executable component may be executed from memory, which may include or consist of one or more distributed storage units. As used herein, the terms “memory” and “storage unit” are interchangeable. Furthermore, one or more embodiments described herein are capable of executing code from computer-executable components in a distributed manner, for example, multiple processors working together or cooperating to execute code from one or more distributed memory units. As used herein, the term "memory" may include a single memory or memory unit at one location or multiple memories or memory units at one or more locations.

[0136] As used herein, the terms “component,” “system,” “platform,” “interface,” etc., may refer to and / or include computer-related entities or entities associated with an operating machine having one or more specific functions. Entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable file, a thread of execution, a program, and / or a computer. For illustration, both an application running on a server and the server itself can be components. One or more components may reside within a process and / or a thread of execution, and components may reside on a single computer and / or be distributed across two or more computers. In another instance, a corresponding component may execute from a different computer-readable medium having different data structures stored thereon. Components may communicate via local and / or remote processes, such as according to signals having one or more data packets (e.g., data from a component interacting with another component in a local system, a distributed system, and / or data from a component interacting with other systems across a network such as the Internet via that signal). As another example, a component may be a device having specific functions provided by mechanical parts operated by electrical or electronic circuitry, which is operated by a software or firmware application executed by a processor. In such a case, the processor can be internal or external to the device and can execute at least a portion of the software or firmware application. As another example, the component can be a device that provides a specific function through electronic components without mechanical parts, wherein the electronic components can include a processor or other means for performing software or firmware that at least partially endows the electronic components with the functions. In one aspect, the component can be emulated via a virtual machine, for example, within a cloud computing system.

[0137] Furthermore, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X adopts A or B" is intended to mean any natural inclusive permutation. That is, if X adopts A; X adopts B; or X adopts both A and B, then "X adopts A or B" is satisfied in any of the foregoing cases. Additionally, the articles "a" and "an" as used in the subject matter specification and figures should generally be interpreted as meaning "one or more" unless otherwise specified or clearly indicated from the context to the singular form. As used herein, the terms "example" and / or "exemplary" are used to indicate that something is used as an example, instance, or illustration. To avoid doubt, the subject matter disclosed herein is not limited to such examples. Furthermore, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or superior to other aspects or designs, nor does it imply the exclusion of equivalent exemplary structures and techniques known to those skilled in the art.

[0138] As used herein, the term "processor" can refer to virtually any computing processing unit or device, including but not limited to a single-core processor; a single processor with software multithreading capabilities; a multi-core processor; a multi-core processor with software multithreading capabilities; a multi-core processor with hardware multithreading technology; a parallel platform; and a parallel platform with distributed shared memory. Additionally, "processor" can refer to an integrated circuit, application-specific integrated circuit (ASIC), digital signal processor (DSP), field-programmable gate array (FPGA), programmable logic controller (PLC), complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. Furthermore, processors can utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space utilization or enhance the performance of user equipment. Processors can also be implemented as a combination of computing processing units. In this disclosure, terms such as “storage,” “storage device,” “data storage,” “data storage apparatus,” “database,” and substantially any other information storage component, in relation to the operation and function of a component, are used to refer to a “storage component,” an entity embodied in “memory,” or a component that includes memory. It should be understood that the memory and / or memory components described herein can be volatile or non-volatile memory, or may include both volatile and non-volatile memory. By way of example and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory may include, for example, RAM that can act as an external cache memory. By way of illustration and not limitation, RAM can be obtained in many forms, such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), direct Rambus, etc. RAM (DRRAM), Direct Rambus Dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM). Additionally, the memory components of the systems or computer-implemented methods disclosed herein are intended to include (but are not limited to) these and any other suitable types of memory.

[0139] The above description includes only examples of systems and computer-implemented methods. It is certainly impossible to describe every conceivable combination of components or computer-implemented methods for the purposes of describing this disclosure, but those skilled in the art will recognize that many other combinations and arrangements of this disclosure are possible. Furthermore, with respect to the use of the terms “comprising,” “having,” “possessing,” etc., in the detailed description, claims, appendices, and drawings, these terms are intended to be inclusive in a manner similar to how the term “comprising” is interpreted when used as a transitional word in the claims.

[0140] Various embodiments have been described for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been chosen to best explain the principles of the embodiments, their practical application, or technical improvements to technologies found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

1. A computer system, comprising: A processor that executes computer-executable components stored in memory, the computer-executable components including: The canonical fixing component applies canonical fixing operations to the subsystem code of the encoded qubits in the heavy hexagonal lattice to generate switching subsystem code; A lattice-shifting component adds an additional row of auxiliary qubits and an additional row of data qubits to the bottom of the qubit lattice of the switching subsystem code, then shifts the switching subsystem code downwards such that the bottom row of the switching subsystem code occupies the additional auxiliary qubit row; and further shifts the switching subsystem code downwards such that the bottom row of the switching subsystem code occupies the additional data qubit row, thereby generating a shifted switching subsystem code; and A traversing component applies a lateral Hadamard operation to the shift-switching subsystem code to generate rotation subsystem code, wherein the traversing component also applies the lateral Hadamard operation to the shift-switching subsystem code to apply a Hadamard gate on the data qubits and swaps the X-type canonical operator and the Z-type canonical operator.

2. The system according to claim 1, wherein, The computer-executable component also includes: A rotating component that rotates the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices during quantum code execution.

3. The system according to any one of claims 1-2, wherein, The canonical fixing component applies the canonical fixing operation to the subsystem code to exchange two-body canonical operators and four-body canonical operators in a subset of the subsystem code.

4. The system according to any one of claims 1-2, wherein, The traversal component also applies the lateral Hadamard operation to the shift switching subsystem code to apply a Hadamard gate on the data qubits and also swaps: an X-type stabilizer and a Z-type stabilizer; and an X-type logic operator and a Z-type logic operator.

5. The system according to claim 2, wherein, The rotating component performs two pairwise swap gate operations between qubits that are symmetrical to each other on the vertical and diagonal axes in the code of the rotating subsystem.

6. A computer-implemented method, comprising: A system operatively coupled to a processor applies fixed-operation rules to the subsystem code of encoded qubits in a heavy hexagonal lattice to generate switching subsystem code; The system shifts the qubit lattice of the switching subsystem code to generate the shift switching subsystem code. Specific steps include: The system adds an additional row of auxiliary qubits and an additional row of data qubits to the bottom of the grid; The system shifts the switching subsystem code downwards such that the bottom line of the switching subsystem code occupies the additional auxiliary qubit line; and The system shifts the switching subsystem code downwards, so that the bottom line of the switching subsystem code occupies the additional data qubit line; The system applies a lateral Hadamard operation to the shift switching subsystem code to generate rotation subsystem code; and The system applies the transverse Hadamard operation to the shift switching subsystem code to apply a Hadamard gate to the data qubits and swaps the X-type canonical operator and the Z-type canonical operator.

7. The computer-implemented method according to claim 6, further comprising: The system rotates the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices.

8. The computer-implemented method according to any one of claims 6 to 7, further comprising: The system applies the specification fixation operation to the subsystem code to exchange two-body specification operators and four-body specification operators in a subset of the subsystem code.

9. The computer-implemented method according to any one of claims 6 to 7, further comprising: The system applies the lateral Hadamard operation to the shift switching subsystem code to apply a Hadamard gate on the data qubits and also swaps: the X-type stabilizer and the Z-type stabilizer; And X-type logical operators and Z-type logical operators.

10. The computer-implemented method according to any one of claims 6 to 7, further comprising: The system performs two pairwise swap gate operations between qubits that are symmetrical to each other on the vertical and diagonal axes in the code of the rotating subsystem.

11. A computer program product comprising program instructions executable by a processor to cause the processor to: Apply fixed-operation rules to the subsystem code of encoded qubits in a heavy hexagonal lattice to generate switching subsystem code; The qubit lattice of the switching subsystem code is shifted to generate the shift switching subsystem code. Specific steps include: Add an additional row of auxiliary qubits and an additional row of data qubits to the bottom of the grid; The switching subsystem code is shifted down such that the bottom line of the switching subsystem code occupies the additional auxiliary qubit line; and The switching subsystem code is shifted down so that the bottom line of the switching subsystem code occupies the additional data qubit line; Applying a lateral Hadamard operation to the shift switching subsystem code to generate rotation subsystem code; and The lateral Hadamard operation is applied to the shift switching subsystem code to apply a Hadamard gate to the data qubits and swap the X-type canonical operator and the Z-type canonical operator.

12. The computer program product according to claim 11, wherein, The program instructions can also be executed by the processor to cause the processor to: The rotating subsystem code is rotated to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices during quantum code execution.

13. The computer program product according to any one of claims 11 to 12, wherein, The program instructions can also be executed by the processor to cause the processor to: The specification fixation operation is applied to the subsystem code to exchange the two-body specification operators and four-body specification operators in a subset of the subsystem code.

14. The computer program product according to any one of claims 11 to 12, wherein, The program instructions can also be executed by the processor to cause the processor to: The lateral Hadamard operation is applied to the shift switching subsystem code to apply a Hadamard gate on the data qubits and also swaps: the X-type stabilizer and the Z-type stabilizer; And X-type logical operators and Z-type logical operators.

15. The computer program product according to any one of claims 11 to 12, wherein, The program instructions can also be executed by the processor to cause the processor to: Two pairwise swap gate operations are performed between qubits whose vertical and diagonal axes are symmetrical to each other in the code concerning the said rotating subsystem.

16. A computer system, comprising: A processor that executes computer-executable components stored in memory, the computer-executable components including: The specification fixation component applies specification fixation operations to the subsystem code encoding qubits to generate switching subsystem code; A lattice shifting component shifts the qubit lattice of the switching subsystem code to generate shift-switching subsystem code, wherein the lattice shifting component generates the shift-switching subsystem code in the following manner: Add an additional row of auxiliary qubits and an additional row of data qubits to the bottom of the grid; The switching subsystem code is shifted down such that the bottom line of the switching subsystem code occupies the additional auxiliary qubit line; and The switching subsystem code is shifted down such that the bottom line of the switching subsystem code occupies the additional data qubit line; and A traversing component applies a lateral Hadama operation to the shift switching subsystem code to generate rotation subsystem code; The traversing component also applies the traversing Hadamard operation to the shift switching subsystem code to apply a Hadamard gate to the data qubits and swap the X-type canonical operator and the Z-type canonical operator.

17. The system according to claim 16, wherein, The computer-executable component also includes: A rotating component that rotates the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices during quantum code execution.

18. The system according to any one of claims 16 to 17, wherein, The canonical fixing component applies the canonical fixing operation to the subsystem code to exchange two-body canonical operators and four-body canonical operators in a subset of the subsystem code.

19. The system according to any one of claims 16 to 17, wherein, The traversal component applies the lateral Hadamard operation to the shift switching subsystem code to apply a Hadamard gate on the data qubits and also swaps: the X-type stabilizer and the Z-type stabilizer; And X-type logical operators and Z-type logical operators.

20. The system according to claim 17, wherein, The rotating component performs two pairwise swap gate operations between qubits that are symmetrical to each other on the vertical and diagonal axes in the code of the rotating subsystem.

21. A computer-implemented method, comprising: A system operatively coupled to a processor applies fixed-operation rules to the subsystem code encoding qubits to generate switching subsystem code; The system shifts the qubit lattice of the switching subsystem code to generate the shift switching subsystem code, specifically including the following steps: The system adds an additional row of auxiliary qubits and an additional row of data qubits to the bottom of the grid; The system shifts the switching subsystem code downwards such that the bottom line of the switching subsystem code occupies the additional auxiliary qubit line; and The system shifts the switching subsystem code downwards, so that the bottom line of the switching subsystem code occupies the additional data qubit line; The system applies a lateral Hadamard operation to the shift switching subsystem code to generate rotation subsystem code; and The system applies the transverse Hadamard operation to the shift switching subsystem code to apply a Hadamard gate to the data qubits and swaps the X-type canonical operator and the Z-type canonical operator.

22. The computer-implemented method according to claim 21, further comprising: The system rotates the rotating subsystem code to generate fault-tolerant logic Hadamard gate code that reduces at least one of frequency collisions or crosstalk errors associated with quantum devices.

23. The computer-implemented method according to any one of claims 21 to 22, further comprising: The system applies the specification fixation operation to the subsystem code to exchange two-body specification operators and four-body specification operators in a subset of the subsystem code.

24. The computer-implemented method according to any one of claims 21 to 22, further comprising: The system applies the lateral Hadamard operation to the shift switching subsystem code to apply a Hadamard gate on the data qubits and also swaps: the X-type stabilizer and the Z-type stabilizer; And X-type logical operators and Z-type logical operators.

25. The computer-implemented method according to any one of claims 21 to 22, further comprising: The system performs two pairwise swap gate operations between qubits that are symmetrical to each other on the vertical and diagonal axes in the code of the rotating subsystem.

Images