Bus lane optimization design method, device, equipment and storage medium thereof

By optimizing the design of bus lanes in time periods, using genetic simulation annealing algorithm and meso-simulation model, the optimal bus lane design solution is selected, which solves the problem of low utilization rate of bus lanes and improves road operation efficiency.

CN117556570BActive Publication Date: 2025-02-18BEIJING UNIV OF CIVIL ENG & ARCHITECTURE
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Patent Information

Application Number
CN202311273650.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-02-18
Estimated Expiration
2043-09-28

AI Technical Summary

Technical Problem

The layout plan for public lanes in the existing technology does not match the actual road demand, resulting in low utilization rate of public lanes and affecting the operation efficiency of the road network.

Method used

By optimizing the design of bus lanes in time periods, using genetic simulation annealing algorithm to solve the design scheme of bus lanes, combining the meso-simulation model for simulation training, and selecting the bus lanes with the smallest value as the optimal design scheme.

Benefits of technology

It improves the utilization rate of bus lanes, ensures the stable and smooth operation of roads, and solves the problem of mismatch between the bus lanes layout plan and the actual road needs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a bus lane optimization design method, device, equipment and storage medium thereof, the method comprising: obtaining a bus lane design scheme set, the set including at least one bus lane design scheme; obtaining road network parameters and travel demand; inputting each bus lane design scheme, road network parameters and travel demand into a preset time-divided bus lane optimization design model, solving the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, calculating the total road network travel time corresponding to each bus lane design scheme; selecting the bus lane design scheme with the smallest value from at least one road network total travel time as the optimal design scheme. That is, by optimizing the design of bus lanes in time periods, the utilization rate of bus lanes is improved, the road is guaranteed to be stable and smooth, and the problem of mismatch between bus lane layout schemes and actual road demand is solved.
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Description

Technical Field

[0001] The present invention relates to the technical field of urban public transportation, and in particular to a method, device, equipment and storage medium for optimizing the design of bus lanes. Background Art

[0002] The design of bus lanes plays an important role in improving the service level and attractiveness of urban public transportation, and is conducive to promoting the policy orientation of urban green development. However, there is also a contradiction that the utilization efficiency of bus lanes is low, which has a great impact on the overall operating efficiency of the road network.

[0003] Research shows that bus lanes are only effective when there is sufficient travel demand. Specifically, bus lanes improve network efficiency only on congested roads. On uncrowded networks, however, their presence can actually reduce efficiency.

[0004] In real urban transportation networks, travel demand between different ODs fluctuates continuously throughout the day, and the degree of congestion in the network also changes over time. In this case, simply dividing road rights in space (i.e., designating certain lanes as bus lanes, which other vehicles cannot occupy at any time) can lead to certain drawbacks. For example, the establishment of bus lanes can reduce the efficiency of the road network during off-peak hours. Therefore, to optimize the efficiency of the road network, it is extremely important to meet public transportation travel demand during peak periods while reducing the impact on other traffic participants during other periods. Summary of the Invention

[0005] The present invention provides a bus lane optimization design method, device, equipment and storage medium thereof, which are used to solve the problem in the prior art that the bus lane layout plan does not match the actual road demand, resulting in low bus lane utilization. The method optimizes the design of bus lanes by time period, improves the utilization rate of bus lanes, and ensures stable and smooth road operation.

[0006] The present invention provides a bus lane optimization design method, the method comprising:

[0007] Obtaining a set of bus lane design solutions, wherein the set includes at least one bus lane design solution;

[0008] Obtain road network parameters and travel demand;

[0009] Inputting each bus lane design scheme, the road network parameters, and the travel demand into a preset time-divided bus lane optimization design model, solving the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculating the total road network travel time corresponding to each bus lane design scheme. The time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model;

[0010] A bus lane design scheme with the smallest total travel time is selected as the optimal design scheme from at least one of the road networks.

[0011] According to a bus lane optimization design method provided by the present invention, the step of obtaining a bus lane design solution set, wherein the set includes at least one bus lane design solution, comprises:

[0012] Based on the road network parameters and the travel demand, the traffic road network is divided into time periods to obtain at least one bus lane design scheme.

[0013] According to a bus lane optimization design method provided by the present invention, the meso-level simulation model includes a travel generation module, a path selection module, a vehicle driving module, a bus passenger flow update module, and a travel time statistics module;

[0014] The travel generation module generates car flows and bus passenger flows within the traffic network according to given time-varying travel demands;

[0015] The path selection module calculates the travel time of each road section in the traffic network at the current moment;

[0016] The vehicle travel module determines the traffic flow state in the traffic network at the beginning of the next step according to the traffic flow state of the traffic network at the current step;

[0017] The bus passenger flow update module obtains the set of buses passing through each bus station within the current step length based on the position changes of each bus in the traffic network, and updates the waiting passenger list and bus passenger set of each bus station for the route selection module to determine the bus travel strategy;

[0018] The travel time statistics module counts the vehicle and passenger travel time of each road section within each simulation step.

[0019] According to a bus lane optimization design method provided by the present invention, the constraints of the bus lane optimization design model include budget constraints, road condition constraints, and setting time period constraints.

[0020] Solving the time-divided bus lane optimization design model based on the genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design solution includes:

[0021] A genetic simulated annealing algorithm is used to obtain bus lane design schemes for different time periods. Based on the meso-level simulation model, the total travel time of the road network corresponding to each bus lane design scheme is obtained. During the solution process, the genetic simulated annealing algorithm perturbs and accepts the state of each individual after the crossover and mutation operations in each iteration, and uses the updated result to enter the next iteration or be output as the result.

[0022] According to a bus lane optimization design method provided by the present invention, the genetic simulated annealing algorithm is determined according to encoding mode design, fitness function design, initial population generation, genetic operation design, perturbation function design, state acceptance criterion and cooling function design.

[0023] The present invention also provides a bus lane optimization design device, comprising:

[0024] A first acquisition module is configured to acquire a set of bus lane design solutions, wherein the set includes at least one bus lane design solution;

[0025] The second acquisition module is used for road network parameters and travel demand;

[0026] a scheme optimization module, configured to input each bus lane design scheme, the road network parameters, and the travel demand into a preset time-divided bus lane optimization design model, solve the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculate the total road network travel time corresponding to each bus lane design scheme; the time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model;

[0027] The scheme determination module is used to select the bus lane design scheme with the smallest total travel time from at least one of the road networks as the optimal design scheme.

[0028] The present invention also provides a bus lane optimization design device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements any of the above-described bus lane optimization design methods.

[0029] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the above-described bus lane optimization design methods.

[0030] The bus lane optimization design method, device, equipment, and storage medium provided by the present invention obtain at least one bus lane design scheme, road network parameters, and travel demand; input each bus lane design scheme, road network parameters, and travel demand into a preset time-divided bus lane optimization design model; solve the time-divided bus lane optimization design model using a genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design scheme; and select the bus lane design scheme with the minimum total road network travel time as the optimal design scheme. In other words, by optimizing the bus lane design by time period, the utilization rate of the bus lane is improved, ensuring stable and smooth road operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 This is one of the flow charts of the bus lane optimization design method provided by the present invention;

[0033] Figure 2 This is a schematic diagram of a method for describing the traffic flow on a road section in the bus lane optimization design method provided by the present invention;

[0034] Figure 3 Schematic diagram of the overall framework of the mesoscopic simulation model of the bus lane optimization design method provided by the present invention;

[0035] Figure 4 This is a schematic diagram of traffic unit division in the bus lane optimization design method provided by the present invention;

[0036] Figure 5 This is a flow chart of the genetic simulated annealing algorithm in the bus lane optimization design method provided by the present invention;

[0037] Figure 6 It is a structural schematic diagram of the bus lane optimization design equipment provided by the present invention. DETAILED DESCRIPTION

[0038] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0039] The following combination Figures 1-6 The bus lane optimization design method of the present invention is described with reference to Figure 1 , the bus lane optimization design method includes:

[0040] Step S100: obtaining a set of bus lane design solutions, wherein the set includes at least one bus lane design solution;

[0041] Step S200, obtaining road network parameters and travel demand;

[0042] Step S300: Input each bus lane design scheme, road network parameters, and travel demand into a preset time-divided bus lane optimization design model. The time-divided bus lane optimization design model is solved using a genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design scheme. The time-divided bus lane optimization design model is constructed by simulation training of the bus lane design schemes and the total road network travel time based on a meso-level simulation model.

[0043] Step S400: Selecting a bus lane design scheme with the smallest total travel time from at least one road network as the optimal design scheme.

[0044] The purpose of this embodiment is to calculate the total travel time of the road network for each possible bus lane design scheme through a preset bus lane optimization design model, determine the bus lane design scheme with the shortest travel time as the optimal design scheme, meet time-varying travel needs, and improve the utilization rate of bus lanes.

[0045] In this embodiment, the specific application scenarios are:

[0046] When bus lanes are deployed on urban road networks, they can only play their intended role when travel demand on the road network is high enough. In other words, bus lanes can only improve road network efficiency when they are installed on congested roads. On uncrowded roads, the installation of bus lanes may actually reduce road network efficiency.

[0047] In real urban transportation networks, travel demand between different ODs fluctuates continuously throughout the day, and the degree of congestion in the network also changes over time. In this case, simply dividing road rights in space (i.e., designating certain lanes as bus lanes, which other vehicles cannot occupy at any time) can lead to certain drawbacks. For example, the establishment of bus lanes can reduce the efficiency of the road network during off-peak hours. Therefore, to optimize the efficiency of the road network, it is extremely important to meet public transportation travel demand during peak periods while reducing the impact on other traffic participants during other periods.

[0048] As an example, the bus lane optimization design method may be applied to a bus lane optimization design system, which is installed in a processing device.

[0049] As an example, this embodiment assumes that there are only two modes of transportation in the traffic network: cars and buses. Users determine their travel mode by comparing the utility of these two modes of transportation. However, there is a certain error in the user's perception of the utility of the transportation mode, and the error term obeys an independent Gumble distribution.

[0050] The specific steps are as follows:

[0051] Step S100: Obtain a set of bus lane design solutions, wherein the set includes at least one bus lane design solution.

[0052] As an example, based on the settings of car routes and bus routes in the traffic network, and the settings of bus lanes on bus routes, at least one bus lane design scheme is determined, and each of the bus lane design schemes, road network parameters and travel demand are input into a preset time-divided bus lane optimization design model. The time-divided bus lane optimization design model is solved based on the genetic simulated annealing algorithm, and the total road network travel time corresponding to each bus lane design scheme is calculated. The bus lane design scheme with the smallest value from at least one of the road network total travel time is selected as the optimal design scheme to solve the problem of mismatch between the bus lane layout scheme and the actual road demand.

[0053] As an example, the step of obtaining a set of bus lane design solutions, wherein the set includes at least one bus lane design solution, includes:

[0054] Step S110, obtaining road network parameters and travel demand;

[0055] Step S120 : Based on the road network parameters and travel demand, the traffic road network is divided into time periods to obtain at least one bus lane design scheme.

[0056] As an example, the basic information of the traffic network is obtained, which includes the information of road sections, the number of sections, bus routes, car routes, etc. Specifically, the set of road sections in the traffic network is set to E, the number of sections is set to e, the set of bus routes is set to L, and the number of bus routes is set to l. A day is divided into H time periods, and it is stipulated that the setting status of bus lanes in the traffic network during the same time period should be consistent, with a 0-1 variable Represents the setting of bus lanes on the h-th time segment e, then the design scheme Φ of the time-divided bus lanes in the traffic network can be described by a |E|×H-dimensional 0-1 vector.

[0057] That is, specifically using It should be noted that the purpose of bus lane optimization design is to specify the optimal time-divided bus lane design scheme Φ so that the total travel time of the road network within the planning time is minimized.

[0058] Step S200: Obtain road network parameters and travel demand.

[0059] As an example, given an urban traffic network, the set of OD pairs (starting and ending traffic volume) in the network is W, and the arrival intensity of the travel demand of each OD pair changes over time. Among them, the arrival intensity of the travel demand between OD pairs w at time t is Right now The corresponding bus lane optimization design model needs to reasonably describe the dynamic changes in the traffic network status under this time-varying travel demand.

[0060] As an example, the basic information on the traffic road network includes road network parameters, such as road network maps, road section information, driving status parameters, traffic flow, bus lane settings, etc., as well as travel demand. It should be noted that in the time-divided bus lane optimization design, travel demand is time-varying. Therefore, the decision variable of the bus lane optimization design problem is an |E|×H dimensional 0-1 vector, that is, the setting of bus lanes on the road section at different time periods is the decision condition, and the setting of bus lanes on each road section within the same time period must be consistent. And the required travel demand should be the travel demand arrival intensity between each OD at each moment, that is, The corresponding optimization model needs to reasonably describe the dynamic changes of the road network status under this time-varying travel demand.

[0061] In step S300, each bus lane design scheme, road network parameters, and travel demand are input into a preset time-divided bus lane optimization design model. The time-divided bus lane optimization design model is solved based on a genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design scheme. The time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model.

[0062] As an example, the bus lane optimization design model is to solve the problem of "at which time periods bus lanes need to be set up on each road section within the planning time", so its corresponding decision variable is a 0-1 vector of |E|×H dimensions Where H is the number of time periods included in the planning time. The time period is the basic time unit for setting up bus lanes. The setting of bus lanes on each section of the road within the same time period must be consistent. The components of the vector Indicates whether a bus lane is provided on road segment e during time period t. Therefore, each bus lane design proposal and the basic traffic network information are input into a pre-set bus lane optimization design model. The bus lane optimization design model is solved using a genetic simulated annealing algorithm to obtain the total network travel time for each bus lane design proposal, which is then used to select the optimal design proposal. It should be noted that in this embodiment, the minimum total network travel time for users within the planned timeframe is set as the criterion for determining the optimal design proposal.

[0063] As an example, a basic mesoscopic simulation model refers to the traffic flow description method used by the Mesoscopic Traffic Simulator (MesoTS) in the traffic simulation platform SIMLAB. Because the simulator cannot simulate the multi-lane traffic conditions of an actual road network, this calculation method is used to convert multi-lane vehicles into a single lane (that is, a convoy) for simulation. The calculation of vehicle length and minimum headway time is the rule used for this conversion, minimizing the impact before and after the conversion.

[0064] This embodiment assumes that the traffic flow of each road section is an independent vehicle queue, ignoring the lane changing and overtaking behavior of the vehicle. The vehicle position is calculated based on the position of the head of the vehicle. The length of the vehicle and the minimum headway can be converted into the quotient of the actual value and the number of lanes in the road section. Figure 2 , converting the traffic flow in the actual road network into the traffic flow in the simulation model. As an example, Figure 2Vehicles 6 and 7 are both 5 meters long, with a headway of 8 meters. They are currently traveling in two lanes, and are now being converted to a single lane. 8 / 2 = 4 meters. After converting to a single lane, the length of both vehicles becomes 2.5 meters, and the headway becomes 4 meters. Note that if the road section originally had only one lane, the difference between the two lanes before and after the conversion is the same.

[0065] Therefore, in this embodiment, a meso-level simulation model is used to describe the dynamic changes in the road network status under time-varying travel demand, the total travel time of the design scheme road network is calculated based on the meso-level simulation model, and a bus lane optimization design model is constructed. Finally, a reasonable genetic simulated annealing algorithm is selected to solve the bus lane optimization design model to determine the optimal design scheme for bus lanes in the current urban traffic network, so that the utilization rate of the bus lanes corresponding to the optimal design scheme is the highest.

[0066] As an example, the meso-level simulation model includes a travel generation module, a route selection module, a vehicle driving module, a bus passenger flow update module, and a travel time statistics module;

[0067] The travel generation module generates car flows and bus passenger flows within the traffic network according to given time-varying travel demands;

[0068] The path selection module calculates the travel time of each road section in the traffic network at the current moment;

[0069] The vehicle travel module determines the traffic flow state in the traffic network at the beginning of the next step according to the traffic flow state of the traffic network at the current step;

[0070] The bus passenger flow update module obtains the set of buses passing through each bus station within the current step length based on the position changes of each bus in the traffic network, and updates the waiting passenger list and bus passenger set of each bus station for the route selection module to determine the bus travel strategy;

[0071] The travel time statistics module counts the vehicle and passenger travel time of each road section within each simulation step.

[0072] As an example, the meso-simulation model refers to Figure 3 The meso-level simulation model provides corresponding input interfaces. Taking the time-divided bus lane design scheme, time-varying travel demand and road network parameters as input, it can compare different time-divided bus lane design schemes, count and output the total travel time of the road network to assist in making decisions on the optimal design scheme of the time-divided bus lane, and simulate the optimal design scheme under different urban traffic networks and demand conditions.

[0073] As an example, the mesoscopic simulation model constructed in this embodiment can reasonably reflect the influence of traffic flow on vehicle driving speed on the road section, the understanding of road network status information by travelers, as well as the choice of travel mode and route.

[0074] Specifically, the mesoscopic simulation model includes the above five modules, and its working method is as follows:

[0075] The trip generation module generates car flow and bus passenger flow in the traffic road network according to the given time period travel demand.

[0076] Assume that the arrivals of travelers between each OD pair in the traffic road network follow a Poisson distribution, then the inter-arrival time of travelers follows a negative exponential distribution, that is:

[0077] P(Δt < t) = 1 - e λt

[0078] where, Δt is the inter-arrival time of two consecutive travelers, λ is the arrival intensity of travelers, and P(Δt < t) is the probability that the inter-arrival time Δt is less than time t.

[0079] The inverse cumulative distribution function method is used to generate the inter-arrival time of two consecutive travelers, that is:

[0080]

[0081] In the formula, r is a random number uniformly distributed between (0, 1), Δt is the inter-arrival time of two consecutive travelers, and λ is the arrival intensity of travelers.

[0082] Based on this, the travelers arriving between each OD pair within the current simulation time step and their corresponding departure times can be generated according to the input time-varying travel demand. Then, combined with the shortest physical path between each OD pair determined by the route selection module and the travel time corresponding to the bus travel hyper-path, the travel mode of each traveler can be determined, and the queue linked list of the corresponding intersections and bus stops can be updated. The specific process is as follows:

[0083] Step 0: At time T, let w = 1.

[0084] Step 1: Read the travel generation intensity between the OD pair w at the current time from the input time-varying travel demand Furthermore, the traveler linked list generated by this OD pair within the current time step can be obtained. By updating the traveler linked list subsequently, the travel situation of the road network can be simulated, and finally it can be used to calculate the running time of the road network. The traveler linked list is as follows:

[0085]

[0086] That is,

[0087] Where, is the arrival time of the nth traveler between OD pair w in the simulation step corresponding to time T, and N is the total number of travelers arriving between OD pairs w within this simulation step, satisfying and (SS is the simulation step size).

[0088] Step 2: Obtain the shortest physical path between OD and w at time T through the path selection module and the time required for the bus super path. and According to the Logit model, the travel mode selection probability of travelers starting from OD within w steps can be obtained:

[0089]

[0090]

[0091] in, and are the probabilities of choosing cars and buses for travelers starting from OD pairs w in the current step length, θ is the cost conversion factor of time; and Then, the expected value of other costs of choosing car and bus travel between OD pair w is given. On this basis, for each traveler starting from this OD pair at the current step length, a random number ε∈(0,1) is randomly generated. If If the traveler chooses to travel by car, the list of car travelers starting from the corresponding direction of the intersection will be updated; if not, the traveler chooses to travel by bus, and the list of bus waiting passengers at the corresponding bus stop will be updated.

[0092] Step 3: Determine whether w is equal to |W|. If so, the calculation ends; if not, set w = w + 1 and return to Step 1.

[0093] The vehicle travel module determines the traffic flow state in the traffic network at the beginning of the next step length based on the traffic flow state of the traffic network at the current step length, wherein the traffic flow state of the traffic network includes a list of traveling vehicles on each road section, a list of vehicle queues at each intersection, a list of originating car user queues, and the position of vehicles traveling in the road network.

[0094] Based on the detector and bus card data, the system infers traveler data and the number of trips at each origin and destination. Based on travel demand or travel distribution at different time periods within the network, the network's traffic conditions are calculated. Furthermore, the number of travelers choosing different travel modes at the initial state is calculated, resulting in a list of travelers. The vehicle's position within each road section is updated based on the time it takes the vehicle to pass through each section. Therefore, the vehicle movement module's process of determining the network's traffic flow state at the start of the next step, based on the current step's traffic flow state, is divided into two stages.

[0095] In the first stage, the status of the vehicles in the vehicle list of each road section (position in the road section, running speed, etc.) is updated, and the updating process is carried out section by section.

[0096] For each road segment, the vehicles traveling on it are clustered. The clustering process uses the Traffic Cell method proposed by MesoTS: a threshold value d0 of the distance between the front and rear vehicles is given in advance. When the distance between the front and rear vehicles in the road segment is less than the threshold d0, the two vehicles are classified into one traffic cell; and when the distance between the front and rear vehicles is greater than the threshold d0, the two vehicles are classified into different traffic cells. The threshold d0 is an empirical value. Figure 4 , Figure 4 Given Figure 2 The vehicle clustering method for the traffic flow on the road section shown in the figure shows that only the interval between vehicles 5 and 6 is greater than the threshold, so the traffic flow on this road section is divided into two traffic units.

[0097] Based on vehicle clustering, a simplified car-following model and the speed-density model commonly used in macro models can be used to determine the speed of each moving vehicle, as follows:

[0098] ① Unit following model. This model is used to determine the speed of the leading vehicle in each traffic unit: a threshold d is given in advance. s , calculate the distance between the first vehicle of each traffic unit i and the last vehicle of the previous traffic unit i-1 in the road section (For the first traffic unit on a road segment, represents the distance between the lead vehicle and the end of the road section), the speed of the lead vehicle of this traffic unit can be calculated as follows:

[0099]

[0100] Where, is the speed of the head vehicle of traffic unit i; V free is the free speed of the corresponding vehicle; is the speed of the last vehicle in the previous traffic unit i-1, and for the first traffic unit in the road section, the speed of the last vehicle in the previous traffic unit is V min is the pre-specified minimum speed for the road section; σ i for with d s It should be noted that a traffic unit does not have only one lead vehicle. The number of lead vehicles should be equal to the number of lanes m in the road section.

[0101] ② Speed-density model. This model is used to determine the speed of the remaining vehicles in each traffic unit except the lead vehicle: for traffic unit i, the speed of the jth (j>m) vehicle can be expressed as:

[0102]

[0103] Where K i.j is the density of the part before the jth vehicle in traffic unit i; K jam is the blocking density of the road section; α and β are parameters; is the speed of the head vehicle of traffic unit i; V free is the free speed of the corresponding vehicle. In previous studies, the congestion density K of the road section jam It is usually taken as 210 vehicles / km. Preferably, the corresponding parameters are α=1.8 and β=5.0.

[0104]

[0105] Where, len j-1 is the length of the j-1th vehicle in the traffic unit, P j is the position of the jth vehicle.

[0106] Based on the vehicle's speed, its position is continuously calculated and updated: the simulation step size and the current speed are multiplied together to determine the vehicle's displacement within the step size. This is then added to the original position to determine the vehicle's position at the end of the step size. For vehicles whose updated positions are outside their respective road segments, they are added to the corresponding queue list for the intersection at the end of the segment, based on the route determined by the routing module. The time they entered the intersection queue is also recorded.

[0107] For sections with dedicated bus lanes, separate updates are required for car and bus queues, using the same update process as above. As an example, separate sections for cars and bus lanes are used, and the above process is performed separately to calculate the speeds of cars and buses, updating the car status in the linked list for cars traveling on each section, and the bus status in the linked list for buses traveling on each section. The specific implementation process is essentially the same as for sections without dedicated bus lanes, and will not be repeated here.

[0108] In the second phase, after updating the status of all vehicles, the queue lists at each intersection are further updated, and users and vehicles in the lists are appropriately loaded onto the corresponding road sections. This update process is also performed on a road section by road section basis, and the update of each road section is divided into two steps.

[0109] Step 1: (Link list integration) Extract the originating car user queue link list and the passing vehicle queue link list corresponding to the current road section at the starting intersection, and calculate the arrival time of each vehicle (or user) in these links one by one: for users in the originating car user queue link list, the time they arrive at the current road section is the time they start queuing; for vehicles in the passing vehicle queue link list, the time they arrive at the current road section is equal to the sum of their start queuing time and the inverse of the corresponding direction's passing capacity, that is:

[0110]

[0111] Where, e is the number of the current road section, s(e) is the starting intersection of road section e, is the time when vehicle j arrives at this road section e, is the time when vehicle j starts queuing at the starting intersection s(e) of this road section, Q j,s(e) is the throughput capacity of vehicle j in the direction of intersection s(e). Based on this, the originating car users and passing vehicles that can reach this road section within the current step length are uniformly sorted according to the calculated arrival time, thereby obtaining a new originating car user queue list and passing vehicle queue list;

[0112] Step 2: (Vehicle Loading) Load the originating car users and passing vehicles in the integrated linked list onto the road section one by one, and determine the specific positions of all loaded vehicles at the end of this step: For each vehicle in the linked list, first calculate the position of the vehicle in front when it arrives at this road section, then calculate the speed of the vehicle according to the calculation formula for calculating the speed of the first vehicle in the traffic unit in the unit following model, and then multiply this speed by the remaining time until the end of this step to obtain the specific position of the vehicle. If the vehicle is loaded to the starting point of the road section but there are still vehicles in the linked list, the remaining vehicles will be returned to their corresponding queue linked list, and the time they arrived at the queue will be updated to the end time of this step. It can be understood that the vehicles that have not been completed in the current step are loaded into the queue linked list of the intersection for the next step to continue loading.

[0113] For road sections with dedicated bus lanes, cars and buses need to be loaded into different queues on the road section according to the above method, which will not be repeated here.

[0114] The path selection module can effectively calculate the travel time of each road section in the traffic network at the current moment.

[0115] Based on this, this embodiment uses the shortest automobile travel path calculation method to calculate the shortest physical path between each intersection. This allows the vehicle travel module to determine the next travel path for vehicles traveling to the end of the road section at each intersection and assign it to the corresponding queue list. Based on this, the shortest bus travel path (i.e., bus travel strategy) between each OD is calculated, which allows the trip generation module to determine the mode selection rate between each OD at the current step size.

[0116] As an example, the principle of the shortest path algorithm is as follows: the definition of a car travel path is the same as the traditional path definition. Therefore, the shortest car travel path in a supernetwork can be searched in the car traffic subnetwork using some traditional shortest path algorithms (such as Dijkstra algorithm, Floyd-Warshall algorithm, etc.).

[0117] The shortest bus travel super path calculation method is as follows:

[0118] The definition of a bus travel hyperpath differs somewhat from the traditional path definition, making this type of shortest path problem infeasible using traditional shortest path algorithms. This paper employs calculation methods from bus network travel strategy theory to design an algorithm for searching the shortest bus travel hyperpath between two nodes in a hypernetwork.

[0119] It is known that node r is a node in the bus sub-network in the super network, and the distance from other nodes n in the sub-network to this point is dis n,r , the frequency value of any arc a in the hypernetwork is known to be g a , then the distance from any node to node r in the hypernetwork can be calculated according to the following process:

[0120] Step 0: Initialization. Let dis n,r =∞, dis r,r =0;g n =0, S = A; Among them, S is a road section in the traffic network, and A is the set of road sections for all public transportation.

[0121] Step 1: If The algorithm terminates and outputs the shortest path from all nodes to node r.

[0122] Hand over the overtaking route; if Then find arc a∈(i,j) in the current set S so that it satisfies dis j,r +t a ≤dis j′,r +t a′ , And let S = S-{a}.

[0123] Step 2: For arc a, if dis i ≥dis j +t a , then update dis according to formula (10) i , and let g i =g i +g a , P=P+{a}, return to Step 1.

[0124]

[0125] The bus passenger flow update module obtains the set of buses passing through each bus station within the current step length based on the position changes of each bus in the traffic network, updates the waiting passenger list and bus passenger set at each bus station, and provides the path selection module with the means to determine the bus travel strategy.

[0126] The travel time statistics module counts the travel time of vehicles and passengers on each road section within each simulation step, that is, counts the travel time of the terminal vehicles and passengers given by the road section vehicle flow update module and the bus passenger flow update module within each simulation step.

[0127] As an example, the constraints of the bus lane optimization design model include budget constraints, road condition constraints, and setting time period constraints.

[0128] This embodiment proposes using the hour as the start and end time of the bus lane, and the decision variables are the setting of bus lanes on the road section at different time periods. With budget, road conditions, and setting time periods as constraints, a simulation-based time-based bus lane optimization design model is constructed. The model constraints are as follows:

[0129] (1) Budget constraint. If the cost of setting up a bus lane on a road section in the road network is B, the total budget is B p , then the design of time-divided bus lanes should meet the following requirements:

[0130]

[0131] Where Γ(x) is a piecewise function:

[0132]

[0133] (2) Bus lanes cannot be set up on roads where there are no buses passing or where there is only one lane, that is:

[0134]

[0135] Where, l eis the number of lanes on road segment e; e,l It is a 0-1 parameter, which is 1 when bus line l passes through section e, and 0 otherwise.

[0136] (3) Set time constraints. The time for setting up bus lanes cannot be too scattered. It is generally believed that the number of time periods for setting up bus lanes on each road section every day cannot exceed the optimal empirical number, such as 2, that is:

[0137]

[0138] The meso-level simulation model proposed in this embodiment can be used to evaluate the effectiveness of implementing a time-divided bus lane design plan Φ. Given network and demand parameters, the time-divided bus lane design plan is input into the simulation model to determine the total network travel time after implementation. Specifically, the functional relationship between the time-divided bus lane design plan Φ and the total network travel time z, z = F(Φ), can be described by the simulation model.

[0139] Therefore, a meso-level simulation model is used to simulate each bus lane design scheme, and a bus lane optimization design model corresponding to each bus lane design scheme is constructed as follows:

[0140] minz=F(Φ)

[0141]

[0142]

[0143]

[0144] or 1

[0145] Solving the time-divided bus lane optimization design model based on the genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design solution includes:

[0146] Step S310, using a genetic simulated annealing algorithm to obtain bus lane design solutions for different time periods, and obtaining the total travel time of the road network corresponding to each bus lane design solution based on a meso-level simulation model. During the solution process, the genetic simulated annealing algorithm perturbs and accepts the state of each individual after the crossover and mutation operations of each iteration, and uses the updated result to enter the next iteration or output as the result.

[0147] The overall flow chart of the algorithm is referenced Figure 5 .

[0148] The genetic simulated annealing algorithm contains two loops, the inner loop mainly includes state perturbations and acceptance operations, and the outer loop includes fitness calculations, genetic operations, and cooling. Both loops are terminated when the predetermined iteration length is reached. The control parameters of the algorithm are: population size P, crossover probability p c , mutation probability p m , outer loop length K max , initial temperature T0, inner loop length L, these parameters should be determined according to the characteristics and scale of the specific problem.

[0149] As an example, this embodiment designs a genetic simulation algorithm with seven elements, including encoding method design, fitness function design, initial population generation, genetic operation design, perturbation function design, state acceptance criterion and cooling function design.

[0150] (1) Coding method design

[0151] Since the decision variables of the TOU-BLD model are 0-1 vectors, the algorithm can be directly encoded: each chromosome is a feasible solution Φ of the TOU-BLD model, representing a feasible time-sharing bus lane design scheme, and each gene is a 0-1 variable Indicates the setting of bus lanes on road section e at the hth hour.

[0152] (2) Fitness function design

[0153] Generally speaking, the greater the fitness of an individual, the better, and the easier it is to be selected in the selection operation. Considering that TOU-BLD is a minimization problem, the fitness function is taken as the inverse of the objective function, that is:

[0154]

[0155] Where F(Φ) is the objective function of the model, that is, the total travel time of the road network obtained by the simulation model.

[0156] (3) Initial population generation

[0157] When generating the initial population, attention must be paid to the feasibility of the individuals, that is, each individual should satisfy the constraints of the TOU-BLD model. Therefore, based on the characteristics of each constraint, the initial population generation process is designed as follows:

[0158] Step 0: Initialize, set i = 0, and calculate the maximum number of road sections in the road network that can be set up as bus lanes:

[0159]

[0160] Where [x] is the rounding function.

[0161] Step 1: Let i=i+1.

[0162] Step 2: Randomly select M road sections in the road network, and randomly generate a number r∈[0,1] for each road section. Then: for the road section e with r∈[0,1 / 3), no bus lane is set at any time, that is, For the road section e with r∈[1 / 3,2 / 3), two integers a and b∈[0,24] are randomly generated with a<b, and a bus lane is set in the time period [a,b]. For the road section e with r∈[2 / 3,1], four integers a, b, c, d∈[0,24] are randomly generated with a<b<c<d, and bus lanes are set in the time periods [a, b] and [c, d], that is,

[0163] Step 3: Determine whether i is equal to the population size P: If not, return to Step 1; if so, the algorithm terminates and outputs the initial population.

[0164] (4) Genetic manipulation design

[0165] Genetic operations include selection, crossover, and mutation. The design of each is as follows:

[0166] ① The selection operation adopts the most commonly used roulette selection, that is, the probability of each individual being selected is determined based on fitness.

[0167] ② The crossover operation uses linear crossover. Pair the chromosomes in the population obtained by the selection operation, and then randomly select a position on the chromosome based on the crossover probability to swap the parts of the two chromosomes after this position.

[0168] ③ The mutation operation adopts uniform mutation, that is, whether to change the gene value of each chromosome is determined based on the mutation probability.

[0169] (5) Perturbation function design

[0170] The purpose of perturbation is to obtain a new feasible solution by fine-tuning the existing feasible solution to increase the local search capability of the algorithm. The feasibility of the new solution must be guaranteed during the perturbation process. This algorithm designs two perturbation methods:

[0171] ① Perturbation of road sections: Randomly select a road section with bus lanes and a road section without bus lanes in the chromosome, and swap the bus lane settings of the two;

[0172] ② Setting time disturbance: Randomly select sections of the chromosome with bus lanes and randomly change the start or end time of the bus lanes.

[0173] During the specific calculation process, a perturbation method is randomly selected to perturb the chromosomes in the population.

[0174] (6) Status acceptance criteria

[0175] Here, the state acceptance criterion adopts the Metropolis criterion, that is, the probability of accepting the new solution after the disturbance is:

[0176]

[0177] Where Φ and Φ' are the solutions before and after the disturbance, fitness(Φ) and fitness(Φ') are the corresponding fitness, T k It is the temperature during the kth external cycle.

[0178] (7) Cooling function design

[0179] The algorithm uses a linear cooling function, namely:

[0180] T k+1 =θT k

[0181] Where θ is the cooling coefficient, which is generally in the range of [0.85, 1].

[0182] Step S400: Selecting a bus lane design scheme with the smallest total travel time from at least one of the road networks as the optimal design scheme.

[0183] A genetic simulated annealing algorithm is used to solve the bus lane optimization design model. After obtaining the total travel time for each bus lane design solution, the multiple network travel times are sorted and the bus lane design solution with the smallest total travel time is selected as the optimal design solution. This optimal design solution maximizes bus lane utilization within the network, ensuring stable and smooth road operation while resolving the mismatch between bus lane layout solutions and actual road needs, thereby enhancing the scientific nature of the bus lane layout solution.

[0184] The present invention provides a bus lane optimization design method, device, equipment, and storage medium thereof. Compared to current bus lane layout plans that do not match actual road demand, resulting in low bus lane utilization, the present invention obtains at least one bus lane design plan, road network parameters, and travel demand; each bus lane design plan, road network parameters, and travel demand are input into a preset time-divided bus lane optimization design model; the time-divided bus lane optimization design model is solved based on a genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design plan; and the bus lane design plan with the smallest total road network travel time is selected as the optimal design plan from the at least one road network total travel time. In other words, by optimizing the bus lane design by time period, the utilization rate of the bus lane is improved, ensuring stable and smooth road operation.

[0185] The bus lane optimization design device provided by the present invention is described below. The bus lane optimization design device described below and the bus lane optimization design method described above can be referenced to each other.

[0186] The present invention also provides a bus lane optimization design device, the device comprising:

[0187] A first acquisition module is configured to acquire a set of bus lane design solutions, wherein the set includes at least one bus lane design solution;

[0188] The second acquisition module is used to obtain road network parameters and travel demand;

[0189] a scheme optimization module, configured to input each bus lane design scheme, the road network parameters, and the travel demand into a preset time-divided bus lane optimization design model, solve the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculate the total road network travel time corresponding to each bus lane design scheme; the time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model;

[0190] The scheme determination module is used to select the bus lane design scheme with the smallest total travel time from at least one of the road networks as the optimal design scheme.

[0191] And / or, the first acquisition module further includes:

[0192] A first acquisition submodule is used to obtain road network parameters and the travel demand;

[0193] The scheme design submodule is used to divide the traffic road network into time periods based on the road network parameters and the travel demand, and obtain at least one bus lane design scheme.

[0194] The solution optimization module also includes:

[0195] The second acquisition submodule is used to obtain a basic meso-level simulation model; the meso-level simulation model includes a travel generation module, a path selection module, a vehicle driving module, a bus passenger flow update module, and a travel time statistics module; the travel generation module generates car flow and bus passenger flow in the traffic network according to the given time-varying travel demand; the path selection module calculates the travel time of each section in the traffic network at the current moment; the vehicle driving module determines the traffic flow status in the traffic network at the beginning of the next step according to the traffic flow status of the traffic network under the current step; the bus passenger flow update module obtains the set of buses passing through each bus station in the current step according to the position changes of each bus in the traffic network, updates the waiting passenger list and bus passenger set of each bus station, so that the path selection module can determine the bus travel strategy; the travel time statistics module counts the traffic flow and passenger travel time of each section in each simulation step.

[0196] The model creation submodule is used to simulate each bus lane design scheme using a meso-level simulation model to construct a bus lane optimization design model; the constraints of the bus lane optimization design model include budget constraints, road condition constraints, and setting time constraints;

[0197] The scheme optimization submodule is used to input the basic information of the traffic road network into the bus lane optimization design model, and calculate the total road network travel time corresponding to each bus lane design scheme based on the genetic simulated annealing algorithm.

[0198] The genetic simulated annealing algorithm is determined according to the design of encoding mode, fitness function, initial population generation, genetic operation, disturbance function, state acceptance criterion and cooling function.

[0199] Figure 6 The following is a schematic diagram of the physical structure of a bus lane optimization design device, such as Figure 6As shown, the bus lane optimization design device may include: a processor (processor) 810, a communication interface (CommunicationsInterface) 820, a memory (memory) 830 and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call the logic instructions in the memory 830 to execute the bus lane optimization design method, which includes: obtaining a set of bus lane design schemes, the set including at least one bus lane design scheme; obtaining road network parameters and travel demand; inputting each of the bus lane design schemes, the road network parameters and the travel demand into a preset time-divided bus lane optimization design model, solving the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculating the total road network travel time corresponding to each of the bus lane design schemes, the time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model; and selecting the bus lane design scheme with the smallest value from at least one of the total road network travel time as the optimal design scheme.

[0200] In addition, the logic instructions in the above-mentioned memory 830 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0201] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the bus lane optimization design method provided by the above-mentioned methods, the method including: obtaining a set of bus lane design schemes, the set including at least one bus lane design scheme; obtaining road network parameters and travel demand; inputting each of the bus lane design schemes, the road network parameters and the travel demand into a preset time-divided bus lane optimization design model, solving the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculating the total road network travel time corresponding to each of the bus lane design schemes, the time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model; and selecting the bus lane design scheme with the smallest value from at least one of the total road network travel time as the optimal design scheme.

[0202] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the bus lane optimization design method provided by the above-mentioned methods, the method comprising: obtaining a set of bus lane design schemes, the set including at least one bus lane design scheme; obtaining road network parameters and travel demand; inputting each of the bus lane design schemes, the road network parameters and the travel demand into a preset time-divided bus lane optimization design model, solving the time-divided bus lane optimization design model based on a genetic simulated annealing algorithm, and calculating the total road network travel time corresponding to each of the bus lane design schemes, the time-divided bus lane optimization design model being constructed by simulating and training the bus lane design schemes and the total road network travel time based on a meso-level simulation model; and selecting the bus lane design scheme with the smallest value from at least one of the total road network travel time as the optimal design scheme.

[0203] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0204] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.

[0205] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A bus lane optimization design method, characterized in that: The method comprises: Obtaining a set of bus lane design solutions, the set including at least one bus lane design solution; determining at least one bus lane design solution based on the setting of car routes and bus routes in the traffic network and the setting of bus lanes on the bus routes; Obtain road network parameters and travel demand; Each bus lane design scheme, the road network parameters and the travel demand are input into a preset time-divided bus lane optimization design model. The time-divided bus lane optimization design model is solved based on the genetic simulated annealing algorithm to calculate the total road network travel time corresponding to each bus lane design scheme. The time-divided bus lane optimization design model is constructed by simulating and training the bus lane design scheme and the total road network travel time based on the meso-simulation model. The decision variables of the time-divided bus lane optimization design model are dimensional 0-1 vector , where E is the set of road sections in the traffic network, H is the number of road sections included in the planning time, the time period is the basic time unit for setting up bus lanes, and the components of the vector Indicates whether a bus lane is set up on the road section e in the tth period; and the required travel demand should be the arrival intensity of the travel demand between each OD at each moment , W is the set of OD pairs in the road network, and the arrival intensity of each OD pair's travel demand changes over time. is the OD pair at time t w The arrival intensity of travel demand; Selecting a bus lane design scheme with the smallest total travel time from at least one of the road networks as the optimal design scheme; The meso-simulation model includes a travel generation module, a path selection module, a vehicle driving module, a bus passenger flow update module, and a travel time statistics module; The travel generation module generates car flows and bus passenger flows in the traffic network according to given time-varying travel demands; The path selection module calculates the travel time of each road section in the traffic network at the current moment; The vehicle travel module determines the traffic state in the traffic network at the beginning of the next step length according to the traffic state of the traffic network at the current step length; The bus passenger flow update module obtains the set of buses passing through each bus station within the current step length according to the position changes of each bus in the traffic network, and updates the waiting passenger list and bus passenger set of each bus station, so that the path selection module can determine the bus travel strategy; The travel time statistics module counts the travel time of vehicles and passengers on each road section within each simulation step; The constraints of the bus lane optimization design model include budget constraints, road condition constraints, and setting time constraints; The method of solving the time-divided bus lane optimization design model based on the genetic simulated annealing algorithm and calculating the total road network travel time corresponding to each bus lane design scheme includes: The genetic simulated annealing algorithm is used to obtain the bus lane design scheme for different time periods. The total travel time of the road network corresponding to each bus lane design scheme is obtained based on the meso-simulation model. During the solution process, the genetic simulated annealing algorithm perturbs and accepts the state of each individual after the crossover and mutation operations of each iteration, and uses the updated result to enter the next iteration or output as the result.

2. The bus lane optimization design method according to claim 1, characterized in that: The step of obtaining a set of bus lane design solutions, wherein the set includes at least one bus lane design solution, comprises: Based on the road network parameters and the travel demand, the traffic road network is divided into time periods to obtain at least one bus lane design solution.

3. The bus lane optimization design method according to claim 1, characterized in that: The genetic simulated annealing algorithm is determined according to the design of encoding mode, fitness function, initial population generation, genetic operation, disturbance function, state acceptance criterion and cooling function.

4. A bus lane optimization design device, characterized in that: The device comprises: A first acquisition module is used to acquire a set of bus lane design solutions, wherein the set includes at least one bus lane design solution; based on the setting of car routes and bus routes in the traffic network, and the setting of bus lanes on bus routes, at least one bus lane design solution is determined; The second acquisition module is used for road network parameters and travel demand; The scheme optimization module is used to input each of the bus lane design schemes, the road network parameters and the travel demand into a preset time-divided bus lane optimization design model, solve the time-divided bus lane optimization design model based on the genetic simulated annealing algorithm, and calculate the total road network travel time corresponding to each of the bus lane design schemes. The time-divided bus lane optimization design model is constructed by simulating and training the bus lane design schemes and the total road network travel time based on the meso-simulation model; the decision variables of the time-divided bus lane optimization design model are dimensional 0-1 vector , where E is the set of road sections in the traffic network, H is the number of road sections included in the planning time, the time period is the basic time unit for setting up bus lanes, and the components of the vector Indicates whether a bus lane is set up on the road section e in the tth period; and the required travel demand should be the arrival intensity of the travel demand between each OD at each moment , W is the set of OD pairs in the road network, and the arrival intensity of each OD pair's travel demand changes over time. is the OD pair at time t w The arrival intensity of travel demand; A scheme determination module, used for selecting a bus lane design scheme with the smallest total travel time from at least one of the road networks as the optimal design scheme; The meso-simulation model includes a travel generation module, a path selection module, a vehicle driving module, a bus passenger flow update module, and a travel time statistics module; The travel generation module generates car flows and bus passenger flows in the traffic network according to given time-varying travel demands; The path selection module calculates the travel time of each road section in the traffic network at the current moment; The vehicle travel module determines the traffic state in the traffic network at the beginning of the next step length according to the traffic state of the traffic network at the current step length; The bus passenger flow update module obtains the set of buses passing through each bus station within the current step length according to the position changes of each bus in the traffic network, and updates the waiting passenger list and bus passenger set of each bus station, so that the path selection module can determine the bus travel strategy; The travel time statistics module counts the travel time of vehicles and passengers on each road section within each simulation step; The constraints of the bus lane optimization design model include budget constraints, road condition constraints, and setting time constraints; The method of solving the time-divided bus lane optimization design model based on the genetic simulated annealing algorithm and calculating the total road network travel time corresponding to each bus lane design scheme includes: The genetic simulated annealing algorithm is used to obtain the bus lane design scheme for different time periods. The total travel time of the road network corresponding to each bus lane design scheme is obtained based on the meso-simulation model. During the solution process, the genetic simulated annealing algorithm perturbs and accepts the state of each individual after the crossover and mutation operations of each iteration, and uses the updated result to enter the next iteration or output as the result.

5. A bus lane optimization design device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the bus lane optimization design method as described in any one of claims 1 to 3 is implemented.

6. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the bus lane optimization design method as described in any one of claims 1 to 3 is implemented.

Citation Information

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