A gallium nitride IMPATT diode and its preparation method

Abstract

The present invention provides a gallium nitride IMPATT diode and a preparation method thereof. By arranging a Schottky contact electrode on the upper surface of an avalanche region in a second region and covering an outer surface of a first region away from the second region with an ohmic contact electrode, a metal layer is used as a hard mask for etching protection, so that the ohmic contact electrode used to make the cathode and the anode Schottky contact electrode are flush with the sidewalls of the active region, thereby achieving self-alignment during the device etching process. In addition, the first passivation layer and the field plate metal on the Schottky contact electrode form a field plate structure. The self-aligned field plate structure can effectively improve the electric field concentration phenomenon that is prone to occur in the semiconductor near the edge of the anode metal, so that the charge appears evenly below the anode, the electric field distribution is more uniform, and reverse leakage is reduced, thereby improving the breakdown voltage of the gallium nitride IMPATT diode, making it closer to the ideal avalanche breakdown voltage value, and ultimately achieving better AC oscillation characteristics.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a gallium nitride IMPATT diode and a preparation method thereof. Background Art

[0002] An IMPATT diode is a device that exhibits negative differential resistance within a certain frequency range. It operates primarily by leveraging the mechanisms of carrier injection and carrier transit time in a breakdown state. This allows for high frequency and power, and compared to other terahertz electronic devices, IMPATT diodes offer the advantage of high efficiency as terahertz frequency sources.

[0003] Compared with GaAs-based and Si-based IMPATT, GaN material has a higher saturated electron drift velocity and breakdown electric field. When the IMPATT diode operates in the breakdown state, for IMPATT diode devices of the same size and structure, the electron speed in the GaN-based IMPATT is faster and the electron transit time is shorter. In addition, the GaN-based IMPATT can withstand higher voltages. Therefore, for IMAPTT diode devices, GaN-based IMPATT has better high-frequency performance and power performance than GaAs-based and Si-based IMPATT diode devices.

[0004] However, the process growth problem of P-type doping of GaN materials has not been effectively solved, and good P-type doping is the guarantee for the high-efficiency operation of IMPATT devices at high current density. Secondly, good gold-semiconductor contact near the contact between GaN material and metal electrode has high requirements on the surface of P-type doped gallium nitride material. Among the existing technologies, the most promising solution to the problem of P-type doping of GaN materials is to use the reverse breakdown of Schottky electrodes and use the Schottky barrier to realize the operation of gallium nitride IMPATT diode. However, this solution will bring new problems, namely how to manufacture good Schottky barriers and epitaxial growth of N-type GaN materials with low defect density. In addition, due to problems such as heat dissipation and efficiency, the device structure design based on this method has also become a problem.

[0005] Therefore, how to adopt a better structural design to enable the GaN-based IMPATT diode to achieve better AC oscillation characteristics has become a technical problem that needs to be urgently solved by those skilled in the art. Summary of the Invention

[0006] In order to solve the above problems existing in the prior art, the present invention provides a gallium nitride IMPATT diode and a preparation method thereof.

[0007] The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0008] In a first aspect, the present invention provides a gallium nitride IMPATT diode, which has a bilaterally symmetrical structure and includes: a substrate layer, an AlN nucleation layer, a GaN buffer layer, and an n++-GaN ohmic contact layer arranged in sequence from bottom to top;

[0009] The n++-GaN ohmic contact layer is provided with a first region, a second region, and a third region; the first region and the third region are symmetrically distributed along a vertical central axis of the second region; a first trench and a second trench are provided on the upper surface of the n++-GaN ohmic contact layer; the first trench is an L-shaped trench and is provided on one side of the upper surface of the n++-GaN ohmic contact layer; the first region is provided between the first trench and the second trench; and the second trench is provided between the first region and the second region;

[0010] The first region and the second region each include: an n-GaN drift region, an n+-GaN avalanche termination region, and an n-GaN avalanche region, arranged sequentially from bottom to top; the second region is further provided with a Schottky contact electrode; the Schottky contact electrode is located on the upper surface of the n-GaN avalanche region of the second region; the n+-GaN avalanche termination region, the n-GaN avalanche region, and the Schottky contact electrode of the second region have equal widths and are smaller than the width of the n-GaN drift region of the second region;

[0011] The n-GaN drift region, n+-GaN avalanche termination region and n-GaN avalanche region in the first region have equal widths; the first trench and the outer surface of the first region away from the second region are covered with an ohmic contact electrode; the upward outer surface of the second region is covered with a first passivation layer; the first passivation layer is provided with a first notch along the vertical central axis of the second region; the upward outer surface of the first passivation layer is covered with a field plate metal; the field plate metal is in contact with the Schottky contact electrode along the first notch; the second trench, a part of the outer surface of the ohmic contact electrode, the outer surface of the field plate metal, the outer surface of the second region and the outer surface of the first region are all covered with a second passivation layer; the second passivation layer is provided with a second notch along the vertical central axis of the second region.

[0012] Optionally, the material of the n++-GaN ohmic contact layer is n++-GaN, with a thickness of 0.5 to 2.5 μm and a doping concentration of 5×10 18 ~1×10 20 cm -3 .

[0013] Optionally, the material of the n-GaN drift region is n-GaN, with a thickness of 0.5 to 2 μm and a doping concentration of 0.1 to 1×10 17 cm -3 .

[0014] Optionally, the material of the n+-GaN avalanche termination region is n+-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 18 cm -3 .

[0015] Optionally, the material of the n-GaN avalanche region is n-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 17 cm -3 .

[0016] Optionally, the material of the ohmic contact electrode is a Ti / Al / Ni / Au / Ni metal alloy with a thickness of 400-600 nm.

[0017] Optionally, the material of the Schottky contact electrode is Ni / Au / Ni metal alloy, and the thickness is 300-400 nm.

[0018] Optionally, the material of the first passivation layer and the second passivation layer is SiO 2 , the thickness of the first passivation layer is 300-500 nm, and the thickness of the second passivation layer is 500-800 nm.

[0019] In a second aspect, the present invention provides a method for preparing a gallium nitride IMPATT diode, which is used to prepare the gallium nitride IMPATT diode of the first aspect, comprising:

[0020] S1. Select sapphire material as the initial material to form a substrate layer;

[0021] S2, epitaxially growing an AlN nucleation layer on the substrate layer by using a metal organic chemical vapor deposition (MOCVD) method;

[0022] S3, epitaxially growing a GaN buffer layer on the AlN nucleation layer using a MOCVD method;

[0023] S4, epitaxially growing an n++-GaN ohmic contact layer on the GaN buffer layer using a MOCVD method;

[0024] S5. epitaxially growing an n-GaN drift region on the n++-GaN ohmic contact layer using a MOCVD method;

[0025] S6. epitaxially growing an n+-GaN avalanche termination region on the n-GaN drift region using a MOCVD method;

[0026] S7, epitaxially growing an n-GaN avalanche region on the n+-GaN avalanche termination region using a MOCVD method;

[0027] S8, etching the n++-GaN ohmic contact layer, the n-GaN drift region, the n+-GaN avalanche termination region, and the n-GaN avalanche region using an etching technique, thereby forming a first annular mesa on the upper surface of the n++-GaN ohmic contact layer;

[0028] S9, forming an ohmic contact electrode on the first annular mesa;

[0029] S10, forming a Schottky contact electrode on the n-GaN avalanche region;

[0030] S11, etching the n-GaN drift region, the n+-GaN avalanche termination region, and the n-GaN avalanche region using a self-aligned etching technique, thereby forming a second annular mesa on the upper surface of the n++-GaN ohmic contact layer;

[0031] S12, using radio frequency magnetron sputtering equipment to deposit SiO2 on the surface of the second annular table and open holes to form a first passivation layer;

[0032] S13, forming a field plate metal on the first passivation layer and the Schottky contact electrode;

[0033] S14, etching the n++-GaN ohmic contact layer and the n-GaN drift region using a self-aligned etching technique to obtain a first device;

[0034] S15. Use radio frequency magnetron sputtering equipment to deposit SiO2 on the upper surface of the first device and open holes to form a second passivation layer to obtain a gallium nitride IMPATT diode.

[0035] The present invention provides a gallium nitride IMPATT diode and a preparation method thereof. The gallium nitride IMPATT diode has a bilaterally symmetrical structure, including: a substrate layer, an AlN nucleation layer, a GaN buffer layer, and an n++-GaN ohmic contact layer arranged in sequence from bottom to top; a first region, a second region, and a third region are arranged on the n++-GaN ohmic contact layer; the first region and the third region are symmetrically distributed along the vertical central axis of the second region; a first groove and a second groove are arranged on the upper surface of the n++-GaN ohmic contact layer; the first groove is an L-shaped groove and is arranged on one side of the upper surface of the n++-GaN ohmic contact layer; the first region is arranged between the first groove and the second groove; the second groove is arranged between the first region and the second region; the first region and the second region both include: an n-GaN drift region, an n+-GaN avalanche termination region, and an n-GaN avalanche region arranged in sequence from bottom to top; the second region is also provided with a Schottky contact electrode; the Schottky contact electrode is located in the second region the upper surface of the n-GaN avalanche region; the n+-GaN avalanche termination region, the n-GaN avalanche region and the Schottky contact electrode in the second region are of equal width and smaller than the width of the n-GaN drift region in the second region; the n-GaN drift region, the n+-GaN avalanche termination region and the n-GaN avalanche region in the first region are of equal width; the first trench and the outer surface of the first region away from the second region are covered with an ohmic contact electrode; the upward outer surface of the second region is covered with a first passivation layer; the first passivation layer is provided with a first notch along the vertical central axis of the second region; the upward outer surface of the first passivation layer is covered with a field plate metal; the field plate metal is in contact with the Schottky contact electrode along the first notch; the second trench, a part of the outer surface area of ​​the ohmic contact electrode, the outer surface of the field plate metal, the outer surface of the second region and the outer surface of the first region are all covered with a second passivation layer; the second passivation layer is provided with a second notch along the vertical central axis of the second region. In the present invention, by providing a Schottky contact electrode on the upper surface of the n-GaN avalanche region in the second region, and covering the outer surface of the first region away from the second region with an ohmic contact electrode, a metal layer is used as a hard mask for etching protection, so that the ohmic contact electrode used to make the cathode and the anode Schottky contact electrode are flush with the sidewalls of the active region, achieving self-alignment during the device etching process. In addition, because the field plate metal on the first passivation layer and the Schottky contact electrode forms a field plate structure, the self-aligned field plate structure can effectively improve the electric field concentration phenomenon that is prone to occur in the semiconductor near the edge of the anode metal, so that the charge appears evenly below the anode, the electric field distribution is more uniform, and reverse leakage is reduced; thereby, the breakdown voltage of the gallium nitride IMPATT diode is increased, making it closer to the ideal avalanche breakdown voltage value, and ultimately achieving better AC oscillation characteristics. In addition, the self-aligned integrated structural design avoids device preparation errors caused by multiple overlays, and improves the controllability of the process.

[0036] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 A schematic cross-sectional view of a gallium nitride IMPATT diode provided in an embodiment of the present invention;

[0038] Figure 2 A schematic flow chart of a method for preparing a gallium nitride IMPATT diode provided in an embodiment of the present invention;

[0039] Figure 3 A schematic diagram of the structure of a gallium nitride IMPATT diode device after executing S7 according to an embodiment of the present invention;

[0040] Figure 4 A schematic diagram of the structure of a gallium nitride IMPATT diode device after executing S8 according to an embodiment of the present invention;

[0041] Figure 5 A schematic diagram of the structure of a gallium nitride IMPATT diode device after executing S9 according to an embodiment of the present invention;

[0042] Figure 6 A schematic diagram of the structure of a gallium nitride IMPATT diode device after executing S10 according to an embodiment of the present invention;

[0043] Figure 7 A schematic diagram of the structure of a gallium nitride IMPATT diode device after S11 is executed according to an embodiment of the present invention;

[0044] Figure 8 A schematic diagram of the structure of a gallium nitride IMPATT diode device after S12 is executed according to an embodiment of the present invention;

[0045] Figure 9 A schematic diagram of the structure of a gallium nitride IMPATT diode device after S13 is executed according to an embodiment of the present invention;

[0046] Figure 10 A schematic diagram of the structure of a gallium nitride IMPATT diode device after S14 is executed according to an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0048] In order to improve the AC oscillation characteristics of a gallium nitride IMPATT diode, an embodiment of the present invention provides a gallium nitride IMPATT diode. Figure 1 A schematic diagram of the cross-sectional structure of a gallium nitride IMPATT diode provided in an embodiment of the present invention. Figure 1 As shown, the GaN IMPATT diode has a bilaterally symmetrical structure, comprising: a substrate layer 1, an AlN nucleation layer 2, a GaN buffer layer 3, and an n++-GaN ohmic contact layer 4 arranged sequentially from bottom to top;

[0049] The n++-GaN ohmic contact layer 4 is provided with a first region, a second region, and a third region; the first region and the third region are symmetrically distributed along the vertical central axis of the second region; a first trench and a second trench are provided on the upper surface of the n++-GaN ohmic contact layer 4; the first trench is an L-shaped trench and is provided on one side of the upper surface of the n++-GaN ohmic contact layer 4; the first region is provided between the first trench and the second trench; and the second trench is provided between the first region and the second region;

[0050] The first region and the second region each include: an n-GaN drift region 5, an n+-GaN avalanche termination region 6, and an n-GaN avalanche region 7, arranged sequentially from bottom to top; the second region is further provided with a Schottky contact electrode 9; the Schottky contact electrode 9 is located on the upper surface of the n-GaN avalanche region 7 in the second region; the n+-GaN avalanche termination region 6, the n-GaN avalanche region 7, and the Schottky contact electrode 9 in the second region have equal widths and are smaller than the width of the n-GaN drift region 5 in the second region;

[0051] The n-GaN drift region 5, the n+-GaN avalanche termination region 6 and the n-GaN avalanche region 7 in the first region have equal widths; the first trench and the outer surface of the first region away from the second region are covered with an ohmic contact electrode 8; the upward outer surface of the second region is covered with a first passivation layer 10; the first passivation layer 10 is provided with a first notch along the vertical central axis of the second region; the upward outer surface of the first passivation layer 10 is covered with a field plate metal 11; the field plate metal 11 is in contact with the Schottky contact electrode 9 along the first notch; the second trench, a part of the outer surface area of ​​the ohmic contact electrode 8, the outer surface of the field plate metal 11, the outer surface of the second region and the outer surface of the first region are all covered with a second passivation layer 12; the second passivation layer 12 is provided with a second notch along the vertical central axis of the second region.

[0052] An embodiment of the present invention provides a gallium nitride IMPATT diode. By providing a Schottky contact electrode on the upper surface of the n-GaN avalanche region in the second region and covering the outer surface of the first region away from the second region with an ohmic contact electrode, a metal layer is used as a hard mask for etching protection, so that the ohmic contact electrode used to make the cathode and the anode Schottky contact electrode are flush with the sidewalls of the active region, thereby achieving self-alignment during the device etching process. In addition, the field plate metal on the first passivation layer and the Schottky contact electrode forms a field plate structure. The self-aligned field plate structure can effectively improve the electric field concentration phenomenon that is prone to occur in the semiconductor near the edge of the anode metal, so that the charge appears evenly below the anode, the electric field distribution is more uniform, and reverse leakage is reduced; thereby, the breakdown voltage of the gallium nitride IMPATT diode is increased, making it closer to the ideal avalanche breakdown voltage value, and ultimately achieving better AC oscillation characteristics. In addition, the self-aligned integrated structural design avoids device preparation errors caused by multiple overlays, and improves the controllability of the process.

[0053] It should be noted that, in the embodiment of the present invention, the active region is specifically a region consisting of the drift region 5 , the avalanche termination region 6 and the avalanche region 7 .

[0054] Optionally, the material of the n++-GaN ohmic contact layer 4 is n++-GaN, with a thickness of 0.5 to 2.5 μm and a doping concentration of 5×10 18 ~1×10 20 cm -3 .

[0055] Optionally, the material of the n-GaN drift region 5 is n-GaN, with a thickness of 0.5 to 2 μm and a doping concentration of 0.1 to 1×10 17 cm -3 .

[0056] Optionally, the material of the n+-GaN avalanche termination region 6 is n+-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 18 cm -3 .

[0057] Optionally, the material of the n-GaN avalanche region 7 is n-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 17 cm -3 .

[0058] Optionally, the material of the ohmic contact electrode 8 is a Ti / Al / Ni / Au / Ni metal alloy with a thickness of 400-600 nm.

[0059] Optionally, the material of the Schottky contact electrode 9 is Ni / Au / Ni metal alloy, and the thickness is 300-400 nm.

[0060] Optionally, the material of the first passivation layer 10 and the second passivation layer 12 is SiO 2 , the thickness of the first passivation layer 10 is 300-500 nm, and the thickness of the second passivation layer 12 is 500-800 nm.

[0061] Optionally, the field plate metal 11 is made of Ni / Au double-layer metal with a thickness of 100-200 nm.

[0062] Based on the same inventive concept, an embodiment of the present invention further provides a method for preparing a gallium nitride IMPATT diode, which is used to prepare the gallium nitride IMPATT diode of the above embodiment. Figure 2 A schematic diagram of a process for preparing a gallium nitride IMPATT diode according to an embodiment of the present invention is shown in FIG. Figure 2 As shown, including:

[0063] S1. Select sapphire material as the initial material to form a substrate layer 1.

[0064] It should be noted that, in the embodiment of the present invention, the thickness of the substrate layer 1 is 330-430 μm.

[0065] S2. Epitaxially grow an AlN nucleation layer 2 on the substrate layer 1 by using a metal organic chemical vapor deposition (MOCVD) method.

[0066] Specifically, in the embodiment of the present invention, triethylgallium and high-purity nitrogen are used as gallium source and nitrogen source respectively, and the metal organic chemical vapor deposition (MOCVD) method is adopted to grow a 20-40 nm thick AlN nucleation layer 2 at a temperature of 950° C. and a pressure of 40 Torr.

[0067] S3 . Epitaxially grow a GaN buffer layer 3 on the AlN nucleation layer 2 by using an MOCVD method.

[0068] Specifically, triethylgallium and high-purity nitrogen are used as gallium source and nitrogen source respectively, and a metal organic chemical vapor deposition (MOCVD) method is adopted to grow a 0.5-2 μm unintentionally doped GaN buffer layer 3 at a temperature of 950° C. and a pressure of 40 Torr.

[0069] S4. Epitaxially grow an n++-GaN ohmic contact layer 4 on the GaN buffer layer 3 by using an MOCVD method.

[0070] Specifically, triethyl gallium and high-purity nitrogen were used as gallium and nitrogen sources, respectively, and silane was used as an n-type doping source. Metal organic chemical vapor deposition (MOCVD) was used to grow a 0.5-2.5 μm n++-GaN ohmic contact layer 4 at a temperature of 1050°C and a pressure of 40 Torr. The doping concentration was 5×1018 ~1×10 20 cm -3 .

[0071] S5 , epitaxially growing an n-GaN drift region 5 on the n++-GaN ohmic contact layer 4 by using a MOCVD method.

[0072] Specifically, triethyl gallium and high-purity nitrogen were used as gallium and nitrogen sources, respectively, and silane was used as an n-type doping source. Metal organic chemical vapor deposition (MOCVD) was used to grow a 0.5-2 μm n-GaN drift region 5 at a temperature of 1050°C and a pressure of 40 Torr. The doping concentration was 0.1-1×10 17 cm -3 .

[0073] S6. Epitaxially grow an n+-GaN avalanche termination region 6 on the n-GaN drift region 5 by using a MOCVD method.

[0074] In this embodiment, triethyl gallium and high-purity nitrogen are used as gallium and nitrogen sources respectively, and silane is used as an n-type doping source. Metal organic chemical vapor deposition (MOCVD) is used to grow a 0.1-1 μm n+-GaN avalanche termination region 6 at a temperature of 1050°C and a pressure of 40 Torr. The doping concentration is 0.1-5×10 18 cm -3 .

[0075] S7 . epitaxially grow an n-GaN avalanche region 7 on the n + -GaN avalanche termination region 6 by using a MOCVD method.

[0076] In this embodiment, triethyl gallium and high-purity nitrogen are used as gallium and nitrogen sources, respectively, and silane is used as an n-type doping source. Metal organic chemical vapor deposition (MOCVD) is used to grow n-GaN avalanche regions 7 with a thickness of 0.1 to 1 μm at a temperature of 1050°C and a pressure of 40 Torr. The doping concentration is 0.1 to 5×10 17 cm -3 Correspondingly, Figure 3 This is a schematic diagram of the device structure after S7 is executed according to an embodiment of the present invention.

[0077] S8. Etch the n++-GaN ohmic contact layer 4, the n-GaN drift region 5, the n+-GaN avalanche termination region 6 and the n-GaN avalanche region 7 using an etching technology, thereby forming a first annular mesa on the upper surface of the n++-GaN ohmic contact layer 4.

[0078] Specifically, a large circular mask pattern with a radius of 65 to 85 μm is formed on the n-GaN avalanche region 7 by photolithography, and then the reactive ion etching (RIE) method is used to etch the structure using a BCl3 / Cl2 gas etching source. A first annular mesa is formed on the n++-GaN ohmic contact layer 4. The thickness of the first annular mesa is 1.2 to 1.5 μm. The device is then wet-treated with a tetramethylammonium hydroxide solution (TMAH) and heated in a water bath at 80°C for 60 minutes to repair the etched damage layer on the GaN surface. Correspondingly, Figure 4 This is a schematic diagram of the device structure after S8 is executed according to an embodiment of the present invention.

[0079] S9. Form an ohmic contact electrode 8 on the first annular mesa.

[0080] Specifically, on the first annular table, a vacuum electron beam evaporation device is used to sequentially evaporate Ti / Al / Ni / Au / Ti multilayer metals with thicknesses of 20nm, 140nm, 55nm, 45nm, and 150nm, respectively. Then, metal stripping is performed to form an ohmic contact electrode 8. The entire device is then subjected to rapid thermal annealing at 750°C for 3 minutes using nitrogen as the annealing gas to form an ohmic contact. Correspondingly, Figure 5 This is a schematic diagram of the device structure after S9 is executed according to an embodiment of the present invention.

[0081] S10 , forming a Schottky contact electrode 9 on the n-GaN avalanche region 7 .

[0082] Specifically, on the upper surface of the n-GaN avalanche region 7, a vacuum electron beam evaporation device is used to sequentially evaporate Ti / Al / Ni multilayer metals with thicknesses of 50nm, 150nm, and 150nm, respectively, and then the Schottky contact electrode 9 is formed by metal stripping. Correspondingly, Figure 6 This is a schematic diagram of the device structure after S10 is executed according to an embodiment of the present invention.

[0083] S11 , etching the n-GaN drift region 5 , the n + -GaN avalanche termination region 6 and the n-GaN avalanche region 7 using a self-aligned etching technique, thereby forming a second annular mesa on the upper surface of the n + -GaN ohmic contact layer 4 .

[0084] Specifically, reactive ion etching (RIE) was used with a BCl3 / Cl2 gas etching source to form a second annular mesa on the n++-GaN ohmic contact layer 4. The thickness of the second annular mesa was 400-600 nm. The device was then heated in a water bath at 80°C for 60 minutes using a tetramethylammonium hydroxide solution (TMAH) to repair the etched damage layer on the GaN surface. Figure 7 This is a schematic diagram of the device structure after S11 is executed according to an embodiment of the present invention.

[0085] S12, using radio frequency magnetron sputtering equipment to deposit SiO2 on the surface of the second annular table and open holes to form a first passivation layer 10.

[0086] In the embodiment of the present invention, a 300 nm thick SiO2 film was sputtered using a radio frequency magnetron sputtering device with a radio frequency power of 100 W and a target distance of 20 cm. Ar and O2 were introduced at a flow ratio of 20:2 at a reaction chamber pressure of 0.4 Pa. Then, reactive ion etching (RIE) was performed using a CF4 / O2 gas etching source to etch the SiO2 film to form a first passivation layer 10. Correspondingly, Figure 8 This is a schematic diagram of the device structure after S12 is executed according to an embodiment of the present invention.

[0087] S13 , forming a field plate metal 11 on the first passivation layer 10 and the Schottky contact electrode 9 .

[0088] Specifically, on the upper surface of the first passivation layer 10 and the Schottky contact electrode 9, a vacuum electron beam evaporation device is used to sequentially evaporate Ti / Al / Ni multilayer metals with thicknesses of 50nm, 150nm, and 150nm, respectively, and then the field plate metal 11 is formed by metal stripping. Figure 9 This is a schematic diagram of the device structure after S13 is executed according to an embodiment of the present invention.

[0089] S14 , etching the n++-GaN ohmic contact layer 4 and the n-GaN drift region 5 using a self-aligned etching technique to obtain a first device.

[0090] In this embodiment, reactive ion etching (RIE) is used with a BCl3 / Cl2 gas etching source to form a step on the n++-GaN ohmic contact layer 4 with a thickness of 600 to 800 nm, thereby obtaining a first device. The first device is then heated in a water bath at 80°C for 60 minutes using a tetramethylammonium hydroxide solution (TMAH) to repair the etched damage layer on the GaN surface. Figure 10 This is a schematic diagram of the device structure after S14 is executed according to an embodiment of the present invention.

[0091] S15, using radio frequency magnetron sputtering equipment to deposit SiO2 on the upper surface of the first device and to open holes to form a second passivation layer 12, thereby obtaining a gallium nitride IMPATT diode.

[0092] In the embodiment of the present invention, a 600 nm thick SiO2 film was sputtered using a radio frequency magnetron sputtering device with a radio frequency power of 100 W and a target spacing of 20 cm. Ar and O2 were introduced at a flow ratio of 20:2 at a reaction chamber pressure of 0.4 Pa. Then, the SiO2 film was etched using a reactive ion etching (RIE) method using a CF4 / O2 gas etching source to form a second passivation layer 12. Correspondingly, Figure 1 That is, a schematic diagram of the device structure after S14 provided in an embodiment of the present invention is executed.

[0093] It should be noted that the terms "first," "second," and the like are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in sequences other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Instead, they are merely examples of devices and methods consistent with some aspects of the present invention.

[0094] In the description of this specification, the reference terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" mean that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0095] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention cannot be considered to be limited to these descriptions. For those skilled in the art of the present invention, several simple deductions or substitutions can be made without departing from the concept of the present invention, and all of these should be considered to fall within the scope of protection of the present invention.

Claims

1. A gallium nitride IMPATT diode, characterized in that: The gallium nitride IMPATT diode has a bilaterally symmetrical structure, comprising: a substrate layer (1), an AlN nucleation layer (2), a GaN buffer layer (3), and an n++-GaN ohmic contact layer (4) arranged in sequence from bottom to top; The n++-GaN ohmic contact layer (4) is provided with a first region, a second region, and a third region; the first region and the third region are symmetrically distributed along the vertical central axis of the second region; the upper surface of the n++-GaN ohmic contact layer (4) is provided with a first groove and a second groove; the first groove is an L-shaped groove and is provided on one side of the upper surface of the n++-GaN ohmic contact layer (4); the first region is provided between the first groove and the second groove; the second groove is provided between the first region and the second region; The first region and the second region both comprise: an n-GaN drift region (5), an n+-GaN avalanche termination region (6), and an n-GaN avalanche region (7) arranged sequentially from bottom to top; the second region is also provided with a Schottky contact electrode (9); the Schottky contact electrode (9) is located on the upper surface of the n-GaN avalanche region (7) of the second region; the n+-GaN avalanche termination region (6), the n-GaN avalanche region (7), and the Schottky contact electrode (9) of the second region have the same width and are smaller than the width of the n-GaN drift region (5) of the second region; The n-GaN drift region (5), the n+-GaN avalanche termination region (6), and the n-GaN avalanche region (7) in the first region have equal widths; the first groove and the outer surface of the first region away from the second region are covered with an ohmic contact electrode (8); the upward outer surface of the second region is covered with a first passivation layer (10); the first passivation layer (10) is provided with a first notch along the vertical center axis of the second region; the upward outer surface of the first passivation layer (10) is covered with a field plate metal (11); the field plate metal (11) is in contact with the Schottky contact electrode (9) along the first notch; the second groove, a part of the outer surface of the ohmic contact electrode (8), the outer surface of the field plate metal (11), the outer surface of the second region, and the outer surface of the first region are all covered with a second passivation layer (12); the second passivation layer (12) is provided with a second notch along the vertical center axis of the second region.

2. The gallium nitride IMPATT diode according to claim 1, characterized in that: The material of the n++-GaN ohmic contact layer (4) is n++-GaN, with a thickness of 0.5 to 2.5 μm and a doping concentration of 5×10 18 ~1×10 20 cm -3 .

3. The gallium nitride IMPATT diode according to claim 1, wherein: The material of the n-GaN drift region (5) is n-GaN, with a thickness of 0.5 to 2 μm and a doping concentration of 0.1 to 1×10 17 cm -3 .

4. The gallium nitride IMPATT diode according to claim 1, characterized in that: The material of the n+-GaN avalanche termination region (6) is n+-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 18 cm -3 .

5. The gallium nitride IMPATT diode according to claim 1, characterized in that: The material of the n-GaN avalanche region (7) is n-GaN, with a thickness of 0.1 to 1 μm and a doping concentration of 0.1 to 5×10 17 cm -3 .

6. The gallium nitride IMPATT diode according to claim 1, characterized in that: The material of the ohmic contact electrode (8) is Ti / Al / Ni / Au / Ni metal alloy, and the thickness is 400-600 nm.

7. The gallium nitride IMPATT diode according to claim 1, characterized in that: The material of the Schottky contact electrode (9) is Ni / Au / Ni metal alloy, and the thickness is 300-400 nm.

8. The gallium nitride IMPATT diode according to claim 1, wherein: The material of the first passivation layer (10) and the second passivation layer (12) is SiO2, the thickness of the first passivation layer (10) is 300-500 nm, and the thickness of the second passivation layer (12) is 500-800 nm.

9. The gallium nitride IMPATT diode according to claim 1, characterized in that: The field plate metal (11) is made of Ni / Au double-layer metal with a thickness of 100-200 nm.

10. A method for preparing a gallium nitride IMPATT diode, characterized in that: For preparing the gallium nitride IMPATT diode according to any one of claims 1 to 9, comprising: S1, selecting sapphire material as an initial material to form a substrate layer (1); S2, epitaxially growing an AlN nucleation layer (2) on the substrate layer (1) using a metal organic chemical vapor deposition (MOCVD) method; S3, epitaxially growing a GaN buffer layer (3) on the AlN nucleation layer (2) using an MOCVD method; S4, epitaxially growing an n++-GaN ohmic contact layer (4) on the GaN buffer layer (3) using an MOCVD method; S5, epitaxially growing an n-GaN drift region (5) on the n++-GaN ohmic contact layer (4) using a MOCVD method; S6, epitaxially growing an n+-GaN avalanche termination region (6) on the n-GaN drift region (5) using a MOCVD method; S7, epitaxially growing an n-GaN avalanche region (7) on the n+-GaN avalanche termination region (6) using a MOCVD method; S8, etching the n++-GaN ohmic contact layer (4), the n-GaN drift region (5), the n+-GaN avalanche termination region (6), and the n-GaN avalanche region (7) using an etching technique, thereby forming a first annular mesa on the upper surface of the n++-GaN ohmic contact layer (4); S9, forming an ohmic contact electrode (8) on the first annular mesa; S10, forming a Schottky contact electrode (9) on the n-GaN avalanche region (7); S11, etching the n-GaN drift region (5), the n+-GaN avalanche termination region (6), and the n-GaN avalanche region (7) using a self-aligned etching technique, thereby forming a second annular mesa on the upper surface of the n++-GaN ohmic contact layer (4); S12, using radio frequency magnetron sputtering equipment to deposit SiO2 on the surface of the second annular table and to open holes to form a first passivation layer (10); S13, forming a field plate metal (11) on the first passivation layer (10) and the Schottky contact electrode (9); S14, etching the n++-GaN ohmic contact layer (4) and the n-GaN drift region (5) using a self-aligned etching technique to obtain a first device; S15, using radio frequency magnetron sputtering equipment to deposit SiO2 on the upper surface of the first device and to open holes to form a second passivation layer (12), thereby obtaining the gallium nitride IMPATT diode.

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