Control pulse coding method and device of controllable commutation converter valve control system
By designing a control pulse coding method for the controllable phase-change exchange valve valve control system in the DC transmission system, synchronous trigger control of multi-stage thyristor and IGBT is realized, the problem of phase-change failure and locking risks is solved, and the system is improved Safety and stability and AC fault handling capabilities.
Patent Information
- Application Number
- CN202411702317.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2044-11-26
AI Technical Summary
The existing DC transmission system has the risk of phase commutation failure and locking in the case of multi-feeding, and the valve control system cannot effectively realize the synchronous trigger control of the multi-stage thyristor and IGBT in the controllable phase commutation inverter, affecting the system's Safe and stable operation.
A control pulse encoding method for a controllable phase-change flow valve valve control system is proposed. By obtaining trigger control timing information, the trigger signals of each device are generated and encoded, including the thyristor and IGBT of the main branch and the auxiliary branch, and the light is used. Modulation signal and communication encoding method realize synchronous trigger control of multi-stage devices.
Effectively support the operation of controllable phase exchange reversing valves, reduce the risk of phase exchange failure, improve the safety and stability of the power grid and the ability to pass through AC faults, and is suitable for converter valves of different topologies.
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Figure CN119182168A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of direct current transmission, and in particular to a control pulse encoding method and device for a controllable phase-commutating converter valve control system. Background Art
[0002] Currently, line commutated converter-based high voltage direct current (LCC-HVDC) technology is widely used worldwide due to its advantages of large transmission capacity, long distances, high efficiency, low losses, and minimal footprint. However, due to the small size and high load density of certain regional power grids, which constitute large receiving-end AC / DC interconnected power grids, there is a risk of multiple DC commutation failures and lockouts. With the integration of new DC networks and the continued increase in the proportion of local renewable energy, the inertia and anti-disturbance capabilities of the AC system will further decline, exposing the power grid to greater systemic risks.
[0003] To address the problem of continuous blocking in multi-infeed DC systems, fundamentally eliminate the long-term threat posed by commutation failures, continuously improve the AC fault ride-through capability of DC transmission systems and the reactive power and voltage support capabilities of AC systems, and reduce the risk of commutation failures, the primary goal is to achieve this. The controllable line commutated converter (CLCC) maintains the six-pulse bridge structure of the traditional line commutated converter (LCC). By reconfiguring the valves that comprise each bridge leg using half-controlled thyristors and fully-controlled IGBTs, this hybrid converter takes full advantage of the high capacity and low losses of thyristors and the strong turn-off capability of IGBTs, leveraging their strengths to overcome their weaknesses. This design inherits the economic advantages of traditional LCC converters while fundamentally avoiding commutation failures.
[0004] The controllable commutation valve is based on a hybrid design of fully controlled and semi-controlled devices. It first transfers current through the fully controlled devices, waits for the thyristor's shutdown capability to recover, and then uses the fully controlled devices to shut off the current, rapidly completing commutation between the bridge arms. Controllable grid-commutated converters primarily operate in two modes: conventional commutation and controlled commutation. In the event of an AC fault, the controllable grid-commutated converter can actively shut off the bridge arm current to achieve forced commutation while also providing a certain level of reactive power support. This completely resolves the commutation failure issue in multi-input DC systems, contributing to improved safe and stable grid operation and the power acceptance capacity of multi-input DC receiving grids.
[0005] The valve base electronics (VBE), or valve control system (VCS), is the "brain" of the converter valve and plays a critical role in its AC / DC power conversion function. The VCS serves as the intermediate link between the upper-level control and protection system and the lower-level thyristors and IGBTs. Receiving control commands from the upper-level control and protection system, it synchronizes the triggering of multiple thyristors and IGBTs, monitors each thyristor and IGBT stage in the converter valve in real time, and implements the control and protection strategy for the converter valve. Its reliability directly impacts the safe and stable operation of the converter valve and, ultimately, the entire DC transmission project. However, in previous LCC systems, the VBE only controls the triggering of thyristors. In the CLCC topology, however, the VBE requires synchronized triggering of thyristors and IGBTs under operating conditions with multiple control and protection elements and high synchronization requirements, enabling both LCC and CLCC control modes. The valve control system (VBE) of the controllable phase-commutated converter valve is responsible for triggering and monitoring all thyristors and IGBTs in the CLCC converter valve. Therefore, the conventional VBE control pulse encoding method can no longer meet the control and protection requirements of the controllable phase-commutated converter valve. Summary of the Invention
[0006] In order to overcome the above-mentioned defects, the present invention proposes a control pulse encoding method and device for a controllable phase-commutating valve control system.
[0007] In a first aspect, a control pulse encoding method for a controllable phase-commutation valve control system is provided. The control pulse encoding method for the controllable phase-commutation valve control system includes: Obtaining trigger control timing information of a controllable commutation converter; generating trigger signals for various components of the controllable commutation converter based on the trigger control timing information; encoding a trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter; The device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT.
[0008] Preferably, the generating of the trigger signal of each component of the controllable commutation converter based on the trigger control timing information includes: When the main branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; when the main branch thyristor is in the off state in the trigger control timing information, no optical modulation signal is generated; When the main branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the main branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch thyristor is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated.
[0009] Furthermore, the optical modulation signal is generated by optical modulation.
[0010] Furthermore, the first preset frequency is 1 MHz, and the second preset frequency is 10 MHz.
[0011] Preferably, encoding the trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter includes: For the main branch thyristors, encoding is performed in the form of optical pulses; For the main branch IGBT, optical communication coding is used for encoding; For the auxiliary branch thyristors, optical pulses are used for encoding; For the auxiliary branch IGBT, optical communication coding is used for encoding.
[0012] Preferably, two downlink communication optical fibers and one uplink communication optical fiber are added between the pole control and the valve control system.
[0013] Furthermore, one of the two downstream communication optical fibers is used to transmit a converter valve operating mode permission signal and a trigger delay angle signal in high-voltage direct current transmission technology to the valve control system, and the other downstream communication optical fiber is used to transmit a no-load pressurization signal to the valve control system. The one uplink communication optical fiber is used to report the converter valve operating mode to the pole controller.
[0014] Furthermore, one of the two downstream communication optical fibers adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs; The other one of the two downlink communication optical fibers adopts an optical modulation signal, 1MHz represents a no-load pressurization mode, and 10kHz represents a non-no-load pressurization mode; The one uplink communication optical fiber adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs.
[0015] Furthermore, the converter valve operating modes include: LCC operating mode and CLCC operating mode.
[0016] In a second aspect, a control pulse encoding device for a controllable phase-commutating valve control system is provided, wherein the control pulse encoding device for the controllable phase-commutating valve control system comprises: An acquisition module, used for acquiring trigger control timing information of a controllable commutation converter; A generating module, configured to generate trigger signals for various components of the controllable commutation converter based on the trigger control timing information; an encoding module, configured to encode a trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter; The device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT.
[0017] In a third aspect, a computer device is provided, comprising: one or more processors; The processor is configured to execute one or more programs; When the one or more programs are executed by the one or more processors, the control pulse encoding method of the controllable phase-commutating valve control system is implemented.
[0018] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed, the control pulse encoding method of the controllable phase-commutating valve control system is implemented.
[0019] The above one or more technical solutions of the present invention have at least one or more of the following beneficial effects: The present invention provides a control pulse encoding method and device for a controllable phase-commutated converter valve control system, comprising: obtaining trigger control timing information of a controllable phase-commutated converter; generating trigger signals for each component of the controllable phase-commutated converter based on the trigger control timing information; and encoding the trigger signals for each component of the controllable phase-commutated converter based on the component types of the controllable phase-commutated converter; wherein the component types include: main branch thyristors, main branch IGBTs, auxiliary branch thyristors, and auxiliary branch IGBTs. The technical solution provided by the present invention can achieve synchronous triggering control of multi-stage thyristors and fully controlled power devices in a controllable phase-commutated converter valve, effectively supporting the operation of the controllable phase-commutated converter valve, and has wide applicability to converter valve structures with different topologies. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 1 is a flow chart showing the main steps of a control pulse encoding method for a controllable phase-commutation valve control system according to an embodiment of the present invention; Figure 21 is a schematic diagram of the main structure of the valve control system according to an embodiment of the present invention; Figure 3 This is an interface signal diagram between the valve control system and the pole control according to an embodiment of the present invention; Figure 4 This is a flow chart of trigger signal generation for various components of a controllable commutated converter according to an embodiment of the present invention. DETAILED DESCRIPTION
[0021] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.
[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0023] As disclosed in the background technology, at present, line commutated converter based high voltage direct current (LCC-HVDC) technology has the advantages of large transmission capacity, long distance, high efficiency, low loss and small footprint, and has been widely used around the world. Due to the small area and high load density of the power grid in a certain region, it constitutes a large receiving-end power grid of AC / DC interconnection, and there is a risk of multiple DC continuous commutation failures and lockouts. With the access of new DC, and the continuous increase in the proportion of local renewable energy, the inertia and anti-disturbance capabilities of the AC system will further decline, and the power grid will face greater system risks.
[0024] To address the problem of continuous blocking in multi-infeed DC systems, fundamentally eliminate the long-term threat posed by commutation failures, continuously improve the AC fault ride-through capability of DC transmission systems and the reactive power and voltage support capabilities of AC systems, and reduce the risk of commutation failures, the primary goal is to achieve this. The controllable line commutated converter (CLCC) maintains the six-pulse bridge structure of the traditional line commutated converter (LCC). By reconfiguring the valves that comprise each bridge leg using half-controlled thyristors and fully-controlled IGBTs, this hybrid converter takes full advantage of the high capacity and low losses of thyristors and the strong turn-off capability of IGBTs, leveraging their strengths to overcome their weaknesses. This design inherits the economic advantages of traditional LCC converters while fundamentally avoiding commutation failures.
[0025] The controllable commutation valve is based on a hybrid design of fully controlled and semi-controlled devices. It first transfers current through the fully controlled devices, waits for the thyristor's shutdown capability to recover, and then uses the fully controlled devices to shut off the current, rapidly completing commutation between the bridge arms. Controllable grid-commutated converters primarily operate in two modes: conventional commutation and controlled commutation. In the event of an AC fault, the controllable grid-commutated converter can actively shut off the bridge arm current to achieve forced commutation while also providing a certain level of reactive power support. This completely resolves the commutation failure issue in multi-input DC systems, contributing to improved safe and stable grid operation and the power acceptance capacity of multi-input DC receiving grids.
[0026] The valve base electronics (VBE), or valve control system (VCS), is the "brain" of the converter valve and plays a critical role in its AC / DC power conversion function. The VCS serves as the intermediate link between the upper-level control and protection system and the lower-level thyristors and IGBTs. Receiving control commands from the upper-level control and protection system, it synchronizes the triggering of multiple thyristors and IGBTs, monitors each thyristor and IGBT stage in the converter valve in real time, and implements the control and protection strategy for the converter valve. Its reliability directly impacts the safe and stable operation of the converter valve and, ultimately, the entire DC transmission project. However, in previous LCC systems, the VBE only controls the triggering of thyristors. In the CLCC topology, however, the VBE requires synchronized triggering of thyristors and IGBTs under operating conditions with multiple control and protection elements and high synchronization requirements, enabling both LCC and CLCC control modes. The valve control system (VBE) of the controllable phase-commutated converter valve is responsible for triggering and monitoring all thyristors and IGBTs in the CLCC converter valve. Therefore, the conventional VBE control pulse encoding method can no longer meet the control and protection requirements of the controllable phase-commutated converter valve.
[0027] To improve the above-mentioned problems, the present invention provides a control pulse encoding method and device for a controllable phase-commutated converter valve control system, comprising: obtaining trigger control timing information of the controllable phase-commutated converter; generating trigger signals for each component of the controllable phase-commutated converter based on the trigger control timing information; encoding the trigger signals for each component of the controllable phase-commutated converter based on the component types of the controllable phase-commutated converter; wherein the component types include: main branch thyristors, main branch IGBTs, auxiliary branch thyristors, and auxiliary branch IGBTs. The technical solution provided by the present invention can achieve synchronous triggering control of multi-stage thyristors and fully controlled power devices of the controllable phase-commutated converter valve, effectively support the operation of the controllable phase-commutated converter valve, and is also widely applicable to converter valve structures with different topologies.
[0028] The above scheme is described in detail below.
[0029] Example 1 See attached Figure 1 , Figure 1 FIG. 1 is a flow chart showing the main steps of a control pulse encoding method for a controllable phase-commutation valve control system according to an embodiment of the present invention. Figure 1 As shown, the control pulse encoding method of the controllable phase-commutation valve control system in the embodiment of the present invention mainly includes the following steps: Step S101: Acquire trigger control timing information of a controllable commutation converter; Step S102: generating trigger signals for various components of the controllable commutation converter based on the trigger control timing information; Step S103: encoding the trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter; The device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT.
[0030] Conventional valve control systems such as Figure 2 As shown, including: CCP: Control and protection device for two series-connected converters per pole in a UHVDC project, including the interface part for signal acquisition and command issuance.
[0031] Centralized control unit: used to send the control instructions related to the controllable commutation function issued by the CCP to the trigger monitoring unit.
[0032] Trigger monitoring unit: controls the on and off of the thyristors and fully controlled power devices on the main branch and auxiliary branch of the controllable commutation valve based on control instructions to achieve natural commutation or forced commutation.
[0033] Acquisition unit: used to collect the AC side system voltage and the secondary side current of the commutation transformer, and send the collected data to the centralized control unit after aggregation and processing.
[0034] Recording unit: used for automatic recording, timed recording and fault recording.
[0035] Its main functions include: 1) Communication with DC control and protection devices: After receiving the CP (Control Pulse) signal from the DC control and protection system and sending it to the converter valve, the VBE feeds back the FP (Feedback Pulse) signal to the pole control system CCP. This signal serves as a detection signal for the pole control system to detect valve mis-triggering and pulse loss. If the valve margin is determined to be out of limit, the VBE sends a trip request to the DC control and protection system.
[0036] 2) Communication with the high-voltage trigger monitoring board: The VBE device triggers and monitors each high-voltage trigger detection board through optical fiber. Based on the feedback signal from each TTM (thyristor triggering and monitoring unit) of the converter valve, it determines whether the TTM working power supply is normal, whether the thyristor stage is subjected to forward voltage, and whether the thyristor overvoltage protection is activated. These signals are aggregated, processed, and uploaded to the SCADA (Supervisory Control And Data Acquisition) system via the bus.
[0037] 3) Thyristor Valve Protection: The VBE implements comprehensive protection measures for the thyristor valves based on monitoring information returned by the TTM. If a converter valve trips due to a fault, the VBE issues a request-trip signal. When the pole control system receives notification that the VBE master system has tripped, it switches to the VBE system. If a trip is detected on the slave system, the VBE system trips. If a trip request is received while the VBE system is operating alone, the VBE system trips.
[0038] 4) VBE Self-Test Protection: The VBE has comprehensive self-test capabilities. These tests cover the optical channels sent from the VBE to the VBE by the control system, the communication system between the VBE and the TTM, the internal interconnection system within the VBE cabinet, and each VBE circuit board (including the control board and power board). VBE self-test protection is divided into two levels: First, for faults that do not affect the operation of the converter valve, only the fault type and location are transmitted to the SCADA system via the bus. Second, for faults that affect the operation of the converter valve, the VBE status transmitted to the control system via the VBE_OK (VBE OK) optical cable is also transmitted to the SCADA system via the bus. The control system determines the master and slave systems, A and B, based on the VBE status transmitted via the VBE_OK cable. When dual VBE systems are operating, if the master system's VBE_OK cable transmits the VBE_OK signal, the control system switches to master or slave. If the slave system's VBE_OK cable transmits the VBE_OK signal, the master system remains operational, but the slave system's VBE is no longer operational. When a single VBE system is operating, the VBE_OK optical cable of that system sends a VBE_OK signal, causing the pole control system to lock the converter valve. The VBE uploads the fault type and location to the SCADA system via the bus.
[0039] 5) Lightning arrester protection: The VBE is connected to each valve lightning arrester using optical fiber. The optical pulse signal generated by the lightning arrester when it is activated is sent via optical fiber to the lightning arrester monitor in the VBE cabinet. The number of lightning arrester activations is then uploaded to the SCADA system via the bus.
[0040] 6) Valve Tower Leakage Protection: A leak detector and a VBE leak monitor installed at the bottom of the valve tower jointly monitor valve tower leaks. The VBE leak monitor sends optical pulses of a certain frequency to the leak detector in real time. When the valve tower is not leaking, the leak detector's optical path is unobstructed, and the transmitted optical pulses return to the VBE leak monitor. When the valve tower leaks, the leak detector's optical path is blocked, and the transmitted optical pulses cannot return to the VBE leak monitor, which counts as a leak. The number of unreturned optical pulses is recorded over a certain period of time to determine the leak level. Valve tower leak alarms are then uploaded to the SCADA system via the bus.
[0041] 7) VBE recording function: The VBE recording function is divided into automatic recording and manual recording, which is completed by the VBE recording chassis. It can realize real-time recording of various signals and is used to test the return signal of the high-voltage trigger monitoring board and the interface signal between VBE and the pole control system.
[0042] However, the VBE directly forwards and executes the control pulses (CP) issued by the CCP, which cannot achieve synchronous triggering control of the multi-stage thyristors of the controllable commutation valve and the fully controlled power device IGBT. Therefore, in order to achieve the above functions, the technical solution provided by the present invention can also generate trigger signals for each device of the controllable commutation converter based on the trigger control timing information, specifically including: When the main branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; when the main branch thyristor is in the off state in the trigger control timing information, no optical modulation signal is generated; When the main branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the main branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch thyristor is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated.
[0043] In one embodiment, the optical modulation signal is generated by optical modulation.
[0044] In one embodiment, the first preset frequency is 1 MHz, and the second preset frequency is 10 MHz.
[0045] In a specific embodiment, Figure 3 As shown in the figure, according to the Universal Secondary Interface Specification for UHVDC Converter Station Equipment, the CCP sends valve trigger signals to the VBE, with a total of 12 CP signals per converter. This means that the centralized control unit in the VBE, which directly interfaces with the CCP, only receives control pulse signals for 12 bridge arms. However, since each bridge arm of a controllable commutation valve consists of a main branch and an auxiliary branch connected in parallel, each of which includes multiple thyristor stages and fully controlled IGBTs, these components require synchronized triggering control, feedback collection, and fault protection to support the operation of the controllable commutation valve. Therefore, the 12 control pulse signals (CP) sent by the CCP must be encoded within the VBE, with each CP signal divided into CP11, CP12, CP13, and CP14, respectively triggering and controlling the main branch thyristor valve, main branch IGBT valve, auxiliary branch IGBT valve, and auxiliary branch thyristor valve.
[0046] In this embodiment, encoding the trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter includes: For the main branch thyristors, encoding is performed in the form of optical pulses; For the main branch IGBT, optical communication coding is used for encoding; For the auxiliary branch thyristors, optical pulses are used for encoding; For the auxiliary branch IGBT, optical communication coding is used for encoding.
[0047] In this embodiment, two downlink communication optical fibers and one uplink communication optical fiber are added between the pole control and the valve control system. Figure 4 shown.
[0048] In one embodiment, one of the two downstream communication optical fibers is used to transmit a converter valve operating mode permission signal and a trigger delay angle signal in high-voltage direct current transmission technology to the valve control system, and the other downstream communication optical fiber is used to transmit a no-load pressurization signal (OLT) to the valve control system. The one uplink communication optical fiber is used to report the converter valve operating mode to the pole controller.
[0049] In one embodiment, one of the two downstream communication optical fibers adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 block, and a communication period of 100 μs; The other one of the two downlink communication optical fibers adopts an optical modulation signal, 1MHz represents a no-load pressurization mode, and 10kHz represents a non-no-load pressurization mode; The one uplink communication optical fiber adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs.
[0050] In one embodiment, the converter valve operating mode includes: an LCC operating mode and a CLCC operating mode.
[0051] Example 2 Based on the same inventive concept, the present invention further provides a control pulse encoding device for a controllable phase-commutation valve control system, the control pulse encoding device for the controllable phase-commutation valve control system comprising: An acquisition module, used for acquiring trigger control timing information of a controllable commutation converter; A generating module, configured to generate trigger signals for various components of the controllable commutation converter based on the trigger control timing information; an encoding module, configured to encode a trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter; The device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT.
[0052] Preferably, the generating of the trigger signal of each component of the controllable commutation converter based on the trigger control timing information includes: When the main branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; when the main branch thyristor is in the off state in the trigger control timing information, no optical modulation signal is generated; When the main branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the main branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch thyristor is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated; When the auxiliary branch IGBT is in the on state in the trigger control timing information, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch IGBT is in the off state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated.
[0053] Furthermore, the optical modulation signal is generated by optical modulation.
[0054] Furthermore, the first preset frequency is 1 MHz, and the second preset frequency is 10 MHz.
[0055] Preferably, encoding the trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter includes: For the main branch thyristors, encoding is performed in the form of optical pulses; For the main branch IGBT, optical communication coding is used for encoding; For the auxiliary branch thyristors, optical pulses are used for encoding; For the auxiliary branch IGBT, optical communication coding is used for encoding.
[0056] Preferably, two downlink communication optical fibers and one uplink communication optical fiber are added between the pole control and the valve control system.
[0057] Furthermore, one of the two downstream communication optical fibers is used to transmit a converter valve operating mode permission signal and a trigger delay angle signal in high-voltage direct current transmission technology to the valve control system, and the other downstream communication optical fiber is used to transmit a no-load pressurization signal to the valve control system. The one uplink communication optical fiber is used to report the converter valve operating mode to the pole controller.
[0058] Furthermore, one of the two downstream communication optical fibers adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs; The other one of the two downlink communication optical fibers adopts an optical modulation signal, 1MHz represents a no-load pressurization mode, and 10kHz represents a non-no-load pressurization mode; The one uplink communication optical fiber adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs.
[0059] Furthermore, the converter valve operating modes include: LCC operating mode and CLCC operating mode.
[0060] Example 3 Based on the same inventive concept, the present invention also provides a computer device, which includes a processor and a memory, wherein the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function, so as to implement the steps of the control pulse encoding method of a controllable phase-commutated valve control system in the above embodiment.
[0061] Example 4 Based on the same inventive concept, the present invention also provides a storage medium, specifically a computer-readable storage medium (Memory). The computer-readable storage medium is a memory device in a computer device, used to store programs and data. It is understood that the computer-readable storage medium herein may include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides storage space that stores the terminal's operating system. Furthermore, the storage space also stores one or more instructions suitable for being loaded and executed by a processor. These instructions may be one or more computer programs (including program code). It should be noted that the computer-readable storage medium herein may be a high-speed RAM memory or a non-volatile memory, such as at least one disk drive. The processor may load and execute the one or more instructions stored in the computer-readable storage medium to implement the steps of the control pulse encoding method for a controllable phase-commutated valve control system described in the above-mentioned embodiment.
[0062] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0063] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0064] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0065] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.
Claims
1. A control pulse encoding method for a controllable phase-commutation valve control system, characterized in that: The method comprises: Acquiring trigger control timing information of a controllable commutation converter; Generate a trigger signal for each device of the controllable commutation converter based on the trigger control timing information; Encoding a trigger signal of each component of the controllable commutated converter based on the type of each component of the controllable commutated converter; Wherein, the device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT; The generating of the trigger signal of each device of the controllable commutation converter based on the trigger control timing information comprises: When the main branch thyristor is in the on state in the trigger control timing information, an optical modulation signal of a first preset frequency is generated, and when the main branch thyristor is in the off state in the trigger control timing information, no optical modulation signal is generated; When the main branch IGBT is in the on state in the trigger control timing information, a light modulation signal of a second preset frequency is generated; when the main branch IGBT is in the off state in the trigger control timing information, a light modulation signal of a first preset frequency is generated; When the auxiliary branch thyristor in the trigger control timing information is in the on state, a light modulation signal of a second preset frequency is generated; when the auxiliary branch thyristor in the trigger control timing information is in the off state, a light modulation signal of a first preset frequency is generated; When the auxiliary branch IGBT in the trigger control timing information is in the on state, an optical modulation signal of a second preset frequency is generated; when the auxiliary branch IGBT in the trigger control timing information is in the off state, an optical modulation signal of a first preset frequency is generated.
2. The method according to claim 1, characterized in that The optical modulation signal is generated by optical modulation.
3. The method according to claim 1, characterized in that The first preset frequency is 1 MHz, and the second preset frequency is 10 MHz.
4. The method according to claim 1, characterized in that The step of encoding the trigger signal of each component of the controllable commutation converter based on the type of each component of the controllable commutation converter comprises: For the main branch thyristors, encoding is performed in the form of optical pulses; For the main branch IGBT, optical communication coding is used for encoding; For the auxiliary branch thyristors, encoding is performed in the form of optical pulses; For the auxiliary branch IGBT, optical communication coding is used for encoding.
5. The method according to claim 1, characterized in that Two downstream communication optical fibers and one upstream communication optical fiber are newly added between the pole control and the valve control system.
6. The method according to claim 5, characterized in that One of the two downstream communication optical fibers is used to send a converter valve operation mode permission position signal and a trigger delay angle signal in high-voltage direct current transmission technology to the valve control system, and the other downstream communication optical fiber is used to send a no-load pressurization signal to the valve control system; The 1 uplink communication optical fiber is used to report the working mode of the converter valve to the pole controller.
7. The method according to claim 6, characterized in that One of the two downstream communication optical fibers adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs; The other one of the two downstream communication optical fibers adopts an optical modulation signal, 1MHz represents a no-load pressurization mode, and 10kHz represents a non-no-load pressurization mode; The one uplink communication optical fiber adopts the IEC60044-8 communication protocol, with a communication rate of 10 Mbps, 1 Block, and a communication cycle of 100 μs.
8. The method according to claim 6, characterized in that The converter valve operation modes include: LCC operation mode and CLCC operation mode.
9. A device for controlling pulse encoding method of a controllable phase-commutation valve control system according to any one of claims 1 to 8, characterized in that: The device comprises: An acquisition module, used for acquiring trigger control timing information of a controllable commutation converter; A generating module, used for generating a trigger signal of each device of the controllable commutation converter based on the trigger control timing information; An encoding module, used for encoding the trigger signal of each component of the controllable commutation converter based on the type of each component of the controllable commutation converter; The device types include: main branch thyristor, main branch IGBT, auxiliary branch thyristor and auxiliary branch IGBT.
10. A computer device, characterized in that: include: one or more processors; The processor is configured to execute one or more programs; When the one or more programs are executed by the one or more processors, the control pulse encoding method of the controllable phase-commutated converter valve control system as described in any one of claims 1 to 8 is implemented.
11. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed, the control pulse encoding method of the controllable phase-changing valve control system as described in any one of claims 1 to 8 is implemented.
Citation Information
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