Independent bias adjustable single-waveguide high-efficiency power synthesis terahertz frequency doubler

Abstract

The invention relates to the technical field of generation of terahertz signals, in particular to an independent bias adjustable single-waveguide high-efficiency power synthesis terahertz frequency doubler, which is characterized in that an input fundamental wave signal is directly loaded on a Schottky diode after being input into a height reduction waveguide, so that power synthesis is realized at the Schottky diode, and single-waveguide power synthesis is realized; the first frequency multiplier circuit and the second frequency multiplier circuit which are arranged on the front face and the back face of the substrate in a matched mode form a low-loss distribution and synthesis circuit, signal transmission and coupling loss are greatly reduced, efficient power synthesis of the frequency multiplier can be achieved, the problem that an existing frequency multiplier based on a Schottky diode is large in power synthesis loss is solved, and the frequency multiplier efficiency is improved. And the requirements on the machining precision and the assembly technology are reduced, and implementation is easier.

Description

Technical Field

[0001] The present invention relates to the technical field of terahertz signal generation, and in particular to a single-waveguide high-efficiency power synthesis terahertz frequency doubler with independent bias adjustable, which is applied to the fields of terahertz communication and radar imaging. Background Art

[0002] Terahertz waves refer to electromagnetic waves with frequencies in the range of 0.1 to 10 THz. Their spectrum is between millimeter waves and infrared light waves. They have the properties of both microwaves and light waves and have unique characteristics, which makes terahertz technology an important extension of electronics and photonics research.

[0003] Terahertz signal source technology is one of the cornerstones of terahertz technology, and the improvement of its output power is crucial to the application and development of terahertz technology. At present, the mainstream technology for making terahertz sources is to use Schottky diodes, but the power carrying capacity of a single Schottky diode is limited. In order to increase the output power of the frequency multiplier, some researchers have proposed a frequency multiplier that increases the number of diodes and the total area of ​​the anode junction by power synthesis, namely, a frequency multiplier that uses power dividers and couplers for power synthesis, and a single waveguide power synthesis frequency multiplier. The frequency multiplier that uses power dividers and couplers for power synthesis has an increase in the overall electrical length due to the addition of additional devices in the circuit, and the power divider and coupler cannot be fully matched, which increases the loss of the frequency multiplier and reduces the frequency multiplication efficiency. The power synthesis of the single waveguide power synthesis frequency multiplier is completed at the diode, and its input and output only require one waveguide to achieve high-efficiency power synthesis, but it requires precise control of the phase relationship between the branches, and has high requirements for processing accuracy and assembly technology, high cost and is not easy to implement. Summary of the invention

[0004] The purpose of the present invention is to provide a single-waveguide high-efficiency power synthesis terahertz doubler with independent bias adjustment to solve the problem of large power synthesis loss in the existing Schottky diode-based doubler, reduce the requirements for processing accuracy and assembly technology, and be easy to implement.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] A single-waveguide high-efficiency power synthesis terahertz frequency doubler structure with independent bias adjustment includes: an input circuit, a frequency doubler structure, and an output circuit;

[0007] The frequency doubler structure is used to double the frequency of an input fundamental wave signal, and comprises a substrate, a first frequency doubler circuit arranged on the front side of the substrate, and a second frequency doubler circuit arranged on the back side of the substrate; the first frequency doubler circuit comprises a Schottky diode circuit, a suspended microstrip line, an E-plane probe, a bandpass filter and a DC bias circuit connected in sequence; the Schottky diode circuit is connected to the input end circuit as the input of the frequency doubler structure, and is composed of a plurality of reverse series diode chips; the E-plane probe is connected to the output end circuit as the output of the frequency doubler structure; the second frequency doubler circuit has the same structure as the first frequency doubler circuit.

[0008] Furthermore, the input end circuit includes an input standard rectangular waveguide and an input height-reduced waveguide, the last stage of the input height-reduced waveguide is a waveguide short-circuit, and the input standard rectangular waveguide is connected to the Schottky diode circuit through the input height-reduced waveguide.

[0009] Furthermore, the output end circuit includes a standard output rectangular waveguide and an output height reduction waveguide connected in sequence, the last stage of the output height reduction waveguide is a waveguide short-circuit, and the output standard rectangular waveguide is connected to the E-plane probe through the input height reduction waveguide.

[0010] Furthermore, the suspended microstrip line is a gold strip attached to a quartz substrate.

[0011] Furthermore, the Schottky diode circuit is composed of two reverse series connected diode chips.

[0012] Furthermore, the substrate material is quartz, AlN or diamond.

[0013] Furthermore, the bandpass filter uses a quarter-wavelength line.

[0014] The present invention provides a single-waveguide high-efficiency power synthesis terahertz doubler with independent bias adjustment, wherein the input fundamental wave signal is directly loaded on the Schottky diode after passing through the input height reduction waveguide, so that the power is synthesized at the Schottky diode to realize single-waveguide power synthesis, and cooperates with the first frequency multiplication circuit and the second frequency multiplication circuit arranged on the front and back sides of the substrate to form a low-loss distribution and synthesis circuit, which greatly reduces the signal transmission and coupling loss, and can realize a high-efficiency power synthesis doubler. Since the first frequency multiplication circuit and the second frequency multiplication circuit are both provided with a DC bias circuit to independently control their respective Schottky diode circuits, firstly, the phase relationship between the branches can be accurately controlled, which solves the problem that the processing accuracy and assembly technology requirements are high, the cost is high and it is not easy to realize in the prior art; secondly, by adjusting the two bias circuits respectively, the balance of the two frequency multiplication circuits can be controlled to compensate for the imbalance caused by the assembly process, and the error caused by the assembly process can be compensated to realize the tuning function. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1It is a schematic diagram of the principle of the single-waveguide high-efficiency power synthesis terahertz frequency doubler of the present invention;

[0016] Figure 2 A top view of the structure of a single-waveguide high-efficiency power synthesis terahertz frequency doubler according to an embodiment;

[0017] Figure 3 It is a structural front view of a single-waveguide high-efficiency power synthesis terahertz frequency doubler according to an embodiment;

[0018] Figure 4 It is a structural front view of a single-waveguide high-efficiency power synthesis terahertz frequency doubler of an embodiment;

[0019] Figure 5 This is the simulation result 1 of the single waveguide high efficiency power synthesis terahertz frequency doubler of the embodiment;

[0020] Figure 6 This is the simulation result 2 of the single waveguide high efficiency power synthesis terahertz frequency doubler of the embodiment;

[0021] Reference numerals:

[0022] 100 is the input WR-12 standard rectangular waveguide, 101 is the input height-reduced waveguide, 102 is the reverse series diode chip, 103 is the pad, 104 is the quartz substrate with a thickness of 50um, 105 is the suspended microstrip line, 106 is the output height-reduced waveguide, 107 is the bandpass filter, 108 is the output WR-12 standard rectangular waveguide, 109 is the DC bias circuit, and 110 is the E-plane probe. DETAILED DESCRIPTION

[0023] The technical solution of the present invention is described in detail below in conjunction with the accompanying drawings and embodiments.

[0024] like Figure 2-Figure 4 As shown, a single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustable includes: an input circuit, a doubler structure, and an output circuit. The input circuit includes an input WR-12 standard rectangular waveguide 100 and an input height-reducing waveguide 101. The last stage of the input height-reducing waveguide is a waveguide short-circuit for reflecting the input fundamental wave. The input WR-12 standard rectangular waveguide is connected to a Schottky diode circuit through the input height-reducing waveguide.

[0025] The doubler structure includes a substrate 104, a first frequency doubling circuit arranged on the front side of the substrate, and a second frequency doubling circuit arranged on the back side of the substrate. The substrate 104 is a quartz substrate. The first frequency doubling circuit includes a Schottky diode circuit, a suspended microstrip line 105, an E-plane probe 110, a bandpass filter 107 and a DC bias circuit 109 connected in sequence, and the components in the first frequency doubling circuit are connected through the suspended microstrip line. Among them, the Schottky diode circuit is connected to the input end circuit as the input of the doubler structure, and the Schottky diode circuit is composed of a plurality of reverse series diode chips 102, which are fixed on the substrate through a pad 103. As a preferred embodiment, two reverse series diode chips 102 are used to form a Schottky diode circuit in this embodiment. The E-plane probe is connected to the output end circuit and the bandpass filter as the output of the doubler structure. The bandpass filter 107 uses a quarter-wavelength line to filter the doubled frequency of the frequency multiplier to prevent the second harmonic from leaking to the DC bias circuit. The DC bias circuit is used to load a DC bias on the Schottky diode.

[0026] The output end circuit includes an output WR-12 standard rectangular waveguide 108 and an output height-reducing waveguide 106 . The last stage of the output height-reducing waveguide 106 is a waveguide short-circuit. The output WR-12 standard rectangular waveguide 108 is connected to an E-plane probe 110 through the input height-reducing waveguide 106 .

[0027] The second frequency multiplication circuit has the same structure as the first frequency multiplication circuit.

[0028] The single waveguide high efficiency power synthesis terahertz doubler structure of this embodiment has the following working principle: Figure 1As shown: the input WR-12 standard rectangular waveguide 100 is fed into the fundamental wave of the TE10 mode. After the height reduction waveguide 101, the TE10 mode wave is directly loaded into the Schottky diode circuit on the front and back sides of the quartz substrate, and the power is synthesized at the Schottky diode circuit to achieve single waveguide power synthesis. The Schottky diode has nonlinear characteristics, so the Schottky will generate harmonics after loading the fundamental wave. In this embodiment, the Schottky diode circuits on the front and back sides are two reverse series diode chips 102. Since the input end is a waveguide, the TE10 wave is transmitted; the output end is a suspended microstrip line, which transmits a quasi-TEM wave; the two waves have different transmission modes, forming a double frequency balanced structure to suppress odd harmonics. And the end of the input height reduction waveguide 101 is a waveguide short-circuit, which can reflect the fundamental wave, and the simulated fundamental wave leaks directly into the subsequent circuit, so that only even harmonics can propagate to the output matching circuit. The electromagnetic wave mode transmitted in the suspended microstrip line is a quasi-TEM mode. Through the E-plane probe in the first frequency doubling circuit and the E-plane probe in the second frequency doubling circuit, the quasi-TEM mode is coupled to the TE10 mode in the output height reduction waveguide, and then output from the output standard rectangular waveguide. The DC bias circuits set in each circuit provide independent bias voltages for the Schottky diode circuits on the front and back sides of the quartz substrate, thereby independently controlling the Schottky diode circuits on the front and back sides, realizing the regulation of the impedance and frequency doubling performance of the entire device, and thus improving the frequency doubling performance of the frequency doubling circuit. In addition, since both the input circuit and the output circuit use the height reduction waveguide as the matching structure, the circuit on the quartz substrate is simplified. The second frequency doubling circuit and the first frequency doubling circuit with the same structure are designed to reduce transmission loss while improving the frequency doubling efficiency.

[0029] Joint simulation using commercial 3D electromagnetic simulation software HFSS and ADS:

[0030] The Schottky diode circuit of the embodiment is simulated in HFSS simulation software to obtain the simulation result of the passive structure, and the result is brought into ADS for simulation to extract the input and output impedance of the Schottky diode circuit; according to the extracted input and output impedance, the passive structures such as input matching structure, output matching structure, filter and DC bias are simulated and designed in HFSS; the HFSS result of the passive structure is brought into ADS for simulation optimization to obtain the optimal structure size; the optimal structure is fully combined in HFSS to obtain the overall circuit for simulation, and then the HFSS simulation result of the overall circuit is brought into ADS for simulation to obtain the final simulation result. Figure 5 As shown, the output frequency of the doubler obtained in the embodiment is 120-160 GHz, the frequency doubling efficiency is 20-30%, and the output power is 50-75 mW, indicating that the single-waveguide high-efficiency power synthesis terahertz doubler of this embodiment has a high-efficiency power synthesis capability.

[0031] Since two diode chips of the same model are not completely consistent in actual production, the simulation is controlled to be asymmetric (the junction capacitance of one chip is 44fF and the junction capacitance of the other chip is 34fF) with the two chips being completely symmetric (the junction capacitance of both dies is 44fF). The simulation results are as follows: Figure 6 As shown, when the two chips are not completely symmetrical, the frequency doubling efficiency of the frequency multiplier of the present invention decreases in the lower frequency band, but by adjusting the independent DC bias of the two chips (the DC bias of the two chips is adjusted from -7.11V and -7.11V to -7.11V and -6V), the deterioration of the frequency doubling efficiency caused by the incomplete chip symmetry can be optimized to a certain extent, which shows that the single-waveguide high-efficiency power synthesis terahertz doubler with adjustable independent bias of the present invention has a certain tuning ability by adjusting the independent DC bias.

[0032] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be regarded as equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment, comprising: An input circuit, a frequency doubler structure, and an output circuit; characterized in that: The frequency doubler structure is used to double the frequency of the input fundamental wave signal, and includes a substrate, a first frequency doubler circuit arranged on the front side of the substrate, and a second frequency doubler circuit arranged on the back side of the substrate; The first frequency doubling circuit includes a Schottky diode circuit, a suspended microstrip line, an E-plane probe, a bandpass filter and a DC bias circuit connected in sequence; the Schottky diode circuit is connected to the input end circuit as the input of the doubler structure, and is composed of a plurality of reverse series diode chips; the E-plane probe is connected to the output end circuit as the output of the doubler structure; The second frequency multiplication circuit has the same structure as the first frequency multiplication circuit.

2. The single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment according to claim 1, characterized in that: The input end circuit comprises an input standard rectangular waveguide and an input height-reducing waveguide, the last stage of the input height-reducing waveguide is a waveguide short-circuit, and the input standard rectangular waveguide is connected to the Schottky diode circuit through the input height-reducing waveguide.

3. The single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment according to claim 1, characterized in that: The output end circuit includes a standard output rectangular waveguide and an output height reduction waveguide connected in sequence, the last stage of the output height reduction waveguide is a waveguide short-circuit surface, and the output standard rectangular waveguide is connected to the E-plane probe through the input height reduction waveguide.

4. The single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment according to claim 1, characterized in that: The suspended microstrip line is a gold strip attached to a quartz substrate.

5. The single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment according to claim 1, characterized in that: The Schottky diode circuit is composed of two reverse series connected diode chips.

6. The single-waveguide high-efficiency power synthesis terahertz frequency doubler structure with independent bias adjustment according to claim 1, characterized in that: The substrate material is quartz, AlN or diamond.

7. The single-waveguide high-efficiency power synthesis terahertz doubler structure with independent bias adjustment according to claims 1 to 6, characterized in that: The bandpass filter uses a quarter wavelength line.

Images