Channelizer based on secondary polyphase decomposition and data extraction

Abstract

The present invention relates to a channelizer based on secondary polyphase decomposition and data extraction, comprising an input commutation device, multiple filter groups, multiple output combiners and an inverse Fourier transform module. The input commutation device is respectively connected to each filter group, each filter group includes multiple sub-filters, each of which is connected to a corresponding output combiner, and each output combiner is connected to the inverse Fourier transform module. The input commutation device delays an original broadband signal and extracts it by a preset decimation multiple. The sub-filter performs a convolution operation on the input signal and outputs the convolved signal. The output combiner is used to combine the signals output by each sub-filter. The inverse Fourier transform module performs complex modulation on the combined signal output by each output combiner, so as to equivalently perform complex modulation on the original low-pass filter and thereby obtain multiple narrowband signals. The number of narrowband signals is the same as the number of filter groups, and the preset decimation multiple is less than the number of narrowband signals.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and more particularly to a channelizer based on secondary polyphase decomposition and data extraction. Background Art

[0002] With the advancement of science and technology, the signal bandwidths required for processing in fields such as communications systems, radio astronomy, and real-time signal processing are increasing. To complete signal processing tasks, the wide input bandwidth needs to be divided into several narrower sub-bands for further processing and analysis. Channelizers, devices used to split a continuous broadband signal into multiple narrowband signals (i.e., channels), have important applications in fields such as satellite communications, radar signal processing, and wireless communications.

[0003] Due to its maximum decimation characteristic (ie, the decimation factor of the decimator is the same as the number of channels), the existing channelizer has the problems of intra-sub-band edge signal attenuation and spectrum aliasing, which limits the performance of the channelizer. Summary of the Invention

[0004] The object of the present invention is to provide a channelizer based on secondary polyphase decomposition and data extraction to solve the problems of sub-band edge signal attenuation and spectrum aliasing.

[0005] Based on the above purpose, the present invention provides a channelizer based on secondary polyphase decomposition and data extraction, including an input commutation device, multiple filter groups, multiple output combiners and an inverse Fourier transform module, each filter group corresponds to each output combiner one by one, the input commutation device is respectively communicated with each filter group, each filter group includes multiple sub-filters, each sub-filter of each filter group is communicated with the output combiner corresponding to the filter group, each output combiner is respectively communicated with the inverse Fourier transform module, the input commutation device is used to receive the original broadband signal, and delay the original broadband signal and extract it by a preset extraction multiple, so as to obtain the original broadband signal. The original broadband signal is input into each sub-filter of each filter group according to a preset phase order. The sub-filter is used to perform a convolution operation on the input signal and output a convolved signal. The output combiner is used to combine the convolved signals output by each sub-filter connected to the output combiner and output a combined signal. The inverse Fourier transform module is used to perform complex modulation on the combined signal output by each output combiner, so as to equivalently perform complex modulation on the original low-pass filter to obtain multiple narrowband signals, wherein the number of the narrowband signals is the same as the number of the filter groups, and the preset decimation multiple is less than the number of the narrowband signals.

[0006] Furthermore, the number of sub-filters included in each filter group is equal to the preset decimation factor divided by the greatest common divisor of the preset decimation factor and the number of the narrowband signals.

[0007] Furthermore, the output combiner is an adder for adding the convolved signals output by the sub-filters of the corresponding filter group to obtain a combined signal.

[0008] Furthermore, the number of points of the inverse Fourier transform module is equal to the number of narrowband signals.

[0009] Furthermore, the input switching device includes multiple first delay devices and multiple extractors, each first delay device corresponds one-to-one to each extractor, each extractor corresponds one-to-one to each sub-filter of each filter group, each first delay device is communicatively connected to the corresponding extractor, each extractor is communicatively connected to the corresponding sub-filter, the extraction multiple of each extractor is the preset extraction multiple, the delay bit number of each first delay device is different, and is set in sequence according to preset rules.

[0010] Furthermore, the input commutation device includes a commutator and a plurality of second delay groups, the commutator having an input end and a plurality of output ends, the number of the output ends being the same as the preset decimation multiple, the input end being used to receive the original broadband signal, each second delay group corresponding to each output end, and each output end being communicatively connected to the input end of the corresponding second delay group;

[0011] Each second delay device group includes a plurality of second delay devices that are communicatively connected in sequence, and the number of second delay devices is equal to the preset decimation multiple divided by the greatest common divisor of the preset decimation multiple and the number of narrowband signals; the number of delay bits of each second delay device is 1, and the input and output ends of each second delay device are respectively formed as signal output ends, and each signal output end is respectively communicatively connected to each sub-filter of each filter group.

[0012] Furthermore, it also includes a cyclic shifter, which is provided between each output combiner and the inverse Fourier transform module, and is respectively communicated with each output combiner and the inverse Fourier transform module. The cyclic shifter is used to perform an upward cyclic shift on each combined signal output by each output combiner, and input each shifted signal into the inverse Fourier transform module to avoid frequency offset.

[0013] Furthermore, the number of bits R(n) that the cyclic shifter cyclically shifts upward at time n is:

[0014] R(n)=(nD)modM, n=0, 1, 2,...

[0015] Wherein, D is the preset decimation factor, and M is the number of narrowband signals.

[0016] Furthermore, R(n) is periodic, and its period T is:

[0017] T=M / l, where l is the greatest common divisor of M and D.

[0018] The channelizer based on secondary polyphase decomposition and data extraction of the present invention sets the decimation factor to be less than the number of channels so that there is overlap between the narrowband signals, thereby solving the problem of attenuation and spectral aliasing of signals at the edge of the sub-band in existing channelizers. The overlapping polyphase filter bank based on secondary polyphase decomposition and data extraction realizes channelization, has a simple structure, and can be completely constructed using the existing IP core (i.e., a pre-designed circuit function module) in an FPGA (field programmable gate array), making it easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 2 is a schematic structural diagram of a channelizer based on secondary multiphase decomposition and data extraction according to an embodiment of the present invention;

[0020] Figure 2 2. A schematic diagram of a first structure of an input switching device of a channelizer based on secondary multi-phase decomposition and data extraction according to an embodiment of the present invention;

[0021] Figure 3 A second structural diagram of an input switching device of a channelizer based on secondary multi-phase decomposition and data extraction according to an embodiment of the present invention;

[0022] Figure 4 is a schematic diagram of an input reversing device having a second structure according to an exemplary embodiment of the present invention;

[0023] Figure 5 is a structural diagram of a channelizer based on secondary polyphase decomposition and data extraction according to another embodiment of the present invention;

[0024] Figure 6 1 is an implementation structure of a cyclic shifter of a channelizer based on secondary polyphase decomposition and data extraction according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0025] The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings and described in detail.

[0026] like Figure 1As shown, an embodiment of the present invention provides a channelizer based on secondary polyphase decomposition and data extraction, which includes an input commutation device 100, multiple filter groups 200, multiple output combiners 300 and an inverse Fourier transform module 400. Each filter group 200 corresponds to each output combiner 300 one by one. The input commutation device 100 is respectively connected to each filter group 200 in communication. Each filter group 200 includes multiple sub-filters 210. Each sub-filter 210 of each filter group 200 is connected to the output combiner 300 corresponding to the filter group 200. Each output combiner 300 is respectively connected to the inverse Fourier transform module 400 in communication. The input commutation device 100 is used to receive the original broadband signal, delay the original broadband signal, and extract the signal by a preset decimation multiple, so that the original broadband signal is input to each sub-filter 210 of each filter group 200 in a preset phase order. 210 is used to perform convolution operation on the signal input thereto and output the convolved signal. Each output combiner 300 is used to combine the convolved signals output by each sub-filter 210 connected to the output combiner 300 and output a combined signal. The inverse Fourier transform module 400 is used to perform equivalent complex modulation on the combined signal output by each output combiner 300, so as to equivalently perform complex modulation on the original low-pass filter and thus produce multiple narrowband signals, wherein the number of narrowband signals is the same as the number of filter groups, and the preset decimation multiple is less than the number of narrowband signals, thereby allowing overlap between the narrowband signals, so that the out-of-band signal can be well suppressed. At the same time, the attenuation of the in-band edge signal occurs in the introduced overlapping part between the sub-bands, and will not affect the effective frequency band. When processing the signal in the post-processing stage, only the frequency range required by each sub-band needs to be processed, and the redundant part introduced by the overlapping structure can be eliminated. This only modestly increases the hardware implementation complexity of the ultra-wideband signal channelizer, while improving the flatness of the sub-band amplitude-frequency response, significantly suppressing spectral aliasing caused by decimation, and enhancing the quality of the channelized signal. In the present invention, each sub-filter, after being combined twice and combined with the inverse Fourier transform module 400, is equivalent to multiple groups of bandpass filters, thereby achieving channelization of the original wideband signal.

[0027] The number of filter groups 200 is denoted as M, the original broadband signal is denoted as x(n), and the decimation multiple of the original broadband signal by the input commutation device 100 (i.e., the preset decimation multiple) is denoted as D. The greatest common factor of M and D is l. Dividing D by l gives d, i.e., D=l*d, where d is the number of sub-filters 210 contained in each filter group 200. After x(n) enters the input commutation device 100, the input commutation device 100 will delay it and decimate it by D times, so that it is input to each sub-filter 210 in a preset phase sequence and the data rate of the output signal is reduced; the input commutation device 100 will convert x(n) into M groups of signal outputs, each group of signals corresponds to a filter group 200, and each group of signals includes d sub-signals, and the d sub-signals correspond to d sub-filters respectively. As shown Figure 1 As shown, the first group of signals includes signals A0, A M ...A (d-1)M The second group of signals includes signals A1, A M+ 1...A (d-1)M+1 The third group of signals includes signals A2, A M+2 ...A (d-1)M+2 , and so on, the Mth group of signals includes signal A M-1 、A M+(M -1)...A (d-1)M+(M-1) , where signal A i The subscript i in the code refers to the number of delay bits. For example, A0 refers to the signal obtained by delaying x(n) by 0 bits (i.e., no delay) and decimating the collected signal by D times. A1 refers to the signal obtained by delaying x(n) by 1 bit and decimating the collected signal by D times. M-1 It refers to the signal obtained by sampling x(n) with a delay of M-1 bits and decimating the collected signal by a factor of D. To facilitate describing the patterns between the number of delayed bits of each signal, the subscript values ​​of each group of signals can be combined into a matrix, where the subscripts of each subsignal in each group form the rows of the matrix: the first group of signals is the first row, the second group is the second row, and so on. In this matrix, the subscripts of the subsignals with the same bit in each group of signals form the columns of the matrix, that is, the subscript of the first subsignal in each group of signals is the first column of the matrix, the subscript of the second subsignal in each group of signals is the second column of the matrix, and so on. Therefore, the dimension of the matrix is ​​M*d, the difference between any two adjacent subscripts in each row is M, and the difference between any two adjacent subscripts in each column is 1.

[0028] The output combiner 300 is an adder, which is used to add the signals output by the corresponding sub-filters 210 of the filter bank 200 to obtain a combined signal B. j(j=0, 1, 2...M-1), for example, the first output combiner 300 is used to add the sub-filters 210 of the first filter bank 200 to obtain B0, the second output combiner 300 is used to add the sub-filters 210 of the second filter bank 200 to obtain B1, and so on, the M-th output combiner 300 is used to add the sub-filters 210 of the M-th filter bank 200 to obtain B M-1 .

[0029] The inverse Fourier transform module 400 is used to transform each combined signal B j Equivalent complex modulation is performed to equivalently perform complex modulation on the original low-pass filter and then output narrowband signals of different sub-bands. The number of narrowband signals is the same as the number of filter banks 200, that is, the inverse Fourier transform module 400 can output narrowband signals of M frequency bands, namely y0(n), y1(n), y2(n)...y M-1 The inverse Fourier transform module 400 is an M-point inverse Fourier transform module, configured to perform inverse Fourier transform on each combined signal to implement complex modulation on each combined signal.

[0030] like Figure 2 As shown, in some embodiments, the input reversing device 100 may include a plurality of first delay devices 110 and a plurality of extractors 120, each first delay device 110 corresponds one-to-one to each extractor 120, and each extractor 120 corresponds one-to-one to each sub-filter 210 of each filter group 200, so there are d*M first delay devices 110 and extractors 120, each first delay device 110 is communicatively connected to the corresponding extractor 120, each extractor 120 is communicatively connected to the corresponding sub-filter 210, and the decimation multiple of each extractor 120 is D, and the number of delay bits of each first delay device 110 is different, and is set in sequence according to a preset rule, so that the original broadband signal is input to each sub-filter 210 of each filter group 200 according to a preset phase order. Specifically, each first delay device 110 can be divided into M first delay device groups, each first delay device group includes d first delay devices 110, each first delay device group corresponds to each filter group 200 one by one, each first delay device 110 in each first delay device group corresponds to each filter 210 of the corresponding filter group 200, and the number of delay bits of each first delay device in each first delay device group is equal to the input signal A of the filter group 200. i The subscript i corresponds to . Figure 2 In, z -i That is, it means delaying i bits, and “↓D” means decimating the signal, with the decimation multiple (or decimation factor) being D.

[0031] like Figure 3As shown, in some embodiments, the input reversing device 100 may include a reversing device 130 and a plurality of second delay groups 140, the reversing device 130 having an input end and D output ends, the input end being used to receive the original broadband signal, the second delay groups 140 also being D, the D output ends of the reversing device 130 being respectively communicatively connected to the input ends of the second delay groups 140, each second delay group 140 including d second delays 141 being communicatively connected in sequence, and the second delay of each second delay 141 being d. The number of delay bits is 1. The input and output ends of each second delay device 141 form signal output ends 142, respectively. For interconnected second delay devices 141, the output end of the upstream second delay device 141 is connected to the input end of the downstream second delay device 141. Therefore, only one signal output end 142 is formed between these two ends. The number of signal output ends 142 is d*M, which corresponds to the number of sub-filters 210. Each signal output end 142 is communicatively connected to each sub-filter 210. In other words, the delay and D-fold decimation functions can also be achieved using a single commutator 130 and multiple second delay device groups 140.

[0032] like Figure 4 As shown, in an exemplary embodiment, M=8, D=6, the greatest common factor of M and D is l=2, d=D / l=3, and a commutator with 6 output terminals and a second delay device with 18 delay bits, 24 signals can be output, namely signals A0 to A1. 23 , whose subscript is the same as Figure 1 The subscripts of the signals Ai in are the same, and the corresponding sub-filter 210 can be found through the subscripts of the signals, and then the signal output end that outputs the signal can be communicatively connected with the sub-filter 210 corresponding to the signal.

[0033] In the aforementioned channelizer based on quadratic polyphase decomposition and data extraction, since the decimation factor D is less than the number of narrowband signals (i.e., the number of channels) M, the spectrum of the channelized signal is periodically extended at the new sampling rate. In existing channelizers based on quadratic polyphase decomposition and data extraction, the decimation factor D is equal to the number of channels M. Assuming the sampling rate of the original wideband signal is fs, the spectrum of each subband is downsampled by a factor of fs / M during output. The sampling rate of the output data for each subband is fs / M. In the frequency domain, the frequency of each subband is extended with a period of fs / M. The center frequency of the kth subband retained after filtering is kfs / M, which is an integer multiple of fs / M. Therefore, after the periodic extension of the spectrum, its center frequency is shifted to zero frequency.

[0034] In the channelizer based on secondary multiphase decomposition and data extraction of the present invention, the center frequency of each sub-band remains unchanged, but the sampling frequency of the signal will be increased, and the center frequency of each sub-band is no longer an integer multiple of the sampling frequency. This will make it impossible for the center frequency of each output sub-band to reach zero frequency through the periodic extension of the spectrum after extraction, resulting in frequency offset, which affects the subsequent signal processing. Based on this, Figure 5 As shown, another embodiment of the present invention provides a channelizer based on secondary polyphase decomposition and data extraction, which adds a cyclic shifter 500 on the basis of the above-mentioned channelizer based on secondary polyphase decomposition and data extraction. The cyclic shifter 500 is used to output each combined signal B at each moment. j A cyclic shift is performed, and then each shifted signal is input into the inverse Fourier transform module 400 to avoid frequency offset.

[0035] The number of bits R(n) shifted upward at the nth moment is:

[0036] R(n)=(nD)modM, n=0, 1, 2,...

[0037] R(n) is periodic, and its period T can be expressed as:

[0038]

[0039] In this way, after each combined signal B j Before entering the inverse Fourier transform module 400, an upward circular shift is performed to reorder the data, and then the reordered signal data is input into the inverse Fourier transform module 400. At this time, when performing complex modulation calculation, the input signal in each item of the summation will no longer be the same as the Multiplication, but with Multiplied by , the output signal p of the kth subband of the channelizer based on secondary polyphase decomposition and data extraction after the introduction of the cyclic shifter 500 can be expressed as:

[0040]

[0041] where v k (n) represents the output data of the k-th multi-phase element at the n-th moment.

[0042] This is equivalent to down-converting the original final output signal of the kth sub-band and shifting its spectrum downward by kfs / M, which just moves its center frequency from kfs / M to zero frequency, solving the problem of frequency offset.

[0043] Figure 6The specific implementation structure of the cyclic shifter 500 of the channelizer based on secondary polyphase decomposition and data extraction when M is equal to 5 and D is equal to 3 is shown. The cyclic shifter 500 cyclically switches between five shift states. In the five shift states, the number of bits shifted upward by the cyclic shifter 500 is 0, 2, 4, 1, and 3, respectively.

[0044] In the channelizer based on quadratic polyphase decomposition and data extraction in an embodiment of the present invention, the extraction factor D is less than the number of channels M, so that there is overlap between the narrowband signals, thereby solving the problem of attenuation and spectral aliasing of signals at the inner edge of the sub-band of the existing channelizer. The overlapping polyphase filter bank based on quadratic polyphase decomposition and data extraction realizes channelization, has a simple structure, and can be completely constructed using the existing IP core (i.e., a pre-designed circuit function module) in an FPGA (field programmable gate array), which is simple to implement.

[0045] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Various modifications are possible. In other words, any simple, equivalent changes and modifications made in accordance with the claims and description of the present invention are within the scope of protection of the patent claims. Anything not fully described in this invention constitutes conventional technology.

Claims

1. A channelizer based on secondary polyphase decomposition and data extraction, characterized in that: The invention comprises an input commutation device, a plurality of filter groups, a plurality of output combiners and an inverse Fourier transform module, wherein each filter group corresponds to each output combiner one by one, the input commutation device is respectively communicated with each filter group, each filter group comprises a plurality of sub-filters, each sub-filter of each filter group is communicated with the output combiner corresponding to the filter group, each output combiner is respectively communicated with the inverse Fourier transform module, the input commutation device is used to receive the original broadband signal, and delay the original broadband signal and extract the signal by a preset extraction multiple so that the original broadband signal is output according to the preset phase. The sub-filters of each filter group are sequentially input, and the sub-filters are used to perform convolution operations on the signals input thereto and output the convolved signals. The output combiner is used to combine the convolved signals output by the sub-filters connected to the output combiner and output a combined signal. The inverse Fourier transform module is used to perform complex modulation on the combined signals output by each output combiner, so as to equivalently perform complex modulation on the original low-pass filter to obtain multiple narrowband signals, wherein the number of the narrowband signals is the same as the number of the filter groups, and the preset decimation multiple is less than the number of the narrowband signals.

2. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, characterized in that: The number of sub-filters included in each filter bank is equal to the preset decimation factor divided by the greatest common divisor of the preset decimation factor and the number of the narrowband signals.

3. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, characterized in that: The output combiner is an adder, which is used to add the convolved signals output by the sub-filters of the corresponding filter group to obtain a combined signal.

4. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, characterized in that: The number of points of the inverse Fourier transform module is equal to the number of narrowband signals.

5. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, wherein: The input switching device includes multiple first delay devices and multiple extractors, each first delay device corresponds one-to-one to each extractor, each extractor corresponds one-to-one to each sub-filter of each filter group, each first delay device is communicatively connected to the corresponding extractor, each extractor is communicatively connected to the corresponding sub-filter, the extraction multiple of each extractor is the preset extraction multiple, the delay bit number of each first delay device is different, and is set in sequence according to preset rules.

6. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, characterized in that: The input commutation device includes a commutator and a plurality of second delay groups, the commutator having an input end and a plurality of output ends, the number of the output ends being the same as the preset decimation multiple, the input end being used to receive the original broadband signal, each second delay group corresponding to each output end, and each output end being communicatively connected to the input end of the corresponding second delay group; Each second delay device group includes a plurality of second delay devices that are communicatively connected in sequence, and the number of second delay devices is equal to the preset decimation multiple divided by the greatest common divisor of the preset decimation multiple and the number of narrowband signals; the number of delay bits of each second delay device is 1, and the input and output ends of each second delay device are respectively formed as signal output ends, and each signal output end is respectively communicatively connected to each sub-filter of each filter group.

7. The channelizer based on secondary polyphase decomposition and data extraction according to claim 1, characterized in that: It also includes a cyclic shifter, which is provided between each output combiner and the inverse Fourier transform module, and is respectively communicated with each output combiner and the inverse Fourier transform module. The cyclic shifter is used to perform an upward cyclic shift on each combined signal output by each output combiner, and input each shifted signal into the inverse Fourier transform module to avoid frequency offset.

8. The channelizer based on secondary polyphase decomposition and data extraction according to claim 7, characterized in that: The number of bits R(n) that the cyclic shifter cyclically shifts upward at time n is: R(n)=(nD)modM, n=0, 1, 2,... Wherein, D is the preset decimation factor, and M is the number of narrowband signals.

9. The channelizer based on secondary polyphase decomposition and data extraction according to claim 8, characterized in that: R(n) is periodic, and its period T is: T=M / l, where l is the greatest common divisor of M and D.

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