Terminal structure of power device, preparation method and power device

Abstract

The invention discloses a terminal structure of a power device, a preparation method and the power device. The terminal structure comprises a substrate; the epitaxial layer is located on one side of the substrate, the epitaxial layer is of the first doping type, and the epitaxial layer is provided with a first surface deviating from the substrate; the epitaxial regions are located on the side, away from the substrate, of the epitaxial layer, the epitaxial regions are distributed at intervals in the first direction, the region between any two adjacent epitaxial regions is an interval region, each epitaxial region comprises a first epitaxial region and a second epitaxial region which are arranged in a laminated mode, the first epitaxial region is of a second doping type, and the second epitaxial region is of a second doping type; the second epitaxial region has a first doping type, and the first direction is parallel to the first surface; the injection regions are located in the epitaxial layer and make contact with the interval regions, the surfaces, away from the substrate, of the injection regions are located in the first surface, and the injection regions are of the second doping type. The problem of low breakdown voltage of a power device with a field limiting ring structure in the prior art is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a terminal structure of a power device, a method for preparing the terminal structure of a power device, and a power device. Background Art

[0002] The most important performance of power devices is to block high voltage. The devices are designed to withstand high voltage on the depletion layer of the PN junction, metal-semiconductor contact, and MOS interface. As the applied voltage increases, the electric field strength of the depletion layer will also increase, and eventually exceed the material limit to cause avalanche breakdown. The increase in the curvature of the electric field in the depletion region at the edge of the device will cause the electric field strength to be greater than that inside the die. During the process of voltage increase, avalanche breakdown will occur earlier at the edge of the die than inside the die. In order to maximize the performance of the device, it is necessary to design a voltage divider structure at the edge of the device to reduce the curvature of the PN junction at the edge of the active area (cell area), extend the depletion layer laterally, enhance the horizontal voltage resistance, and cause the device to break down at the edge and inside at the same time. The cutoff ring is distributed at the outermost edge of the chip between the voltage divider structure and the scribe groove area, and is indispensable for devices with high reliability requirements and module packaging.

[0003] Field limiting ring technology is one of the most commonly used voltage divider structures in power devices. Its process is very simple and can be formed by diffusion with the active area without adding process steps. The spacing between the main junction and the field limiting ring, the junction depth, the width of the ring and the number of rings will affect the size of the breakdown voltage. If the spacing is selected appropriately so that the electric field strength of the main junction and the ring junction reaches the critical breakdown field strength at the same time, the highest breakdown voltage can be obtained. In general, the breakdown voltage increases with the increase in the number of rings, but it does not increase linearly. The more rings there are, the larger the chip area occupied. The number of rings and the size of the breakdown voltage should be considered during design.

[0004] At present, the interface charge of the surface oxide layer in the field confinement ring structure in the prior art will have a great impact on the surface potential of the device, affecting the voltage division effect and reducing the breakdown voltage. At present, the terminal structure commonly used in SiC power devices has not been optimized for the material properties of SiC, resulting in the material performance advantages of SiC being not obvious. In terms of process flow, the terminal structure of SiC power devices follows the traditional process of Si power devices. Affected by the characteristics of SiC materials, the process flow is complicated and the production cost is high. Summary of the invention

[0005] The present application provides a terminal structure of a power device, a method for preparing the terminal structure of a power device, and a power device, so as to solve the problem of low breakdown voltage of a power device with a field confinement ring structure in the related art.

[0006] According to one aspect of the present application, a terminal structure of a power device is provided, comprising: a substrate; an epitaxial layer, the epitaxial layer is located on one side of the substrate, the epitaxial layer has a first doping type, and the epitaxial layer has a first surface facing away from the substrate; a plurality of epitaxial regions, the epitaxial region is located on a side of the epitaxial layer facing away from the substrate, the epitaxial regions are spaced apart along a first direction, the region between any two adjacent epitaxial regions is a spacing region, the epitaxial region comprises a first epitaxial region and a second epitaxial region arranged in a stacked manner, the first epitaxial region has a second doping type, the second epitaxial region has the first doping type, and the first direction is parallel to the first surface; a plurality of injection regions, the injection regions are located in the epitaxial layer and the injection regions are in contact with the spacing regions, the surface of the injection regions facing away from the substrate is located in the first surface, and the injection regions have the second doping type.

[0007] Optionally, the implantation region has a first width in the first direction, and the first width decreases along the first direction.

[0008] Optionally, the implantation region has a first depth in a second direction, and the first depth decreases along the first direction, wherein the second direction is perpendicular to the first surface.

[0009] Optionally, the doping concentrations of the plurality of implantation regions increase gradually along the first direction.

[0010] Optionally, the terminal structure of the power device further includes: an insulating portion, wherein the insulating portion is at least located in the spacing area.

[0011] Optionally, the epitaxial region has a second width in the first direction, and the second width increases along the first direction.

[0012] Optionally, a doping concentration of the first epitaxial region is greater than or equal to a doping concentration of the second epitaxial region.

[0013] According to another aspect of the present application, a method for preparing a terminal structure of a power device is provided, which is used to prepare the terminal structure of any one of the power devices, and the preparation method includes: providing a substrate; forming an epitaxial layer on the substrate, the epitaxial layer having a first doping type, and the epitaxial layer having a first surface facing away from the substrate; forming epitaxial regions on the epitaxial layer, the epitaxial regions are spaced along a first direction, and the region between any two adjacent epitaxial regions is a spacing region, the epitaxial region includes a first epitaxial region and a second epitaxial region arranged in a stacked manner, the first epitaxial region has a second doping type, the second epitaxial region has the first doping type, and the first direction is parallel to the first surface; forming a plurality of injection regions in the epitaxial layer, the injection regions are in contact with the spacing regions, the surfaces of the injection regions facing away from the substrate are located in the first surface, and the injection regions have the second doping type.

[0014] Optionally, the step of forming the epitaxial region includes: using multiple epitaxial processes to form a first sub-epitaxial layer and a second sub-epitaxial layer on the epitaxial layer, the first sub-epitaxial layer having the second doping type, and the second sub-epitaxial layer having the first doping type; using an etching process to form a plurality of grooves penetrating into the epitaxial layers in the first sub-epitaxial layer and the second sub-epitaxial layer, and the remaining first sub-epitaxial layer and the second sub-epitaxial layer constitute the epitaxial region.

[0015] According to another aspect of the present application, a power device is provided, which includes an active area, a terminal area, a cut-off area and a slicing area, wherein the terminal area and the cut-off area are located between the active area and the slicing area, the terminal area is in contact with the active area, and the cut-off area is in contact with the slicing area, wherein the terminal area includes a terminal structure of any one of the power devices, and the first direction in the terminal structure of any one of the power devices is a direction from the active area to the slicing area.

[0016] Through the technical solution of the present application, a terminal structure of a power device is provided, wherein a plurality of injection regions are provided in an epitaxial layer within the terminal structure, and the plurality of injection regions are arranged at intervals along a first direction, which can play a role in grading the voltage release, and reduce the terminal area and manufacturing cost. Moreover, the plurality of injection regions are located at the bottom of the isolation region, which can reduce the trench leakage. In addition, the terminal structure is combined with a transient voltage suppressor (TVS for short), and since TVS has the characteristics of fast response speed, low leakage current and high breakdown voltage, the high voltage and high temperature resistance of the terminal structure are increased, so that the terminal structure can maintain stable performance even in harsh environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1 A top view of a power device in the prior art is shown;

[0019] Figure 2 A schematic cross-sectional structure diagram of a power device in the prior art is shown;

[0020] Figure 3 A schematic diagram of the cross-sectional structure of a terminal region and a cut-off region of a power device in the prior art is shown;

[0021] Figure 4 is a schematic cross-sectional structure diagram of a terminal structure of a first power device provided according to an embodiment of the present application;

[0022] Figure 5 is a schematic cross-sectional structure diagram of a terminal structure of a second power device provided according to an embodiment of the present application;

[0023] Figure 6 is a schematic cross-sectional structure diagram of a terminal structure of a third power device provided according to an embodiment of the present application;

[0024] Figure 7 is a schematic cross-sectional structure diagram of a terminal structure of a fourth power device provided according to an embodiment of the present application;

[0025] Figure 8 is a flow chart of a method for preparing a terminal structure of a power device provided in an embodiment of the present application;

[0026] Fig. 9 It is a schematic diagram of the cross-sectional structure of a substrate and an epitaxial layer provided in a method for preparing a terminal structure of a power device provided in an embodiment of the present application;

[0027] Fig.10 is Fig. 9 A schematic cross-sectional structure diagram of a substrate after a first epitaxial layer and a second epitaxial layer are formed on the epitaxial layer shown;

[0028] Fig.11 is Fig.10 A schematic diagram of the cross-sectional structure of the substrate after trenches are formed in the first epitaxial layer and the second epitaxial layer;

[0029] Fig.12 is Fig.11 The schematic diagram of the cross-sectional structure of the substrate after the implantation region is formed at the bottom of the groove is shown;

[0030] Fig.13 is Fig.12 A schematic cross-sectional structure diagram of an insulating portion formed on a substrate shown;

[0031] Fig.14 It is a schematic diagram of the cross-sectional structure of a power device provided according to an embodiment of the present application.

[0032] The above drawings include the following reference numerals:

[0033] 1. Active area; 2. Terminal area; 3. Cut-off area; 4. Slicing area; 5. Oxide layer; 10. Substrate; 20. Epitaxial layer; 201. First surface; 21. P-type ring; 30. Epitaxial area; 301. Cut-off structure; 302. First sub-epitaxial layer; 303. Second sub-epitaxial layer; 304. Groove; 31. First epitaxial area; 32. Second epitaxial area; 33. Spacer area; 40. Implantation area; 50. Insulating part; 51. First insulating part; 52. Second insulating part. DETAILED DESCRIPTION

[0034] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0035] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0036] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0037] As described in the background art, a power device in the prior art, Figure 1 is a schematic diagram of a cellular composite structure of a power device in the prior art, Figure 2 for Figure 1 The cross-sectional view along the X direction is shown in Figure 1 and Figure 2 As shown, the power device in the prior art includes: an active area 1, a terminal area 2, a cut-off area 3 and a scribe area 4, wherein the terminal area 2 is located outside the active area 1 to reduce the curvature effect of the PN junction at the edge of the active area 1 and enhance the horizontal withstand voltage capability, the cut-off area 3 is located outside the terminal area 2 to improve the electric field distribution at the edge of the device, and the scribe area 4 is located outside the cut-off area 3 to cut the device to separate the device; Figure 2 As shown, the oxide layer 5 is located on the surface of the power device and has the function of controlling the current. The structures of the terminal region 2 and the cut-off region 3 are as shown in FIG. Figure 3 As shown, the terminal region 2 includes a portion of the substrate 1 and an epitaxial layer 20 located on the substrate 10, the terminal region 2 also includes a plurality of P-type rings 21 located in the epitaxial layer 20 and away from the substrate 10, the cut-off region 3 includes a cut-off structure 301, the cut-off structure 301 is located on the side away from the substrate 10 and in contact with the terminal region 2, and the oxide layer 5 is located on the side of the epitaxial layer 20, the P-type ring 21 and the cut-off structure 301 away from the substrate 10. In this structure, the interface charge of the surface oxide layer 5 of the device will have a great influence on the surface potential of the device, affect the voltage division effect, and reduce the breakdown voltage. In order to solve the above problems, the present application provides a power device and a method for preparing the same.

[0038] According to one aspect of the present application, a terminal structure of a power device is provided, such as Figures 4 to 7As shown, the terminal structure includes: a substrate 10; an epitaxial layer 20, the epitaxial layer 20 is located on one side of the substrate 10, the epitaxial layer 20 has a first doping type, and the epitaxial layer 20 has a first surface 201 away from the substrate; a plurality of epitaxial regions 30, the epitaxial regions 30 are located on the side of the epitaxial layer 20 away from the substrate 10, the epitaxial regions 30 are spaced along a first direction A, the region between any two adjacent epitaxial regions 30 is a spacing region 33, the epitaxial region 30 includes a first epitaxial region 31 and a second epitaxial region 32 arranged in a stacked manner, the first epitaxial region 31 has the second doping type, the second epitaxial region 32 has the first doping type, and the first direction A is parallel to the first surface 201; a plurality of injection regions 40, the injection region 40 is located in the epitaxial layer 20 and the injection region 40 is in contact with the spacing region 33, the surface of the injection region 40 away from the substrate 10 is located in the first surface 201, and the injection region 40 has the second doping type. There are multiple injection regions 40 in the epitaxial layer in the terminal structure, and the multiple injection regions 40 are arranged at intervals along the first direction A, which can play a role in grading the voltage release. At the same time, the terminal area of ​​the device is reduced and the manufacturing cost is reduced. In addition, the multiple injection regions 40 are located at the bottom of the spacing area 33, which can reduce the leakage of the spacing area 33. In addition, the terminal structure is combined with a transient voltage suppressor (TVS for short). Since TVS has the characteristics of fast response speed, low leakage current and high breakdown voltage, the high-voltage and high-temperature resistance of the terminal structure is increased, so that the terminal structure can maintain stable performance even in harsh environments.

[0039] Specifically, when the power device is in reverse bias, the main PN junction in the active area forms a wide depletion region, while the breakdown voltage at the corner is low, causing the device to break down prematurely. Therefore, the active area needs to alleviate the curvature effect of the depletion region of the main PN junction in the active area through the terminal area of ​​the terminal, reduce the electric field concentration at the corner, and increase the main PN junction breakdown voltage of the device. Figures 4 to 7 In the terminal structure shown, the injection region 40 and the epitaxial layer 20 have different doping types, that is, a secondary PN junction is formed at the contact surface between the injection region 40 and the epitaxial layer 20. When the device is in reverse bias, the depletion region generated by the secondary PN junction can slow down the depletion region of the main PN junction, change the curvature effect of the depletion region of the main PN junction in the device, reduce the outer electric field of the PN junction, and increase the breakdown voltage, thereby increasing the breakdown voltage of the device and enhancing the withstand voltage of the device. In the first direction, multiple injection regions are arranged at intervals to form multiple depletion regions in the terminal structure, and the multiple depletion regions divide the depletion region of the main PN junction of the device to prevent the device from being broken down and improve the high-voltage withstand capability of the device.

[0040] In addition, the epitaxial layer has a first doping type, the first epitaxial region of the epitaxial region has a second doping type, and the second epitaxial region has the first doping type, that is, an NPN or PNP doping structure is formed in the contact area between the epitaxial layer and the epitaxial region, with multiple PN junction structures, and a TVS is integrated in the terminal structure of the device. When the device is in normal working state, the TVS is in a high configuration and has little effect on the device; when a transient overvoltage appears in the device, the impedance of the TVS decreases rapidly, so that the overvoltage passes through the TVS, thereby protecting the terminal structure from damage.

[0041] Specifically, the spacing region and the injection region in the terminal structure of the power device are not limited to a one-to-one correspondence, and also include spacing regions that do not correspond to the injection region. In some optional embodiments, among a preset number of continuous adjacent isolation regions, the number of isolation regions in contact with the injection region is a first number, wherein the first number decreases along the first direction, that is, the density of the injection region decreases along the first direction.

[0042] Exemplarily, the preset number is 3, then in the first direction, the first number in the 1st to 3rd isolation regions is 3, the first number in the 4th to 6th isolation regions is 2, and the first number in the 7th to 9th isolation regions is 1. In the above structure, the density of the injection region contacting the isolation region decreases along the first direction, which can play a role in grading the release voltage.

[0043] In some optional embodiments, such as Figures 4 to 7 As shown, the implantation region 40 has a first width in the first direction A, and a projection of the implantation region 40 in the second direction B has a third width in the first direction A, and the third width is greater than or equal to the first width.

[0044] In some optional embodiments, the implantation region has a first width in the first direction, and the first width decreases along the first direction.

[0045] Specifically, Figure 5 As shown, the width of the injection region 40 in the first direction A is the first width S1, and the first widths S1 of the plurality of injection regions 40 are decreasing along the first direction A. The larger the first width S1 of the injection region 40, the larger the fourth width of the depletion region formed by the injection region 40 and the epitaxial layer 20 in the first direction A. When the first width S1 is decreasing along the first direction A, the fourth width of the depletion region formed by the injection region 40 and the epitaxial layer 20 is decreasing along the first direction A, which can slow down the change in the curvature of the main junction PN junction depletion region, divide the voltage of the device, prevent the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the withstand voltage capability of the device.

[0046] In some optional embodiments, the implantation region has a first depth in the second direction, and the first depth decreases along the first direction.

[0047] Specifically, Figure 6 As shown, the depth of the injection region 40 in the second direction B is the first depth H1, and the first depths H1 of the plurality of injection regions 40 are decreasing along the first direction A. The greater the first depth H1 of the injection region 40, the greater the second depth of the depletion region formed by the injection region 40 and the epitaxial layer 20 in the second direction B. When the first depth H1 is decreasing along the first direction A, the second depth of the depletion region decreases along the first direction A, which can further slow down the change in the curvature of the main junction PN junction depletion region, divide the voltage of the device, prevent the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the withstand voltage capability of the device.

[0048] In some optional embodiments, the doping concentrations of the plurality of implantation regions increase gradually along the first direction.

[0049] Specifically, the higher the doping concentration in the injection region, the higher the carrier concentration, and the electric field strength in the PN junction formed by the injection region and the epitaxial layer will also increase, making it easier for electrons and holes in the depletion region to meet and match, thereby reducing the number of carriers contained therein, resulting in a narrower width of the depletion region. While the doping concentration in the injection region increases along the first direction, the width of the depletion region of the PN junction decreases along the first direction, thereby slowing down the curvature of the change of the main junction PN junction depletion region, achieving a voltage-dividing effect on the device voltage, preventing the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the withstand voltage capability of the device.

[0050] It should be noted that in Figure 5 In the embodiment shown, the first width S1 of the plurality of injection regions 40 decreases along the first direction A, while the doping concentration of the injection region 40 increases along the first direction A, so as to further slow down the curvature of the change of the main junction PN junction depletion region, realize the voltage division of the device, prevent the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the withstand voltage capability of the device. Figure 6 In the embodiment shown, while the first depth H1 of the plurality of injection regions 40 is decreasing along the first direction A, the doping concentration of the injection region 40 is increasing along the first direction A, thereby further slowing down the curvature of the change of the main junction PN junction depletion region, achieving a voltage divider for the device, preventing the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the voltage resistance of the device.

[0051] In some optional embodiments, such as Figure 7As shown, the first widths S1 of the plurality of injection regions 40 are decreasing along the first direction A, and the first depths H1 of the plurality of injection regions 40 are decreasing along the first direction A, that is, while the fourth width of the depletion region formed by the injection region 40 and the epitaxial layer 20 decreases along the first direction A, the second depth of the depletion region decreases along the first direction A, further slowing down the curvature of the change of the main junction PN junction depletion region, achieving a voltage dividing effect on the device voltage, preventing the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the voltage resistance of the device.

[0052] It should be noted that, in the above-mentioned embodiment, the first width S1 of the plurality of injection regions 40 shows a decreasing trend along the first direction A, and the first depth H1 of the plurality of injection regions 40 shows a decreasing trend along the first direction A, while the doping concentration of the injection region 40 increases along the first direction A, further slowing down the curvature of change of the main junction PN junction depletion region, achieving a voltage divider effect on the device voltage, preventing the device from being broken down, thereby increasing the breakdown voltage of the device and enhancing the voltage resistance of the device.

[0053] In some optional implementations, the terminal structure of the power device further includes: an insulating portion, wherein the insulating portion is at least located in the spacing region.

[0054] Specifically, Figures 4 to 7 As shown, the insulating portion 50 includes a first insulating portion 51 located in the spacing region 33, the first insulating portion contacts the sidewall of the epitaxial region 30, and the first insulating portion 51 contacts the implanted region 40. In some embodiments, the insulating portion 50 further includes a second insulating portion 52 located on a side of the first insulating portion 51 facing away from the substrate 10 and a side of the epitaxial region facing away from the substrate, wherein the second insulating portion 52 contacts the top surface of the epitaxial region 30.

[0055] Specifically, the insulating part includes insulating materials, and the insulating materials include but are not limited to any one or more of aluminum oxide, silicon oxide, aluminum nitride, titanium oxide, germanium oxide, gallium oxide, and indium tin oxide. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0056] Among them, the insulating part isolates the epitaxial area, reducing the decrease in withstand voltage caused by charge accumulation on the surface of the insulating part. This is because, when electrical stress is applied, the movable charges on the surface and body of the terminal structure will gradually accumulate under the influence of the electric field. When the accumulation density exceeds a certain limit, it will affect the shape of the depletion region of the terminal, thereby affecting the withstand voltage effect. By providing an insulating layer between adjacent epitaxial regions, the accumulated charges on the surface of the insulating part can be transferred to the injection area to increase the withstand voltage of the device. In addition, the second insulating part can prevent external pollution and movable charges from affecting the doping concentration on the terminal surface, thereby improving the withstand voltage of the device. The insulating material in the first insulating part ensures the isolation effect and reduces leakage.

[0057] In some optional embodiments, the epitaxial region has a second width in the first direction, and the second width increases along the first direction.

[0058] Specifically, if the first epitaxial region and the second epitaxial region in the epitaxial region have different doping types, the first epitaxial region and the second epitaxial region form a first PN junction, and if the first epitaxial region and the epitaxial layer have different doping types, the second epitaxial region and the epitaxial layer form a second PN junction. Figures 4 to 7 As shown, the second width of the epitaxial region 30 in the first direction A increases along the first direction A, and the areas of the first PN junction and the second PN junction increase along the first direction A. The increase in junction area helps to disperse the voltage and reduce the local electric field strength, thereby improving the voltage resistance performance. When reverse biased, the depletion region area increases step by step along the first direction, which plays a role in releasing the voltage step by step.

[0059] In some optional embodiments, the doping concentration of the first epitaxial region is greater than or equal to the doping concentration of the second epitaxial region.

[0060] Specifically, the first epitaxial region has a higher doping concentration, which can reduce the resistance of the first epitaxial region. By reducing the resistance of the first epitaxial region, the conduction performance of the TVS can be improved, making it easier to conduct and absorb transient overvoltages under the action of a forward voltage. In addition, the first epitaxial region has a higher doping concentration, which can reduce the width of the space charge region and increase the electric field length under the action of a reverse voltage, so that the epitaxial region can withstand a higher reverse voltage without breakdown. The doping concentration of the first epitaxial region is greater than or equal to the doping concentration of the second epitaxial region, which can improve the conduction performance and breakdown voltage of the TVS, thereby increasing the withstand voltage capability of the terminal structure.

[0061] The doping concentration of the first epitaxial region is 1.0×10 20 cm -3 ~1.0×10 21 cm -3 , the doping concentration of the second epitaxial region is 1.0×10 18 cm -3 ~1.0×10 20 cm -3 , the doping concentration of the epitaxial layer is 1.0×10 19 cm -3 ~1.0×10 21 cm -3 The specific doping concentration is not limited in this application.

[0062] According to another aspect of the present application, a method for preparing a terminal structure of a power device is provided, and the method is used to prepare any terminal structure of a power device, such as Figure 8As shown, the preparation method comprises:

[0063] Step S101: providing a substrate;

[0064] Step S102: forming an epitaxial layer on a substrate, wherein the epitaxial layer has a first doping type and has a first surface facing away from the substrate;

[0065] Step S103: forming epitaxial regions on the epitaxial layer, the epitaxial regions are spaced apart along a first direction, the region between any two adjacent epitaxial regions is a spacer region, the epitaxial regions include a first epitaxial region and a second epitaxial region which are stacked, the first epitaxial region has a second doping type, the second epitaxial region has a first doping type, and the first direction is parallel to the first surface;

[0066] Step S104: forming a plurality of implantation regions in the epitaxial layer, wherein the implantation regions are in contact with the spacing regions, surfaces of the implantation regions facing away from the substrate are located in the first surface, and the implantation regions have a second doping type.

[0067] The above-mentioned preparation method of the embodiment of the present application is adopted. On the basis of the terminal structure of the traditional SIC power device, a multi-layer epitaxial layer process is adopted. Under the premise of not affecting the device structure and increasing the process cost, the terminal structure is compatible with the TVS production process, the structure is simple, and the manufacturing cost is reduced. Since TVS has the characteristics of fast response speed, low leakage current and high breakdown voltage, the high voltage and high temperature resistance of the terminal structure are increased, so that the terminal structure can maintain stable performance even in harsh environments. The isolation area is formed by using a multi-layer epitaxial structure and a deep trench etching process, and an injection area is formed at the bottom of the trench, and multiple injection areas are arranged at intervals along the first direction, which can play a role in graded release of the voltage, and reduce the terminal area and reduce the manufacturing cost. In addition, multiple injection areas are located at the bottom of the isolation area, which can reduce trench leakage.

[0068] The following will describe in more detail the exemplary embodiments of the method for preparing the terminal structure of the power device provided by the present application in conjunction with the accompanying drawings. However, these exemplary embodiments can be implemented in a variety of different forms and should be interpreted as being limited to the embodiments described herein. It should be understood that these embodiments are provided to make the disclosure of the present application thorough and complete, and to fully convey the concepts of these exemplary embodiments to those of ordinary skill in the art.

[0069] First, proceed to step S101: Fig. 9 As shown, a substrate 10 is provided.

[0070] Specifically, the substrate material includes but is not limited to silicon, silicon nitride, silicon carbide, gallium nitride, gallium oxide, aluminum oxide and aluminum nitride and other materials. Personnel in this field can make reasonable selections based on actual needs and no specific limitation is made without application.

[0071] After the step of providing the substrate, step S102 is performed: Fig. 9 As shown, an epitaxial layer 20 is formed on a substrate 10 .

[0072] Specifically, the materials of the epitaxial layer include but are not limited to silicon, silicon nitride, silicon carbide, gallium nitride, gallium oxide, aluminum oxide and aluminum nitride, among which the substrate and the material forming the epitaxial layer can be the same. Personnel in this field can make reasonable selections based on actual needs, and no specific limitation is made without application.

[0073] The epitaxial layer has a first doping type.

[0074] In an embodiment of the present application, if the first doping type is P-type, the second doping type is N-type, or the first doping type is N-type, the second doping type is P-type, wherein N-type doping is the addition of pentavalent elements into the semiconductor material, and the pentavalent elements include but are not limited to phosphorus, arsenic and antimony; P-type doping is the addition of trivalent elements into the semiconductor material, and the trivalent elements include but are not limited to boron, aluminum and gallium. The specific doping elements are not specifically limited in this application.

[0075] After the step of forming the epitaxial layer, step S103 is performed to form an epitaxial region on the epitaxial layer.

[0076] Specifically, the steps of forming the epitaxial region include: first, Fig.10 As shown, a first sub-epitaxial layer 302 and a second sub-epitaxial layer 303 are formed on the epitaxial layer by multiple epitaxial processes, wherein the first sub-epitaxial layer 302 has the second doping type and the second sub-epitaxial layer 303 has the first doping type; then, as shown Fig.11 As shown, a plurality of trenches 304 penetrating the epitaxial layer 20 are formed in the first sub-epitaxial layer 302 and the second sub-epitaxial layer 303 by an etching process, and the remaining first sub-epitaxial layer 302 and the second sub-epitaxial layer 303 constitute the epitaxial region 30. Specifically, the remaining first sub-epitaxial layer 302 constitutes the first epitaxial region 31, the remaining second sub-epitaxial layer 303 constitutes the second epitaxial region 32, and the first epitaxial region 31 and the second epitaxial region 32 constitute the epitaxial region 30.

[0077] Among them, the process of forming the epitaxial layer, the first sub-epitaxial layer and the second sub-epitaxial layer includes but is not limited to a deposition process and an epitaxial growth process. In the epitaxial growth process, the doping concentration of impurities is relatively easy to control, and the activation rate is relatively fixed, and it is easy to achieve the target doping distribution. It is not only suitable for silicon-based power devices, but also can avoid the injection doping difficulties of silicon carbide power devices and improve the efficiency of their terminal structures. The deposition process is relatively mature, simple to operate, and has a low cost. Among them, the deposition process includes but is not limited to physical vapor deposition (PVD), chemical vapor deposition (CVD) and atomic layer deposition (ALD). Among them, physical vapor deposition (PVD) includes but is not limited to magnetron sputtering process, reactive sputtering process, DC sputtering process, AC sputtering process, vacuum coating process, arc evaporation process, chemical vapor deposition (CVD) includes but is not limited to plasma enhanced chemical vapor deposition (PECVD), metal organic compound chemical vapor deposition (MOCVD), laser induced chemical vapor deposition (LCVD), and those skilled in the art can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0078] Among them, the etching process includes but is not limited to dry etching (Dry Etching), wet etching (Wet Etching), deep etching (Deep Etching), ion beam etching (IBE) and electrolytic etching, among which dry etching includes physical etching, chemical vapor etching and plasma etching, and deep etching includes deep reactive ion etching and laser etching. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0079] In some specific embodiments, Fig.11 As shown, the widths of the grooves 304 are the same, and the intervals between adjacent grooves 304 increase along the first direction A.

[0080] After the step of forming the epitaxial region, step S104 is performed: Fig.12 As shown, a plurality of implant regions 40 are formed in the epitaxial layer.

[0081] Specifically, the process of forming the implantation may include an ion implantation process, and the implanted region has the second doping type.

[0082] Among them, the ion implantation process does not require high temperature treatment, that is, it can achieve precise control of the concentration and depth of the implanted ions, and while achieving precise doping, it can avoid damage and deformation of the material structure. In addition, the doping concentration of the implantation area is greater than the doping concentration of the second sub-epitaxial part, and the depth of the implantation area is less than the depth of the first sub-epitaxial part. The ion implantation process can accurately control the doping concentration and depth of the implantation area. In addition, for the carbon-silicon bond energy in the silicon carbide material is high, it is difficult for impurity atoms to diffuse in the silicon carbide material. The ion implantation process is a method of adding a certain amount and type of impurities to the semiconductor material to change the electrical properties. The ion implantation process has a low injection temperature, and can flexibly and accurately control the doping distribution, which can reduce the damage of high temperature to the silicon carbide material and improve the doping efficiency. However, the ion implantation cost is relatively expensive and the cost is high. The diode structure of the present application uses a double-layer epitaxial material to form the first epitaxial layer and the second epitaxial layer, which can reduce the number of ion implantations, simplify the process, and reduce the production cost.

[0083] In some optional embodiments, the above preparation method further includes step S105; Fig.13 As shown, an insulating portion 50 is formed.

[0084] In some embodiments, the isolation portion is formed by a deposition process, wherein the insulating portion 50 includes a first insulating portion 51 located in the spacing region 33, the first insulating portion contacts the sidewall of the epitaxial region 30, and the first insulating portion 51 contacts the injection region 40. The insulating portion 50 also includes a second insulating portion 52 located on the side of the first insulating portion 51 facing away from the substrate 10 and the side of the epitaxial region facing away from the substrate, wherein the second insulating portion 50 contacts the top surface of the epitaxial region 30. The insulating portion 50 can transfer the charges accumulated on the surface of the insulating portion to the injection region to increase the voltage resistance of the device.

[0085] Specifically, the insulating part includes insulating materials, and the insulating materials include but are not limited to any one or more of aluminum oxide, silicon oxide, aluminum nitride, titanium oxide, germanium oxide, gallium oxide, and indium tin oxide. Technical personnel in this field can make reasonable selections according to actual needs, and no specific limitation is made without application.

[0086] The terminal structure of a power device formed by the method for preparing the terminal structure of a power device of the present application will be described below in conjunction with an embodiment.

[0087] The method for preparing the terminal structure of the power device provided in this embodiment includes the following steps: Figures 9 to 13 As shown:

[0088] Provide a substrate 10, the substrate 10 is N-type silicon carbide, such as Fig. 9 As shown;

[0089] An N-type epitaxial layer 20 is formed on an N-type silicon carbide substrate 10 by using an epitaxial growth process. Fig. 9 As shown;

[0090] The N-type epitaxial layer 20 is formed by an epitaxial growth process into a P-type first sub-epitaxial layer 302 and an N-type second sub-epitaxial layer 303. Fig.10 As shown;

[0091] A plurality of trenches 304 penetrating the epitaxial layer 20 are formed in the first sub-epitaxial layer 302 and the second sub-epitaxial layer 303 by an etching process, wherein the width of the plurality of trenches 304 in the first direction A remains unchanged, and the spacing between adjacent trenches increases along the first direction A, wherein the remaining first sub-epitaxial layer 302 constitutes a first epitaxial region 31, the remaining second sub-epitaxial layer 303 constitutes a second epitaxial region 32, and the first epitaxial region 31 and the second epitaxial region 32 constitute an epitaxial region 30, as shown in FIG. Fig.11 As shown;

[0092] An ion implantation process is used to form a P-type implantation region 40 at the bottom of the trench 304. Fig.12 As shown;

[0093] A deposition process is used to fill silicon oxide in the trench to form a first insulating portion 51, and silicon oxide material is continuously deposited to form a second insulating portion 52. The first insulating portion 51 and the second insulating portion 52 constitute an insulating portion 50. Fig.13 shown.

[0094] According to another aspect of the present application, a power device is provided, such as Fig.14 As shown, the power device includes an active area 1, a terminal area 2, a cut-off area 3 and a scribe area 4, the terminal area 2 and the cut-off area 3 are located between the active area 1 and the scribe area 4, the terminal area 2 is disconnected from the active area 1, and the cut-off area 3 is in contact with the scribe area 4, wherein the terminal area 2 includes a terminal structure of any one of the power devices, and the first direction A in the terminal structure of any one of the power devices is the direction from the active area 1 to the scribe area 4.

[0095] Specifically, the terminal structure includes: a substrate 10; an epitaxial layer 20, the epitaxial layer 20 is located on one side of the substrate 10, and the epitaxial layer 20 has a first doping type; a plurality of epitaxial regions 30, the epitaxial regions 30 are located on the side of the epitaxial layer 20 away from the substrate 10, the epitaxial regions 30 are spaced apart along a first direction A, and an insulating portion 50 is provided between any two adjacent epitaxial regions 30, the epitaxial regions 30 include a first epitaxial region 31 and a second epitaxial region 32 which are stacked, the first epitaxial region 31 has a second doping type, the second epitaxial region 32 has a first doping type, and the first direction A is parallel to the first surface; a plurality of injection regions 40, the injection regions 40 are located in the epitaxial layer 20 and the injection regions 40 are in contact with the insulating portion 50, and the injection regions 40 have the second doping type, wherein the insulating portion 50 is also located on the side of the epitaxial region 30 away from the substrate 10.

[0096] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0097] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A terminal structure of a power device, characterized in that: include: substrate; An epitaxial layer, the epitaxial layer is located on one side of the substrate, the epitaxial layer has a first doping type, and the epitaxial layer has a first surface away from the substrate; A plurality of epitaxial regions, the epitaxial regions are located on a side of the epitaxial layer away from the substrate, the epitaxial regions are spaced apart along a first direction, the region between any two adjacent epitaxial regions is a spacing region, the epitaxial regions include a first epitaxial region and a second epitaxial region which are stacked, the first epitaxial region has a second doping type, the second epitaxial region has the first doping type, and the first direction is parallel to the first surface; A plurality of implantation regions are provided, wherein the implantation regions are located in the epitaxial layer and contact the spacer region, a surface of the implantation region facing away from the substrate is located in the first surface, and the implantation region has a second doping type.

2. The terminal structure of the power device according to claim 1, characterized in that: The implantation region has a first width in the first direction, and the first width decreases along the first direction.

3. The terminal structure of the power device according to claim 1, characterized in that: The implantation region has a first depth in a second direction, and the first depth decreases along the first direction, wherein the second direction is perpendicular to the first surface.

4. The terminal structure of the power device according to claim 1, characterized in that: The doping concentrations of the plurality of implantation regions increase gradually along the first direction.

5. The terminal structure of the power device according to claim 1, characterized in that: Also includes: An insulating portion is located at least in the spacing region.

6. The terminal structure of a power device according to any one of claims 1 to 5, characterized in that: The epitaxial region has a second width in the first direction, and the second width increases along the first direction.

7. The terminal structure of a power device according to any one of claims 1 to 5, characterized in that: The doping concentration of the first epitaxial region is greater than or equal to the doping concentration of the second epitaxial region.

8. A method for preparing a terminal structure of a power device, characterized in that: A terminal structure for preparing a power device according to any one of claims 1 to 7, the preparation method comprising: providing a substrate; forming an epitaxial layer on the substrate, the epitaxial layer having a first doping type and having a first surface facing away from the substrate; forming epitaxial regions on the epitaxial layer, the epitaxial regions being spaced apart along a first direction, the region between any two adjacent epitaxial regions being a spacer region, the epitaxial regions comprising a first epitaxial region and a second epitaxial region which are stacked, the first epitaxial region having a second doping type, the second epitaxial region having the first doping type, and the first direction being parallel to the first surface; A plurality of implantation regions are formed in the epitaxial layer, wherein the implantation regions are in contact with the spacing regions, surfaces of the implantation regions facing away from the substrate are located in the first surface, and the implantation regions have a second doping type.

9. The preparation method according to claim 8, characterized in that: The step of forming the epitaxial region comprises: Forming a first sub-epitaxial layer and a second sub-epitaxial layer on the epitaxial layer by multiple epitaxial processes, wherein the first sub-epitaxial layer has the second doping type, and the second sub-epitaxial layer has the first doping type; A plurality of trenches penetrating the epitaxial layers are formed in the first sub-epitaxial layer and the second sub-epitaxial layer by using an etching process, and the remaining first sub-epitaxial layer and the second sub-epitaxial layer constitute the epitaxial region.

10. A power device, characterized in that: The power device includes an active area, a terminal area, a cut-off area and a slicing area, wherein the terminal area and the cut-off area are located between the active area and the slicing area, the terminal area is in contact with the active area, and the cut-off area is in contact with the slicing area, wherein the terminal area includes a terminal structure of a power device as described in any one of claims 1 to 7, and the first direction in the terminal structure of the power device as described in any one of claims 1 to 7 is a direction from the active area to the slicing area.

Images