High-gain direct current amplification circuit

Abstract

The invention discloses a high-gain direct-current amplification circuit, and belongs to the field of precision amplification in high-precision direct-current voltage measurement. The problem that the higher the amplification factor of the amplification circuit is, the more difficult the precision is to guarantee is solved. The circuit comprises an input stage circuit, an intermediate stage circuit and an output stage circuit, wherein the intermediate stage circuit comprises a mirror current source and a bias current source; the input stage circuit is used for carrying out primary amplification on an input voltage signal Vi according to a program control proportion signal; the bias current source is used for providing quiescent current for the input stage circuit, and the mirror current source serves as an active load of the input stage circuit; and the output stage circuit is used for carrying out secondary amplification on the voltage signal after the primary amplification. The invention is mainly used for voltage amplification.

Description

Technical Field

[0001] The invention belongs to the field of precision amplification in high-precision DC voltage measurement. Background Art

[0002] As society's demand for measurement becomes wider and wider, and the accuracy requirements become higher and higher, measurement has gradually become an important support for the development of high-tech industries. In recent years, the manufacturing industry has been booming at an astonishing rate. At the same time, higher requirements have been put forward for measurement. In recent years, the rapid development of electronic technology and digital signal processing technology has laid the foundation for the rapid popularization of nanovolt voltage measurement technology, but it is also facing the interference and influence of various complex factors such as noise, input and output nonlinearity. The primary purpose of nanovolt voltage measurement research is to improve measurement accuracy, while traditional voltage measurement methods are affected by system noise and other interferences, and are prone to certain errors.

[0003] In a high-precision nanovoltmeter, the main measurement parameter is DC voltage, while other parameters including DC current, AC current, AC voltage and resistance must all pass through their respective signal conditioning circuits and eventually be converted into DC voltage signals, which are then amplified by a high-precision signal amplification system. As the core module of a high-precision test instrument, the performance of the high-precision signal amplification system will determine the performance of the entire instrument system.

[0004] The factors that currently limit the development of signal amplification circuits in high-precision voltage measurement systems are mainly poor hardware circuit design, high noise, and reduced overall accuracy and stability. In addition, since the measurement range of the measurement system is relatively wide, the corresponding amplification factor of the amplification circuit is larger, which leads to the problem that the larger the amplification factor, the more difficult it is to ensure accuracy; the small open-loop gain leads to insufficient feedback depth and other problems. Summary of the invention

[0005] The purpose of the present invention is to solve the problem that the greater the amplification factor of the amplifier circuit, the more difficult it is to ensure the accuracy, and to provide a high-gain DC amplifier circuit.

[0006] A high-gain DC amplifier circuit comprises an input stage, an intermediate stage and an output stage circuit, wherein the intermediate stage circuit comprises a mirror current source and a bias current source;

[0007] The input stage circuit is used to adjust the input voltage signal V according to the programmable proportional signal i Perform primary amplification;

[0008] The bias current source is used to provide static current to the input stage circuit, and the mirror current source serves as an active load of the input stage circuit;

[0009] The output stage circuit is used to perform secondary amplification on the voltage signal after primary amplification.

[0010] Preferably, the input stage circuit includes JFET tubes T1 to T2, BJT tubes T3 to T6, resistors R1 to R2, capacitor C1 and voltage stabilizing diode D1;

[0011] The gate of JFET tube T1 serves as the voltage input terminal of the input stage circuit and receives the voltage signal V i ;

[0012] After the source of the JFET tube T1 is connected to the source of the JFET tube T2 and the anode of the voltage stabilizing diode D1, it serves as the current input terminal of the input stage circuit to receive the static current;

[0013] The drain of the JFET tube T1 is connected to one end of the capacitor C1, one end of the resistor R1 and the emitter of the BJT tube T3 at the same time, the other end of the capacitor C1 is connected to the other end of the resistor R1, the base of the BJT tube T3 and the emitter of the BJT tube T5 at the same time, the collector of the BJT tube T3 is connected to the collector of the BJT tube T5, as the output end of one side of the input stage circuit, the base of the BJT tube T5 is connected to the base of the BJT tube T6 and the cathode of the voltage regulator diode D1, and then connected to the control output end of the mirror current source as the control input end of the input stage circuit;

[0014] The collector of BJT tube T6 is connected to the collector of BJT tube T4, and serves as the output terminal on the other side of the input stage circuit;

[0015] The output terminals on both sides of the input stage circuit are respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit;

[0016] The emitter of the BJT tube T6 is connected to the base of the BJT tube T4 and one end of the resistor R2, and the other end of the resistor R2 is connected to the emitter of the BJT tube T4 and the drain of the JFET tube T2;

[0017] The gate of JFET tube T2 serves as the programmable proportional input terminal of the input stage circuit.

[0018] Preferably, the mirror current source includes BJT tubes T7 to T9, resistors R4 to R6 and a power supply V CC ;

[0019] Power supply V CC The power supply end is connected to one end of resistors R4 to R6 at the same time, the other end of resistor R4 is connected to the emitter of BJT tube T7, and the collector of BJT tube T7 serves as the reference current output end of the mirror current source;

[0020] The base of the BJT tube T7 is connected to the other end of the resistor R5, the emitter of the BJT tube T8 and the base of the BJT tube T9 at the same time, and the collector of the BJT tube T8 is connected to the control input end of the input stage circuit as the control output end of the mirror current source;

[0021] After the base of BJT tube T8 is connected to the collector of BJT tube T9, it serves as the mirror current output end of the mirror current source;

[0022] The emitter of BJT tube T9 is connected to the other end of resistor R6;

[0023] The reference current output terminal and the mirror current output terminal of the mirror current source are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit.

[0024] Preferably, the bias current source includes an operational amplifier A1, a resistor R3, a BJT tube T 10 , Power supply V EE1 and power supply V EE2 ;

[0025] BJT Tube 10 The collector of is used as the output terminal of the quiescent current of the bias current source;

[0026] BJT Tube 10 The emitter of is connected to one end of the resistor R3 and the inverting input terminal of the operational amplifier A1, and the other end of the resistor R3 is connected to the power supply V EE1 connect;

[0027] The non-inverting input terminal of operational amplifier A1 is connected to the power supply V EE2 connect.

[0028] Preferably, the output stage circuit comprises an operational amplifier A2 and a capacitor C2;

[0029] The inverting input terminal of the operational amplifier A2 is connected to one end of the capacitor C2, and serves as the inverting input terminal of the output stage circuit; the other end of the capacitor C2 is connected to the output terminal of the operational amplifier A2;

[0030] The non-inverting input terminal of the operational amplifier A2 serves as the non-inverting input terminal of the output stage circuit;

[0031] The in-phase and inverting input terminals of the output stage circuit are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source.

[0032] Preferably, the high-gain DC amplifier circuit further comprises a programmable current compensation circuit, which is used to compensate the voltage signal V received by the input stage circuit. i Perform current compensation.

[0033] Preferably, the programmable current compensation circuit includes a first D / A converter and an operational amplifier A4;

[0034] The analog signal output terminal of the first D / A converter is connected to the in-phase input terminal of the operational amplifier A4, the inverting input terminal of the operational amplifier A4 is connected to the power ground, and the output terminal of the operational amplifier A4 serves as the compensation current output terminal of the programmable current compensation circuit.

[0035] Preferably, the high-gain DC amplifier circuit further includes a programmable voltage compensation circuit, and the programmable voltage compensation circuit is used to eliminate the offset voltage of the input stage circuit.

[0036] Preferably, the programmable voltage compensation circuit includes a second D / A converter, an operational amplifier A5 and a resistor R9;

[0037] The analog signal output terminal of the second D / A converter is connected to the inverting input terminal of the operational amplifier A5, the non-inverting input terminal of the operational amplifier A5 is connected to the power ground, the output terminal of the operational amplifier A5 is connected to one end of the resistor R9, and the other end of the resistor R9 serves as the compensation voltage output terminal of the programmable voltage compensation circuit.

[0038] Preferably, the high-gain DC amplifier circuit further comprises a programmable proportional circuit for generating a corresponding programmable proportional signal control voltage signal V i The magnification of

[0039] The programmable proportional circuit includes a resistor R 71 To R 73 The resistance R7 is composed of the resistor R 81 To R 83 A resistor R8, a first group of gate switches consisting of analog switches SW1 to SW3, a second group of gate switches consisting of analog switches SW4 to SW6, and a follower A3;

[0040] Resistor R 71 To resistor R 73 The first end of the resistor R7 formed by the series connection is used to receive the voltage signal output by the output stage circuit, and the end of the resistor R7 is connected to the power ground;

[0041] One end of the analog switches SW1 to SW3 is connected to the resistor R 71 To resistor R 73 The first end of the analog switches SW1 to SW3 is connected to the first end of the analog switches SW1 to SW3, the other end of the analog switches SW1 to SW3 is connected to the non-inverting input end of the follower A3, and the inverting input end of the follower A3 is connected to the output end of the follower A3;

[0042] Resistor R 81 To R 83The first end of the series resistor R8 is connected to the output end of the follower A3, and the end of the series resistor R8 is connected to the power ground;

[0043] One end of the analog switches SW4 to SW6 is connected to the resistor R 81 To resistor R 83 After the first end of the analog switch SW4 to SW6 is connected, it serves as the programmable proportional signal output end of the programmable proportional circuit.

[0044] Advantages of the present invention:

[0045] The present invention comprises an input stage, an intermediate stage and an output stage circuit, wherein the intermediate stage circuit comprises a mirror current source and a bias current source; the input stage circuit is used to adjust the input voltage signal V according to the program-controlled proportional signal i The primary amplification is performed; the output stage circuit is used as the second stage amplification to further amplify the primary signal. At the same time, the bias current source is used to provide static current to the input stage circuit, so that the overall amplifier circuit has a strong common-mode signal suppression capability and can provide a stable current output for the branch; the mirror current source is used as the active load of the input stage circuit to provide a greater amplification capability for the overall amplifier circuit, thereby ensuring a high amplification factor while ensuring accuracy.

[0046] The present invention innovates the topology of the input stage, intermediate stage and output stage circuits, and the amplification factor of the amplifier circuit built based on discrete components such as JFET tubes, BJT tubes and resistors can reach 10,000 times. The constructed input stage circuit is a common source and common base circuit, which combines the high input impedance of the common source amplifier circuit and the excellent frequency characteristics of the common base amplifier circuit well, in order to increase the input impedance and ensure low noise performance; and the open-loop gain of the amplifier circuit composed of the input stage, intermediate stage and output stage circuits reaches tens of millions of times, which effectively reduces the problem that the higher the amplifier amplification factor, the worse the accuracy due to insufficient open-loop gain. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 This is a schematic diagram of the overall structure of a high-gain DC amplifier circuit according to the present invention;

[0048] Figure 2 The equivalent circuit diagram of a high-gain DC amplifier circuit formed by the input stage, intermediate stage and output stage circuits. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0051] Specific implementation method 1. Figure 1 This embodiment is described. A high-gain DC amplifier circuit described in this embodiment includes an input stage, an intermediate stage and an output stage circuit, and the intermediate stage circuit includes a mirror current source and a bias current source;

[0052] The input stage circuit is used to adjust the input voltage signal V according to the programmable proportional signal i Perform primary amplification;

[0053] The bias current source is used to provide static current to the input stage circuit, and the mirror current source serves as an active load of the input stage circuit;

[0054] The output stage circuit is used to perform secondary amplification on the voltage signal after primary amplification.

[0055] In this preferred embodiment, the input stage circuit is used to perform primary amplification on the input voltage signal, provide differential input, suppress common-mode interference, and provide higher input impedance; the bias current source is used to provide static current to the input stage circuit to ensure that the input stage circuit has a suitable static operating point, and the mirror current source serves as the active load of the input stage circuit; the output stage circuit is used to perform secondary amplification on the voltage signal after primary amplification and can isolate the active load.

[0056] See also Figure 1 , the input stage circuit includes JFET tubes T1 to T2, BJT tubes T3 to T6, resistors R1 to R2, capacitor C1 and Zener diode D1;

[0057] The gate of JFET tube T1 serves as the voltage input terminal of the input stage circuit and receives the voltage signal V i ;

[0058] After the source of the JFET tube T1 is connected to the source of the JFET tube T2 and the anode of the voltage stabilizing diode D1, it serves as the current input terminal of the input stage circuit to receive the static current;

[0059] The drain of the JFET tube T1 is connected to one end of the capacitor C1, one end of the resistor R1 and the emitter of the BJT tube T3 at the same time, the other end of the capacitor C1 is connected to the other end of the resistor R1, the base of the BJT tube T3 and the emitter of the BJT tube T5 at the same time, the collector of the BJT tube T3 is connected to the collector of the BJT tube T5, as the output end of one side of the input stage circuit, the base of the BJT tube T5 is connected to the base of the BJT tube T6 and the cathode of the voltage regulator diode D1, and then connected to the control output end of the mirror current source as the control input end of the input stage circuit;

[0060] The collector of BJT tube T6 is connected to the collector of BJT tube T4, and serves as the output terminal on the other side of the input stage circuit;

[0061] The output terminals on both sides of the input stage circuit are respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit;

[0062] The emitter of the BJT tube T6 is connected to the base of the BJT tube T4 and one end of the resistor R2, and the other end of the resistor R2 is connected to the emitter of the BJT tube T4 and the drain of the JFET tube T2;

[0063] The gate of JFET tube T2 serves as the programmable proportional input terminal of the input stage circuit.

[0064] In this preferred embodiment, only BJT, JFET and MOSFET are used as input devices in the amplifier circuit. JFET has good noise performance and high input impedance. Compared with BJT and MOSFET, JFET is more suitable for weak signal detection and precision instruments, so the structure of JFET is used to form the input stage circuit. The input stage circuit is used to receive the input signal, condition and amplify the input signal by a corresponding multiple, and the signal processed by the input stage circuit is input to the intermediate stage circuit for further amplification.

[0065] Furthermore, the intermediate stage circuit composed of the BJT tube needs to achieve signal amplification without distortion, and a bias circuit needs to be designed to ensure that the working state of the JFET remains in the saturation region. In the amplifier circuit, the bias circuit mainly includes a DC bias structure and a bias current source that have a load function. The DC bias structure uses a mirror current source circuit with an emitter output to effectively improve the amplification factor. The bias current source circuit is composed of a source-coupled differential amplifier circuit. Its main function is to provide a bias current to the input stage circuit, ensure that the circuit has a suitable static operating point, and provide a higher common-mode rejection ratio to the input stage circuit; therefore, the intermediate stage circuit provides a specific structure of the mirror current source and the bias current source, which is:

[0066] See also Figure 1The mirror current source includes BJT tubes T7 to T9, resistors R4 to R6 and power supply V CC ;

[0067] Power Supply V CC The power supply end is connected to one end of resistors R4 to R6 at the same time, the other end of resistor R4 is connected to the emitter of BJT tube T7, and the collector of BJT tube T7 serves as the reference current output end of the mirror current source;

[0068] The base of the BJT tube T7 is connected to the other end of the resistor R5, the emitter of the BJT tube T8 and the base of the BJT tube T9 at the same time, and the collector of the BJT tube T8 is connected to the control input end of the input stage circuit as the control output end of the mirror current source;

[0069] After the base of BJT tube T8 is connected to the collector of BJT tube T9, it serves as the mirror current output end of the mirror current source;

[0070] The emitter of BJT tube T9 is connected to the other end of resistor R6;

[0071] The reference current output terminal and the mirror current output terminal of the mirror current source are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit.

[0072] In this preferred embodiment, an improved mirror current source is used, an emitter follower is added, and the current amplification effect of the BJT tube T8 is utilized to reduce the shunt of the reference current by the base current of the BJT tube T7 and the BJT tube T9. In the actual circuit, the resistor R5 between the base of the BJT tube T7 and the BJT tube T9 and the ground is used to increase the working current of T8, thereby improving the amplification factor of T8.

[0073] The mirror current source increases the output resistance, thus increasing the voltage gain. However, to realize the full advantage of the higher output resistance of the active load, the active load is improved by using a common source and common base circuit, that is, an input stage circuit composed of JFET tubes T1 to T2, BJT tubes T3 to T6, resistors R1 to R2, capacitor C1 and Zener diode D1.

[0074] See also Figure 1 The bias current source includes operational amplifier A1, resistor R3, BJT tube T 10 , Power supply V EE1 and power supply V EE2 ;

[0075] BJT Tube 10 The collector of is used as the output terminal of the quiescent current of the bias current source;

[0076] BJT Tube 10The emitter of is connected to one end of the resistor R3 and the inverting input terminal of the operational amplifier A1, and the other end of the resistor R3 is connected to the power supply V EE1 connect;

[0077] The non-inverting input terminal of the operational amplifier A1 is connected to the power supply.

[0078] Furthermore, the output stage circuit is the second stage amplifier circuit. In the amplifier circuit, the input stage circuit converts the voltage signal into a current signal, and the function of the intermediate stage is to perform secondary amplification on the current signal to increase the circuit gain. The output stage circuit structure is mainly used to isolate the load to prevent the amplifier gain from being reduced after a smaller resistive load is connected to the amplifier. For the output stage circuit design, the integrated operational amplifier can fully provide the parameters and performance required by the intermediate stage circuit and the output stage circuit, and the integrated operational amplifier is easier to implement than discrete devices. Therefore, a specific structure of the output stage circuit is provided, see Figure 1 , the output stage circuit includes an operational amplifier A2 and a capacitor C2;

[0079] The inverting input terminal of the operational amplifier A2 is connected to one end of the capacitor C2, and serves as the inverting input terminal of the output stage circuit; the other end of the capacitor C2 is connected to the output terminal of the operational amplifier A2;

[0080] The non-inverting input terminal of the operational amplifier A2 serves as the non-inverting input terminal of the output stage circuit;

[0081] The in-phase and inverting input terminals of the output stage circuit are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source.

[0082] Furthermore, for nonlinear problems such as offset voltage and current of the amplifier circuit, it is necessary to design a corresponding compensation circuit. The main function of the programmable current compensation circuit is to eliminate the input bias current of the amplifier, and the main function of the programmable voltage compensation circuit is to provide programmable voltage offset adjustment to make the input bias voltage 0. Therefore, the following design is carried out, specifically:

[0083] The high-gain DC amplifier circuit further includes a programmable current compensation circuit, which is used to compensate the voltage signal V received by the input stage circuit. i Perform current compensation; and give a specific structure of the programmable current compensation circuit, see Figure 1 , the programmable current compensation circuit includes a first D / A converter and an operational amplifier A4;

[0084] The analog signal output terminal of the first D / A converter is connected to the in-phase input terminal of the operational amplifier A4, the inverting input terminal of the operational amplifier A4 is connected to the power ground, and the output terminal of the operational amplifier A4 serves as the compensation current output terminal of the programmable current compensation circuit.

[0085] The high-gain DC amplifier circuit further includes a programmable voltage compensation circuit, which is used to eliminate the offset voltage of the input stage circuit. A specific structure of the programmable voltage compensation circuit is given, see Figure 1 , the program-controlled voltage compensation circuit includes a second D / A converter, an operational amplifier A5 and a resistor R9;

[0086] The analog signal output terminal of the second D / A converter is connected to the inverting input terminal of the operational amplifier A5, the non-inverting input terminal of the operational amplifier A5 is connected to the power ground, the output terminal of the operational amplifier A5 is connected to one end of the resistor R9, and the other end of the resistor R9 serves as the compensation voltage output terminal of the programmable voltage compensation circuit.

[0087] In this preferred embodiment, the programmable current compensation circuit and the programmable voltage compensation circuit are both digital quantities that can be controlled by the microcontroller through IIC output to the input end of the D / A converter, and then converted into analog output, thereby achieving the purpose of program control, so that the gain of the high-precision signal amplification system circuit remains consistent under a wide range.

[0088] Further information Figure 1 The high-gain DC amplifier circuit further includes a programmable proportional circuit for generating a corresponding programmable proportional signal control voltage signal V i The magnification of

[0089] Specifically, the programmable proportional circuit includes a resistor R 71 To R 73 The resistance R7 is composed of the resistor R 81 To R 83 A resistor R8, a first group of gate switches consisting of analog switches SW1 to SW3, a second group of gate switches consisting of analog switches SW4 to SW6, and a follower A3;

[0090] Resistor R 71 To resistor R 73 The first end of the resistor R7 formed by the series connection is used to receive the voltage signal output by the output stage circuit, and the end of the resistor R7 is connected to the power ground;

[0091] One end of the analog switches SW1 to SW3 is connected to the resistor R 71 To resistor R 73 The first end of the analog switches SW1 to SW3 is connected to the first end of the analog switches SW1 to SW3, the other end of the analog switches SW1 to SW3 is connected to the non-inverting input end of the follower A3, and the inverting input end of the follower A3 is connected to the output end of the follower A3;

[0092] Resistor R 81 To R 83The first end of the series resistor R8 is connected to the output end of the follower A3, and the end of the series resistor R8 is connected to the power ground;

[0093] One end of the analog switches SW4 to SW6 is connected to the resistor R 81 To resistor R 83 After the first end of the analog switch SW4 to SW6 is connected, it serves as the programmable proportional signal output end of the programmable proportional circuit.

[0094] In this preferred embodiment, the gain switching of the amplifier is determined by two precision resistors and isolated by an operational amplifier. Each resistor provides a gain of 1, 10, and 100. The resistor R 71 To resistor R 73 The resistance values ​​are 180kΩ, 18kΩ, and 2kΩ respectively. The resistor R 81 To R 83 The resistance values ​​are 4.5kΩ, 450Ω, and 50Ω respectively. The cascade of two attenuation networks (i.e., the network composed of the resistor and the analog switch) will form an amplification factor of 10,000. These gains can be sent to the lower computer through the upper computer. After the lower computer analyzes, it controls the two sets of analog switches through IIC to switch, and finally forms a negative feedback input to the differential pair of input stage circuits.

[0095] Principle analysis:

[0096] Figure 2 The invention is an equivalent circuit diagram of a high-gain DC amplifier circuit formed by an input stage, an intermediate stage and an output stage circuit, and the high-gain DC amplifier circuit is an improved differential amplifier circuit with an active load;

[0097] The output resistance R of the high-gain DC amplifier circuit of the present invention is o It is the parallel resistance of the output resistance of JFET tube T4 and the output resistance of JFET tube T9. Assuming that the Darlington transistors composed of T3 and T5 and the Darlington transistors composed of T4 and T6 are connected in common base, then first derive the output resistance R of T4 o4 The expression is:

[0098] R o4 =r o [1+g m (R e ||r π )](1);

[0099] Among them, R e =r e =r o2 , r o =V A / I(V Ais the Early voltage), and is substituted into formula (1) to obtain formula (2), R e is the internal resistance of the signal source, r e is the emitter resistance, r o2 is the output resistance of JFET tube T2, I is the collector current, g m is the transconductance, r π is the input resistance.

[0100] R o4 =r o4 +(g m4 r o4 )(r o2 ||r π4 )(2);

[0101] In the above formula, r o4 is the output resistance of T4, g m4 is the transconductance of T4, r π4 is the input resistance of T4;

[0102] If g m4 (r o2 ||r π4 )>>1, then formula (2) is simplified to:

[0103] R o4 ≈(g m4 r o4 )(r o2 ||r π4 )(3); Due to the limited β of BJT, β is the current amplification factor of BJT tube, r π4 With r o2 Appear in parallel. o2 ||r π4 ) is always less than r π4 . So the maximum is:

[0104] R o4 | max =g m4 r o4 r π4

[0105] =(g m4 r π4 )r o4 (4);

[0106] =β4r o4

[0107] β4 is the current amplification factor of BJT tube T4;

[0108] Since T4 is designed as Darlington connection, the output resistance of T4 is:

[0109] R o4 =β4 2 r o4 (5);

[0110] Since the base of T9 may not be 0, but the base voltage signal is small enough, it can also be calculated using formula (1), r π9 is the input resistance of T9.

[0111] After calculation and simplification, the formula for the differential gain with active load (i.e., the gain of a high-gain DC amplifier circuit of the present invention) is finally obtained as follows:

[0112]

[0113] In formula (6), β9 is the current amplification factor of BJT tube T9, r o9 is the output resistance of T9, β4 is the current amplification factor of BJT tube T4, r o4 is the output resistance of T4;

[0114] The T4 transistor uses MMBT6429, where β4=800 (500-1250), β9=100. So the amplification factor is:

[0115]

[0116] Substituting the values ​​of β4 and β9, A d =14000, and cascaded with the output stage op amp A2 (gain 80000) can achieve an open-loop gain of tens of millions times.

[0117] Verification test:

[0118] The following verification tests are used to illustrate the technical effects of the present invention, as follows:

[0119] The nanovolt level measurement system is implemented by a high-gain DC amplifier circuit according to the present invention, and different range tests are performed on the nanovolt level measurement system corresponding to the DC amplifier circuit of the present invention under different amplification factors. The test results are shown in Table 1.

[0120] Table 1 Uncertainty test of different magnification factors of amplifier circuit in nanovolt measurement system

[0121]

[0122] In Table 1, the uncertainty of the amplifier circuit with different magnifications is measured respectively, and the effective values ​​under the corresponding range are input respectively, and the ranges from 1 to 10000 correspond to the 1mV-10V range of the nanovolt measurement system. It can be seen from the table that when the nanovolt measurement system is in the 0mV-1mV range, that is, the magnification reaches 10000, the overall test uncertainty at this time is less than 50ppm. At present, the output of most existing integrated operational amplifiers will be distorted at high magnifications, and only the output of a small number of precision amplifiers can be guaranteed, but the uncertainty will be several hundred ppm. When the magnification of the present invention reaches 10000, the uncertainty can still be guaranteed to be at a smaller value. It proves that the present invention has a large magnification while ensuring the amplification accuracy, proving the effectiveness of the present invention.

[0123] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. A high-gain DC amplifier circuit, characterized in that: The circuit comprises an input stage, an intermediate stage and an output stage, wherein the intermediate stage circuit comprises a mirror current source and a bias current source; The input stage circuit is used to adjust the input voltage signal V according to the programmable proportional signal i Perform primary amplification; The bias current source is used to provide static current to the input stage circuit, and the mirror current source serves as an active load of the input stage circuit; The output stage circuit is used to perform secondary amplification on the voltage signal after primary amplification.

2. A high-gain DC amplifier circuit according to claim 1, characterized in that: The input stage circuit includes JFET tubes T1 to T2, BJT tubes T3 to T6, resistors R1 to R2, capacitor C1 and voltage stabilizing diode D1; The gate of JFET tube T1 serves as the voltage input terminal of the input stage circuit and receives the voltage signal V i ; After the source of the JFET tube T1 is connected to the source of the JFET tube T2 and the anode of the voltage stabilizing diode D1, it serves as the current input terminal of the input stage circuit to receive the static current; The drain of the JFET tube T1 is connected to one end of the capacitor C1, one end of the resistor R1 and the emitter of the BJT tube T3 at the same time, the other end of the capacitor C1 is connected to the other end of the resistor R1, the base of the BJT tube T3 and the emitter of the BJT tube T5 at the same time, the collector of the BJT tube T3 is connected to the collector of the BJT tube T5, as the output end of one side of the input stage circuit, the base of the BJT tube T5 is connected to the base of the BJT tube T6 and the cathode of the voltage regulator diode D1, and then connected to the control output end of the mirror current source as the control input end of the input stage circuit; The collector of BJT tube T6 is connected to the collector of BJT tube T4, and serves as the output terminal on the other side of the input stage circuit; The output terminals on both sides of the input stage circuit are respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit; The emitter of the BJT tube T6 is connected to the base of the BJT tube T4 and one end of the resistor R2, and the other end of the resistor R2 is connected to the emitter of the BJT tube T4 and the drain of the JFET tube T2; The gate of JFET tube T2 serves as the programmable proportional input terminal of the input stage circuit.

3. A high-gain DC amplifier circuit according to claim 1, characterized in that: The mirror current source includes BJT tubes T7 to T9, resistors R4 to R6 and power supply V CC ; Power Supply V CC The power supply end is connected to one end of resistors R4 to R6 at the same time, the other end of resistor R4 is connected to the emitter of BJT tube T7, and the collector of BJT tube T7 serves as the reference current output end of the mirror current source; The base of the BJT tube T7 is connected to the other end of the resistor R5, the emitter of the BJT tube T8 and the base of the BJT tube T9 at the same time, and the collector of the BJT tube T8 is connected to the control input end of the input stage circuit as the control output end of the mirror current source; After the base of BJT tube T8 is connected to the collector of BJT tube T9, it serves as the mirror current output end of the mirror current source; The emitter of BJT tube T9 is connected to the other end of resistor R6; The reference current output terminal and the mirror current output terminal of the mirror current source are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the in-phase and inverting input terminals of the output stage circuit.

4. A high-gain DC amplifier circuit according to claim 1, characterized in that: The bias current source includes operational amplifier A1, resistor R3, BJT tube T 10 , Power supply V EE1 and power supply V EE2 ; BJT Tube 10 The collector of is used as the output terminal of the quiescent current of the bias current source; BJT Tube T 10 The emitter of is connected to one end of the resistor R3 and the inverting input terminal of the operational amplifier A1, and the other end of the resistor R3 is connected to the power supply V EE1 connect; The non-inverting input terminal of operational amplifier A1 is connected to the power supply V EE2 connect.

5. A high-gain DC amplifier circuit according to claim 1, characterized in that: The output stage circuit includes operational amplifier A2 and capacitor C2; The inverting input terminal of the operational amplifier A2 is connected to one end of the capacitor C2, and serves as the inverting input terminal of the output stage circuit; the other end of the capacitor C2 is connected to the output terminal of the operational amplifier A2; The non-inverting input terminal of the operational amplifier A2 serves as the non-inverting input terminal of the output stage circuit; The in-phase and inverting input terminals of the output stage circuit are respectively connected to the output terminals at both sides of the input stage circuit, and are also respectively connected to the reference current output terminal and the mirror current output terminal of the mirror current source.

6. A high-gain DC amplifier circuit according to claim 1, characterized in that: The programmable current compensation circuit is used to compensate the voltage signal V received by the input stage circuit. i Perform current compensation.

7. A high-gain DC amplifier circuit according to claim 6, characterized in that: The programmable current compensation circuit includes a first D / A converter and an operational amplifier A4; The analog signal output terminal of the first D / A converter is connected to the in-phase input terminal of the operational amplifier A4, the inverting input terminal of the operational amplifier A4 is connected to the power ground, and the output terminal of the operational amplifier A4 serves as the compensation current output terminal of the programmable current compensation circuit.

8. A high-gain DC amplifier circuit according to claim 1, characterized in that: The invention also comprises a programmable voltage compensation circuit, which is used for eliminating the offset voltage of the input stage circuit.

9. A high-gain DC amplifier circuit according to claim 8, characterized in that: The program-controlled voltage compensation circuit includes a second D / A converter, an operational amplifier A5 and a resistor R9; The analog signal output terminal of the second D / A converter is connected to the inverting input terminal of the operational amplifier A5, the non-inverting input terminal of the operational amplifier A5 is connected to the power ground, the output terminal of the operational amplifier A5 is connected to one end of the resistor R9, and the other end of the resistor R9 serves as the compensation voltage output terminal of the programmable voltage compensation circuit.

10. A high-gain DC amplifier circuit according to claim 1, characterized in that: It also includes a program-controlled proportional circuit, which is used to generate a corresponding program-controlled proportional signal control voltage signal V i The magnification of The programmable proportional circuit includes a resistor R 71 To R 73 The resistance R7 is composed of the resistor R 81 To R 83 A resistor R8, a first group of gate switches consisting of analog switches SW1 to SW3, a second group of gate switches consisting of analog switches SW4 to SW6, and a follower A3; Resistor R 71 To resistor R 73 The first end of the resistor R7 formed by the series connection is used to receive the voltage signal output by the output stage circuit, and the end of the resistor R7 is connected to the power ground; One end of the analog switches SW1 to SW3 is connected to the resistor R 71 To resistor R 73 The first end of the analog switches SW1 to SW3 is connected to the first end of the analog switches SW1 to SW3, the other end of the analog switches SW1 to SW3 is connected to the non-inverting input end of the follower A3, and the inverting input end of the follower A3 is connected to the output end of the follower A3; Resistor R 81 To R 83 The first end of the series resistor R8 is connected to the output end of the follower A3, and the end of the series resistor R8 is connected to the power ground; One end of the analog switches SW4 to SW6 is connected to the resistor R 81 To resistor R 83 After the first end of the analog switch SW4 to SW6 is connected, it serves as the programmable proportional signal output end of the programmable proportional circuit.

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