Power supply time sequence control method and circuit and motor controller

Abstract

The invention provides a power supply time sequence control method and circuit and a motor controller, and relates to the technical field of motor controller power supply control, and the method comprises the steps: initializing a power supply control circuit, in which a chip power supply end, an upper bridge circuit power supply end and a lower bridge circuit power supply end do not supply power; the micro-control unit controls the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end to supply power successively, and controls the power supply of the next power supply end after monitoring that the power supply of the previous power supply end is normal, so as to start the power supply control circuit; the micro-control unit monitors the power supply control circuit in real time, and when a circuit under-voltage signal is monitored, power supply of a chip power supply end, an upper bridge circuit power supply end and a lower bridge circuit power supply end is restarted for multiple times in sequence so as to determine a fault position and / or perform fault elimination. The problem that a power supply network integrally enters a protection mode and a non-fault circuit cannot work due to short-circuit protection performed by fuse and chip hiccup protection of an existing power supply is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of motor controller power supply control, and in particular to a power supply timing control method, circuit and motor controller. Background Art

[0002] The power control circuit of the motor controller is an important component of the motor controller. It is responsible for providing stable power supply for chips and control modules with different voltage requirements on the controller.

[0003] The existing power supply is generally converted into 15V power through Buck Boost chip. A fuse is generally connected in series between the subsequent drive loads. When the subsequent circuit fails, the fuse will blow to ensure safety. However, since it takes a certain amount of time for the fuse to blow, it is easy for the fuse to not blow completely in the case of a subsequent short circuit. Alternatively, a Buck Boost chip is used for short circuit protection. The subsequent load fails and triggers the Buck Boost chip hiccup protection. The fuse or the Buck Boost chip hiccup protection will cause the other nodes in the 15V power network to fail to work properly after the load is short-circuited. Therefore, a node failure will cause the entire power circuit network to be "paralyzed", and the entire power network needs to be troubleshooted, which is cumbersome and inefficient. Summary of the invention

[0004] In order to overcome the above-mentioned technical defects, the purpose of the present invention is to provide a power supply timing control method, circuit and motor controller to solve the problem that the short-circuit protection of the existing power supply using fuses and chip hiccup protection causes the entire power supply network to enter a protection mode, and non-fault circuits cannot work, affecting work efficiency and safety.

[0005] The present invention discloses a power supply timing control method, comprising:

[0006] Initialize the power control circuit, wherein the chip power supply end, the upper bridge circuit power supply end, and the lower bridge circuit power supply end in the power control circuit are all powered off;

[0007] The micro control unit controls the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end to supply power in sequence, and controls the power supply of the next power supply end after monitoring that the power supply of the previous power supply end is normal, so as to start the power control circuit;

[0008] The micro control unit monitors the power control circuit in real time, and when a circuit undervoltage signal is detected, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end multiple times in succession to determine the fault location and / or troubleshoot the fault.

[0009] Preferably, the micro control unit controls the chip power supply end to supply power when outputting a low level, the upper bridge circuit power supply end to supply power when outputting a high level, and the lower bridge circuit power supply end to supply power when outputting a high level.

[0010] Preferably, the micro control unit controls the chip power supply end to output a low level, the upper bridge circuit power supply end to output a high level, and the lower bridge circuit power supply end to output a low level; after monitoring the power supply to be normal for a preset time, the lower bridge circuit power supply end is controlled to output a high level to start the power control circuit.

[0011] Preferably, before controlling the power supply end of the lower bridge circuit to output a high level, a circuit undervoltage signal is detected, then:

[0012] The microcontroller unit keeps the chip power supply terminal outputting a low level, controls the lower bridge circuit power supply terminal to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply terminal, and determines whether the fault location is located in the upper bridge circuit;

[0013] If the fault location is not in the upper bridge circuit, the micro control unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and down the level of the chip power supply end, and determines that the fault location is in the chip.

[0014] Preferably, when a circuit undervoltage signal is detected:

[0015] The microcontroller unit keeps the chip power supply terminal outputting a low level, the upper bridge circuit power supply terminal outputting a high level, repeatedly pulling down and up the level output by the lower bridge circuit power supply terminal, and determines whether the fault location is located in the lower bridge circuit;

[0016] If the fault location is not in the lower bridge circuit, the micro control unit keeps the chip power supply end outputting a low level, controls the lower bridge circuit power supply end to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply end, and determines whether the fault location is in the upper bridge circuit;

[0017] If the fault location is not in the upper bridge circuit, the micro control unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and down the level of the chip power supply end, and determines that the fault location is in the chip.

[0018] Preferably, when it is determined that the fault is located in the upper bridge circuit, the micro control unit controls to disconnect the output of the power supply terminal of the upper bridge circuit;

[0019] When it is determined that the fault is in the lower bridge circuit, the microcontroller unit controls to disconnect the output of the power supply end of the lower bridge circuit;

[0020] When it is determined that the fault is located in the chip, the emergency power supply is started to supply power to the lower bridge circuit.

[0021] Preferably, after the micro control unit detects that the number of undervoltage signals exceeds a preset number, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end multiple times in succession to determine the fault location.

[0022] The present invention also provides a power supply control circuit.

[0023] Including upper bridge circuit, lower bridge circuit and chip;

[0024] The chip is respectively connected to the MOS devices of the upper bridge circuit power supply end and the lower bridge circuit power supply end;

[0025] It also includes: an emergency power supply for emergency power supply to the lower bridge circuit;

[0026] A micro control unit communicates with the chip and the MOS device, and applies any of the power timing control methods described above to perform power supply control.

[0027] Preferably, the upper bridge circuit and the lower bridge circuit are respectively provided with two outputs.

[0028] The present invention also provides a motor controller, which uses any of the power supply control circuits described above.

[0029] Compared with the prior art, the above technical solution has the following beneficial effects:

[0030] The power timing control method, circuit and motor controller provided by the present application use a microcontroller unit to realize on-off control of the chip, the upper bridge circuit and the lower bridge circuit, so that when a short circuit occurs in the lower bridge circuit, the upper bridge circuit and the chip can still be turned on, and when a short circuit occurs in the upper bridge circuit, the control of the lower bridge circuit will not be affected, thereby reducing the impact of some faults in the power control circuit of the hardware design on other parts, and solving the problem that the short-circuit protection of the existing power supply using fuses and chip hiccup protection causes the power supply network as a whole to enter the protection mode, and non-fault circuits cannot work. Troubleshooting needs to be performed on the entire power supply network, affecting work efficiency and safety. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A method flow chart of a power timing control method, circuit and motor controller embodiment of the present invention;

[0032] Figure 2 A schematic diagram of a power control circuit of an embodiment of a power timing control method, circuit and motor controller according to the present invention;

[0033] Figure 3 The present invention provides a flow chart of a power supply timing control method, circuit and motor controller embodiment for controlling a power supply control circuit. DETAILED DESCRIPTION

[0034] The advantages of the present invention are further described below in conjunction with the accompanying drawings and specific embodiments.

[0035] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0036] The terms used in this disclosure are for the purpose of describing specific embodiments only and are not intended to limit the disclosure. The singular forms of "a", "said" and "the" used in this disclosure and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0037] It should be understood that although the terms first, second, third, etc. may be used in the present disclosure to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present disclosure, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0038] In the description of the present invention, it is necessary to understand that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0039] In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the internal connection between two components. It can be a direct connection or an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to the specific circumstances.

[0040] In the following description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present invention, and have no specific meanings. Therefore, "module" and "component" can be used interchangeably.

[0041] Embodiment: This embodiment provides a method for controlling the power supply timing of a motor controller, which controls each node circuit in the power supply network separately, so that when the lower bridge circuit is short-circuited, the upper bridge circuit (upper bridge drive power supply) and P15V (chip output power supply) will not be abnormal, and when the upper bridge circuit is short-circuited, the lower bridge circuit and P15V will not be abnormal, which can ensure that the hardware-designed 15V power supply network has no impact on other nodes except the node when a node fails. For details, refer to Figure 1-Figure 3 , the power timing control method comprises:

[0042] S1: Initialize the power control circuit, wherein the chip power supply end, the upper bridge circuit power supply end, and the lower bridge circuit power supply end in the power control circuit are all powered off;

[0043] The power control circuit includes an upper bridge circuit, a lower bridge circuit and a chip, wherein the upper bridge circuit and the lower bridge circuit include a plurality of MOS devices, resistors, diodes and other components. The initialization power control circuit is used to reset the components in the power control circuit, that is, they are all in a non-working state, so that the micro control unit (MCU) can control the on and off of each power supply terminal (that is, including the chip power supply terminal, the upper bridge circuit power supply terminal, and the lower bridge circuit power supply terminal) later. Specifically, the micro control unit controls the chip power supply terminal to supply power when it outputs a low level, the upper bridge circuit power supply terminal to supply power when it outputs a high level, and the lower bridge circuit power supply terminal to supply power when it outputs a high level. Therefore, during the initialization, after KL30 (normal power) is powered on, the chip power supply terminal P15V_EN is at a high level, and the upper bridge circuit power supply terminal P15V_TOP_EN and the lower bridge circuit power supply terminal P15V_BOT_EN are both at a low level.

[0044] S2: The microcontroller controls the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end to supply power in sequence, and controls the power supply of the next power supply end after monitoring that the power supply of the previous power supply end is normal, so as to start the power control circuit;

[0045] Specifically, in the present embodiment, it can be understood that when the power control circuit is started, the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end are powered one by one, that is, in sequence, rather than at the same time, thereby ensuring that the power supply of the previous circuit is fault-free during the power supply process, and reducing the situation where the entire circuit is unavailable due to a previous circuit failure.

[0046] Specifically, the order is preset, and in this embodiment, the order is the chip power supply terminal, the upper bridge circuit power supply terminal, and then the lower bridge circuit power supply terminal. Specifically, the micro control unit controls the chip power supply terminal to output a low level, the upper bridge circuit power supply terminal to output a high level, and the lower bridge circuit power supply terminal to output a low level; after monitoring the power supply to be normal for a preset time, the lower bridge circuit power supply terminal is controlled to output a high level to start the power control circuit.

[0047] In this embodiment, the chip power supply end and the upper bridge circuit power supply end are monitored for 60ms continuously, and the lower bridge circuit power supply end is started only after no undervoltage signal is received (or it is determined to be fault-free) during this process. Therefore, even if an undervoltage signal / fault signal is monitored again (it can also be other fault signals besides undervoltage, which are used to indicate the occurrence of a fault and can be replaced by other signals according to the actual scenario), it should be considered as a lower bridge circuit fault, and the lower bridge circuit can be troubleshooted.

[0048] Furthermore, if a circuit undervoltage signal is detected before the lower bridge circuit power supply end is controlled to output a high level, it means that the fault may be located in the upper bridge circuit or the chip. Then: the microcontroller unit maintains the chip power supply end to output a low level, controls the lower bridge circuit power supply end to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply end, and determines whether the fault location is located in the upper bridge circuit; if the fault location is located in a non-upper bridge circuit, the microcontroller unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and pulls down the level of the chip power supply end, and determines that the fault location is located in the chip.

[0049] Based on the above example, if the P15V power supply is normal (Buck Boost circuit, upper bridge and resolver 15V load are normal), P15V_BOT_EN is pulled high. If the P15V power supply is abnormal at this time, P15V_TOP_EN is pulled low and the P15V power supply is monitored to start counting the number of times P15V_TOP_EN is pulled low. When the number of times P15V_TOP_EN is pulled low is greater than 3 times, and the undervoltage signal is still detected, it means that the fault is not in the upper bridge circuit; then P15V_EN is pulled high for 1ms and then P15V_EN is pulled low and the number of times the Buck Boost chip restarts is started. When the number of Buck Boost chip restarts is greater than 3 times, it is judged that the Buck Boost chip is faulty and P15V_EN is pulled high (that is, the fault is in the chip and the chip power supply end is disconnected). When the number of Buck Boost restarts is less than 3 times and returns to normal, the P15V power supply is continued to be detected.

[0050] In this embodiment, as an illustration, the level is repeatedly pulled up and down multiple times, the purpose of which is to determine whether the undervoltage signal is caused by a circuit fault or interference in the circuit, and to determine the fault location. Therefore, in this embodiment, whether the undervoltage signal is monitored before starting the power control circuit as mentioned above or after starting the power control circuit as described below, it is necessary to sample multiple times to determine that the undervoltage signal is caused by a fault. Only then will the microcontroller unit perform the operation of pulling up / lowering the level, thereby reducing the misjudgment caused by undervoltage due to circuit interference and improving control accuracy.

[0051] S3: The micro control unit monitors the power control circuit in real time, and when a circuit undervoltage signal is detected, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end multiple times in succession to determine the fault location and / or troubleshoot the fault.

[0052] Based on the above, as mentioned above, after the microcontroller detects that the number of undervoltage signals exceeds the preset number, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end one by one to determine the fault location. That is, multiple sampling is performed to eliminate the undervoltage signal caused by interference. In this embodiment, specifically, P15V is sampled for 6 times within 6ms. If the number of undervoltages exceeds 4 times or more, it is judged as a fault (or a short circuit in the next stage) to reduce the possibility of misjudgment.

[0053] It is also explained that the timing control in the present implementation method is reflected in the successive control in the above steps S2 and S3, that is, it needs to be executed in a predetermined order. Specifically, when starting the power control circuit as an example, the chip and the upper bridge circuit are started, that is, the chip power supply end pulls down the level, the upper bridge circuit power supply end pulls up the level, and then the lower bridge circuit power supply end level is pulled up to start the lower bridge circuit; when undervoltage is detected, the level of the output of the lower bridge circuit power supply end is repeatedly pulled down and raised, and the level of the output of the upper bridge circuit power supply end is repeatedly pulled down and raised after eliminating the lower bridge circuit fault, and then the chip is restarted. The design is controlled in sequence so as to determine the fault location without affecting the conduction of the circuit at the non-fault location in the overall power control circuit, so as to facilitate troubleshooting. It can be understood that it can also be set to eliminate the possibility of faults in the upper bridge circuit first, and then determine the lower bridge, etc., which can be implemented in actual application. The specific order is not limited.

[0054] In this embodiment, when a circuit undervoltage signal is detected:

[0055] The microcontroller unit keeps the chip power supply terminal outputting a low level, the upper bridge circuit power supply terminal outputting a high level, repeatedly pulling down and up the level output by the lower bridge circuit power supply terminal, and determines whether the fault location is located in the lower bridge circuit;

[0056] If the fault location is not in the lower bridge circuit, the micro control unit keeps the chip power supply end outputting a low level, controls the lower bridge circuit power supply end to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply end, and determines whether the fault location is in the upper bridge circuit;

[0057] If the fault location is not in the upper bridge circuit, the micro control unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and down the level of the chip power supply end, and determines that the fault location is in the chip.

[0058] Based on the above, when it is determined that the fault is located in the upper bridge circuit, the micro control unit controls the disconnection of the upper bridge circuit power supply output; when it is determined that the fault is located in the lower bridge circuit, the micro control unit controls the disconnection of the lower bridge circuit power supply output; when it is determined that the fault is located in the chip, the emergency power supply P13V5_EP is started to power the lower bridge circuit, that is, P15V cannot be provided.

[0059] As mentioned above, the upper bridge circuit / chip failure is as shown in S2 above. Here, as an example, when the MCU detects that P15V is undervoltage and samples P15V for 6 times within 6ms, if the number of undervoltages exceeds 4 times or more, it is judged as a short circuit in the subsequent stage, and P15V_BOT_EN is pulled down (cutting off the PMOS of the lower bridge circuit and disconnecting the possibility of a short circuit in the lower bridge 15V load), and at the same time, the P15V_EN signal is pulled high for 1ms (initializing Buck Boost). The Buck Boost circuit can return to normal within 20ms, indicating that the short circuit fault of the lower bridge 15V load has been eliminated.

[0060] In the above processing, as mentioned above, the level is repeatedly pulled up and down for many times. On the one hand, it can be determined whether the undervoltage signal is caused by a fault, and on the other hand, the fault location can be determined. The above sampling times and the number of pull-up and pull-down times can be preset according to the actual application scenario, and it can be understood that since the chip controls the MOS devices at the power supply end of the upper bridge circuit and the power supply end of the lower bridge circuit, that is, when determining the fault location, such as determining whether it is located in the lower bridge circuit, the upper bridge circuit and the chip are kept turned on, and when determining whether it is located in the upper bridge circuit, the lower bridge circuit and the chip are kept turned on, and when determining whether it is a chip fault, the upper bridge circuit and the lower bridge circuit are kept powered, that is, any node / circuit failure in the power control circuit does not affect the conduction of other nodes / circuits, thereby distinguishing it from the situation where any node / circuit failure in the existing power control circuit causes an overall failure, reducing the impact of the fault on the circuit as a whole, so that even if it partially fails, other circuits remain available, reducing the impact on the overall working state caused by partial failures.

[0061] Based on the above, this embodiment also provides a power supply control circuit. Figure 2, including an upper bridge circuit, a lower bridge circuit and a chip; the chip is respectively connected to the MOS devices of the upper bridge circuit power supply terminal P15V_TOP_EN and the lower bridge circuit power supply terminal P15V_BOT_EN, and is used to provide P15V to make the MOS devices turn on; further includes: an emergency power supply P13V5_EP, which is used to provide emergency power supply to the lower bridge circuit, that is, triggering the ASC mode when a fault occurs; a micro control unit, which communicates with the chip and the MOS device, and applies any of the power timing control methods described above to perform power supply control.

[0062] In this embodiment, the upper bridge circuit and the lower bridge circuit are respectively provided with two outputs, that is, dual electric control is performed, such as Figure 2 As shown, KL30 outputs P15V to the (BUCK BOOST) chip (EN pin), the lower bridge circuit power supply end P15V_BOT_EN is connected to the outputs P15V_BOT_1 and P15V_BOT_2 through MOS devices Q1, Q2, and Q3; the upper bridge circuit power supply end P15V_TOP_EN is connected to the outputs P15V_TOP_1 and P15V_TOP_2 through MOS devices Q4, Q5, and Q6, and the emergency power supply P13V5_EP is turned on to P15V_BOT_1 through D2 and D4. , P15V_BOT_2. Under normal conditions, the chip P15V outputs a low level and turns on, controlling the MOS devices Q2 and Q5 to output a high level, so that both the upper bridge circuit and the lower bridge circuit turn on the outputs P15V_BOT_1, P15V_BOT_2, P15V_TOP_1, and P15V_TOP_2; when the ASC mode is started, the emergency power supply is supplied to P15V_BOT_1 and P15V_BOT_2, so that the lower bridge circuit remains turned on.

[0063] The specific fault determination / elimination of the undervoltage signal can refer to the above-mentioned timing control method. The above-mentioned method can quickly determine the fault location without affecting the normal operation of the non-faulty circuit, thereby improving efficiency and safety.

[0064] In the present embodiment, it can be understood that, based on the above, a microcontroller unit is used to realize on-off control of the chip, the upper bridge circuit and the lower bridge circuit, so that in the event of a short circuit at the lower bridge circuit power supply terminal P15V_BOT, the upper bridge circuit power supply terminal P15V_TOP and the chip P15V will not be abnormal, and in the event of a short circuit at the upper bridge circuit power supply terminal P15V_TOP, the lower bridge circuit power supply terminal P15V_BOT and P15V will not be abnormal, which can reduce the impact of a node failure in the power control circuit of the hardware design on other circuits.

[0065] It is understandable that the power control circuit can also be connected / arranged with other components such as resistors, monitoring devices (current monitoring, inductance), or connected to other components / devices / equipment, etc., to be suitable for different scenarios.

[0066] Based on the above, this embodiment also provides a motor controller, which uses the power control circuit described in any of the above items to execute the above power timing control method. It can be understood that the motor controller can be used in dual-electric control new energy vehicles, and can also be used in other vehicle controls without limitation. This makes the power control under the motor controller efficient and accurate, reduces the situation where the entire vehicle is paralyzed due to failure of a certain node, and improves safety of use.

[0067] It should be noted that the embodiments of the present invention have better practicability and do not impose any form of limitation on the present invention. Any technician familiar with the field may use the technical content disclosed above to change or modify it into an equivalent effective embodiment. However, any modification or equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A power sequence control method, characterized in that: include: Initialize the power control circuit, wherein the chip power supply end, the upper bridge circuit power supply end, and the lower bridge circuit power supply end in the power control circuit are all powered off; The micro control unit controls the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end to supply power in sequence, and controls the power supply of the next power supply end after monitoring that the power supply of the previous power supply end is normal, so as to start the power control circuit; The micro control unit monitors the power control circuit in real time, and when a circuit undervoltage signal is detected, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end multiple times in succession to determine the fault location and / or troubleshoot the fault.

2. The power sequence control method according to claim 1, characterized in that: The micro control unit controls the chip power supply end to supply power when outputting a low level, the upper bridge circuit power supply end to supply power when outputting a high level, and the lower bridge circuit power supply end to supply power when outputting a high level.

3. The power sequence control method according to claim 2, characterized in that: The micro control unit controls the chip power supply end to output a low level, the upper bridge circuit power supply end to output a high level, and the lower bridge circuit power supply end to output a low level; after monitoring the power supply to be normal for a preset time, the lower bridge circuit power supply end is controlled to output a high level to start the power control circuit.

4. The power sequence control method according to claim 3, characterized in that: Before controlling the power supply end of the lower bridge circuit to output a high level, if a circuit undervoltage signal is detected, then: The microcontroller unit keeps the chip power supply terminal outputting a low level, controls the lower bridge circuit power supply terminal to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply terminal, and determines whether the fault location is located in the upper bridge circuit; If the fault location is not in the upper bridge circuit, the micro control unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and down the level of the chip power supply end, and determines that the fault location is in the chip.

5. The power sequence control method according to claim 1, characterized in that: When the circuit undervoltage signal is detected: The microcontroller unit keeps the chip power supply terminal outputting a low level, the upper bridge circuit power supply terminal outputting a high level, repeatedly pulling down and up the level output by the lower bridge circuit power supply terminal, and determines whether the fault location is located in the lower bridge circuit; If the fault location is not in the lower bridge circuit, the micro control unit keeps the chip power supply end outputting a low level, controls the lower bridge circuit power supply end to output a high level, repeatedly pulls down and pulls up the level output by the upper bridge circuit power supply end, and determines whether the fault location is in the upper bridge circuit; If the fault location is not in the upper bridge circuit, the micro control unit controls the upper bridge circuit power supply end and the lower bridge circuit power supply end to output a high level, repeatedly pulls up and down the level of the chip power supply end, and determines that the fault location is in the chip.

6. The power sequence control method according to claim 1, characterized in that: When it is determined that the fault is in the upper bridge circuit, the microcontroller unit controls to disconnect the output of the power supply end of the upper bridge circuit; When it is determined that the fault is in the lower bridge circuit, the microcontroller unit controls to disconnect the output of the power supply end of the lower bridge circuit; When it is determined that the fault is located in the chip, the emergency power supply is started to supply power to the lower bridge circuit.

7. The power sequence control method according to claim 1, characterized in that: After the micro control unit detects that the number of undervoltage signals exceeds a preset number, it restarts the power supply of the chip power supply end, the upper bridge circuit power supply end and the lower bridge circuit power supply end multiple times in succession to determine the fault location.

8. A power control circuit, characterized in that: Including upper bridge circuit, lower bridge circuit and chip; The chip is respectively connected to the MOS devices of the upper bridge circuit power supply end and the lower bridge circuit power supply end; It also includes: an emergency power supply for emergency power supply to the lower bridge circuit; A micro control unit communicates with the chip and the MOS device, and applies the power timing control method described in any one of claims 1 to 7 to perform power supply control.

9. The power control circuit according to claim 8, characterized in that: The upper bridge circuit and the lower bridge circuit are respectively provided with two outputs.

10. A motor controller, characterized in that: A power supply control circuit as described in any one of claims 8 to 9 is used.

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