Transient enhancement circuit applied to COT mode buck converter

Abstract

The invention discloses a transient enhancement circuit applied to a COT mode buck converter in the technical field of integrated circuits, and the transient enhancement circuit comprises an output voltage sampling circuit and a fully differential transconductance amplifier GM. The input end of the output voltage sampling circuit is connected with the output end of the COT mode buck converter; the output voltage sampling circuit is used for sampling an output voltage signal of the COT mode buck converter and sending the sampled voltage signal to the input end of the fully differential transconductance amplifier GM. According to the invention, the transient enhancement circuit applied to the COT mode buck converter is introduced, so that the effective improvement on the up-down rush and the recovery time in the load switching process of the buck converter is realized, and the system is continuous and the system response is optimized by dynamically changing the conduction time.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, in particular to a transient enhancement circuit applied to a COT mode buck converter. Background Art

[0002] Power supplies are usually divided into two categories: DC regulated power supplies and switching power supplies. Compared with ordinary linear regulated power supplies, switching power supplies have better power conversion efficiency and more flexible usage, so they are widely used in electronic computers, communications, military, and home appliances. As a representative of regulated power supplies, switching power supplies have become the mainstream product in the voltage stabilization market due to their small size, high conversion efficiency, and rapid response. Due to different application scenarios, switching power supplies are divided into buck, boost, and buck-boost converters, and buck converters are the most widely used type in the market, and among them, the buck converter in constant on-time control (COT) mode is the most widely used.

[0003] The traditional COT mode controlled buck converter has a simple structure, does not require compensation, and can switch seamlessly between DCM mode and CCM mode. Under light load conditions, the COT control mode reduces the switching loss and conduction loss of the system by reducing the switching frequency, thus having a higher light load conversion efficiency and a faster transient response speed.

[0004] However, although the COT control mode has a faster response to load jumps, when the converter switches from no-load to full-load, a current change will be generated at the output node of the COT mode buck converter at the moment of load jump. Since the inductor current does not change suddenly, the change in the output node current is mainly provided by the output capacitor, which causes the output voltage to change instantly, which will cause the output voltage of the buck converter to have a large undershoot and a long recovery time, resulting in insufficient transient performance of the conventional COT-controlled buck converter, which seriously affects the transient performance of the buck converter and limits its application in high-frequency and large-load switching. In addition, although the variable frequency control has a faster response to load jumps, when the load in the COT mode increases, when the load jumps, the system's shutdown time will immediately decrease, and the system will quickly turn on again, but since the turn-on time is fixed, the system cannot continuously and long-term charge the inductor to allow the inductor current to quickly reach the load level, which limits the system's recovery time. Summary of the invention

[0005] The object of the present invention is to provide a transient enhancement circuit applied to a COT mode buck converter. By introducing the transient enhancement circuit applied to the COT mode buck converter, effective improvements on the up-down and down-shoot and recovery time are achieved during the load switching process of the buck converter. By dynamically changing the on-time, the system is made continuous and the system response is optimized.

[0006] To achieve the above object, the present invention provides the following technical solutions: A transient enhancement circuit applied to a COT mode buck converter, applied to the COT mode buck converter, the COT mode buck converter comprises a power stage circuit, an error amplifier EA, a compensation module of the error amplifier EA, a PWM comparator, a single pulse timer and a logic drive circuit; The power stage circuit includes a power tube , power tube , sampling inductor L, sampling inductor L and power tube Between the series resistor ESR and the output capacitor , power tube The source of the power tube is connected The drain of the sampling inductor L is connected to the power tube The other end of the sampling inductor L is connected in series with the resistor and resistor , output voltage Through the resistor and resistor Series voltage division forms feedback voltage , feedback voltage The error amplifier EA is used to input the reference voltage With feedback voltage Compare and form control signal ; The compensation module of the error amplifier EA includes resistors ,capacitance and capacitor ,resistance One end is connected to the negative terminal of the PWM comparator, and the negative input terminal of the PWM comparator is connected to the capacitor ,capacitance The other end of the capacitor is grounded. The ground terminal is connected to the capacitor ,capacitance The other end of the resistor , the positive connection resistor of the PWM comparator ,resistance The other end is connected to the sampling inductor L, which is used to convert the current information into a triangular wave. and the current flowing through it Forming voltage signal Input to the positive terminal of the PWM comparator, which is used to compare the control signal and voltage signal ; The output of the single pulse timer is connected to the R terminal of the RS trigger. The single pulse timer is used to introduce an adaptive on-time to achieve a constant frequency in the COT mode, so that the circuit can achieve a pseudo constant frequency. The single pulse timer includes a current source , current source The output terminal is connected to a capacitor and on the positive terminal of the cmp comparator , the output of the on cmp comparator is connected to the R end of the RS trigger and the output of the PWM comparator, the capacitor The two-terminal parallel switch ,switch The time from disconnection to on when the cmp comparator flips determines the on time ; One end of the PWM comparator is connected to the input current Proportional to the input current For capacitor Charging generates a ramp-up signal , the other end of the PWM comparator is the reference voltage ; The output of the PWM comparator is connected to the S terminal of the RS trigger, and the output of the RS trigger is connected to one end of the logic driver. With control signal When the two are equal, the RS trigger outputs a start signal to the logic driver to turn the circuit on. When the circuit is turned on, the single pulse timer starts timing within the preset on time, and then turns off after the timing ends. The voltage starts to decrease until it drops to the comparator threshold for the second time, and the circuit will enter the on state again, ensuring that the COT mode buck converter can stabilize the output by adjusting the duration of the off state under different loads, forming a Figure 2 The steady-state waveform shown; In the existing COT mode buck converter, when the load connected to the COT mode buck converter switches from no-load to full-load state, a current change is generated at the output node of the COT mode buck converter at the moment of load jump. The change in current is mainly caused by the output capacitance. Provided, and will act on the resistor ESR and the inductor L, causing the output voltage to change instantly, causing the inductor L to cause an output undershoot condition, forming an output undershoot model. It cannot change suddenly. Therefore, after the load current jumps, the current change will be fully reflected in the capacitor. superior.

[0007] When the load increases, the current will flow from the output capacitor Flows to the load, the voltage of the inductor L is positive at the bottom and negative at the top; when the load is reduced, the inductor L becomes the output capacitor Charging, current flows to the output capacitor , the voltage of the inductor L is positive at the top and negative at the bottom. At the moment of the jump, the output voltage change is the voltage of the resistor ESR plus the voltage of the inductor L. The expressions are as follows: , , When the load jumps, the output capacitor needs time to respond to the loop, so the current of the inductor L reaches the load current level. The load continues to be powered, and the output undershoot continues to deteriorate. The output voltage changes are described as follows: , Δ is the difference between the current of the inductor L and the load current; The overshoot voltage signal is converted into a current signal, which is then converted and incorporated into the capacitor charging current. By changing the capacitor charging current , dynamically changes during the response phase , effectively speeding up the circuit recovery time.

[0008] The existing output capacitor Based on the capacitance value of By reducing the capacitance of the resistor ESR and the inductance of the inductor L, the loop response speed can be accelerated and the undershoot can be reduced.

[0009] If during the output voltage undershoot, by changing the capacitor charging current Dynamic increase , the inductor current can rise to the load current level at a faster rate, and the system's undershoot and recovery times will be improved.

[0010] The transient enhancement circuit applied to the COT mode buck converter includes an output voltage sampling circuit and a fully differential transconductance amplifier GM, wherein the input end of the output voltage sampling circuit is connected to the output end of the COT mode buck converter, the output voltage sampling circuit is used to sample the output voltage signal of the COT mode buck converter, and send the sampled voltage signal to the input end of the fully differential transconductance amplifier GM; the output end of the fully differential transconductance amplifier GM is connected to the single pulse timer in the COT mode buck converter, and the fully differential transconductance amplifier GM is used to amplify the output voltage sampled by the sampling circuit of the COT mode buck converter and generate a current source and a current sink through a current mirror bias, and dynamically increase or decrease the on-time of the system when a load jump occurs.

[0011] Output voltage of COT mode buck converter ,Voltage The capacitance when the load jumps The voltage has not changed yet. After sampling, the two signals are sent to the fully differential transconductance amplifier GM for amplification. and current Output voltage and voltage After being amplified by the fully differential transconductance amplifier GM, a current source and a current sink are generated by the current mirror bias, and then mirrored and combined and transmitted to Timing module When the load changes, the current generated or current Connect to Increased or decreased , thereby increasing or decreasing the voltage The rising slope further dynamically increases or decreases .

[0012] As a further solution of the present invention: the output voltage sampling circuit includes a sampling resistor and sampling capacitor , sampling resistor One end is connected to the output end of the COT mode buck converter, and the sampling resistor The other end of the sampling capacitor is connected One end of the sampling capacitor The other end is grounded.

[0013] As a further solution of the present invention: the fully differential transconductance amplifier GM includes a first-stage common-source output circuit, a second-stage common-source output circuit, a current sink module Isink, and a current source module Isource, and the drain of the first-stage common-source output circuit is connected to the gate of the second-stage common-source output circuit.

[0014] As a further solution of the present invention: one end of the second-stage common-source output circuit is connected to the current sink module Isink, and the other end is connected to the current source module Isource.

[0015] As a further solution of the present invention: the first-stage common-source output circuit includes an input amplifier circuit, and the input amplifier circuit includes a first MOS transistor , the second MOS tube , the third MOS tube , the fourth MOS tube And the fifth MOS tube , where the first MOS tube The drain of the second MOS tube is connected And the third MOS tube The source of the second MOS tube The drain of the fourth MOS tube is connected The drain of the third MOS tube The drain of the fifth MOS tube is connected of the drain.

[0016] As a further solution of the present invention: the first MOS tube The tail current source is used to provide a constant bias current to the first-stage common source output circuit. And the third MOS tube Form a differential input pair, the fourth MOS tube And the fifth MOS tube As a heavy load for the first stage common source output circuit.

[0017] As a further solution of the present invention: the second-stage common-source output circuit includes a sixth MOS transistor , the seventh MOS tube , the eighth MOS tube 、Ninth MOS tube , the tenth MOS tube And the eleventh MOS tube , the sixth MOS tube The source of the sixth MOS tube is grounded. The drain of the seventh MOS tube is connected The source of the seventh MOS tube The drain of the eighth MOS tube is connected The drain of the eighth MOS tube The source of the ninth MOS tube is connected The source of the ninth MOS tube The drain of the tenth MOS tube is connected The drain of the tenth MOS tube The source is connected to the eleventh MOS tube of the drain.

[0018] As a further solution of the present invention: the current sink module Isink includes a twelfth MOS tube 、Thirteenth MOS tube 、14th MOS tube And the fifteenth MOS tube , the twelfth MOS tube The source of the eleventh MOS tube is connected The source of the twelfth MOS tube The gate of the 13th MOS tube is connected The gate of the twelfth MOS tube The source and drain of the fourteenth MOS tube are connected to The source and drain of the fourteenth MOS tube The gate of the fifteenth MOS tube is connected The gate of the fifteenth MOS tube The source is grounded.

[0019] As a further solution of the present invention: the current source module Isource includes a sixteenth MOS tube 、17th MOS tube 、18th MOS tube And the nineteenth MOS tube , the 20th MOS tube And the twenty-first MOS tube .

[0020] As a further solution of the present invention: when the load changes from no-load to heavy-load, the output voltage sampled by the sampling circuit is transmitted to the fully differential transconductance amplifier GM, and the first MOS tube The tail current flows to the fourth MOS tube The branch where the fifth MOS tube is located The branch current is reduced.

[0021] Compared with the prior art, the present invention has the following beneficial effects: 1. In the present invention, by introducing a transient enhancement circuit applied to a COT mode buck converter, effective improvements in the up-down and down-shoot and recovery time during the load switching process of the buck converter are achieved.

[0022] 2. In the present invention, by dynamically changing the on-time, the system is made continuous and the system response is optimized.

[0023] 3. In the present invention, adaptability to different process platforms and designs can be achieved by modifying some circuit parameters.

[0024] 4. The implementation principle of the present invention is simple, practical, suitable for integrated circuit design, and can effectively reduce design costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is the circuit diagram of the conventional COT mode buck converter; Figure 2 It is the steady-state waveform of the COT mode buck converter; Figure 3 It is the transient response model diagram; Figure 4 It is the relationship diagram between the output voltage undershoot signal and time; Figure 5 For a fixed Ton and non-fixed T on Schematic diagram of the difference; Figure 6 The invention is an application circuit diagram of a transient enhancement circuit applied to a COT mode buck converter in a COT mode buck converter; Figure 7 A specific implementation circuit diagram of a transient enhancement circuit applied to a COT mode buck converter; Figure 8 Schematic diagram of the effect of the transient enhancement circuit applied to the COT mode buck converter. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Example: See also Figure 1 , the present invention discloses a transient enhancement circuit applied to a COT mode buck converter, applied to the COT mode buck converter, the COT mode buck converter includes a power stage circuit, an error amplifier EA, a compensation module of the error amplifier EA, a PWM comparator, a single pulse timer and a logic drive circuit; The power circuit includes a power tube , power tube , sampling inductor L, sampling inductor L and power tube Between the series resistor ESR and the output capacitor , power tube The source of the power tube is connected The drain of the sampling inductor L is connected to the power tube The other end of the sampling inductor L is connected in series with the resistor and resistor , output voltage Through the resistor and resistor Series voltage division forms feedback voltage , feedback voltage The error amplifier EA is used to input the reference voltage With feedback voltage Compare and form control signal ; The compensation module of the error amplifier EA includes resistors ,capacitance and capacitor ,resistance One end is connected to the negative terminal of the PWM comparator, and the negative input terminal of the PWM comparator is connected to the capacitor ,capacitance The other end of the capacitor is grounded. The ground terminal is connected to the capacitor ,capacitance The other end of the resistor , the positive connection resistor of the PWM comparator ,resistance The other end is connected to the sampling inductor L, which is used to convert the current information into a triangular wave. and the current flowing through it Forming voltage signal Input to the positive terminal of the PWM comparator, which is used to compare the control signal and voltage signal ; The output of the single pulse timer is connected to the R terminal of the RS trigger. The single pulse timer is used to introduce an adaptive on-time to achieve a constant frequency in the COT mode, so that the circuit can achieve a pseudo constant frequency. The single pulse timer includes a current source , current source The output terminal is connected to a capacitor and on the positive terminal of the cmp comparator , the output of the on cmp comparator is connected to the R end of the RS trigger and the output of the PWM comparator, the capacitor The two-terminal parallel switch ,switch The time from disconnection to on when the cmp comparator flips determines the on time ; One end of the PWM comparator is connected to the input current Proportional to the input current For capacitor Charging generates a ramp-up signal , the other end of the PWM comparator is the reference voltage ; The output of the PWM comparator is connected to the S terminal of the RS trigger, and the output of the RS trigger is connected to one end of the logic driver. With control signal When the two are equal, the RS trigger outputs a start signal to the logic driver to turn the circuit on. When the circuit is turned on, the single pulse timer starts timing within the preset on time, and then turns off after the timing ends. The voltage starts to decrease until it drops to the comparator threshold for the second time, and the circuit will enter the on state again, ensuring that the COT mode buck converter can stabilize the output by adjusting the duration of the off state under different loads, forming a Figure 2 The steady-state waveform shown; like Figure 3 As shown, in the existing COT mode buck converter, when the load connected to the COT mode buck converter switches from no-load to full-load state, a current change is generated at the output node of the COT mode buck converter at the moment of load jump. The change in current is mainly caused by the output capacitance. Provided, and will act on the resistor ESR and the inductor L, causing the output voltage to change instantly, causing the inductor L to cause an output undershoot condition, forming an output undershoot model. It cannot change suddenly. Therefore, after the load current jumps, the current change will be fully reflected in the capacitor. superior.

[0028] like Figure 4 As shown in the figure, it describes the undershoot waveform of the output voltage. When the load increases, the current will flow from the output capacitor. Flows to the load, the voltage of the inductor L is positive at the bottom and negative at the top; when the load is reduced, the inductor L becomes the output capacitor Charging, current flows to the output capacitor , the voltage of the inductor L is positive at the top and negative at the bottom. At the moment of the jump, the output voltage change is the voltage of the resistor ESR plus the voltage of the inductor L. The expressions are as follows: , , When the load jumps, the output capacitor needs time to respond to the loop, so the current of the inductor L reaches the load current level. The load continues to be powered, and the output undershoot continues to deteriorate. The output voltage changes are described as follows: , Δ is the difference between the current of the inductor L and the load current; The overshoot voltage signal is converted into a current signal, which is then converted and incorporated into the capacitor charging current. By changing the capacitor charging current , dynamically changes during the response phase , effectively speeding up the circuit recovery time.

[0029] The existing output capacitor Based on the capacitance value of By reducing the capacitance of the resistor ESR and the inductance of the inductor L, the loop response speed can be accelerated and the undershoot can be reduced.

[0030] like Figure 5 As shown, the dotted line is the non-fixed response phase , the solid line is the fixed response stage If, during the output voltage undershoot, the capacitor charging current is changed Dynamic increase , the inductor current can rise to the load current level at a faster rate, and the system's undershoot and recovery times will be improved.

[0031] like Figure 6 As shown, the transient enhancement circuit applied to the COT mode buck converter includes an output voltage sampling circuit and a fully differential transconductance amplifier GM. The input end of the output voltage sampling circuit is connected to the output end of the COT mode buck converter. The output voltage sampling circuit is used to sample the output voltage signal of the COT mode buck converter and send the sampled voltage signal to the input end of the fully differential transconductance amplifier GM; the output end of the fully differential transconductance amplifier GM is connected to the single pulse timer in the COT mode buck converter. The fully differential transconductance amplifier GM is used to amplify the output voltage sampled by the sampling circuit of the COT mode buck converter and then generate a current source and a current sink through a current mirror bias, so as to dynamically increase or decrease the on-time of the system when the load jumps.

[0032] like Figure 6 As shown, the output voltage of the COT mode buck converter ,Voltage Capacitance when heavy load occurs The voltage has not changed yet. After sampling, the two signals are sent to the fully differential transconductance amplifier GM for amplification. and current Output voltage and voltage After being amplified by the fully differential transconductance amplifier GM, a current source and a current sink are generated by the current mirror bias, and then mirrored and combined and transmitted to Timing module When the load changes, the current generated or current Connect to Increased or decreased , thereby increasing or decreasing the voltage The rising slope further dynamically increases or decreases .

[0033] Preferably, the output voltage sampling circuit includes a sampling resistor and sampling capacitor , sampling resistor One end is connected to the output end of the COT mode buck converter, and the sampling resistor The other end of the sampling capacitor is connected One end of the sampling capacitor The other end is grounded.

[0034] Preferably, the fully differential transconductance amplifier GM includes a first-stage common-source output circuit, a second-stage common-source output circuit, a current sink module Isink, and a current source module Isource, and the drain of the first-stage common-source output circuit is connected to the gate of the second-stage common-source output circuit.

[0035] Preferably, one end of the second-stage common-source output circuit is connected to the current sink module Isink, and the other end is connected to the current source module Isource.

[0036] Preferably, the first-stage common-source output circuit includes an input amplifier circuit, and the input amplifier circuit includes a first MOS transistor , the second MOS tube , the third MOS tube , the fourth MOS tube And the fifth MOS tube , where the first MOS tube The drain of the second MOS tube is connected And the third MOS tube The source of the second MOS tube The drain of the fourth MOS tube is connected The drain of the third MOS tube The drain of the fifth MOS tube is connected of the drain.

[0037] Preferably, the first MOS tube The tail current source is used to provide a constant bias current to the first-stage common source output circuit. And the third MOS tube Form a differential input pair, the fourth MOS tube And the fifth MOS tube As a heavy load for the first stage common source output circuit.

[0038] Preferably, the second-stage common-source output circuit includes a sixth MOS transistor , the seventh MOS tube , the eighth MOS tube 、Ninth MOS tube , the tenth MOS tube And the eleventh MOS tube , the sixth MOS tube The source of the sixth MOS tube is grounded. The drain of the seventh MOS tube is connected The source of the seventh MOS tube The drain of the eighth MOS tube is connected The drain of the eighth MOS tube The source of the ninth MOS tube is connected The source of the ninth MOS tube The drain of the tenth MOS tube is connected The drain of the tenth MOS tube The source is connected to the eleventh MOS tube of the drain.

[0039] Preferably, the current sink module Isink includes a twelfth MOS tube 、Thirteenth MOS tube 、14th MOS tube And the fifteenth MOS tube , the twelfth MOS tube The source of the eleventh MOS tube is connected The source of the twelfth MOS tube The gate of the 13th MOS tube is connected The gate of the twelfth MOS tube The source and drain of the fourteenth MOS tube are connected to The source and drain of the fourteenth MOS tube The gate of the fifteenth MOS tube is connected The gate of the fifteenth MOS tube The source is grounded.

[0040] Preferably, the current source module Isource includes a sixteenth MOS tube 、17th MOS tube 、18th MOS tube And the nineteenth MOS tube , the 20th MOS tube And the twenty-first MOS tube .

[0041] Preferably, Figure 7 As shown in FIG. 1 , when the load changes from no-load to heavy load, the output voltage sampled by the sampling circuit is transmitted to the fully differential transconductance amplifier GM, and the first MOS tube The tail current flows to the fourth MOS tube The branch where the fifth MOS tube is located The branch current is reduced; At this time, the output voltage Reduce, capacitance Before it could descend, Higher than , and Given to the fully differential transconductance amplifier GM, due to Higher than , the first MOS tube The tail current flows more to the fourth MOS tube The branch where the fifth MOS tube The branch current where it is located is reduced, which leads to the eleventh MOS tube The current is lower than the ninth MOS tube The additional current flows into the fourteenth MOS tube and converted into current , the specific formula is as follows: , The current mirror is given to the fifteenth MOS tube , and the current sink I sink， Current sink I sink Will be attached Figure 6 I on The partial current drawn from the on Reduce, so that V A The slope of the rise decreases, which leads to T on Increase, corresponding to the load jump to heavy load when T on , speeding up output regulation.

[0042] At the same time, due to the fourth MOS tube The current of the sixth MOS tube increases, causing The current is greater than the eighth MOS tube At this time, no current will flow into the eighteenth MOS tube Therefore, no current flows through the current source. Similarly, when the load jumps to light load, the additional current flows into the eighteenth MOS tube. , mirrored to the nineteenth MOS tube , and then through the 20th MOS tube And the twenty-first MOS tube Get the current source I souse , which injects current into I on Leading to I on Increase, making V A The rising slope increases, which leads to T on The decrease of accelerates the output regulation, and the current sinks and no current flows at this time; like Figure 7 In the sampling circuit in the dashed box: Under normal switching ripple, V out 'As close to V as possible out, which requires the resistor and capacitor values ​​to be small; when the output jumps, in order to sample a larger V out ' and V out The voltage difference requires larger resistance and capacitance values, so a compromise is needed.

[0043] also, Figure 7 The 12th MOS tube And the sixteenth MOS tube It will be mirrored to the thirteenth MOS tube through the current mirror And the seventeenth MOS tube A current is injected into nodes A and B, which is used to shield the normal switching ripple from V out ' and V out The small voltage difference at nodes A and B converts the current and forces the current source I to turn off. souse and current sink I sink However, the current should not be too large, and it should affect the current amplification function of the GM module as little as possible when the output jumps.

[0044] like Figure 8 As shown, Figure 8 In the upper waveform, the black solid line is the output waveform of the buck converter in the COT control mode of the transient enhancement circuit applied to the COT mode buck converter when switching from light load to heavy load, and the dotted line is the output waveform of the buck converter in the COT control mode of the transient enhancement circuit applied to the COT mode buck converter proposed by the present invention when switching from light load to heavy load; the middle waveform is the TG signal waveform, which reflects the on- and off-time of the system; the lower waveform is the switching waveform when the load current switches from no-load (0A) to heavy load (10A).

[0045] It can be seen that after the load jump, the output voltage has an undershoot, and in the next switching cycle, As shown in the TG waveform, the output voltage undershoot is significantly increased when the transient enhancement circuit applied to the COT mode buck converter is not used. As can be seen from the dotted line in the figure, the same system, when there is no transient enhancement circuit applied to the COT mode buck converter, is more obvious than when the transient enhancement circuit applied to the COT mode buck converter of the present invention is used, and the recovery time is also longer than that of the transient enhancement circuit applied to the COT mode buck converter of the present invention. The undershoot is about 45mV more than that of the transient enhancement circuit applied to the COT mode buck converter proposed by the present invention, and the recovery time is 10μs more.

[0046] Therefore, the transient enhancement circuit designed in this paper for COT mode buck converter can reduce the undershoot and speed up the recovery time under such extreme load change conditions (switching from no load to full load).

[0047] The above are only preferred specific implementation modes of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical solutions and inventive concepts of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A transient enhancement circuit for a COT mode buck converter, characterized in that: include: An output voltage sampling circuit, wherein the input end of the output voltage sampling circuit is connected to the output end of the COT mode buck converter, and the output voltage sampling circuit is used to sample the output voltage signal of the COT mode buck converter and send the sampled voltage signal to the input end of the fully differential transconductance amplifier GM; A fully differential transconductance amplifier GM, the output end of which is connected to the single pulse timer in the COT mode buck converter, and the fully differential transconductance amplifier GM is used to amplify the output voltage sampled by the sampling circuit of the COT mode buck converter and then generate a current source and a current sink through a current mirror bias, so as to dynamically increase or decrease the on-time of the system when a load jump occurs.

2. The transient enhancement circuit for a COT mode buck converter according to claim 1, characterized in that: The output voltage sampling circuit includes a sampling resistor and sampling capacitor , sampling resistor One end is connected to the output end of the COT mode buck converter, and the sampling resistor The other end of the sampling capacitor is connected One end of the sampling capacitor The other end is grounded.

3. The transient enhancement circuit for a COT mode buck converter according to claim 1, characterized in that: The fully differential transconductance amplifier GM comprises a first-stage common-source output circuit, a second-stage common-source output circuit, a current sink module Isink, and a current source module Isource. The drain of the first-stage common-source output circuit is connected to the gate of the second-stage common-source output circuit.

4. The transient enhancement circuit for a COT mode buck converter according to claim 3, characterized in that: One end of the second-stage common-source output circuit is connected to the current sink module Isink, and the other end is connected to the current source module Isource.

5. The transient enhancement circuit for a COT mode buck converter according to claim 4, characterized in that: The first-stage common-source output circuit includes an input amplifier circuit, and the input amplifier circuit includes a first MOS transistor , the second MOS tube , the third MOS tube , the fourth MOS tube And the fifth MOS tube , where the first MOS tube The drain of the second MOS tube is connected And the third MOS tube The source of the second MOS tube The drain of the fourth MOS tube is connected The drain of the third MOS tube The drain of the fifth MOS tube is connected of the drain.

6. The transient enhancement circuit for a COT mode buck converter according to claim 5, characterized in that: The first MOS tube The tail current source is used to provide a constant bias current to the first-stage common source output circuit. And the third MOS tube Form a differential input pair, the fourth MOS tube And the fifth MOS tube Serves as the load of the first-stage common source output circuit.

7. The transient enhancement circuit for a COT mode buck converter according to claim 6, characterized in that: The second-stage common-source output circuit includes a sixth MOS transistor , the seventh MOS tube , the eighth MOS tube 、Ninth MOS tube , the tenth MOS tube And the eleventh MOS tube , the sixth MOS tube The source of the sixth MOS tube is grounded. The drain of the seventh MOS tube is connected The source of the seventh MOS tube The drain of the eighth MOS tube is connected The drain of the eighth MOS tube The source of the ninth MOS tube is connected The source of the ninth MOS tube The drain of the tenth MOS tube is connected The drain of the tenth MOS tube The source is connected to the eleventh MOS tube of the drain.

8. The transient enhancement circuit for a COT mode buck converter according to claim 7, characterized in that: The current sink module Isink includes a twelfth MOS tube 、Thirteenth MOS tube 、14th MOS tube And the fifteenth MOS tube , the twelfth MOS tube The source of the eleventh MOS tube is connected The source of the twelfth MOS tube The gate of the 13th MOS tube is connected The gate of the twelfth MOS tube The source and drain of the fourteenth MOS tube are connected to The source and drain of the fourteenth MOS tube The gate of the fifteenth MOS tube is connected The gate of the fifteenth MOS tube The source is grounded.

9. The transient enhancement circuit for a COT mode buck converter according to claim 8, characterized in that: The current source module Isource includes a sixteenth MOS tube 、17th MOS tube 、18th MOS tube And the nineteenth MOS tube , the 20th MOS tube And the twenty-first MOS tube .

10. The transient enhancement circuit for a COT mode buck converter according to claim 9, characterized in that: When the load changes from no-load to heavy-load, the output voltage sampled by the sampling circuit is transmitted to the fully differential transconductance amplifier GM, and the first MOS tube The tail current flows to the fourth MOS tube The branch where the fifth MOS tube is located The branch current is reduced.

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