Preparation method of LED chip structure and LED chip structure

Abstract

The invention provides a preparation method of an LED chip structure and the LED chip structure. The preparation method comprises the following steps: providing an LED epitaxial wafer; pixel isolation is carried out on the LED epitaxial layer; the top surface of the electrode leading-out structure is higher than the first semiconductor layer; the bottom surface is in contact with an electrode leading-out position of the pixel unit; bonding a first temporary substrate on the electrode lead-out structure; stripping the substrate; based on the LED chip unit area, the LED epitaxial layer and the first temporary substrate are cut into a plurality of separated LED chip units; providing a second temporary substrate, wherein the material of the second temporary substrate is the same as that of the driving substrate; the LED chip unit is bonded to the second temporary substrate; the first temporary substrate is removed. According to the technical scheme, Die to wafer is realized, wafer to wafer bonding is carried out, the two substrates are made of the same material, and offset caused by thermal expansion difference in the bonding process is avoided; and moreover, the waste of Die is reduced, and the performance is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of LEDs, and in particular to a method for preparing an LED chip structure and an LED chip structure. Background Art

[0002] With the rapid development of micro array chip or pixel matrix car microLED chip technology, the requirements for GaN materials and processes are constantly increasing. Sapphire-based GaN materials can meet the high performance requirements of today's microLEDs due to their relatively low dislocation density, so more and more LEDs are made of sapphire.

[0003] However, most microLED drivers are silicon-based CMOS. If the LED and driver are bonded using wafer-to-wafer, the different thermal expansion coefficients of the sapphire and silicon substrates will cause a relatively large bonding offset during the thermal bonding process. In addition, the driver chip on the driver substrate is not distributed throughout the entire substrate. Generally, the driver chip is only arranged in the middle, and the edges are filled with other circuit structures and connections. The LED chip on the LED substrate is distributed throughout the entire substrate. After bonding with the driver substrate, only the LED chip in the middle is working, while the LED chips on the edge are not working, resulting in a great waste. Summary of the invention

[0004] The invention provides a method for preparing an LED chip structure and an LED chip structure, so as to solve the problems of large bonding offset and waste of edge LED chips in the prior art.

[0005] To solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] According to a first aspect of the present invention, there is provided a method for preparing an LED chip structure, comprising:

[0007] An LED epitaxial wafer is provided; the LED epitaxial wafer comprises: a substrate and an LED epitaxial layer located on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure, and a second semiconductor layer distributed in sequence from bottom to top;

[0008] An isolation trench is formed in the LED epitaxial layer, wherein the isolation trench isolates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer includes a plurality of LED chip unit regions, and each of the LED chip unit regions includes at least one pixel unit;

[0009] After the pixel is isolated, an electrode lead-out structure is formed on one side of the LED epitaxial layer, the top surface of the electrode lead-out structure is higher than the second semiconductor layer; the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit; the electrode lead-out structure includes: a positive electrode lead-out structure and a negative electrode lead-out structure, each pixel unit to be operated corresponds to one positive electrode lead-out structure; each LED chip unit area includes at least one negative electrode lead-out structure;

[0010] After preparing the electrode lead-out structure, bonding a first temporary substrate on the electrode lead-out structure;

[0011] After bonding the first temporary substrate, peeling off the substrate;

[0012] Based on the LED chip unit area, cutting the LED epitaxial layer and the first temporary substrate into a plurality of separated LED chip units;

[0013] Providing a second temporary substrate, wherein the material of the second temporary substrate is the same as that of the driving substrate;

[0014] The LED chip unit is bonded to the second temporary substrate with the first temporary substrate facing upward; the position of the LED chip unit on the second temporary substrate corresponds one-to-one to the position of the driver chip on the driver substrate;

[0015] After the LED chip unit is bonded to the second temporary substrate, the first temporary substrate is removed.

[0016] Optionally, a second temporary substrate is provided, wherein the second temporary substrate includes a passivation wall, the passivation wall forms a plurality of grids on the second temporary substrate, and the grid spaces correspond one-to-one to the positions of the driver chips on the driver substrate; the height of the passivation wall is lower than the thickness of the LED chip unit;

[0017] The LED chip unit is bonded to the second temporary substrate in a manner that the first temporary substrate faces upwards:

[0018] The LED chip units are placed into the grid with the first temporary substrate facing upward, and bonded to the second temporary substrate; the LED chip units correspond to the grids one by one.

[0019] Optionally, after removing the first temporary substrate, the preparation method further comprises:

[0020] The electrode lead-out structure of the LED chip unit on the second temporary substrate is aligned and bonded with the electrode bump of the driving chip on the driving substrate;

[0021] After the alignment and bonding, removing the second temporary substrate;

[0022] After removing the second temporary substrate, a bottom filling material is filled in the isolation trench.

[0023] Optionally, an isolation trench is formed in the LED epitaxial layer, and the isolation trench sequentially penetrates the second semiconductor layer, the quantum well structure and a portion of the first semiconductor layer.

[0024] Optionally, between forming the isolation trench in the LED epitaxial layer and forming the electrode lead-out structure on one side of the LED epitaxial layer, the method further includes:

[0025] forming a first passivation layer on the sidewalls of the isolation trench and the edge surface of the second semiconductor layer;

[0026] The electrode lead-out position where the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit is specifically:

[0027] The bottom surface of the positive electrode lead-out structure contacts the middle surface of the second semiconductor layer; the bottom surface of the negative electrode lead-out structure contacts the first semiconductor layer located at the bottom of the isolation trench.

[0028] Optionally, an isolation trench is formed in the LED epitaxial layer, and the isolation trench sequentially penetrates the second semiconductor layer, the quantum well structure, and the first semiconductor layer.

[0029] Optionally, between forming the isolation trench in the LED epitaxial layer and forming the electrode lead-out structure on one side of the LED epitaxial layer, the method further includes:

[0030] forming a second passivation layer; wherein the second passivation layer at least covers the second semiconductor layer of the pixel unit to be operated and the side wall of the quantum well structure;

[0031] After forming the second passivation layer, forming a metal interconnection layer on the substrate; the metal interconnection layer is used to electrically connect the first semiconductor layers of the pixel units;

[0032] The electrode lead-out position where the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit is specifically:

[0033] The bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be operated; the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer.

[0034] Optionally, a side wall of the first semiconductor layer of the pixel unit has at least one step.

[0035] Optionally, between the cutting and separation and placing the LED chip unit into the grid with the first temporary substrate facing upward, the LED chip unit is further attached to a blue film.

[0036] Optionally, the substrate is a sapphire substrate.

[0037] Optionally, the second temporary substrate is a silicon substrate.

[0038] According to a second aspect of the present invention, there is provided an LED chip structure, which is prepared by any of the preparation methods described above.

[0039] The preparation method and LED chip structure of the present invention realize Die to Wafer by cutting the LED into LED chip units one by one and then transferring them to a second temporary substrate made of the same material as the driving substrate, and placing the LED chip units only at positions corresponding to the driving chips of the driving substrate on the second temporary substrate, and not placing the LED chip units at other circuits or connection positions of the driving substrate, thereby avoiding waste of the LED chip units, and selecting the Die to Wafer process, and selecting a better Die, thereby improving the performance of the LED chip structure; in addition, the LED chip on the transferred second temporary substrate is aligned and bonded with the driving chip on the driving substrate, thereby realizing wafer to wafer bonding, and the bonding efficiency is high, and since the second temporary substrate and the driving substrate are made of the same material and have the same thermal expansion coefficient, there is no offset problem caused by thermal expansion difference during the bonding process; further, the second temporary substrate where the LED chip units are located during the bonding process is not the substrate during its preparation process, and the substrate during its preparation process can be made of a different material from the driving substrate, and a substrate with better LED performance can be selected as needed, such as a sapphire substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0041] Figures 1a to 1h It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to an embodiment of the present invention;

[0042] Figure 2a to Figure 2h It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to another embodiment of the present invention;

[0043] Figures 3a to 3b It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to another embodiment of the present invention;

[0044] Figures 4a to 4b It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to another embodiment of the present invention;

[0045] Description of reference numerals:

[0046] 11- substrate;

[0047] 21- a first semiconductor layer;

[0048] 211- steps;

[0049] 22-Quantum well structure;

[0050] 23- a second semiconductor layer;

[0051] 24-isolation trench;

[0052] 251- positive electrode structure;

[0053] 252-negative electrode structure;

[0054] 253-metal interconnect layer;

[0055] 26- passivation layer;

[0056] 31- a first temporary substrate;

[0057] 41-LED chip unit;

[0058] 51- a second temporary substrate;

[0059] 511-passivation wall;

[0060] 61- driving substrate;

[0061] 611-electrode bump;

[0062] 71-Bottom filling material. DETAILED DESCRIPTION

[0063] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0064] In the description of the specification of the present invention, it is necessary to understand that the orientation or position relationship indicated by the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0065] In the description of the present specification, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0066] In the description of the present invention, "plurality" means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically defined.

[0067] In the description of the present invention, unless otherwise clearly specified and limited, the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0068] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0069] In response to the shortcomings of wafer-to-wafer bonding of sapphire-based LEDs and silicon-based drivers pointed out in the above background technology, some ideas are proposed in the prior art, mainly the following two: (1) Silicon-based LEDs are used to make LEDs, and then silicon-based LEDs and silicon-based drivers are bonded using wafer-to-wafer. Although this can avoid the problem of large bonding offset caused by differences in material thermal expansion coefficients, the dislocation density of silicon is too high, and the performance of the manufactured LEDs is poor, which cannot meet the performance and reliability requirements of LED devices. In addition, there is still the problem of waste of edge LEDs. (2) LEDs and drivers are bonded using Die-to-Die. Although the offset will be reduced during the bonding process, the production efficiency of bonding one by one will be greatly reduced, and the cost will also be greatly increased, making it impossible to effectively industrialize.

[0070] In view of this, the present invention proposes a method for preparing an LED chip structure, which comprises:

[0071] An LED epitaxial wafer is provided; the LED epitaxial wafer comprises: a substrate and an LED epitaxial layer located on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure, and a second semiconductor layer distributed in sequence from bottom to top;

[0072] An isolation groove is formed in the LED epitaxial layer, and the isolation groove isolates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer includes a plurality of LED chip unit regions, and each LED chip unit region includes at least one pixel unit;

[0073] After pixel isolation, an electrode lead-out structure is formed on one side of the LED epitaxial layer, the top surface of the electrode lead-out structure is higher than the second semiconductor layer; the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit; the electrode lead-out structure includes: a positive electrode lead-out structure and a negative electrode lead-out structure, each pixel unit to be operated corresponds to a positive electrode lead-out structure; each LED chip unit area includes at least one negative electrode lead-out structure;

[0074] After preparing the electrode lead-out structure, bonding a first temporary substrate on the electrode lead-out structure;

[0075] After bonding the first temporary substrate, peeling off the substrate;

[0076] Based on the LED chip unit area, the LED epitaxial layer and the first temporary substrate are cut into a plurality of separated LED chip units;

[0077] Providing a second temporary substrate, wherein the material of the second temporary substrate is the same as that of the driving substrate;

[0078] The LED chip unit is bonded to the second temporary substrate with the first temporary substrate facing upward; the position of the LED chip unit on the second temporary substrate corresponds one-to-one with the position of the driver chip on the driver substrate;

[0079] After the LED chip unit is bonded to the second temporary substrate, the first temporary substrate is removed.

[0080] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0081] Figures 1a to 1h It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to an embodiment of the present invention.

[0082] Figures 2a to 2h It is a schematic structural diagram of each step of a method for preparing an LED chip structure according to another embodiment of the present invention.

[0083] Please refer to Figure 1a , 2a , providing an LED epitaxial wafer; the LED epitaxial wafer comprises: a substrate 11 and an LED epitaxial layer located on the substrate; the LED epitaxial layer comprises a first semiconductor layer 21, a quantum well structure 22 and a second semiconductor layer 23 distributed in sequence from bottom to top.

[0084] As an implementation mode, the substrate is a sapphire substrate, and due to its low dislocation density, the LED fabricated therefrom has high performance.

[0085] Please refer to Figure 1b , 2b , an isolation groove 24 is formed in the LED epitaxial layer, and the isolation groove isolates the LED epitaxial layer into a plurality of pixel units. The LED epitaxial layer includes a plurality of LED chip unit regions, each of which includes at least one pixel unit; that is, the LED epitaxial layer can be subsequently cut into a plurality of LED chip units, each of which includes at least one pixel unit.

[0086] As an implementation method, the isolation trench 24 may be formed by an ICP dry etching process.

[0087] As an implementation mode, the first semiconductor layer 21 can be used as a cathode of the pixel unit, and the second semiconductor layer 22 can be used as an anode of the pixel unit.

[0088] In one embodiment, the isolation trench may penetrate a portion of the LED epitaxial layer, and the isolation trench stops in the first semiconductor layer. Figure 1b The isolation trench 24 penetrates the second semiconductor layer 23, the quantum well structure 22 and part of the first semiconductor layer 21. Since the isolation trench only isolates part of the first semiconductor layer, the remaining first semiconductor layer is still a whole, that is, the pixel units share a common cathode.

[0089] In another embodiment, the isolation trench may penetrate the entire LED epitaxial layer. Figure 2b The isolation trench 24 sequentially penetrates the second semiconductor layer 23 , the quantum well structure 22 , and the first semiconductor layer 21 .

[0090] Please refer to Figure 1c , 2c After pixel isolation, an electrode lead-out structure is formed on one side of the LED epitaxial layer, and the top surface of the electrode lead-out structure is higher than the second semiconductor layer; the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit. The electrode lead-out structure includes: a positive electrode lead-out structure 251 and a negative electrode lead-out structure 252. Each pixel unit to be operated corresponds to a positive electrode lead-out structure 251; each LED chip unit area includes at least one negative electrode lead-out structure 252.

[0091] In one embodiment, since the isolation trench only isolates part of the first semiconductor layer, the remaining first semiconductor layer is still a whole, that is, a common cathode has been achieved between the pixel units, and a negative electrode can be led out at the position of the first semiconductor layer exposed at the bottom of the isolation trench. When an LED chip area includes multiple pixel units, a negative electrode structure can be led out between every two adjacent pixel units. Please refer to Figure 1c In different embodiments, the negative electrode structure may be led out at only one position or at any suitable position.

[0092] In a preferred embodiment, before the negative electrode structure is led out, it also includes: forming a passivation layer 26 on the sidewall of the isolation trench 24 for insulation. The provision of the passivation layer can make the negative electrode lead-out structure more convenient to set up without worrying about contacting the quantum well structure and the second semiconductor layer, resulting in a short circuit.

[0093] In another embodiment, since the isolation trench runs through the entire LED epitaxial layer, adjacent pixel units are completely isolated from each other, and the negative electrodes of the pixel units can be connected by setting a metal interconnect layer 253 to achieve a common cathode. Figure 2c Specifically, a metal interconnection layer is formed on the substrate to electrically connect the first semiconductor layer between the pixel units, and the bottom surface of the negative electrode lead-out structure 252 contacts the metal interconnection layer.

[0094] In a preferred embodiment, the lead-out of the negative electrode can be achieved through the pixel unit located at the edge of the LED chip unit area. In this case, the pixel unit includes the pixel unit to be operated and other pixel units. The other pixel units refer to the pixel units located at the edge of the LED chip unit area and used for the lead-out of the negative electrode. Since the first semiconductor layer is located at the bottom and is not easy to lead out, after the metal interconnection layer is led out to the surface of the edge pixel unit, the setting space of the electrode lead-out structure is relatively large and the setting is more convenient. Before forming the metal interconnection layer, it is necessary to first form a passivation layer on the side wall and surface of the second semiconductor layer of the pixel unit and the side wall of the quantum well structure for insulation, that is, the other pixel units are only used for negative electrode connection, and no positive and negative circuits are formed, and they are subsequently inoperative.

[0095] In a preferred embodiment, before forming the metal interconnection layer, the following step further includes: forming a passivation layer on the second semiconductor layer of the pixel unit to be operated, the side wall of the quantum well structure, and the edge surface of the second semiconductor layer, so that the metal interconnection layer can extend to the side wall of the isolation groove and the edge surface of the second semiconductor layer, the contact area between the metal interconnection layer and the pixel unit is larger, and the edge surface of the second semiconductor layer is flat, so that the connection of the metal interconnection layer is more stable. If the metal interconnection layer is only arranged around the side wall of the first semiconductor layer, first, the contact area between the metal interconnection layer and the pixel unit is relatively small, and the electrical connection is unstable; second, the metal interconnection layer is easy to fall off, resulting in failure of the electrical connection.

[0096] In order to further enhance the insulation effect, the passivation layer also extends to part of the sidewall of the first semiconductor layer, that is, covers the connection position between the quantum well structure and the first semiconductor layer, please refer to Figure 2c .

[0097] In a preferred embodiment, after isolation by the isolation trench, the first semiconductor layer of the pixel unit includes at least one step 211, and the metal interconnection layer also covers the surface of the step. Figure 2c Since the sidewalls of the first semiconductor layer are relatively straight, the metal interconnection layer is easy to slide off, resulting in electrical connection failure; in this embodiment, a step is formed on the sidewall of the first semiconductor layer, and the surface of the step is flat, so that the metal interconnection layer at this position is more solid, further improving the electrical performance.

[0098] Please refer to Figure 1d , 2d After preparing the electrode lead-out structure, a first temporary substrate 31 is bonded on the electrode lead-out structure.

[0099] Please refer to Figure 1e , 2e After bonding the first temporary substrate 31, the substrate 11 is peeled off.

[0100] As an implementation mode, the substrate 11 may be peeled off by laser peeling.

[0101] In different implementations, the substrate 11 may also be stripped by chemical wet stripping.

[0102] Please refer to Figure 1f , 2f Based on the LED chip unit area, the LED epitaxial layer and the first temporary substrate are cut into a plurality of separate LED chip units 41.

[0103] As an implementation method, cutting may be performed using a laser cutting process or a plasma dry cutting process.

[0104] In this example, Figure 1e , Figure 2eThe dotted line in the middle is the cutting position for cutting. Figure 1b~1e middle, Figure 2b~2e In different embodiments, the number of pixel units divided by the epitaxial layer is not necessarily the same as shown in the figure, and the cutting position is not necessarily the same as shown in the figure. The size of each LED chip unit and the number of pixel units included can be freely set as needed.

[0105] Please refer to Figure 1g , 2g The LED chip unit 41 is bonded to the second temporary substrate 51 with the first temporary substrate facing upward; the position of the LED chip unit on the second temporary substrate corresponds to the position of the driver chip on the driver substrate. The material of the second temporary substrate is the same as that of the driver substrate.

[0106] As an implementation manner, the driving substrate is a silicon substrate, and the second temporary substrate is also a silicon substrate.

[0107] Please refer to Figure 1h , 2h After the LED chip unit is bonded to the second temporary substrate 51 , the first temporary substrate 31 is removed.

[0108] In one embodiment, the second temporary substrate 51 includes a passivation wall 511, and the passivation wall 511 forms a plurality of grids on the second temporary substrate, and the grid spaces correspond to the positions of the driver chips on the driver substrate one by one; the height of the passivation wall is lower than the thickness of the LED chip unit, please refer to Figure 1g , 2g The provision of the passivation wall 511 can facilitate the positioning of the LED chip unit and can prevent its movement during the bonding process, further reducing the offset during the bonding process.

[0109] Furthermore, the LED chip unit is bonded to the second temporary substrate in a manner that the first temporary substrate faces upwards as follows:

[0110] The LED chip units are placed into the grid with the first temporary substrate facing upward, and bonded to the second temporary substrate; the LED chip units correspond to the grids one by one.

[0111] In one embodiment, after removing the first temporary substrate, the preparation method further comprises:

[0112] Please refer to Figure 3a , 4a The electrode lead-out structure of the LED chip unit on the second temporary substrate 51 is aligned and bonded with the electrode bumps 611 of the driving chip on the driving substrate 61 .

[0113] Please refer to Figure 3b , 4bAfter alignment and bonding, the second temporary substrate 51 is removed.

[0114] After removing the second temporary substrate, bottom filling material (eg, underfill glue) is filled between each pixel unit and the electrode bumps 611 .

[0115] In one embodiment, the LED chip units are cut and bonded to the second temporary substrate with the first temporary substrate facing upward, and the LED chip units are also attached to a blue film, which can protect the surface of the LED chip units.

[0116] In one embodiment, an LED chip structure is further provided, which is prepared by the preparation method described in any of the above embodiments.

[0117] In summary, the preparation method and LED chip structure of the present invention realize Die to wafer by cutting the LED into LED chip units one by one and then transferring them to a second temporary substrate of the same material as the driving substrate, and placing the LED chip units only at the positions corresponding to the driving chips of the driving substrate on the second temporary substrate, and not placing the LED chip units at other circuits or connection positions of the driving substrate, thereby avoiding the waste of LED chip units, and in the process of Die to wafer, the Die can be selected, and a better Die can be selected, thereby improving the performance of the LED chip structure; in addition, the LED chip on the transferred second temporary substrate is aligned and bonded with the driving chip on the driving substrate, thereby realizing wafer to wafer bonding, and the bonding efficiency is high, and since the second temporary substrate and the driving substrate are made of the same material and have the same thermal expansion coefficient, there is no offset problem caused by the difference in thermal expansion during the bonding process; further, the second temporary substrate where the LED chip units are located during the bonding process is not the substrate during its preparation process, and the substrate during its preparation process can be made of a different material from the driving substrate, and a substrate with better LED performance can be selected as needed, such as a sapphire substrate.

[0118] In the description of this specification, the description with reference to the terms "an implementation", "an example", "a specific implementation process", "an example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0119] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing an LED chip structure, characterized in that: include: Provide LED epitaxial wafers; The LED epitaxial wafer comprises: a substrate and an LED epitaxial layer located on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure and a second semiconductor layer which are sequentially distributed from bottom to top; An isolation groove is formed in the LED epitaxial layer, wherein the isolation groove isolates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer includes a plurality of LED chip unit regions, and each of the LED chip unit regions includes at least one pixel unit; After the pixel is isolated, an electrode lead-out structure is formed on one side of the LED epitaxial layer, the top surface of the electrode lead-out structure is higher than the second semiconductor layer; the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit; the electrode lead-out structure includes: a positive electrode lead-out structure and a negative electrode lead-out structure, each pixel unit to be operated corresponds to one positive electrode lead-out structure; each LED chip unit area includes at least one negative electrode lead-out structure; After preparing the electrode lead-out structure, bonding a first temporary substrate on the electrode lead-out structure; After bonding the first temporary substrate, peeling off the substrate; Based on the LED chip unit area, cutting the LED epitaxial layer and the first temporary substrate into a plurality of separated LED chip units; Providing a second temporary substrate, wherein the material of the second temporary substrate is the same as that of the driving substrate; The LED chip unit is bonded to the second temporary substrate in a manner that the first temporary substrate faces upward; the position of the LED chip unit on the second temporary substrate corresponds one-to-one to the position of the driver chip on the driver substrate; After the LED chip unit is bonded to the second temporary substrate, the first temporary substrate is removed.

2. The preparation method according to claim 1, characterized in that: Providing a second temporary substrate, wherein the second temporary substrate includes a passivation wall, the passivation wall forms a plurality of grids on the second temporary substrate, the grid spaces correspond one to one with the positions of the driving chips on the driving substrate; the height of the passivation wall is lower than the thickness of the LED chip unit; The LED chip unit is bonded to the second temporary substrate in a manner that the first temporary substrate faces upwards: The LED chip units are placed into the grid with the first temporary substrate facing upward, and bonded to the second temporary substrate; the LED chip units correspond to the grids one by one.

3. The preparation method according to claim 1, characterized in that: After removing the first temporary substrate, the preparation method further comprises: The electrode lead-out structure of the LED chip unit on the second temporary substrate is aligned and bonded with the electrode bump of the driving chip on the driving substrate; After the alignment and bonding, removing the second temporary substrate; After removing the second temporary substrate, a bottom filling material is filled in the isolation trench.

4. The preparation method according to claim 1, characterized in that: An isolation trench is formed in the LED epitaxial layer, wherein the isolation trench sequentially penetrates the second semiconductor layer, the quantum well structure and a portion of the first semiconductor layer.

5. The preparation method according to claim 4, characterized in that: Between forming an isolation trench in the LED epitaxial layer and forming an electrode lead-out structure on one side of the LED epitaxial layer, the method further includes: forming a first passivation layer on the sidewalls of the isolation trench; The electrode lead-out position where the bottom surface of the electrode lead-out structure contacts the pixel unit is specifically: The bottom surface of the positive electrode lead-out structure contacts the surface of the second semiconductor layer; the bottom surface of the negative electrode lead-out structure contacts the first semiconductor layer located at the bottom of the isolation trench.

6. The preparation method according to claim 1, characterized in that: An isolation trench is formed in the LED epitaxial layer, and the isolation trench sequentially penetrates the second semiconductor layer, the quantum well structure, and the first semiconductor layer.

7. The preparation method according to claim 6, characterized in that: Between forming an isolation trench in the LED epitaxial layer and forming an electrode lead-out structure on one side of the LED epitaxial layer, the method further includes: forming a second passivation layer; wherein the second passivation layer at least covers the second semiconductor layer of the pixel unit to be operated and the side wall of the quantum well structure; After forming the second passivation layer, forming a metal interconnection layer on the substrate; the metal interconnection layer is used to electrically connect the first semiconductor layers of the pixel units; The electrode lead-out position where the bottom surface of the electrode lead-out structure contacts the pixel unit is specifically: The bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be operated; the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer.

8. The preparation method according to claim 7, characterized in that: The side wall of the first semiconductor layer of the pixel unit has at least one step, and the metal interconnection layer covers the surface of the step.

9. The preparation method according to claim 1, characterized in that: Between the cutting and bonding the LED chip unit to the second temporary substrate with the first temporary substrate facing upward, the method further includes: the LED chip unit is attached to a blue film.

10. The preparation method according to any one of claims 1 to 9, characterized in that: The substrate is a sapphire substrate.

11. An LED chip structure, characterized in that: The method is described in any one of claims 1 to 10.

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