A preparation method for a substrate-integrated, self-assembled, and self-aligned microlens array

By adopting a self-assembled quantum dot preparation method based on the S-K growth mode in optical chip manufacturing, the microlens group is directly grown on the substrate, which solves the problems of high requirements for microlens etching processes, shallow focal length, and the difficulty of designing only single lens and photonic crystal structures in the prior art, achieving efficient and low-cost microlens group preparation, ensuring the accuracy and yield of the optical chip.

CN119805632BActive Publication Date: 2025-06-03FUJIAN Z K LITECORE LTD
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Patent Information

Application Number
CN202510279836.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-11
Publication Date
2025-06-03
Estimated Expiration
2045-03-11

AI Technical Summary

Technical Problem

In the prior art, when manufacturing optical chips, the etching process requirements of the hemispherical microlenses are high, which makes it difficult to control the uniformity of the microlens array and the gas distribution in the cavity, affecting the uniformity and blind rate of the photoelectric detection array; at the same time, the etching time of the approximate spherical lens with shallow focal length is long and uneven, affecting the mass production efficiency and yield of the chip; in addition, the prior art can only make a single lens, which cannot meet the needs of the lens group; finally, the design and lithography of the photonic crystal structure are difficult, which increases equipment demand and cost.

Method used

The self-assembled quantum dot preparation method based on the S-K growth mode is adopted to directly grow the microlens group on the substrate, and the target parameters of the lens group are manipulated through the mixed growth mode and strain effect to achieve self-assembly and self-alignment, eliminating the traditional etching and hot melting processes, and reducing equipment demand and costs.

Benefits of technology

It realizes efficient preparation of microlens groups, ensures accuracy and yield, reduces production costs and equipment requirements, and can directly integrate the lens group into the substrate, improving the external quantum efficiency of the optical chip.

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Abstract

The present invention relates to a method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array, belonging to the field of micro-nano processing technology for optical chips. In the method, after completing the front epitaxial structure and thinning and polishing, secondary epitaxy is performed on the back of the wafer and a seed layer is fabricated. A wetting layer and a lens layer are successively grown by the S-K growth method, and finally N wetting layers and N lens layers are alternately grown on the back of the wafer to form an epitaxial structure. The formed epitaxial structure is etched from top to bottom until the etching depth covers all the wetting layers to form an etching window. The wetting layers inside and around the formed etching window are etched away, leaving only the lens layers, and a transparent material is filled between them for reinforcement. Based on the S-K growth, the actual preparation of the microlens array is achieved in one step during the epitaxial growth stage, eliminating the adverse factors such as errors and contamination accumulated in multiple links during the production process, and fully ensuring the accuracy and yield.
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Description

Technical Field

[0001] The present invention belongs to the technical field of micro-nano processing of optical chips, and particularly relates to a method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array. Background Art

[0002] Due to advantages such as high coaxial accuracy, low equipment requirements and costs, the manufacturing of optical chips has evolved from the past combination of discrete chips and micro-optical elements such as microlenses / arrays through flip-chip bonding and glue injection curing to the current common direct preparation of integrated microlenses / arrays and photonic crystal structures with diffraction / reflection functions on the substrate through lithography, hot melting, etching or corrosion, so as to improve the external quantum efficiency of optical chips. The existing technical solutions have greatly improved production efficiency, but there are still the following defects that are difficult to overcome:

[0003] 1. The hemispherical microlenses based on pattern transfer have high requirements for the etching process. In particular, the uniformity of the microlens array is closely related to factors such as the distribution of process gas and plasma in the cavity, and often requires a large amount of manpower and material resources for debugging. The uniformity of the microlens array directly affects key indicators such as the uniformity and blind pixel rate of the photoelectric detection array;

[0004] 2. For approximate spherical lenses with a shallow focal length, their small radius of curvature means a large etching thickness (>10 μm) and etching time of several hours, and at the same time means greater non-uniformity, which greatly affects the production efficiency and yield of chip mass production;

[0005] 3. The existing solutions can only fabricate single lenses, but are powerless for the demand of lens arrays. Compared with single lenses, the dynamic range of lens arrays is significantly improved in terms of focal length, etc.;

[0006] 4. The difficulty of the photonic crystal structure lies in design and lithography. The maximum line width at the sub-micron level requires a lithography machine with an accuracy capability above i-line, which also raises the entry threshold for players. Summary of the Invention

[0007] The purpose of the present invention is to overcome the defects of the existing technology and provide a method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array. The method uses a self-assembled quantum dot preparation method based on S-K growth (the S-K growth mode is the Stranski-Krastanow growth mode) to solve the problem of substrate-integrated microlens arrays, and does not require additional equipment, meeting low cost and producibility; the actual preparation of the microlens array is completed in one step during the epitaxial growth stage, eliminating adverse factors such as errors and pollution accumulated in multiple links during the production process, and fully ensuring the accuracy and yield.

[0008] To achieve the above object, the technical solution of the present invention is: a method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array, comprising the following steps:

[0009] S1. Grow each functional layer of the optical chip epitaxy on the substrate;

[0010] S2. After completing the front epitaxial structure and thinning and polishing, perform secondary epitaxy on the back of the wafer and fabricate a seed layer. The position of the seed layer is coaxial with the designed active region of the optical chip, that is, the position of each seed in the seed layer needs to be coaxial with each active region of the optical chip;

[0011] S3. Grow an infiltration layer and a lens layer in sequence through a mixed growth mode. The periphery of the lens layer is connected to the seed layer through struts, and the rest of the lens layer follows the layer-by-layer growth mode to uniformly deposit one or several layers of atoms in a two-dimensional manner on the infiltration layer; when the deposition reaches a predetermined thickness, the growth mode changes to an island growth mode, and at this time, three-dimensional islands are formed at the positions corresponding to the corresponding seeds in the seed layer;

[0012] S4. Repeat step S3, and finally grow N infiltration layers and N lens layers alternately on the back of the wafer to form an epitaxial structure;

[0013] S5. Etch the epitaxial structure formed in step S4 from top to bottom until the etching depth covers all infiltration layers to form an etching window;

[0014] S6. Corrode the infiltration layer inside and around the etching window formed in step S5, leaving only the lens layer, and fill the etched part with a transparent material for reinforcement.

[0015] In an embodiment of the present invention, the substrate is a semi-insulating substrate.

[0016] In an embodiment of the present invention, the method for fabricating the seed layer includes a nanoimprint method, a selective area growth method, and a holographic lithography method.

[0017] In an embodiment of the present invention, the arrangement of the seeds in the seed layer is square or honeycomb-shaped.

[0018] In an embodiment of the present invention, the size of the three-dimensional islands is controlled by adjusting the deposition conditions of the thin film, including temperature, pressure, and the difference in lattice constants between materials.

[0019] In an embodiment of the present invention, for the lens layer / infiltration layer being InP / In 1-x Ga x As y P 1-y, the lattice constant a of the wetting layer is calculated by Vegard's law, i.e., a = 0.58688 - 0.04176x + 0.01896y + 0.00125xy. When the composition is adjusted to make a less than the lattice constant of InP, the S-K growth mode is formed.

[0020] In an embodiment of the present invention, the size of the upper three-dimensional islands is greater than or equal to the size of the lower three-dimensional islands. The size of the upper three-dimensional islands is adjusted by the accumulated strain effect, specifically by adjusting the thickness of the wetting layer to control the accumulated strain effect.

[0021] In an embodiment of the present invention, in step S5, a non-selective dry etching process is used.

[0022] In an embodiment of the present invention, a selective wet etching process is used to etch the wetting layer inside and around the etching window formed in step S5.

[0023] In an embodiment of the present invention, the transparent material is optical glue or other materials transparent to the target wavelength.

[0024] Compared with the prior art, the present invention has the following beneficial effects: The method of the present invention uses the self-assembled quantum dot preparation method based on S-K growth to solve the problem of substrate-integrated microlens arrays, and there is no need to additionally increase equipment, meeting low cost and producibility; the actual preparation of the microlens arrays is completed in one step during the epitaxial growth stage, eliminating the adverse factors such as errors and pollution accumulated in multiple links during the production process, and fully ensuring the accuracy and yield; the method of the present invention has the following advantages:

[0025] 1. Lenses are prepared by epitaxial growth, and the target parameters of the lens arrays are controlled by the strain effect instead of traditional pattern transfer methods such as heat melting and etching;

[0026] 2. The substrate directly integrates the lens arrays instead of single lenses;

[0027] 3. Self-assembly and self-alignment. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the preparation steps of the preparation method of the present invention. In the figure, 1 is the functional layer, 2 is the substrate, 3 is the wetting layer, and 4 is the lens layer.

[0029] Figure 2 Examples of two seed arrangements.

[0030] Figure 3 Top view after opening the etching window. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The technical solutions of the present invention will be specifically described below with reference to the drawings.

[0032] The present invention provides a method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array, comprising the following steps:

[0033] S1. Grow each functional layer of the optical chip epitaxy on the substrate;

[0034] S2. After completing the front epitaxial structure and thinning and polishing, perform secondary epitaxy on the back of the wafer and fabricate a seed layer. The position of the seed layer is coaxial with the designed active region of the optical chip, that is, the position of each seed in the seed layer needs to be coaxial with each active region of the optical chip;

[0035] S3. Grow an infiltration layer and a lens layer in sequence through a mixed growth mode (S-K growth mode). The periphery of the lens layer is connected to the seed layer through pillars, and the remaining part of the lens layer follows a layer-by-layer growth mode (F-vdM growth mode, i.e., Frank-Van der Merwe growth mode) to uniformly deposit one or several layers of atoms in a two-dimensional manner on the infiltration layer; when the deposition reaches a predetermined thickness, the growth mode changes to an island growth mode (V-W growth mode, i.e., Volmer-Weber growth mode), and at this time, three-dimensional islands are formed at the positions corresponding to the corresponding seeds in the seed layer;

[0036] S4. Repeat step S3, and finally grow N infiltration layers and N lens layers alternately on the back of the wafer to form an epitaxial structure;

[0037] S5. Etch the epitaxial structure formed in step S4 from top to bottom until the etching depth covers all infiltration layers to form an etching window;

[0038] S6. Corrode the infiltration layer inside and around the etching window formed in step S5, leaving only the lens layer, and fill the etched part with a transparent material for reinforcement.

[0039] The parts etched in steps S5 and S6 are filled with transparent materials; since the wafer will be finally diced into individual chips, it is necessary to perform filling and reinforcement to ensure the stability of the microlens array.

[0040] The following are specific implementation examples of the present invention.

[0041] A method for preparing a substrate-integrated, self-assembled, and self-aligned microlens array according to the present invention, the preparation steps are as Figure 1 shown:

[0042] 1. Grow each functional layer 1 of the optical chip epitaxy (for example, taking an APD chip with a typical SAGCM structure as an example, functional layer 1 usually includes an A absorption layer, a G grading layer, a C charge layer, an M multiplication layer, a cover layer, etc.). Preferably, the substrate 2 is a semi-insulating substrate;

[0043] 2. After completing the front-side epitaxial structure and thinning and polishing, perform secondary epitaxy on the backside of the wafer and fabricate a seed layer, with the position coaxial with the designed active area of the chip (the position of each seed in the seed layer needs to be coaxial with the active area of each optical chip). Preferably, the fabrication method can be selected from nanoimprinting method, selective area growth method, and holographic lithography method. The nanoimprinting method, selective area growth method, and holographic lithography method can all be selected to fabricate the "seed layer" or the patterned substrate. The purpose is to enhance the in-plane order and coaxiality of the subsequent lens self-assembly growth through the stress field. The specific method is not limited. The arrangement of the seeds can be square or honeycomb-shaped, as Figure 2 shown Figure 2 in (a) where the arrangement of the seeds is square, Figure 2 and in (b) where the arrangement of the seeds is honeycomb-shaped);

[0044] 3. Grow a wetting layer 3 (sacrificial layer) and a lens layer 4 successively by the S-K growth method. Except for the four sides connected to the seed layer through pillars, the rest of the lens layer 4 starts with depositing one or several layers of atoms uniformly in a two-dimensional manner on the wetting layer 3. This step follows the Frank-Van der Merwe growth mode; when the deposition reaches a certain thickness, since the lattice constant of the lens layer 4 material is greater than that of the wetting layer 3, due to the gradually accumulated strain effect, the growth mode will change to the Volmer-Weber growth mode. At this time, three-dimensional islands start to form at the positions corresponding to the "seeds" on the seed layer; the size of the three-dimensional islands can be precisely controlled by adjusting the deposition conditions of the thin film, including temperature, pressure, and the difference in lattice constants between materials. Taking lens layer 4 / wetting layer 3 as InP / In 1-x Ga x As y P 1-y as an example, the lattice constant a of the wetting layer 3 can be calculated by Vegard's law (a = 0.58688 - 0.04176x + 0.01896y + 0.00125xy). When adjusting the composition to make a less than the InP lattice constant of 0.587 nm, the S-K growth mode may be formed;

[0045] The currently recognized crystal epitaxial growth modes include three types: Frank-van der Merve growth mode, Volmer-Weber growth mode, and Stranski-Krastanow growth mode: (1) Layered growth (F-vdM) mode. When the interaction between adsorbed atoms and the substrate is stronger than the interaction between atoms, layered growth occurs. (2) Island growth (V-W) mode. When the interaction between adsorbed atoms or molecules is stronger than the interaction between adsorbed atoms and the substrate, the adsorbed atoms nucleate in the form of atomic clusters on the substrate surface, and three-dimensional island growth occurs. (3) Mixed growth (S-K) mode. It is a process between the two. First, layered growth occurs, and after exceeding a critical value, it transforms into island growth. The growth process of the lens region described in the present invention is the S-K growth mode.

[0046] 4. Repeat step 3. Finally, N wetting layers 3 (sacrificial layers) and N lens layers 4 are alternately grown on the back of the wafer to form an epitaxial structure. The size of the upper three-dimensional islands may be the same as that of the lower layer, or may be larger than the lower layer due to the accumulated strain effect. Its size can be precisely controlled by adjusting the thickness of the wetting layer 3 (sacrificial layer) to achieve the corresponding strain accumulation effect.

[0047] 5. Adopt a non-selective dry etching process to etch the epitaxial structure from top to bottom until the etching depth covers all the wetting layers 3 (sacrificial layers) to form an etching window. Optionally, the etching process can be ICP etching; the window only exists in the gap between the lenses, and there is a certain interval between the windows. The top view is as Figure 3 shown (( Figure 3 in (a) the arrangement of the seeds is square, Figure 3 in (b) the arrangement of the seeds is honeycomb-shaped)).

[0048] 6. Adopt a selective wet etching process to etch the wetting layer 3 (sacrificial layer) inside and around the etching window, leaving only the lens layer 4, and fill the gap between them with optical glue or other materials transparent to the target wavelength for reinforcement. Optionally, in the above InP / InGaAsP example, the etching solution for selectively removing the wetting layer 3 (sacrificial layer) can be a mixed solution of H2SO4:H2O2:H2O.

[0049] The above are the preferred embodiments of the present invention. All changes made according to the technical solution of the present invention, when the functional effects generated do not exceed the scope of the technical solution of the present invention, fall within the protection scope of the present invention.

Claims

1. A method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly, characterized in that: The steps include: S1, growing various functional layers of the optical chip epitaxy on the substrate; S2. After the front epitaxial structure is completed and thinned and polished, secondary epitaxy is performed on the back of the wafer and a seed layer is made. The position of the seed layer is coaxial with the designed active area of ​​the optical chip, that is, the position of each seed in the seed layer needs to be coaxial with the active area of ​​each optical chip; S3, sequentially growing a wetting layer and a lens layer through a mixed growth mode, the periphery of the lens layer is connected to the seed layer through pillars, and the rest of the lens layer follows a layered growth mode to uniformly deposit one or several layers of atoms in a two-dimensional manner on the wetting layer; when the deposition reaches a predetermined thickness, the growth mode is changed to an island growth mode, and at this time, a three-dimensional island is formed at a position corresponding to the corresponding seed in the seed layer; S4, repeating step S3, and finally growing N wetting layers and N lens layers alternately on the back side of the wafer to form an epitaxial structure; S5, etching the epitaxial structure formed in step S4 from top to bottom until the etching depth covers all the wetting layers to form an etching window; S6, etching the wetting layer in and around the etched window formed in step S5, leaving only the lens layer, and filling the etched part with transparent material for reinforcement.

2. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The substrate is a semi-insulating substrate.

3. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The seed layer production methods include nanoimprinting method, selective area growth method, and holographic lithography method.

4. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The seeds in the seed layer are arranged in a square or honeycomb shape.

5. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The size of the 3D islands is controlled by adjusting the film deposition conditions, including temperature, pressure, and the difference in lattice constants between the materials.

6. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 5, characterized in that: For the lens layer / wetting layer, InP / In 1-x Ga x As y P 1-y The lattice constant a of the wetting layer is calculated by Vegard's law, that is, a=0.58688-0.04176x+0.01896y+0.00125xy. When the composition is adjusted to make a smaller than the InP lattice constant, the SK growth mode is formed.

7. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The size of the upper three-dimensional island is greater than or equal to that of the lower three-dimensional island, and the size of the upper three-dimensional island is adjusted by the accumulated strain effect, specifically, the accumulated strain effect is controlled by adjusting the thickness of the wetting layer.

8. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: In step S5, a non-selective dry etching process is adopted.

9. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: A selective wet etching process is used to etch the wetting layer in and around the etching window formed in step S5.

10. The method for preparing a substrate-integrated, self-assembled, self-aligned microlens assembly according to claim 1, characterized in that: The transparent material is optical glue or other materials that are transparent to the target wavelength.

Citation Information

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