Annular voltage-controlled oscillator with adjustable output phase
By creating an unbalanced feedforward path in the ring oscillator, phase adjustment is achieved, and the problems of increased circuit load, increased power consumption and deterioration of clock jitter performance in the prior art are solved, and the phase adjustable capability of high frequency and wide frequency adjustment is achieved.
Patent Information
- Application Number
- CN202411745686.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-02
- Publication Date
- 2025-05-06
AI Technical Summary
In the existing multi-phase adjustable design, additional capacitance and drive increase circuit load, resulting in increased power consumption, reduced system energy efficiency, reduced clock edge slewing rate and deterioration of clock jitter performance, while being incompatible with clock systems with wide frequency range.
Phase adjustment is achieved by creating an unbalanced feedforward path in the ring oscillator, and the intensity of the positive and negative phase feedforward path of each stage of differential gain unit is controlled using independent control voltages and digital control codes.
It realizes the ability to output frequency clock signals above GHz and a wide output frequency adjustment range. The built-in adjustable phase and calibration characteristics, and the phase adjustable capability does not change with the frequency change, and is suitable for a wide clock frequency range.
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Figure CN119945424A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a technology in the field of voltage-controlled oscillators, in particular to a ring voltage-controlled oscillator with adjustable output phase. Background Art
[0002] In the existing multi-phase adjustable design, the main method used is to add an adjustable capacitor array to each stage of the ring oscillator, and change the output phase by adjusting the capacitor array, or insert a drive adjustable capacitor load array and a cascaded multi-stage drive output switching selection circuit in the clock path to achieve multi-channel phase adjustment. The additional capacitors and drivers added by these two solutions increase the circuit load, increase circuit power consumption, and reduce system energy efficiency. The increase in load will reduce the edge conversion rate of the clock and deteriorate the clock jitter performance. In addition, the delay time that the capacitor array can provide is fixed and is not compatible with clock systems with a wider frequency range. Summary of the invention
[0003] In view of the above-mentioned deficiencies in the prior art, the present invention proposes a ring voltage-controlled oscillator with adjustable output phase, which realizes phase adjustment by creating an unbalanced feedforward path in the ring oscillator, has the ability to output clock signals with a frequency of more than GHz and a wide output frequency adjustment range, and can control the output phase of each clock through an internally integrated control word structure. The output phase change is only related to the unbalanced ratio between different levels, and the phase adjustable capability does not change with the frequency change, so that phase adjustment can be realized within a wide clock frequency range.
[0004] The present invention is achieved through the following technical solutions:
[0005] The invention relates to a ring voltage-controlled oscillator with adjustable output phase, comprising: a feedforward ring oscillator and a voltage bias circuit, wherein: the voltage bias circuit generates a control current according to input voltage multiplication and outputs the control current to the feedforward ring oscillator to control its output clock frequency.
[0006] The feedforward ring oscillator comprises: a positive feedback loop formed by four four-stage differential gain units, wherein: the positive and negative phases of the voltage input terminals of the first and third four-stage differential gain units are respectively connected to the negative and positive phases of the voltage output terminals of the fourth and second four-stage differential gain units; the positive and negative phases of the voltage output terminals of the first and third four-stage differential gain units are respectively connected to the negative and positive phases of the voltage feedforward terminals of the third and first four-stage differential gain units, and the positive and negative phases of the voltage output terminals of the first four-stage differential gain unit are respectively connected to the negative and positive phases of the voltage input terminals of the second four-stage differential gain unit. The positive phase is connected, the positive and negative phases of the voltage output terminal of the third four-stage differential gain unit are respectively connected to the positive and negative phases of the voltage input terminal of the fourth four-stage differential gain unit, the positive and negative phases of the voltage output terminal of the second four-stage differential gain unit are respectively connected to the positive and negative phases of the voltage feedforward terminal of the fourth four-stage differential gain unit, and the positive and negative phases of the voltage output terminal of the fourth four-stage differential gain unit are respectively connected to the negative and positive phases of the voltage feedforward terminal of the second four-stage differential gain unit; the four-stage differential unit constitutes a positive feedback loop to generate eight phases, and uses symmetrical four phases as orthogonal clock output. Technical Effects
[0007] The present invention integrates an unbalanced feedforward path, and the strength of the positive and negative phase feedforward paths of each differential gain unit is controlled by independent control voltages and digital control codes. Compared with the prior art, the present invention significantly optimizes the oscillation frequency enhancement and phase noise performance of the ring oscillator, while providing it with built-in adjustable phase and calibration characteristics through the imbalance of the feedforward path. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 It is a schematic diagram of the structure of the present invention;
[0009] Figure 2 Schematic diagram of a feedforward ring oscillator;
[0010] Figure 3 This is the phase adjustment mechanism diagram of the unbalanced feedforward structure;
[0011] Figure 4 This is a diagram showing the implementation effect of unbalanced adjustment of differential phase and quadrature phase. DETAILED DESCRIPTION
[0012] like Figure 1 As shown in FIG. 1 , a ring voltage-controlled oscillator with adjustable output phase is provided in the present embodiment, comprising: a feedforward ring oscillator and a voltage bias circuit, wherein: the voltage bias circuit is configured to adjust the output phase of the ring voltage according to the input voltage V tune Multiply n times to generate control current I tune The output is fed to a feed-forward ring oscillator to control its output clock frequency.
[0013] The voltage bias circuit includes: a current mirror circuit, an operational amplifier and a tuning resistor R tune, where: Input voltage V tune The voltage is clamped by the operational amplifier and applied to the tuning resistor R tune , the input voltage V tune The resistor R tune The current generated on the control current I is multiplied by n times tune , thereby controlling the output clock frequency of the feedforward ring oscillator.
[0014] The current mirror circuit comprises: a p-type transistor Mp and a p-type transistor n*Mp with n times the size.
[0015] like Figure 2 As shown, the feedforward ring oscillator comprises: four four-stage differential gain units G m1 -G m4 A positive feedback loop is formed, in which: the voltage input terminals V in The positive and negative phases are respectively connected to the voltage output terminals V out The negative and positive phases are connected; the voltage output terminals V of the first and third four-stage differential gain units are out The positive and negative phases are connected to the voltage feedforward terminals V of the third and first four-stage differential gain units respectively. ff The negative and positive phases are connected, and the voltage output terminal V out The positive and negative phases are respectively connected to the voltage input terminal V in The negative and positive phases are connected, and the voltage output terminal V out The positive and negative phases are respectively connected to the voltage input terminal V in The positive and negative phases are connected, and the voltage output terminal V out The positive and negative phases are respectively connected to the voltage feed-forward terminal V of the fourth four-stage differential gain unit ff The positive and negative phases are connected, and the voltage output terminal V out The positive and negative phases are respectively connected to the voltage feedforward terminal V of the second four-stage differential gain unit ff The negative and positive phases are connected; the four-level differential unit forms a positive feedback loop to generate eight phases, and uses symmetrical 4 phases as orthogonal clock outputs.
[0016] Each of the four-stage differential gain units comprises: eight symmetrically arranged transistors M 1- M8, wherein: the first and second transistors M1 / M2 constitute a differential transistor and use the cross-coupled seventh and eighth transistors M7 / M8 as loads to form a transconductance unit, and the inputs of the first and second transistors are connected to the previous stage G mThe output of the differential gain unit is 45° and 225°, and the gates of the first and second transistors serve as the positive and negative phases of the voltage input terminal Vin of the differential gain unit; the third and fifth transistors M3 / M5 and the fourth and sixth transistors M4 / M6 are respectively connected in parallel to both sides of the load to form a feedforward path, and the gates of the third and fourth transistors M3 / M4 are connected to the input of the previous differential gain unit and serve as the positive and negative phases of the voltage feedforward terminal Vff of the differential gain unit. The clock phases are 0° and 180°, so that it extracts a phase-advanced current from the load; the fifth and sixth transistors M5 / M6 are transistors with adjustable gate voltages, and by adjusting their gate voltages V b+ / V b- Change the feedforward current I ff , thus determining the weight of the feedforward path.
[0017] When the normal path generates a current sink I in , the feed-forward path generates a current source I ff , then the equivalent load (sC L -1 / g m7 ) current I load It's I in -I ff , whose phase is between 0° and 45°. The final output voltage phase is determined by the current sink I in With current source I ff The ratio (R inff )Decide.
[0018] Compared with the traditional ring oscillator, the delay (t d ) is reduced. This results in an increase in the oscillator frequency while also improving the clock phase noise. inff If the positive and negative parts of the differential in the differential gain unit are consistent and remain consistent in all differential gain units, then the phase relationship of the entire ring oscillator will be the same as the traditional phase output relationship.
[0019] The ring voltage-controlled oscillator achieves the characteristic of adjustable phase by changing different feedforward paths to achieve imbalance. By separately setting the R of the differential positive and negative parts in each differential gain unit inff Differential phase adjustment is achieved by individually setting the R of non-adjacent differential gain cells. inff Achieve quadrature phase adjustment.
[0020] like Figure 3 As shown, the differential phase adjustment includes: unbalanced, unbalanced propagation and output differential / orthogonal phase adjustment after stabilization of the differential gain unit, specifically including:
[0021] Step 1: By adjusting the gate voltage V of the fifth and sixth transistorsb , making the differential output phase in each differential gain unit unbalanced. For example, in the first differential gain unit G m1 In, V b1+ Decrease, V b1- Increase, the current I in the feedforward path ff1+ Correspondingly, I ff1- Increase.
[0022] Step 2: When -I ff1- and I in1- When interpolating between ff1- The weight is higher in -I ff1+ and I in1+ When interpolating between ff1+ The weight of is lower. load1+ and I load1- The differential imbalance between load1+ and I load1- The phase difference Δφ between diff Reduced to less than 180°. Secondly, the imbalance of the output differential phase of the current differential gain unit is propagated to the next differential gain unit.
[0023] like Figure 3 As shown in the middle, the fourth differential gain unit G m4 The output imbalance causes V in1+ and V in1- The imbalance between the third differential gain unit G m3 The output imbalance causes V ff1+ and V ff1- The imbalance between load1+ and I load1- The phase difference Δφ between diff Further reduction.
[0024] Step 3: Since each differential gain unit affects the imbalance of the next stage, the phase difference Δφ diff It will gradually decrease over time and eventually reach a stable state. In this final stable phase output state, the differential phase imbalance between the input signal, feedforward signal, and output signal remains consistent in all differential gain units, thereby achieving adjustment between the two differential phases. Similarly, unbalanced orthogonal phase adjustment can also be achieved by adjusting the imbalance between non-adjacent differential gain units of different levels through a process similar to differential phase imbalance.
[0025] Preferably, the feedforward path is implemented by a digitally adjustable voltage-controlled current source array structure. The feedforward current can be adjusted by a discrete adjustment signal d ps Coarse adjustment, and through the continuous voltage V bFine tuning, specifically: adjusting the discrete adjustment signal d ps The differential output phase in each differential gain unit becomes unbalanced, for example, from the balanced state d ps+ =2,d ps- =2, switch to d ps+ =1,d ps- =3, feedforward current I ff1+ Correspondingly, I ff1- Increase, so that the final stable state Δφ is reached diff On this basis, the continuous voltage V b+ Reduce with V b- Increasing can make Δφ diff Further reduction is achieved in a limited V b Correspondingly, by changing the sizes of the third and fourth transistors M3 / M4, the phase adjustment range can be increased under the same V b Reduce the adjustment Δφ under the range diff Range improves adjustment accuracy.
[0026] After conducting specific practical experiments on the circuit prototype chip designed above, the prototype chip was powered and the 4-phase output signal was connected to an oscilloscope to observe the output phase. b+ With V b- The voltage difference between them ranges from -250mV to 250mV, and switches different d ps+ / d ps- The phase difference between the output differential phases is measured as 1 / 3, 2 / 2, and 3 / 1. The adjustable range of the differential phase is -90.0° to 80.9°. b3 / 4 With V b1 / 2 The voltage difference between them ranges from -250mV to 250mV, and switches different d ps1 / 2 / d ps3 / 4 The phase difference between the output quadrature phases is measured to be 1 / 3, 2 / 2, and 3 / 1, and the adjustable range of the quadrature phase is -69.6° to 76.5°.
[0027] Compared with the prior art, the built-in output four-channel clock phase adjustable function that can be achieved by the present device is that the different phase signals output by the multi-stage gain unit of the ring oscillator are connected to the gain units of other stages to form a feedforward structure, and the strength of each stage of the feedforward path can be adjusted independently, so that the gain circuits of different phases are in an unbalanced state to adjust the phase relationship between each output signal.
[0028] The above-mentioned specific implementation can be partially adjusted in different ways by those skilled in the art without departing from the principle and purpose of the present invention. The protection scope of the present invention shall be based on the claims and shall not be limited by the above-mentioned specific implementation. Each implementation scheme within its scope shall be subject to the constraints of the present invention.
Claims
1. A ring voltage-controlled oscillator with adjustable output phase, characterized in that: include: A feedforward ring oscillator and a voltage bias circuit, wherein: the voltage bias circuit generates a control current according to an input voltage multiplication and outputs the control current to the feedforward ring oscillator to control its output clock frequency; The feedforward ring oscillator comprises: a positive feedback loop formed by four four-stage differential gain units, wherein: the positive and negative phases of the voltage input terminals of the first and third four-stage differential gain units are respectively connected to the negative and positive phases of the voltage output terminals of the fourth and second four-stage differential gain units; the positive and negative phases of the voltage output terminals of the first and third four-stage differential gain units are respectively connected to the negative and positive phases of the voltage feedforward terminals of the third and first four-stage differential gain units, and the positive and negative phases of the voltage output terminals of the first four-stage differential gain unit are respectively connected to the negative and positive phases of the voltage input terminals of the second four-stage differential gain unit. The positive phase is connected, the positive and negative phases of the voltage output terminal of the third four-stage differential gain unit are respectively connected to the positive and negative phases of the voltage input terminal of the fourth four-stage differential gain unit, the positive and negative phases of the voltage output terminal of the second four-stage differential gain unit are respectively connected to the positive and negative phases of the voltage feedforward terminal of the fourth four-stage differential gain unit, and the positive and negative phases of the voltage output terminal of the fourth four-stage differential gain unit are respectively connected to the negative and positive phases of the voltage feedforward terminal of the second four-stage differential gain unit; the four-stage differential unit constitutes a positive feedback loop to generate eight phases, and uses symmetrical four phases as orthogonal clock output.
2. The ring voltage-controlled oscillator with adjustable output phase according to claim 1, characterized in that: The voltage bias circuit comprises: a current mirror circuit, an operational amplifier and a tuning resistor, wherein: the input voltage is clamped by the operational amplifier and applied to the tuning resistor, and the current generated by the input voltage on the tuning resistor is multiplied by the current mirror circuit to generate a control current, thereby controlling the output clock frequency of the feedforward ring oscillator; The current mirror circuit comprises: a p-type transistor and a p-type transistor with n times the size.
3. The ring voltage-controlled oscillator with adjustable output phase according to claim 1, characterized in that: Each four-stage differential gain unit includes: eight symmetrically arranged transistors, wherein: the first and second transistors constitute differential transistors and form a transconductance unit with the cross-coupled seventh and eighth transistors as loads, the inputs of the first and second transistors are connected to the output of the previous stage, the clock phases are 45° and 225°, and the gates of the first and second transistors serve as the positive and negative phases of the voltage input terminal of the differential gain unit; the third and fifth transistors and the fourth and sixth transistors are respectively connected in parallel to both sides of the load to form a feedforward path, the gates of the third and fourth transistors are connected to the input of the previous stage and serve as the positive and negative phases of the voltage feedforward terminal of the differential gain unit, the clock phases are 0° and 180°, so that they extract a phase-advanced current from the load; the fifth and sixth transistors are transistors with adjustable gate voltages, and the feedforward current is changed by adjusting their gate voltages, thereby determining the weight of the feedforward path.
4. The ring voltage-controlled oscillator with adjustable output phase according to claim 3, characterized in that: The regulation is to adjust the gate voltage V of the fifth and sixth transistors b , making the differential output phase in each four-stage differential gain unit unbalanced, with a phase difference of Δφ diff It gradually decreases over time and eventually reaches a stable state, in which the differential phase imbalance between the input signal, the feedforward signal, and the output signal remains consistent in all four-stage differential gain units, thereby achieving regulation between the differential two-path phases.
5. The ring voltage-controlled oscillator with adjustable output phase according to claim 4, characterized in that: The feedforward current is adjusted by adjusting the discrete adjustment signal d ps The fifth and sixth transistor gate voltages V b Fine-tune, specifically: adjust the discrete adjustment signal d ps The differential output phase in each four-stage differential gain unit becomes unbalanced, so that the final stable state phase difference Δφ is achieved. diff Reduce; on this basis, adjust the continuous voltage V b+ Reduce with V b- Increasing the phase difference Δφ diff Further reduction is achieved in the limited V b Increase the phase adjustment range under Adjustment Range.
6. The ring voltage-controlled oscillator with adjustable output phase according to claim 5, characterized in that: By changing the size of the third and fourth transistors, at the same gate voltage V b Reduce the adjustment phase difference Δφ within the range diff Range improves adjustment accuracy.
Citation Information
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