Flip chip FC packaging technology method

Abstract

The invention discloses a flip chip FC packaging technology method, and relates to the technical field of chip packaging, and the method comprises the steps: collecting the physical parameters of a flip chip packaging material, building a thermal-mechanical coupling model, carrying out the thermal-mechanical coupling simulation and mechanical stress analysis of a packaging structure through the built thermal-mechanical coupling model, and carrying out the analysis of the mechanical stress of the packaging structure. And a stress concentration area and a part with large deformation are identified, and optimization design of the packaging structure is carried out based on a thermal-mechanical coupling analysis result. The reliability of the packaging structure is remarkably improved through optimization design and a strict testing process, in the design stage, a stress concentration area and a potential deformation problem are analyzed and recognized through thermal-mechanical coupling, so that the geometrical shape, material selection and solder ball layout are optimized in advance, and the reliability of the packaging structure is improved through optimization of a thermal management strategy. The heat management performance of the packaging structure is effectively improved, the heat dissipation efficiency of the packaging structure is remarkably improved, and the packaging structure can better adapt to application scenes with extremely high requirements for heat management.

Description

Technical Field

[0001] The invention relates to the technical field of chip packaging, and in particular to a flip chip FC packaging technical method. Background Art

[0002] Flip chip (FC) packaging technology is an advanced integrated circuit packaging technology, which is mainly due to the semiconductor industry's demand for continuous improvement in chip performance, size, cost and production efficiency. It turns the chip upside down and directly connects the chip's pads to the packaging substrate, eliminating the gold wire connection step in the traditional packaging method. This technology makes the chip's electrical connection more compact and the performance better, so it is widely used in modern electronic products.

[0003] In the prior art, stress changes in flip-chip packaging can lead to poor contact between the chip and the substrate, especially in the case of temperature changes or physical vibrations. The existing temperature cycles, differences in thermal expansion coefficients, and mechanical shock problems can easily cause stress concentration in the package, leading to failure. Therefore, how to combine the mechanical model with the thermal model to analyze the thermal-mechanical coupling effect in the design stage and then optimize the packaging structure to minimize stress and deformation is the problem we need to solve. To this end, a flip-chip FC packaging technology method is proposed. Summary of the invention

[0004] The present invention aims to provide a flip chip FC packaging technology method to solve the problems raised in the above background technology.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A flip chip FC packaging technology method comprises the following steps:

[0007] Step 1: Collect the material physical parameters of the flip chip package, including the thermal expansion coefficient, elastic modulus, thermal conductivity, etc. of the chip material, substrate material, and solder ball material, and establish a thermal-mechanical coupling model. The thermal-mechanical coupling model includes the mechanical and thermal models of the complete package structure including the chip, bumps, and substrate, which is used to simulate the behavior of the package structure under thermal-mechanical loads.

[0008] Step 2: Use the established thermal-mechanical coupling model to perform thermal-mechanical coupling simulation and mechanical stress analysis on the packaging structure, simulate and analyze the stress and deformation state of the packaging structure under temperature cycling, physical vibration and mechanical shock conditions, identify stress concentration areas and locations with large deformation, and evaluate the impact on packaging reliability;

[0009] Step 3: Based on the results of the thermal-mechanical coupling analysis, the packaging structure is optimized, including adjusting the geometry of the chip and substrate, material selection, thermal management optimization, and contact stability optimization to reduce stress concentration and deformation. The goal is to improve the thermal management effect and optimize the stress distribution to make the contact between the chip and the substrate more stable.

[0010] Step 4: After optimizing the design, the optimized packaging structure is analyzed for thermal-mechanical coupling effects again to verify whether the optimization effect meets the design requirements. If the optimization effect is not satisfactory, return to step 3 to continue adjusting the design parameters until the requirements are met.

[0011] Step 5: Prototype manufacturing and testing are carried out based on the optimized design parameters that meet the design requirements to verify the accuracy of the simulation results. The testing process includes temperature cycle testing, mechanical shock testing, and reliability testing to verify its performance in actual applications.

[0012] Step 6. If the prototype is manufactured and tested, the optimized design parameters are applied to mass production, and the flip-chip FC packaging technology is applied to actual products. Otherwise, return to step 2 to continue the thermal-mechanical coupling effect analysis until the flip-chip packaging requirements are met.

[0013] A further improvement of the technical solution of the present invention is that the step 1 specifically includes:

[0014] Go through technical specifications, data sheets, and industry standards in the field of electronic packaging to obtain the physical parameters of flip chip packaging materials, including the thermal expansion coefficient, elastic modulus, and thermal conductivity of chip materials, substrate materials, and solder ball materials;

[0015] Use 3D modeling software to build a geometric model of flip chip packaging. The geometric model is a complete packaging structure including chip, bumps and substrate. Ensure that the geometric dimensions of the model are consistent with the actual packaging design, including chip size, bump position and size, substrate thickness, etc., and import the collected material physical parameters and geometric model into finite element analysis software (ANSYS, ABAQUS, etc.), mesh the model, select the appropriate mesh type (tetrahedral mesh, hexahedral mesh) and mesh density, and create a finite element model;

[0016] In the finite element model, the collected material physical parameters are combined to assign corresponding material properties to the chip, bumps and substrate to ensure the accuracy of the simulation results;

[0017] Define the thermal boundary conditions of the package structure, including heat source (chip heat generation), heat dissipation path (substrate, heat dissipation cover) and ambient temperature, and use the heat conduction equation to simulate the heat distribution of the package structure under different temperature conditions, calculate the temperature field distribution, and then define the mechanical boundary conditions of the package structure, including fixed constraints (substrate bottom) and loads (thermal stress caused by temperature changes), and use elastic mechanics equations to simulate the deformation and stress distribution of the package structure under thermal stress;

[0018] In the finite element analysis software, the thermal model and the mechanical model are coupled to obtain a thermo-mechanical coupling model, and then a thermo-mechanical coupling analysis is performed to simulate the behavior of the packaging structure under thermo-mechanical loads, including temperature changes, thermal expansion, stress distribution, and deformation.

[0019] A further improvement of the technical solution of the present invention is that the step 2 specifically includes:

[0020] In combination with the requirements of flip chip packaging, the working conditions of thermal coupling simulation and mechanical stress analysis are defined, including temperature cycle conditions, physical vibration conditions, and mechanical shock conditions. In the finite element analysis software, the simulation parameters are set according to the defined working conditions to ensure that the boundary conditions, load conditions, and material properties of the model are consistent with the actual working conditions. The simulation parameters include temperature range, cycle period, vibration frequency, acceleration, shock acceleration, and shock duration.

[0021] Combined with the established thermal-mechanical coupling model, the packaging structure is simulated for thermal-mechanical coupling. According to the temperature cycle conditions in actual applications, the temperature cycle curve in the simulation is set, and then the finite element method is used to solve the heat conduction equation and calculate the temperature distribution of the packaging structure under different working conditions, thereby outputting the temperature field distribution results, including the temperature changes of the chip, bumps and substrate;

[0022] Combined with the established thermal-mechanical coupling model, the mechanical stress analysis of the packaging structure is carried out. Fixed constraints are imposed on the bottom of the substrate to simulate the actual installation state of the packaging structure. The thermal-mechanical coupling simulation results (thermal stress caused by temperature changes) are input into the mechanical model as loads. The corresponding dynamic loads (acceleration, impact force) are applied to the physical vibration and mechanical impact conditions. The finite element method is then used to solve the elastic mechanics equations, and the stress and deformation of the packaging structure under thermal stress, vibration and impact loads are calculated, thereby outputting stress distribution diagrams and deformation diagrams.

[0023] Through the simulation results, the stress concentration area is identified and the stress level in the stress concentration area is analyzed to determine whether the yield strength or fatigue limit of the material is exceeded. The stress concentration area includes the connection between the chip and the substrate and the solder ball position.

[0024] Analyze the deformation distribution of the package structure, identify the parts with large deformation, and evaluate the impact of deformation on the electrical connection and mechanical stability of the package structure. Deformation includes chip warping and substrate bending.

[0025] Based on the stress concentration areas and the parts with large deformation, the failure risk of the packaging structure under temperature cycle, physical vibration and mechanical shock conditions is evaluated. The failure modes of failure risk include solder ball breakage or fatigue failure, poor contact between the chip and the substrate, substrate cracking or delamination, and electrical short circuit or open circuit caused by chip warping. The SN curve is then used to evaluate the fatigue life of the solder balls and the packaging structure, and the reliable working time of the packaging structure is predicted based on the stress level and deformation.

[0026] The further improvement of the technical solution of the present invention is that: the definition of the temperature cycle working condition is: the temperature change range is -40°C to +125°C, and the cycle period is 1 hour per cycle, which is used to simulate the thermal expansion and contraction behavior of the packaging structure during the temperature cycle process;

[0027] Definition of the physical vibration working condition: the vibration frequency is 10 Hz to 500 Hz, the acceleration is 10g, and it is used to simulate the dynamic response of the packaging structure under periodic vibration;

[0028] The mechanical shock condition is defined as follows: the shock acceleration is 100g and the shock duration is 11ms, which is used to simulate the stress and deformation of the packaging structure under transient shock.

[0029] A further improvement of the technical solution of the present invention is that the process of identifying the stress concentration area is:

[0030] Use the post-processing function of the finite element analysis software to output the stress distribution diagram of the packaging structure under different working conditions, and observe the stress distribution diagram to identify the parts where the stress value is significantly higher than the surrounding area;

[0031] After the stress concentration area is identified, the identified stress concentration area is locally enlarged to observe the stress distribution in more detail, and the stress gradient in the stress concentration area is analyzed, that is, the rate of change of the stress value in space. The high stress gradient area indicates local deformation or damage of the material, and the stress data of the stress concentration area is extracted, including the maximum stress value, average stress value and cyclic stress amplitude;

[0032] Compare the extracted maximum stress value with the yield strength of the material. If the maximum stress value exceeds the yield strength of the material, it indicates that there is a risk of plastic deformation or fracture in the area. For temperature cycles and physical vibration cycles, analyze the cyclic stress amplitude in the stress concentration area and compare the cyclic stress amplitude with the fatigue limit of the material. If the cyclic stress amplitude exceeds the fatigue limit of the material, it indicates that there is a risk of fatigue failure in the area.

[0033] The process of identifying the part with large deformation is as follows:

[0034] Use the post-processing function of the finite element analysis software to output the deformation distribution diagram of the packaging structure under different working conditions (temperature cycle, physical vibration, mechanical shock), observe the deformation distribution diagram, and identify the parts with large deformation. The deformation distribution diagram uses different colors or heights to represent the size of the deformation. The darker the color or the higher the height, the greater the deformation.

[0035] Analyze the deformation distribution of the chip area, pay attention to the displacement difference between the center and edge of the chip. Chip warping is manifested as the upward or downward bending of the chip center, resulting in an uneven chip surface. The maximum warping of the chip is extracted, and the maximum warping is expressed as the displacement value of the chip center. At the same time, observe the deformation distribution of the substrate area, pay attention to the overall bending degree of the substrate. The substrate bending is manifested as the upward or downward bending of the substrate center, or the warping of the substrate edge. The maximum bending of the substrate is extracted, and the maximum bending is expressed as the displacement value of the substrate center or edge.

[0036] Analyze the impact of chip warpage on electrical connections, including solder ball connection reliability and electrical short or open circuit risks, and analyze the impact of substrate bending on electrical connections, including substrate-chip contact issues and solder ball reliability;

[0037] Analyze the impact of chip warping on mechanical stability, including the mechanical stability of the packaging structure and the fatigue life of the material; analyze the impact of substrate bending on mechanical stability, including the overall stability of the packaging structure and the fatigue life of the material.

[0038] A further improvement of the technical solution of the present invention is that the process of predicting the failure risk and the reliable working time of the packaging structure is:

[0039] Assessment of failure risks, including solder ball fracture or fatigue failure, poor contact between chip and substrate, substrate cracking or delamination, and electrical shorts or breaks caused by chip warping;

[0040] Use the SN curve to evaluate the fatigue life of solder balls and packaging structures under cyclic stress, and combine the stress level and cycle number to predict the fatigue failure time of solder balls and packaging structures;

[0041] The reliability of the packaging structure is evaluated by combining the stress level and deformation in the stress concentration area, focusing on the stress and deformation at the solder ball position and the contact between the chip and the substrate. The reliable working time of the packaging structure is predicted based on the fatigue life assessment results.

[0042] A further improvement of the technical solution of the present invention is that the step three specifically includes:

[0043] Combined with the stress concentration areas identified by the thermal-mechanical coupling analysis results and the deformation analysis results, the optimization goals of the package structure optimization design are determined, including improving the thermal management effect, optimizing the stress distribution and ensuring the stable contact between the chip and the substrate, improving the thermal management effect, ensuring the stable operation of the package structure in a high temperature environment, optimizing the stress distribution, reducing stress concentration and deformation, extending the service life of the package structure, ensuring the stable contact between the chip and the substrate, and improving the reliability and electrical performance of the package;

[0044] Match the corresponding optimization design measures for the determined optimization goals, including adjusting the geometry of the chip and substrate, material selection, thermal management optimization, and contact stability optimization;

[0045] Use the optimized design parameters to re-perform finite element analysis and update the finite element simulation model.

[0046] A further improvement of the technical solution of the present invention is that the step 4 specifically includes:

[0047] Combined with the updated finite element simulation model, the thermal-mechanical coupling effect analysis is performed again on the optimized packaging structure, and simulation analysis of thermal-mechanical coupling analysis and mechanical stress analysis is performed;

[0048] According to the simulation analysis results, the stress distribution, temperature distribution and deformation of the optimized packaging structure under thermal and mechanical loads are clearly defined;

[0049] Extract the results of finite element analysis, including stress diagrams, temperature diagrams, and deformation diagrams, compare the results before and after optimization, evaluate the impact of optimization measures on thermal management effects, stress distribution, and contact stability, and determine whether the optimization effect meets the requirements based on the design requirements of maximum stress limit, maximum temperature limit, and maximum deformation limit;

[0050] If the optimization effect is ideal, that is, stress concentration is reduced, temperature distribution is more uniform, deformation is reduced, and contact stability is improved, then the optimization effect is judged to meet the design requirements and proceed to the next step;

[0051] If the optimization effect is not ideal, that is, the stress is still concentrated, the temperature distribution is uneven, the deformation is too large or the contact stability is insufficient, return to step three to continue adjusting the design parameters, and implement design parameter adjustment measures including geometry adjustment, material selection optimization, thermal management improvement and contact stability improvement. Use the updated design parameters to re-perform finite element analysis to verify the optimization effect until the optimized packaging structure meets the design requirements.

[0052] A further improvement of the technical solution of the present invention is that the step five specifically includes:

[0053] According to the results of finite element simulation analysis, determine the optimized design parameters that meet the design requirements, including geometry, material selection, thermal management strategy, contact stability optimization measures, etc., and formulate a detailed prototype manufacturing plan based on the optimized design parameters, including manufacturing process, processing equipment, material procurement, quality control, etc.;

[0054] In combination with the established prototype manufacturing plan, develop a test plan including temperature cycle test, mechanical shock test and reliability test, and specify the test purpose, test conditions, test equipment and test standards;

[0055] Organize the result data of temperature cycle test, mechanical shock test and reliability test, analyze the test results, compare the performance of the prototype in the actual test with the consistency of the simulation results, and evaluate the performance of the prototype in actual application, including thermal management performance, mechanical strength, shock resistance and long-term reliability;

[0056] Based on the test results, judge the accuracy of the simulation results. If the test results are consistent with the simulation results, it means that the simulation model is accurate and reliable and can be used to guide subsequent design and optimization. If there are differences between the test results and the simulation results, analyze the reasons for the differences, which may include simplification of the simulation model, differences in test conditions, or errors in the manufacturing process, and then correct and improve the simulation model.

[0057] A further improvement of the technical solution of the present invention is that the step six specifically includes:

[0058] Analyze the test results of prototype manufacturing. If the temperature cycle test, mechanical shock test and reliability test meet the required standards, the test is considered to have passed and the design requirements are met, and then enter the mass production stage;

[0059] If the prototype manufacturing and test results do not meet the required standards, the test is considered to have failed and it is necessary to return to the optimization design step to continue the optimization process of thermal-mechanical coupling effect analysis, design optimization, and re-manufacturing and testing the prototype. If the new prototype still does not meet the design requirements, continue to return to step 2 for thermal-mechanical coupling effect analysis until the flip-chip packaging requirements are met. Through continuous cycles and iterations, the design of the packaging structure is gradually optimized to ensure its stability and reliability in practical applications.

[0060] Due to the adoption of the above technical solution, the present invention has the following technical advances compared with the prior art:

[0061] 1. The present invention provides a flip chip FC packaging technology method, which significantly improves the reliability of the packaging structure through optimized design and strict testing process. In the design stage, thermal-mechanical coupling analysis is used to identify stress concentration areas and potential deformation problems, so as to optimize the geometric shape, material selection and solder ball layout in advance. By optimizing the thermal management strategy, the thermal management performance of the packaging structure is effectively improved, and the heat dissipation efficiency of the packaging structure is significantly improved, so that the packaging structure can better adapt to application scenarios with extremely high requirements for thermal management.

[0062] 2. The present invention provides a flip chip FC packaging technology method, which effectively optimizes the stress distribution of the packaging structure by adjusting the geometric shape, optimizing the material selection and improving the solder ball layout. In the design stage, finite element analysis is used to identify stress concentration areas, such as the solder ball position and the connection between the chip and the substrate. By adjusting the solder ball spacing, optimizing the chip edge design and selecting materials with a better thermal expansion coefficient, the stress concentration phenomenon is significantly reduced, so that the optimized packaging structure shows good structural integrity in the mechanical impact test, without cracks or damage, and the electrical performance remains normal after the impact. This optimized stress distribution not only improves the mechanical strength of the packaging structure, but also extends its service life under dynamic load conditions, reduces the risk of fatigue failure caused by stress concentration, and ensures the stability and reliability of the packaging structure in practical applications.

[0063] 3. The present invention provides a flip-chip FC packaging technology method, which ensures the contact stability between the chip and the substrate through a variety of optimization measures, which not only improves the electrical performance of the packaging structure, but also reduces the signal transmission error and power consumption increase caused by contact problems, so that the packaging structure can better meet the strict requirements of high-performance electronic products on electrical performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0065] Figure 1 It is a schematic diagram of the workflow of the present invention;

[0066] Figure 2 It is a schematic diagram of the method flow of the present invention. DETAILED DESCRIPTION

[0067] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0068] Embodiment 1, as Figure 1 , Figure 2 As shown, the present invention provides a flip chip FC packaging technology method, comprising the following steps:

[0069] Step 1: Collect the material physical parameters of the flip-chip package, including the thermal expansion coefficient, elastic modulus, thermal conductivity, etc. of the chip material, substrate material, and solder ball material, and establish a thermal-mechanical coupling model. The thermal-mechanical coupling model includes the mechanical and thermal models of the complete packaging structure including the chip, bumps, and substrate, which is used to simulate the behavior of the packaging structure under thermal-mechanical loads. Go through the technical specifications, data manuals, and industry standards in the field of electronic packaging to obtain the material physical parameters of the flip-chip package, including the thermal expansion coefficient, elastic modulus, and thermal conductivity, etc. of the chip material, substrate material, and solder ball material. Consult the chip manufacturer, substrate supplier, and solder ball manufacturer. Technical specifications and data manuals are used to record the physical parameters of chip materials, substrate materials, and solder ball materials, such as thermal expansion coefficient, elastic modulus, and thermal conductivity. Industry standards in the field of electronic packaging, such as JEDEC (Joint Electron Device Engineering Council), are used to obtain information about the physical parameters of materials. Industry standards contain recommended values ​​or ranges for material properties, which help to verify and supplement the data obtained from manufacturers. A geometric model of flip-chip packaging is constructed using 3D modeling software. The geometric model is a complete packaging structure including chip, bumps, and substrate. Ensure that the geometric dimensions of the model are consistent with the actual packaging design, including chip size, bump position and size, substrate thickness, etc., and collect The collected material physical parameters (thermal expansion coefficient, elastic modulus, thermal conductivity, etc.) and geometric model are imported into finite element analysis software (ANSYS, ABAQUS, etc.), the model is meshed, the appropriate mesh type (tetrahedral mesh, hexahedral mesh) and mesh density are selected, and a finite element model is created. In the finite element model, the collected material physical parameters are combined to assign corresponding material properties to the chip, bump and substrate respectively to ensure the accuracy of the simulation results, define the thermal boundary conditions of the package structure, including heat source (chip heating), heat dissipation path (substrate, heat dissipation cover) and ambient temperature, and use the heat conduction equation to simulate the thermal distribution of the package structure under different temperature conditions. The temperature field distribution is calculated, and the mechanical boundary conditions of the packaging structure are defined, including fixed constraints (bottom of the substrate) and loads (thermal stress caused by temperature changes). The deformation and stress distribution of the packaging structure under thermal stress are simulated using elastic mechanics equations. In the finite element analysis software, the thermal model and the mechanical model are coupled to obtain a thermal-mechanical coupling model, and then a thermal-mechanical coupling analysis is performed to simulate the behavior of the packaging structure under thermal-mechanical loads, including temperature changes, thermal expansion, stress distribution, and deformation. The coupling method is to first perform thermal analysis, calculate the temperature field distribution, and then input the temperature field results as loads into the mechanical model to calculate stress and deformation.

[0070] Step 2: Use the established thermal-mechanical coupling model to perform thermal coupling simulation and mechanical stress analysis on the packaging structure, simulate and analyze the stress and deformation state of the packaging structure under temperature cycling, physical vibration and mechanical shock conditions, identify stress concentration areas and parts with large deformation, and evaluate the impact on packaging reliability. Combined with the needs of flip-chip packaging, define the working conditions of thermal coupling simulation and mechanical stress analysis, including temperature cycling conditions, physical vibration conditions and mechanical shock conditions, and set simulation parameters in the finite element analysis software according to the defined working conditions to ensure that the boundary conditions, load conditions and material properties of the model are consistent with the actual working conditions. The simulation parameters include temperature range, cycle period, vibration frequency, acceleration, impact acceleration and impact duration. The temperature cycle condition is defined as follows: the temperature range is -40°C to +125°C, and the cycle period is 1 hour per cycle, which is used to simulate the thermal expansion and contraction behavior of the package structure during the temperature cycle. The physical vibration condition is defined as follows: the vibration frequency is 10Hz to 500Hz, and the acceleration is 10g, which is used to simulate the dynamic response of the package structure under periodic vibration. The mechanical shock condition is defined as follows: the shock acceleration is 100g, and the shock duration is 11ms, which is used to simulate the stress and deformation of the package structure under transient shock. Combined with the established thermal-mechanical coupling model, the package structure is subjected to thermal-mechanical coupling simulation. According to the temperature cycle conditions in actual applications, the temperature cycle curve in the simulation is set, and the heat generation power is defined in the chip area ( 10W / cm²), define the heat dissipation path of the substrate, heat dissipation cover and air convection, set the ambient temperature (25°C) and thermal boundary conditions (natural convection or forced convection), and then use the finite element method to solve the heat conduction equation, calculate the temperature distribution of the package structure under different working conditions, and output the temperature field distribution results, including the temperature changes of the chip, bumps and substrate. Combined with the established thermal-mechanical coupling model, the mechanical stress analysis of the package structure is carried out, and fixed constraints are imposed on the bottom of the substrate to simulate the actual installation state of the package structure. The thermal-mechanical coupling simulation results (thermal stress caused by temperature changes) are input into the mechanical model as loads, and the corresponding dynamic loads (acceleration, impact force) are applied to the physical vibration and mechanical shock conditions, and then the finite element method is used. The method solves the elastic mechanics equation, calculates the stress and deformation of the packaging structure under thermal stress, vibration and impact loads, and outputs the stress distribution map and deformation map. Through the simulation results, the stress concentration area is identified, and the stress level in the stress concentration area is analyzed to determine whether it exceeds the yield strength or fatigue limit of the material. The stress concentration area includes the connection between the chip and the substrate and the solder ball position. The post-processing function of the finite element analysis software is used to output the stress distribution map of the packaging structure under different working conditions, and observe the stress distribution map to identify the parts where the stress value is significantly higher than the surrounding area. Focus on the potential stress concentration areas such as the connection between the chip and the substrate and the solder ball position. The stress distribution map uses different colors to represent the magnitude of the stress. The darker the color, the greater the stress.After identifying the stress concentration area, the identified stress concentration area is locally enlarged to observe the stress distribution in more detail, and the stress gradient in the stress concentration area is analyzed, that is, the rate of change of the stress value in space. The high stress gradient area indicates local deformation or damage of the material, and the stress data of the stress concentration area is extracted, including the maximum stress value, the average stress value and the cyclic stress amplitude. The extracted maximum stress value is compared with the yield strength of the material. If the maximum stress value exceeds the yield strength of the material, it indicates that there is a risk of plastic deformation or fracture in the area. For temperature cycles and physical vibration cycles, the cyclic stress amplitude of the stress concentration area is analyzed, and the cyclic stress amplitude is compared with the fatigue limit of the material. If the cyclic stress amplitude exceeds the fatigue limit of the material, This indicates that there is a risk of fatigue failure in this area, and targeted design optimization suggestions can be made, including adjusting the geometric shapes of the chip and substrate, selecting more suitable materials, optimizing the position and size of the solder balls, etc., focusing on measures to reduce stress concentration and improve structural stability, analyzing the deformation distribution of the package structure, identifying the parts with large deformation, and evaluating the impact of deformation on the electrical connection and mechanical stability of the package structure. Deformation includes chip warping and substrate bending. Use the post-processing function of the finite element analysis software to output the deformation distribution map of the package structure under different working conditions (temperature cycle, physical vibration, mechanical shock), observe the deformation distribution map, and identify the parts with large deformation. The deformation distribution map uses different colors or heights to represent the size of the deformation. The darker the color or The higher the height, the greater the deformation. The deformation distribution of the chip area is analyzed, and attention is paid to the displacement difference between the center and the edge of the chip. Chip warping is manifested as the chip center bending upward or downward, resulting in an uneven chip surface. The maximum warping of the chip is extracted, and the maximum warping is expressed as the displacement value of the chip center. At the same time, the deformation distribution of the substrate area is observed, and attention is paid to the overall bending degree of the substrate. Substrate bending is manifested as the center of the substrate bending upward or downward, or the edge of the substrate warping. The maximum bending of the substrate is extracted, and the maximum bending is expressed as the displacement value of the center or edge of the substrate. The impact of chip warping on electrical connections is analyzed, including the reliability of solder ball connection and the risk of electrical short circuit or open circuit. Chip warping can easily lead to increased connection stress between the solder ball and the substrate, especially the solder ball at the edge of the chip. Position, analyze the stress distribution of the solder balls, and determine whether there is a risk of solder ball breakage or poor contact due to warping. If the solder ball stress exceeds the yield strength or fatigue limit of the material, it will cause electrical connection failure. Chip warping can easily lead to a reduction in the distance between adjacent solder balls, increasing the risk of electrical short circuits. At the same time, warping may also lead to poor contact between the solder balls and the substrate, increasing the risk of electrical short circuits. Evaluate the relationship between the amount of warping and the spacing between solder balls to determine whether there are potential electrical problems; and analyze the impact of substrate bending on electrical connections, including contact problems between substrate and chip and the reliability of solder balls. Substrate bending can easily lead to uneven contact between chip and substrate, affecting the reliability of electrical connections. Analyze the impact of substrate bending on the contact pressure between chip and substrate.Determine whether there is a risk of poor contact. If the contact pressure between the chip and the substrate is unevenly distributed due to substrate bending, it will cause local electrical connection failure. Substrate bending can easily cause the solder balls to bear additional shear stress, affecting the reliability of the solder balls. Analyze the stress distribution of the solder balls to determine whether there is a risk of solder ball fracture or fatigue failure due to substrate bending. If the shear stress of the solder balls exceeds the yield strength or fatigue limit of the material, it will cause electrical connection failure. Analyze the impact of chip warping on mechanical stability, including the mechanical stability of the packaging structure and the fatigue life of the material. Chip warping can easily lead to a decrease in the overall mechanical stability of the packaging structure, especially when subjected to external loads (vibration, impact). Analyze the impact of chip warping on the overall stiffness of the packaging structure. Determine whether there is a risk of structural instability. If the chip warping causes a significant reduction in the rigidity of the packaging structure, it will deform more significantly under external loads, further affecting the reliability of the package. Chip warping can easily cause the material to be subjected to periodic stress, affecting the fatigue life of the material. Use the SN curve to evaluate the fatigue life of the material under the action of warping stress to determine whether there is a risk of fatigue failure. If the warping stress exceeds the fatigue limit of the material, it will cause fatigue fracture of the material during long-term use. Analyze the impact of substrate bending on mechanical stability, including the overall stability of the packaging structure and the fatigue life of the material. Substrate bending can easily lead to a decrease in the overall stability of the packaging structure, especially when subjected to external loads (such as vibration and impact). Analyze the impact of substrate bending on the package. The influence of the overall stiffness of the package structure can be used to determine whether there is a risk of structural instability. If the bending of the substrate significantly reduces the stiffness of the package structure, it will cause greater deformation under the action of external loads, further affecting the reliability of the package. The bending of the substrate can easily cause the material to bear periodic stress, affecting the fatigue life of the material. The SN curve is used to evaluate the fatigue life of the material under bending stress to determine whether there is a risk of fatigue failure. If the bending stress exceeds the fatigue limit of the material, it will cause fatigue fracture of the material during long-term use. According to the stress concentration area and the part with large deformation, the failure risk of the package structure under temperature cycle, physical vibration and mechanical shock conditions is evaluated. Among them, the failure modes of failure risk include solder ball fracture or fatigue failure, chip and Poor contact between substrates, substrate cracking or delamination, and electrical short circuit or open circuit caused by chip warping, and then use the SN curve to evaluate the fatigue life of solder balls and packaging structures. Combined with stress levels and deformation conditions, the reliable working time of the packaging structure is predicted. The assessment of failure risks includes solder ball breakage or fatigue failure, poor contact between chips and substrates, substrate cracking or delamination, and electrical short circuit or open circuit caused by chip warping. For solder ball breakage or fatigue failure, the stress distribution diagram is used to identify the stress concentration at the solder ball position, analyze the maximum stress value of the solder ball, and determine whether it exceeds the yield strength or fatigue limit of the solder ball material. The SN curve (fatigue life curve) is used to evaluate the fatigue life of the solder ball under cyclic stress.Combine stress level and cycle number to predict the fatigue failure time of solder balls; for poor contact between chip and substrate, analyze the deformation between chip and substrate to identify whether there is a risk of poor contact, focus on contact problems caused by chip warping and substrate bending, use finite element analysis software to calculate the contact pressure distribution between chip and substrate, determine whether the contact pressure is uniform, and whether there is a risk of poor contact due to local low contact pressure; for substrate cracking or delamination, analyze the stress distribution of substrate to identify whether there is an area with excessive stress, focus on stress concentration at the edge of substrate and solder ball position, compare the maximum stress value of substrate with the fracture strength of material to determine whether there is a risk of substrate cracking or delamination; for electrical short circuit or open circuit caused by chip warping, Analyze the chip warping to identify whether the distance between adjacent solder balls is reduced, increasing the risk of electrical short circuits. At the same time, analyze whether the chip warping leads to poor contact between the solder balls and the substrate, increasing the risk of electrical disconnection. Use finite element analysis software to calculate the electric field distribution between the solder balls to determine whether there is a risk of electrical short circuits caused by excessive electric fields. Use the SN curve to evaluate the fatigue life of the solder balls and packaging structure under cyclic stress. Combine the stress level and number of cycles to predict the fatigue failure time of the solder balls and packaging structure. Combine the stress level and deformation in the stress concentration area to evaluate the reliability of the packaging structure, focusing on the stress and deformation at the solder ball position and the contact between the chip and the substrate. Based on the fatigue life evaluation results, predict the reliable working time of the packaging structure.

[0071] The calculation expression of fatigue failure time is:

[0072] ;

[0073] In the formula, is the fatigue failure time, is the number of different stress levels, For the stress level, For the stress level The number of cycles below, is a material constant, related to the fatigue limit of the material, The fatigue index of the material describes the effect of stress level on fatigue life, usually between 2 and 10. is the fatigue life index, which describes the effect of the number of cycles on fatigue life. Usually between 3 and 10, between 100 and 1000 MPa, the specific value depends on the fatigue limit of the material, the higher The value indicates that the material has a higher fatigue limit and a longer fatigue life;

[0074] The calculation expression of the reliable working time of the packaging structure is:

[0075] ;

[0076] In the formula, For reliable working time of the package structure, For the strain level, Usually between 0.001 and 0.01;

[0077] Step 3: Based on the results of the thermal-mechanical coupling analysis, the packaging structure is optimized, including adjusting the geometry of the chip and substrate, material selection, thermal management optimization, and contact stability optimization to reduce stress concentration and deformation. The goal is to improve the thermal management effect and optimize the stress distribution to make the contact between the chip and the substrate more stable.

[0078] Step 4: After optimizing the design, the optimized packaging structure is analyzed for thermal-mechanical coupling effects again to verify whether the optimization effect meets the design requirements. If the optimization effect is not satisfactory, return to step 3 to continue adjusting the design parameters until the requirements are met.

[0079] Step 5: Prototype manufacturing and testing are carried out based on the optimized design parameters that meet the design requirements to verify the accuracy of the simulation results. The testing process includes temperature cycle testing, mechanical shock testing, and reliability testing to verify its performance in actual applications.

[0080] Step 6. If the prototype is manufactured and tested, the optimized design parameters are applied to mass production, and the flip-chip FC packaging technology is applied to actual products. Otherwise, return to step 2 to continue the thermal-mechanical coupling effect analysis until the flip-chip packaging requirements are met.

[0081] Embodiment 2, as Figure 1 , Figure 2 As shown, based on Example 1, the present invention provides a technical solution: preferably, step three specifically includes:

[0082] Combined with the stress concentration areas and deformation analysis results identified by the thermal-mechanical coupling analysis results, the optimization goals of the packaging structure optimization design are determined, including improving the thermal management effect, optimizing the stress distribution and ensuring the stable contact between the chip and the substrate, improving the thermal management effect, ensuring the stable operation of the packaging structure in a high temperature environment, optimizing the stress distribution, reducing stress concentration and deformation, extending the service life of the packaging structure, ensuring the stable contact between the chip and the substrate, and improving the reliability and electrical performance of the package. For the determined optimization goals, the corresponding optimization design measures are matched, including adjusting the geometry of the chip and substrate, material selection, thermal management optimization, and contact stability optimization. Among them, the thickness, size and shape of the chip and substrate are optimized to reduce stress concentration and deformation, increase the thickness of the substrate or adjust the edge design of the chip to reduce warping, optimize the layout and size of the solder balls, reduce stress concentration, increase the solder ball spacing or adjust the solder ball diameter, and ensure that the solder balls expand and contract during thermal expansion. The process can evenly withstand stress; select a substrate material with a thermal expansion coefficient (CTE) that better matches the chip to reduce stress caused by thermal expansion differences. Copper or aluminum silicon carbide and other materials can be used as the substrate body. Select high thermal conductivity materials to improve thermal management effects and reduce chip operating temperatures; add a heat sink or microchannel cooling technology to the packaging structure to improve heat dissipation efficiency, optimize the heat dissipation design of the substrate to ensure that heat can be quickly conducted, and reduce the impact of ambient temperature on the packaging structure by optimizing the heat dissipation path of the packaging structure; metallize the chip and substrate, and strictly clean the surface to ensure good contact. Use a high-precision patch process to ensure that the chip is in close contact with the substrate. Before the chip and substrate are aligned, preheat the chip to the standby temperature (220°C) to reduce thermal expansion differences. Use vacuum adsorption technology to ensure that the substrate remains flat during the patch process. Use the optimized design parameters to re-perform finite element analysis and update the finite element simulation model.

[0083] Step 4 specifically includes:

[0084] Combined with the updated finite element simulation model, the optimized packaging structure is analyzed again for thermal-mechanical coupling effects, and simulation analysis of thermal-mechanical coupling analysis and mechanical stress analysis is performed. According to the simulation analysis results, the stress distribution, temperature distribution and deformation of the optimized packaging structure under thermal and mechanical loads are clarified, and the results of the finite element analysis, including stress diagrams, temperature diagrams and deformation diagrams, are extracted. The results before and after optimization are compared to evaluate the effects of the optimization measures on thermal management effects, stress distribution and contact stability. According to the design requirements of the maximum stress limit, maximum temperature limit and maximum deformation limit, it is judged whether the optimization effect meets the requirements. If the optimization effect is ideal, that is, the stress concentration is reduced, the temperature distribution is more uniform, the deformation is reduced, and the contact stability is improved, then it is judged that the optimization effect meets the design requirements and the next step is entered. If the optimization effect is not ideal, that is, the stress is still concentrated, the temperature distribution is uneven, the deformation is too large or the contact stability is insufficient, then return to step three to continue adjusting the design parameters, implement design parameter adjustment measures including geometry adjustment, material selection optimization, thermal management improvement and contact stability improvement, and use the updated design parameters to re-perform finite element analysis to verify the optimization effect until the optimized packaging structure meets the design requirements;

[0085] Step 5 specifically includes:

[0086] According to the results of finite element simulation analysis, the optimized design parameters that meet the design requirements are determined, including geometry, material selection, thermal management strategy, contact stability optimization measures, etc., and according to the optimized design parameters, a detailed prototype manufacturing plan is formulated, including manufacturing process, processing equipment, material procurement, quality control, etc. Combined with the formulated prototype manufacturing plan, a test plan including temperature cycle test, mechanical shock test and reliability test is formulated, and the test purpose, test conditions, test equipment and test standards are clarified. Among them, for the temperature cycle test, its test purpose is to evaluate the tolerance of the packaging structure under extreme high and low temperature rapid conversion, and simulate the temperature change environment that the product may encounter in actual use. The test conditions are high and low temperature range between -40℃ and +125℃, temperature change rate of 10℃ / min, number of cycles of 15 times or more, and equilibrium time for each temperature point is maintained for 30 minutes. The test equipment is a high and low temperature alternating tester. The test standard is to check the appearance of the packaging structure to see if there are cracks, deformation or material peeling, test the electrical performance, ensure that the function is normal after the temperature cycle, analyze the data, and evaluate the thermal stability of the material and structure; for the mechanical shock test, the purpose of the test is to simulate the shock that the product may encounter during transportation and use, and evaluate its shock resistance. The test conditions are a peak acceleration of 100g, a pulse duration of 11ms, and a half-sine wave, trapezoidal wave or triangular wave. The number of shocks is 3 times for each surface, a total of 18 times. The test equipment is a professional mechanical shock test equipment to ensure that the equipment can provide accurate shock waveforms and accelerations. The test standard is to check the appearance of the packaging structure to see if there are cracks, deformation or damage, test the electrical performance, ensure that the function is normal after the shock, analyze the data, and evaluate the integrity and reliability of the structure;For reliability testing, the purpose of the test is to comprehensively evaluate the long-term stability of the packaging structure under various environmental conditions. The test conditions are high-temperature storage test and high-temperature and high-humidity bias test. The high-temperature storage test is to store for a certain period of time under high-temperature environment (85°C), and the high-temperature and high-humidity bias test is to perform bias test under high-temperature and high-humidity conditions (85°C / 85% humidity). The test standard is to analyze the data, evaluate the reliability of the packaging structure in long-term use, ensure that the product can still work normally under extreme conditions, organize the result data of temperature cycle test, mechanical shock test and reliability test, analyze the test results, compare the performance of the prototype in actual test with the consistency of simulation results, evaluate the performance of the prototype in actual application, including thermal management performance, mechanical strength, shock resistance and long-term reliability, and judge the accuracy of the simulation results based on the test results. If the test results are consistent with the simulation results, it means that the simulation model is accurate and reliable, and can be used to guide subsequent design and optimization. If there is a difference between the test results and the simulation results, analyze the reasons for the difference, which include simplification of the simulation model, differences in test conditions or errors in the manufacturing process, and then correct and improve the simulation model;

[0087] Step 6 specifically includes:

[0088] Analyze the test results of prototype manufacturing. If the temperature cycle test, mechanical shock test and reliability test meet the required standards, the test is considered to have passed and the design requirements are met, and then enter the mass production stage. The process of implementing mass production is: according to market demand and order volume, formulate a detailed production plan, determine the production batch, production schedule and resource allocation, and then carry out the full production cycle of production preparation, production process control, product inspection and packaging, product delivery and after-sales service. The temperature cycle test requirement standard is that the packaging structure has no cracks, deformation or material peeling under extreme high and low temperature rapid conversion, and the electrical performance remains normal after the temperature cycle. Data analysis shows that the material and structure have good thermal stability; the mechanical shock test requirement standard is that the packaging structure has no cracks, deformation or damage after impact, and the electrical performance It remains normal after the impact, and data analysis shows that the structure has good integrity and reliability. The reliability test requirement standard is that the packaging structure has no obvious degradation after high-temperature storage and high-temperature and high-humidity bias testing, and the electrical performance remains normal after long-term testing. Data analysis shows that the packaging structure has good long-term stability under extreme conditions. If the prototype manufacturing and test results do not meet the requirement standards, the test is considered to have failed, and it is necessary to return to the optimization design step and continue the optimization process of thermal-mechanical coupling effect analysis, design optimization, and re-manufacturing and testing the prototype. If the new prototype still does not meet the design requirements, continue to return to step two for thermal-mechanical coupling effect analysis until the flip chip packaging requirements are met. Through continuous cycles and iterations, the design of the packaging structure is gradually optimized to ensure its stability and reliability in practical applications.

[0089] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A flip chip FC packaging technology method, characterized in that: The following steps are involved: Step 1: Collect the material physical parameters of flip chip packaging and establish a thermal-mechanical coupling model; Step 2: Use the established thermal-mechanical coupling model to perform thermal-mechanical coupling simulation and mechanical stress analysis on the packaging structure to identify stress concentration areas and locations with large deformation; Step 3: Based on the results of thermal-mechanical coupling analysis, optimize the packaging structure; Step 4: After optimizing the design, the optimized packaging structure is analyzed for thermal-mechanical coupling effects again to verify whether the optimization effect meets the design requirements. If the optimization effect is not satisfactory, return to step 3 to continue adjusting the design parameters until the requirements are met. Step 5: Combine the optimized design parameters that meet the design requirements, carry out prototype manufacturing and testing to verify the accuracy of the simulation results; Step 6. If the prototype is manufactured and tested, the optimized design parameters are applied to mass production, and the flip-chip FC packaging technology is applied to actual products. Otherwise, return to step 2 to continue the thermal-mechanical coupling effect analysis until the flip-chip packaging requirements are met.

2. A flip chip FC packaging technology method according to claim 1, characterized in that: The step 1 specifically includes: Go through technical specifications, data sheets, and industry standards in the field of electronic packaging to obtain the physical parameters of flip chip packaging materials, including the thermal expansion coefficient, elastic modulus, and thermal conductivity of chip materials, substrate materials, and solder ball materials; Use 3D modeling software to build a geometric model of flip chip packaging. The geometric model is a complete packaging structure including chip, bumps and substrate. Import the collected material physical parameters and geometric model into finite element analysis software, mesh the model and create a finite element model. In the finite element model, the collected material physical parameters are combined to assign corresponding material properties to the chip, bumps and substrate respectively; Define the thermal boundary conditions of the package structure, including heat source, heat dissipation path and ambient temperature, and use the heat conduction equation to simulate the thermal distribution of the package structure under different temperature conditions, calculate the temperature field distribution, and then define the mechanical boundary conditions of the package structure, including fixed constraints and loads, and use the elastic mechanics equation to simulate the deformation and stress distribution of the package structure under thermal stress; In the finite element analysis software, the thermal model and the mechanical model are coupled to obtain a thermo-mechanical coupling model, and then a thermo-mechanical coupling analysis is performed to simulate the behavior of the packaging structure under thermo-mechanical loads, including temperature changes, thermal expansion, stress distribution, and deformation.

3. A flip chip FC packaging technology method according to claim 2, characterized in that: The step 2 specifically includes: In combination with the requirements of flip chip packaging, the working conditions of thermal-mechanical coupling simulation and mechanical stress analysis are defined, including temperature cycle conditions, physical vibration conditions, and mechanical shock conditions. In the finite element analysis software, simulation parameters are set according to the defined working conditions. The simulation parameters include temperature range, cycle period, vibration frequency, acceleration, shock acceleration, and shock duration. Combined with the established thermal-mechanical coupling model, the packaging structure is simulated for thermal-mechanical coupling. According to the temperature cycle conditions in actual applications, the temperature cycle curve in the simulation is set, and then the finite element method is used to solve the heat conduction equation and calculate the temperature distribution of the packaging structure under different working conditions, thereby outputting the temperature field distribution results, including the temperature changes of the chip, bumps and substrate; Combined with the established thermal-mechanical coupling model, the mechanical stress analysis of the packaging structure is carried out, and a fixed constraint is imposed on the bottom of the substrate to simulate the actual installation state of the packaging structure. The thermal-mechanical coupling simulation results are input into the mechanical model as loads, and the corresponding dynamic loads are applied to the physical vibration and mechanical impact conditions. Then, the finite element method is used to solve the elastic mechanics equations, and the stress and deformation of the packaging structure under thermal stress, vibration and impact loads are calculated, thereby outputting stress distribution diagrams and deformation diagrams; Through the simulation results, the stress concentration area is identified and the stress level in the stress concentration area is analyzed to determine whether the yield strength or fatigue limit of the material is exceeded. The stress concentration area includes the connection between the chip and the substrate and the solder ball position. Analyze the deformation distribution of the package structure, identify the parts with large deformation, and evaluate the impact of deformation on the electrical connection and mechanical stability of the package structure. Deformation includes chip warping and substrate bending. Based on the stress concentration areas and the parts with large deformation, the failure risk of the packaging structure under temperature cycle, physical vibration and mechanical shock conditions is evaluated. The failure modes of failure risk include solder ball breakage or fatigue failure, poor contact between the chip and the substrate, substrate cracking or delamination, and electrical short circuit or open circuit caused by chip warping. The SN curve is then used to evaluate the fatigue life of the solder balls and the packaging structure, and the reliable working time of the packaging structure is predicted based on the stress level and deformation.

4. A flip chip FC packaging technology method according to claim 3, characterized in that: The temperature cycle condition is defined as follows: the temperature range is -40°C to +125°C, and the cycle period is 1 hour per cycle, which is used to simulate the thermal expansion and contraction behavior of the packaging structure during the temperature cycle process; Definition of the physical vibration working condition: the vibration frequency is 10 Hz to 500 Hz, the acceleration is 10g, and it is used to simulate the dynamic response of the packaging structure under periodic vibration; The mechanical shock condition is defined as follows: the shock acceleration is 100g and the shock duration is 11ms, which is used to simulate the stress and deformation of the packaging structure under transient shock.

5. A flip chip FC packaging technology method according to claim 4, characterized in that: The process of identifying stress concentration areas is as follows: Use the post-processing function of the finite element analysis software to output the stress distribution diagram of the packaging structure under different working conditions, and observe the stress distribution diagram to identify the parts where the stress value is significantly higher than the surrounding area; After the stress concentration area is identified, the identified stress concentration area is locally magnified, the stress gradient of the stress concentration area is analyzed, and the stress data of the stress concentration area, including the maximum stress value, the average stress value and the cyclic stress amplitude, are extracted; Compare the extracted maximum stress value with the yield strength of the material. If the maximum stress value exceeds the yield strength of the material, it indicates that there is a risk of plastic deformation or fracture in the area. For temperature cycles and physical vibration cycles, analyze the cyclic stress amplitude in the stress concentration area and compare the cyclic stress amplitude with the fatigue limit of the material. If the cyclic stress amplitude exceeds the fatigue limit of the material, it indicates that there is a risk of fatigue failure in the area. The process of identifying the part with large deformation is as follows: Use the post-processing function of the finite element analysis software to output the deformation distribution diagram of the packaging structure under different working conditions, observe the deformation distribution diagram, and identify the parts with large deformation; Analyze the deformation distribution of the chip area, pay attention to the displacement difference between the center and edge of the chip, and extract the maximum warpage of the chip, which is expressed as the displacement value of the center of the chip. At the same time, observe the deformation distribution of the substrate area, pay attention to the overall bending degree of the substrate, and extract the maximum bending of the substrate, which is expressed as the displacement value of the center or edge of the substrate. Analyze the impact of chip warpage on electrical connections, including solder ball connection reliability and electrical short or open circuit risks, and analyze the impact of substrate bending on electrical connections, including substrate-chip contact issues and solder ball reliability; Analyze the impact of chip warping on mechanical stability, including the mechanical stability of the packaging structure and the fatigue life of the material; analyze the impact of substrate bending on mechanical stability, including the overall stability of the packaging structure and the fatigue life of the material.

6. A flip chip FC packaging technology method according to claim 5, characterized in that: The process of predicting the failure risk and the reliable working time of the packaging structure is as follows: Assessment of failure risks, including solder ball fracture or fatigue failure, poor contact between chip and substrate, substrate cracking or delamination, and electrical shorts or breaks caused by chip warping; Use the SN curve to evaluate the fatigue life of solder balls and packaging structures under cyclic stress, and combine the stress level and cycle number to predict the fatigue failure time of solder balls and packaging structures; The reliability of the packaging structure is evaluated by combining the stress level and deformation in the stress concentration area, focusing on the stress and deformation at the solder ball position and the contact between the chip and the substrate. The reliable working time of the packaging structure is predicted based on the fatigue life assessment results.

7. A flip chip FC packaging technology method according to claim 6, characterized in that: The step three specifically includes: Combined with the stress concentration areas identified by the thermal-mechanical coupling analysis results and the deformation analysis results, the optimization goals of the package structure optimization design are determined, including improving the thermal management effect, optimizing the stress distribution, and ensuring the stable contact between the chip and the substrate; Match the corresponding optimization design measures for the determined optimization goals, including adjusting the geometry of the chip and substrate, material selection, thermal management optimization, and contact stability optimization; Use the optimized design parameters to re-perform finite element analysis and update the finite element simulation model.

8. A flip chip FC packaging technology method according to claim 7, characterized in that: The step 4 specifically includes: Combined with the updated finite element simulation model, the thermal-mechanical coupling effect analysis is performed again on the optimized packaging structure, and simulation analysis of thermal-mechanical coupling analysis and mechanical stress analysis is performed; According to the simulation analysis results, the stress distribution, temperature distribution and deformation of the optimized packaging structure under thermal and mechanical loads are clearly defined; Extract the results of finite element analysis, including stress diagrams, temperature diagrams, and deformation diagrams, compare the results before and after optimization, evaluate the impact of optimization measures on thermal management effects, stress distribution, and contact stability, and determine whether the optimization effect meets the requirements based on the design requirements of maximum stress limit, maximum temperature limit, and maximum deformation limit; If the optimization effect is ideal, that is, stress concentration is reduced, temperature distribution is more uniform, deformation is reduced, and contact stability is improved, then the optimization effect is judged to meet the design requirements and proceed to the next step; If the optimization effect is not ideal, that is, the stress is still concentrated, the temperature distribution is uneven, the deformation is too large or the contact stability is insufficient, return to step three to continue adjusting the design parameters, and implement design parameter adjustment measures including geometry adjustment, material selection optimization, thermal management improvement and contact stability improvement. Use the updated design parameters to re-perform finite element analysis to verify the optimization effect until the optimized packaging structure meets the design requirements.

9. A flip chip FC packaging technology method according to claim 8, characterized in that: The step five specifically includes: According to the results of finite element simulation analysis, determine the optimized design parameters that meet the design requirements, and formulate a detailed prototype manufacturing plan based on the optimized design parameters; In conjunction with the established prototype manufacturing plan, develop a test plan including temperature cycle testing, mechanical shock testing, and reliability testing, and specify the test purpose, test conditions, test equipment, and test standards; Organize the result data of temperature cycle test, mechanical shock test and reliability test, analyze the test results, compare the performance of the prototype in the actual test with the consistency of the simulation results, and evaluate the performance of the prototype in actual application, including thermal management performance, mechanical strength, shock resistance and long-term reliability; Based on the test results, judge the accuracy of the simulation results. If the test results are consistent with the simulation results, it means that the simulation model is accurate. If there are differences between the test results and the simulation results, analyze the reasons for the differences and then correct and improve the simulation model.

10. A flip chip FC packaging technology method according to claim 9, characterized in that: The step six specifically includes: Analyze the test results of prototype manufacturing. If the temperature cycle test, mechanical shock test and reliability test meet the required standards, the test is considered to have passed and the design requirements are met, and then enter the mass production stage; If the prototype manufacturing and test results do not meet the required standards, the test is considered to have failed and it is necessary to return to the optimization design step to continue the optimization process of thermal-mechanical coupling effect analysis, design optimization, and re-manufacturing and testing the prototype. If the new prototype still does not meet the design requirements, continue to return to step 2 for thermal-mechanical coupling effect analysis until the flip chip packaging requirements are met. Through continuous cycles and iterations, the design of the packaging structure is gradually optimized.

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