GaN HEMT power device grid degradation detection device and method

By designing a detection device including a pulse excitation source and a sampling circuit, it can effectively detect the degree of gate degradation of the GaN HEMT power device, solve the problems of complex and cost in the prior art, and achieve fast, simple and low-cost detection effects.

CN120103101AActive Publication Date: 2025-06-06XIDIAN UNIV
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Patent Information

Application Number
CN202510582853.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-07
Publication Date
2025-06-06
Estimated Expiration
2045-05-07

AI Technical Summary

Technical Problem

The prior art is difficult to effectively detect gate degradation of GaN HEMT power devices, and it is complex or expensive to operate.

Method used

A detection device including a pulse excitation source, a passive circuit, a sampling circuit, a controller and a driving circuit is designed. The pulse excitation voltage signal is applied to the gate and source of the GaN HEMT power device through a pulse excitation voltage signal, and the voltage signal VGS between the gate and the source is collected and analyzed to determine the degree of degradation of the gate.

Benefits of technology

Fast, simple and low-cost detection of the degree of gate degradation of GaN HEMT power devices is achieved, avoiding the complex operation and high costs of traditional methods.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a GaN HEMT power device grid degradation detection device and method, and belongs to the technical field of performance detection. The GaN HEMT power device grid degradation detection device comprises a pulse excitation source, a passive circuit, a sampling circuit, a controller and a driving circuit; the pulse excitation source is connected with the GaN HEMT power device to be tested through the passive circuit, the output end of the sampling circuit is connected with the input end of the controller, the output end of the controller is connected with the control end of the pulse excitation source through the driving circuit, and the controller collects a voltage signal VGS between a source electrode and a grid electrode in the GaN HEMT power device to be tested through the sampling circuit. The degradation degree of the grid electrode in the GaN HEMT power device to be detected is judged according to the voltage signal VGS, and the device and the method can detect the degradation degree of the grid electrode of the GaN HEMT power device and have the advantages of being easy to operate and low in cost.
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Description

Technical Field

[0001] The present invention belongs to the technical field of performance detection, and relates to a device and method for detecting gate degradation of a GaN HEMT power device. Background Art

[0002] As the core device of the new energy industry, the reliability of power electronic equipment has become a key factor in the development of new energy. Power semiconductor devices are key components of power electronic equipment, and traditional silicon-based power semiconductor devices are difficult to meet the current diverse application needs. In contrast, GaN HEMT (High Electron Mobility Transistors) power devices have higher electron mobility and wider bandgap width, showing excellent performance in high-frequency, high-temperature, and low-power application scenarios.

[0003] However, the gate of GaN HEMT power devices mostly adopts a metal-semiconductor Schottky contact structure, which is significantly different from the metal-oxide-semiconductor insulated gate structure of traditional SiMOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). This structural characteristic makes its voltage resistance relatively limited, usually only able to withstand a voltage range of -10V to +7V. In high-frequency switching working scenarios, the parasitic inductance of the gate loop L G Miller capacitance C GD The coupling effect will cause the driving voltage to overshoot or oscillate, and the overshoot voltage may exceed the safe operating voltage of the gate. Under such electrical stress for a long time, the high electric field will accelerate the accumulation of gate interface state defects until the p-GaN (p-type gallium nitride) gate and passivation interface are destroyed, thereby forming a percolation path. The gate leakage current after gate breakdown exhibits a resistance-like characteristic, which is manifested as the gate-source equivalent resistance gradually degenerating from the normal megohm level to the kilohm or even hundred-ohm level.

[0004] At present, although there are several methods for detecting gate degradation, such as electrical parameter detection based on monitoring threshold voltage or gate leakage current, optical detection based on electroluminescence imaging, etc., these methods generally have the problem of complex operation or high cost. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a GaN HEMT power device gate degradation detection device and method, which can detect the gate degradation degree of the GaN HEMT power device and has the characteristics of simple operation and low cost.

[0006] To achieve the above-mentioned object, the present invention discloses a GaN HEMT power device gate degradation detection device, including a pulse excitation source, a passive circuit, a sampling circuit, a controller and a driving circuit; The pulse excitation source is connected to the GaN HEMT power device to be tested via a passive circuit, the output end of the sampling circuit is connected to the input end of the controller, the output end of the controller is connected to the control end of the pulse excitation source via a driving circuit, and the controller collects the voltage signal between the source and the gate of the GaN HEMT power device to be tested through the sampling circuit. V GS , and according to the voltage signal V GS Determine the degree of gate degradation in the GaN HEMT power device under test.

[0007] The further improvement of the gate degradation detection method of the GaN HEMT power device described in the present invention is: Furthermore, the passive circuit includes a first resistor, a diode, a second resistor, a third resistor, a first capacitor and a second capacitor. The pulse excitation source, the first resistor, the diode and the second resistor are connected in series in sequence to form a series circuit. The series branch formed by the third resistor and the first capacitor in series is connected in parallel with the first resistor, the second capacitor is connected in parallel with the second resistor, and the series branch formed by the diode and the second resistor in series is connected in parallel with the GaN HEMT power device to be tested.

[0008] Furthermore, it also includes an auxiliary power supply for providing electric energy to the sampling circuit, the controller and the driving circuit.

[0009] The present invention discloses a method for detecting gate degradation of a GaN HEMT power device, comprising the following steps: Controller output control signal V 0 to the driving circuit, and the driving circuit V 0 Generate pulse excitation voltage signal V PULSE , the pulse excitation voltage signal V PULSE The voltage is applied to the gate and source of the GaN HEMT power device to be tested through a passive circuit, and the voltage signal between the gate and source of the GaN HEMT power device to be tested is obtained through a sampling circuit. V GS , calculate the response voltage of the GaN HEMT power device under test when the gate is not degraded V GS-CALC , and then compare the voltage signal V GS With the response voltage VGS-CALC , judging whether the gate of the GaN HEMT power device to be tested is degraded according to the comparison result; When the gate of the GaN HEMT power device to be tested is degraded, the voltage signal V GS The voltage signal is obtained by V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX ; According to the voltage signal V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX Determining the degree of gate degradation in GaN HEMT power devices.

[0010] The further improvement of the gate degradation detection method of the GaN HEMT power device described in the present invention is: Furthermore, the response voltage of the GaN HEMT power device to be tested when the gate is not degraded is V GS-CALC for:

[0011] in, V D is the voltage drop of the diode, s is a complex variable, R 1 is the resistance value of the first resistor, R 2 is the resistance value of the second resistor, R 3 is the resistance value of the third resistor, C 1 is the capacitance value of the first capacitor, C 2 is the capacitance of the second capacitor, C GS is the capacitance value of the capacitor between the gate and the source in the GaN HEMT power device to be tested, R GS is the gate-source equivalent resistance of the GaN HEMT power device to be tested.

[0012] Furthermore, when the voltage signal V GS With the response voltage V GS-CALCWhen the deviation is greater than a preset deviation threshold, it is considered that the gate of the GaN HEMT power device to be tested is degraded.

[0013] Further, the voltage signal V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX The process of determining the degree of gate degradation in GaN HEMT power devices is: According to the voltage signal V GS The measured voltage platform value V GS-H Determine the degradation degree of gate-source equivalent resistance in the GaN HEMT power device under test; According to the voltage signal V GS The measured voltage peak V GS-MAX Determine the degree of degradation of the capacitance between the gate and source in the GaN HEMT power device under test.

[0014] Furthermore, the voltage signal V GS The measured voltage platform value V GS-H The lower it is, the more serious the degradation of the gate-source equivalent resistance in the GaN HEMT power device to be tested is.

[0015] Furthermore, the voltage signal V GS The measured voltage peak V GS-MAX The higher the value, the more serious the degradation of the capacitance between the gate and the source in the GaN HEMT power device under test.

[0016] Furthermore, it also includes an auxiliary power supply, which provides power to the sampling circuit, the controller and the driving circuit.

[0017] The present invention has the following beneficial effects: During the specific operation of the GaN HEMT power device gate degradation detection device and method of the present invention, the controller outputs a control signal V 0 to the driving circuit, and the driving circuit V 0 Generate pulse excitation voltage signal V PULSE , and the pulse excitation voltage signal V PULSEApplied to the gate and source of the GaN HEMT power device to be tested to obtain a response signal, that is, a voltage signal between the gate and source of the GaN HEMT power device to be tested V GS , according to the voltage signal between the gate and source of the GaN HEMT power device to be tested V GS , determine whether the gate of the GaN HEMT power device to be tested is degraded and the degree of degradation, the operation is simple, the practicability is strong, and the use of electrical parameter detection methods based on monitoring threshold voltage or gate leakage current and optical detection methods based on electroluminescence imaging are avoided, and the cost is low. At the same time, it should be noted that the present invention sends a control signal from the controller V 0 The process from generating a pulse excitation voltage to acquiring a response voltage signal only takes a few hundred μs, and the gate degradation detection speed is relatively fast. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings: Figure 1 is a circuit diagram of the detection circuit in the present invention; Figure 2 is a schematic diagram of a control circuit in the present invention; Figure 3a For control signal V 0 Waveform diagram of Figure 3b is the pulse excitation voltage signal V PULSE Waveform diagram of Figure 3c For voltage signal V GS Waveform diagram of Figure 3d The sampling signal V GS-Sampling Waveform diagram of Figure 4 The response voltage V of GaN HEMT power device under different gate degradation levels GS-OUT Schematic diagram of .

[0019] Among them, 1 is a controller, 2 is a driving circuit, 3 is an auxiliary power supply, 4 is a sampling circuit, W is a pulse excitation source, G1 is a first resistor, S is a diode, G2 is a second resistor, G3 is a third resistor, D1 is a first capacitor, and D2 is a second capacitor. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0022] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0023] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0024] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0025] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0027] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0028] Embodiment 1 refer to Figure 1 and Figure 2 The gate degradation detection device of the GaN HEMT power device of the present invention comprises a pulse excitation source W, a passive circuit, a sampling circuit 4, a controller 1, an auxiliary power supply 3 and a driving circuit 2; the pulse excitation source W is connected to the GaN HEMT power device L to be tested via the passive circuit, and the sampling circuit 4 is used to collect the voltage signal between the source and the gate of the GaN HEMT power device L to be tested. V GS The output end of the sampling circuit 4 is connected to the input end of the controller 1, and the output end of the controller 1 is connected to the control end of the pulse excitation source W through the driving circuit 2. The controller collects the voltage signal between the source and the gate of the GaN HEMT power device L to be tested according to the sampling circuit 4. V GS Determine the degree of degradation of the gate of GaN HEMT power devices.

[0029] Embodiment 2 refer to Figure 1 and Figure 2The gate degradation detection device of the GaN HEMT power device of the present invention comprises a pulse excitation source W, a passive circuit, a sampling circuit 4, a controller 1, an auxiliary power supply 3 and a driving circuit 2, wherein the passive circuit comprises a first resistor G1, a diode S, a second resistor G2, a third resistor G3, a first capacitor D1 and a second capacitor D2; The pulse excitation source W, the first resistor G1, the diode S and the second resistor G2 are connected in series in sequence to form a series circuit, the series branch formed by the third resistor G3 and the first capacitor D1 in series is connected in parallel with the first resistor G1, the second capacitor D2 and the second resistor G2 are connected in parallel, and the series branch formed by the diode S and the second resistor G2 in series is connected in parallel with the GaN HEMT power device L to be tested.

[0030] The sampling circuit 4 is used to collect the voltage signal between the source and the gate of the GaN HEMT power device L to be tested. V GS The output end of the sampling circuit 4 is connected to the input end of the controller 1, and the output end of the controller 1 is connected to the control end of the pulse excitation source W through the driving circuit 2.

[0031] In this embodiment, an auxiliary power supply 3 for providing electric energy is also included, wherein the auxiliary power supply 3 is connected to the power supply interface of the driving circuit 2, the power supply interface of the sampling circuit 4 and the power supply interface of the controller 1, and is used to provide a 12V voltage for the driving circuit 2, a ±5V voltage for the sampling circuit 4, and a 3.3V voltage for the controller 1. Figure 3a As shown, the control signal V 0 The amplitude is 3.3V; Figure 3b As shown, the pulse excitation voltage signal V PULSE The amplitude is 12V.

[0032] When working, controller 1 generates a control signal V 0 , and the control signal V 0 Output to the driving circuit 2, the driving circuit 2 according to the control signal V 0 Generate pulse excitation voltage signal V PULSE , and the pulse excitation voltage signal V PULSE The sampling circuit 4 collects the voltage signal between the source and the gate of the GaN HEMT power device L to be tested. V GS , and then the voltage signal V GSConditioning is performed to obtain a sampling signal within the voltage range of 0-3.3V V GS-Sampling , and then the sampled signal V GS-Sampling The control signal is output to the controller 1. When the controller 1 does not generate a control signal, the voltage between the source and the gate of the GaN HEMT power device L to be tested is zero.

[0033] Embodiment 3 refer to Figure 1 and Figure 2 This embodiment discloses a method for detecting gate degradation of a GaN HEMT power device. The method for detecting gate degradation of a GaN HEMT power device is implemented based on the GaN HEMT power device gate degradation detection system. The GaN HEMT power device gate degradation detection system includes a pulse excitation source W, a passive circuit, a sampling circuit 4, a controller 1, an auxiliary power supply 3 and a driving circuit 2. The passive circuit includes a first resistor G1, a diode S, a second resistor G2, a third resistor G3, a first capacitor D1 and a second capacitor D2. The specific connection relationship is as shown in the second embodiment.

[0034] Specifically, the GaN HEMT power device gate degradation detection method comprises the following steps: 1) Controller 1 outputs control signal V 0 To the driving circuit 2, the driving circuit 2 according to the control signal V 0 Generate pulse excitation voltage signal V PULSE , is applied to the gate and source of the GaN HEMT power device L to be tested through the passive circuit, and the voltage signal between the gate and source of the GaN HEMT power device L to be tested is obtained through the sampling circuit 4 V GS , calculate the response voltage when the gate L of the GaN HEMT power device under test is not degraded V GS-CALC , compared with the voltage signal V GS With the response voltage V GS-CALC , judging whether the gate of the GaN HEMT power device L to be tested is degraded according to the comparison result; 2) When the gate of the GaN HEMT power device L to be tested has not been degraded, the process ends; 3) When the gate of the GaN HEMT power device L to be tested is degraded, the voltage signal between the gate and the source of the GaN HEMT power device L to be tested is detected. V GSThe voltage signal is obtained by V GS The measured voltage platform value V GS-H and peak V GS-MAX ,like Figure 3c As shown, the voltage signal V GS Conditioning is performed to obtain a sampling signal within the voltage range of 0-3.3V V GS-Sampling , Figure 3d As shown, by conditioning, the voltage signal is simply changed V GS The amplitude of the sampling signal is not changed. V GS-Sampling With voltage signal V GS Related.

[0035] According to the voltage signal V GS The measured voltage platform value V GS-H Determine the degradation degree of the gate-source equivalent resistance in the GaN HEMT power device L to be tested; According to the voltage signal V GS The measured voltage peak V GS-MAX Determine the degree of degradation of the capacitance between the gate and the source in the GaN HEMT power device L to be tested.

[0036] It should be noted that, in this embodiment, when the gate of the GaN HEMT power device L is not degraded, the voltage between the gate and the source of the GaN HEMT power device L to be tested is V GS-CALC for:

[0037] in, V D is the voltage drop of diode S, s is a complex variable representing the frequency in the Laplace transform domain, R 1 is the resistance value of the first resistor G1, R 2 is the resistance value of the second resistor G2, R 3 is the resistance value of the third resistor G3, C 1 is the capacitance value of the first capacitor D1, C 2 is the capacitance of the second capacitor D2,C GS is the capacitance value of the capacitor between the gate and the source in the GaN HEMT power device L to be tested, R GS is the resistance value of the gate-source equivalent resistance of the GaN HEMT power device L to be tested.

[0038] In addition, it should be noted that in step 1), when the voltage signal V GS With the response voltage V GS-CALC If the deviation is greater than the preset deviation threshold, it indicates that the gate of the GaN HEMT power device L to be tested is degraded, wherein the larger the deviation is, the more serious the gate degradation is.

[0039] In this embodiment, in step 3), refer to Figure 4 , as the gate-source equivalent resistance of the GaN HEMT power device L under test increases R GS The smaller the voltage signal V GS The measured voltage platform value V GS-H The lower the voltage signal V GS The measured voltage platform value V GS-H The lower the voltage signal, the more serious the degradation of the gate-source equivalent resistance in the GaN HEMT power device L to be tested. V GS The measured voltage peak V GS-MAX The higher the voltage signal V GS The more serious the deformation is, the more serious the degradation of the capacitance between the gate and the source in the GaN HEMT power device L to be tested is.

[0040] It should be noted that the present invention has the following characteristics: The present invention utilizes a passive circuit to convert changes in gate equivalent resistance and inter-electrode parasitic capacitance into characteristic differences in a voltage waveform. After the controller 1 collects a response voltage signal, it can perform calculations and determine the degree of gate degradation. The process from the controller 1 sending a control signal to generate a pulse excitation voltage to collecting a response voltage signal only takes a few hundred μs, and the gate degradation detection speed is relatively fast.

[0041] Secondly, the present invention does not need to rely on high-precision parameter analyzers or optical equipment, has low cost, and is relatively simple to operate.

[0042] Finally, the present invention establishes a mapping relationship between voltage waveform parameters and degradation degree based on theoretical formulas, supports full life cycle status determination from early mild degradation to severe failure, and provides direct data support for device remaining life prediction.

[0043] Those skilled in the art will readily appreciate other embodiments of the present invention after considering the specification and disclosure of the invention. This application is intended to cover any variations, uses or adaptations of the present invention that follow the general principles of the present invention and include common knowledge or customary techniques in the art that are not disclosed by the present invention. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present invention are indicated by the following claims.

[0044] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

[0045] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent structural change made to the above embodiment based on the technical essence of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A GaN HEMT power device gate degradation detection device, characterized in that: It comprises a pulse excitation source (W), a passive circuit, a sampling circuit (4), a controller (1) and a driving circuit (2); The pulse excitation source (W) is connected to the GaN HEMT power device (L) to be tested via a passive circuit, the output end of the sampling circuit (4) is connected to the input end of the controller (1), the output end of the controller (1) is connected to the control end of the pulse excitation source (W) via a driving circuit (2), and the controller (1) collects a voltage signal between a source and a gate in the GaN HEMT power device (L) to be tested via the sampling circuit (4). V GS , and according to the voltage signal V GS Determine the degree of gate degradation in the GaN HEMT power device (L) under test.

2. The GaN HEMT power device gate degradation detection device according to claim 1, characterized in that: The passive circuit comprises a first resistor (G1), a diode (S), a second resistor (G2), a third resistor (G3), a first capacitor (D1) and a second capacitor (D2); a pulse excitation source (W), the first resistor (G1), the diode (S) and the second resistor (G2) are sequentially connected in series to form a series circuit; a series branch formed by the third resistor (G3) and the first capacitor (D1) in series is connected in parallel with the first resistor (G1); the second capacitor (D2) and the second resistor (G2) are connected in parallel; and a series branch formed by the diode (S) and the second resistor (G2) in series is connected in parallel with a GaN HEMT power device (L) to be tested.

3. The GaN HEMT power device gate degradation detection device according to claim 1, characterized in that: It also includes an auxiliary power supply (3) for providing electric energy to the sampling circuit (4), the controller (1) and the driving circuit (2).

4. A method for detecting gate degradation of a GaN HEMT power device, characterized in that: The GaN HEMT power device gate degradation detection device according to claim 2 comprises the following steps: Controller (1) outputs control signal V 0 to the driving circuit (2), the driving circuit (2) according to the control signal V 0Generate pulse excitation voltage signal V PULSE , the pulse excitation voltage signal V PULSE The voltage signal between the gate and the source of the GaN HEMT power device (L) to be tested is applied to the gate and the source of the GaN HEMT power device (L) to be tested through the passive circuit, and the voltage signal between the gate and the source of the GaN HEMT power device (L) to be tested is obtained through the sampling circuit (4). V GS , calculate the response voltage when the gate of the GaN HEMT power device (L) under test is not degraded V GS-CALC , and then compare the voltage signal V GS With the response voltage V GS-CALC , judging whether the gate of the GaN HEMT power device (L) to be tested is degraded according to the comparison result; When the gate of the GaN HEMT power device (L) to be tested is degraded, the voltage signal V GS The voltage signal is obtained by V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX ; According to the voltage signal V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX Determining the degree of gate degradation in GaN HEMT power devices.

5. The method for detecting gate degradation of a GaN HEMT power device according to claim 4, characterized in that: The response voltage of the GaN HEMT power device (L) under test when the gate is not degraded V GS-CALC for: in, V D is the voltage drop of the diode (S), s is a complex variable, R 1 is the resistance value of the first resistor (G1), R 2 is the resistance value of the second resistor (G2), R 3 is the resistance value of the third resistor (G3), C 1 is the capacitance value of the first capacitor (D1), C 2 is the capacitance of the second capacitor (D2), C GS is the capacitance value of the capacitor between the gate and the source in the GaN HEMT power device (L) to be tested, R GS is the gate-source equivalent resistance of the GaN HEMT power device (L) to be tested.

6. The method for detecting gate degradation of a GaN HEMT power device according to claim 4, wherein: When the voltage signal V GS With the response voltage V GS-CALC When the deviation is greater than a preset deviation threshold, it is considered that the gate of the GaN HEMT power device (L) to be tested is degraded.

7. The method for detecting gate degradation of a GaN HEMT power device according to claim 4, characterized in that: The voltage signal V GS The measured voltage platform value V GS-H And the measured voltage peak V GS-MAX The process of determining the degree of gate degradation in GaN HEMT power devices is: According to the voltage signal V GS The measured voltage platform value V GS-H Determine the degradation degree of the gate-source equivalent resistance in the GaN HEMT power device (L) to be tested; According to the voltage signal V GS The measured voltage peak V GS-MAX Determine the degree of degradation of the capacitance between the gate and source in the GaN HEMT power device (L) under test.

8. The method for detecting gate degradation of a GaN HEMT power device according to claim 7, wherein: The voltage signal V GS The measured voltage platform value V GS-H The lower it is, the more serious the degradation of the gate-source equivalent resistance in the GaN HEMT power device (L) under test is.

9. The method for detecting gate degradation of a GaN HEMT power device according to claim 7, wherein: The voltage signal V GS The measured voltage peak V GS-MAX The higher the value, the more serious the degradation of the capacitance between the gate and the source in the GaN HEMT power device (L) under test.

10. The method for detecting gate degradation of a GaN HEMT power device according to claim 4, wherein: It also includes an auxiliary power supply (3), which provides electric energy to the sampling circuit (4), the controller (1) and the drive circuit (2).

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