Fusion method and device for layout of semiconductor device, equipment and medium
Through the automated semiconductor device layout fusion method, the preset correlation relationship and hierarchical information are used to solve the problem of inefficiency and error-prone traditional manual inspection and correction methods, and the design efficiency and device reliability are improved.
Patent Information
- Application Number
- CN202510227755.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2045-02-27
AI Technical Summary
In the layout design of semiconductor devices, traditional manual inspection and correction methods are inefficient and prone to errors, especially when manually checking the splicing of line segments, it is easy to cause errors, affecting device performance and reliability.
It provides a layout fusion method for semiconductor devices. Through an automated fusion process, the graphics elements are accurately imported and mapped using preset relationships and hierarchical information to ensure the accuracy of the mapping relationships and positional relationships between layout elements.
It significantly improves design and correction efficiency, reduces errors in manual intervention, improves the controllability and reliability of semiconductor device performance, and ensures the precise superposition and compatibility of different layer layout elements.
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Figure CN120163119A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of layout design technology, and specifically relates to a method, device, equipment and medium for fusing the layout of a semiconductor device. Background Art
[0002] Currently, in the field of layout design of semiconductor devices, the GDS (Graphic Data System) file format, as a standard binary file format, is widely used in chip layout design and carries key data such as geometric information, hierarchical structure, and circuit connections of chip design. The generality of GDS files makes them a bridge between the design, manufacturing, and testing links, ensuring the accurate transmission and implementation of design information. With the increase in design complexity, in the process of fusing the layout of semiconductor devices, traditional manual inspection and correction methods have gradually revealed the disadvantages of low efficiency and error-proneness. Especially when manually inspecting the splicing of line segments, errors are easily caused, affecting the performance and reliability of semiconductor devices. Summary of the Invention
[0003] This application provides a method, device, equipment and medium for fusing the layout of a semiconductor device to solve the problem of how to accurately and efficiently fuse the layout of a semiconductor device.
[0004] This application provides a method for fusing the layout of a semiconductor device, and the method includes:
[0005] Obtain a first simulation engineering file, where the first simulation engineering file includes a first layer layout and a second layer layout, and the first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element;
[0006] When receiving a first fusion instruction, obtain a second simulation engineering file, where the second simulation engineering file includes a third layer layout, and the third layer layout includes at least one third graphic element;
[0007] When it is determined that the first fusion instruction indicates importing the third layer layout in a preset non-overlapping import manner, determine the first layer layout or the second layer layout as the target layer layout according to the preset hierarchical information of at least two layers of layouts, and obtain the position information of at least one target graphic element and the position information of at least one third graphic element, where the hierarchical information of the target layer layout is the same as that of the third layer layout;
[0008] According to the preset association relationship, respectively obtain the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element, and the preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element;
[0009] Determine the layout position information of the third-layer layout in the target-layer layout according to the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, and import the third-layer layout into the target-layer layout according to the layout position information.
[0010] This application also provides a layout fusion device for a semiconductor device, including:
[0011] A first acquisition module, configured to acquire a first simulation engineering file, where the first simulation engineering file includes a first-layer layout and a second-layer layout, the first-layer layout includes at least one first graphic element, and the second-layer layout includes at least one second graphic element;
[0012] A second acquisition module, configured to acquire a second simulation engineering file when receiving a first fusion instruction, where the second simulation engineering file includes a third-layer layout, and the third-layer layout includes at least one third graphic element;
[0013] A determination module, configured to determine, when determining that the first fusion instruction indicates importing the third-layer layout in a preset non-overlapping import manner, determine the first-layer layout or the second-layer layout as the target-layer layout according to the preset hierarchical information of at least two layers of layouts, and acquire the position information of at least one target graphic element and the position information of at least one third graphic element, where the hierarchical information of the target-layer layout is the same as that of the third-layer layout;
[0014] A third acquisition module, configured to respectively acquire the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element according to a preset association relationship, where the preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element;
[0015] An import module, configured to determine the layout position information of the third-layer layout in the target-layer layout according to the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, and import the third-layer layout into the target-layer layout according to the layout position information.
[0016] This application also provides an electronic device, including: a memory, configured to store a computer program; a processor, configured to implement the steps of any one of the above-mentioned semiconductor device layout fusion methods when executing the computer program.
[0017] This application also provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and where the computer program implements the steps of any one of the above-mentioned semiconductor device layout fusion methods when executed by a processor.
[0018] The present application also provides a computer program product, including a computer program which, when executed by a processor, implements the steps of any one of the above-mentioned layout fusion methods for semiconductor devices.
[0019] Through the present application, due to the automated fusion process, the need for manual intervention is reduced, significantly improving the design and correction efficiency. Compared with the traditional manual inspection and modification methods, this method can complete complex layout fusion in a short time. By using the preset association relationships, the accuracy of the mapping relationships and positional relationships between layout elements is ensured, avoiding position errors or improper splicing that may be caused by manual operations, thereby improving the controllability and reliability of the performance of semiconductor devices. Through reasonable mapping of graphic elements and processing of hierarchical information, the compatibility and consistency between different layouts can be ensured, avoiding fusion problems caused by differences between layers. The precise superposition of layout elements in different layers is ensured, solving problems such as interleaving and misalignment. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0021] Figure 1 is one of the flowcharts of the layout fusion method for semiconductor devices according to an embodiment of the present application;
[0022] Figure 2 is the second flowchart of the layout fusion method for semiconductor devices according to an embodiment of the present application;
[0023] Figure 3 is the third flowchart of the layout fusion method for semiconductor devices according to an embodiment of the present application;
[0024] Figure 4 is a schematic diagram of the layout fusion device for semiconductor devices according to an embodiment of the present application;
[0025] Figure 5 is a schematic diagram of the hardware structure of the computer device according to an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Apparently, the described embodiments are some, but not all, of the embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of this application without creative efforts shall fall within the protection scope of this application.
[0027] It should be noted that in the description of this application, the terms "include", "comprise", or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device including a series of elements includes not only those elements but also other elements not explicitly listed, or also includes elements inherent to such process, method, article, or device. The terms "first", "second", etc. in this application are used to distinguish similar objects and are not used to describe a specific order or sequence. According to the embodiments of this application, an embodiment of a method for fusing the layout of a semiconductor device is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.
[0028] In this embodiment, a method for fusing the layout of a semiconductor device is provided, which can be used in a server. Figure 1 is one of the flowcharts of the method for fusing the layout of a semiconductor device according to the embodiments of this application, as Figure 1 shown. The method includes:
[0029] Step S101, obtain a first simulation engineering file.
[0030] The first simulation engineering file includes a first layer layout and a second layer layout. The first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element.
[0031] Among them, the elements in the layout are important components in semiconductor chip design and can represent different parts in the circuit, such as wires, transistors, etc.
[0032] Step S102, when receiving a first fusion instruction, obtain a second simulation engineering file.
[0033] The second simulation engineering file includes a third layer layout. The third layer layout includes at least one third graphic element.
[0034] When the system receives the first fusion instruction, it will obtain the second simulation engineering file. This file contains the third-layer layout. This step indicates that when performing the fusion operation, the introduction of the third-layer layout is triggered in response to the instruction.
[0035] Step S103, when it is determined that the first fusion instruction indicates importing the third-layer layout in a preset non-overlapping import manner, based on the preset hierarchical information of at least two layers of layout, determine the first-layer layout or the second-layer layout as the target-layer layout, and obtain the position information of at least one target graphic element and the position information of at least one third graphic element.
[0036] The hierarchical information of the target-layer layout is the same as that of the third-layer layout.
[0037] When it is confirmed that the instruction requires importing the third-layer layout in a preset non-overlapping import manner, the system determines the target-layer layout through the hierarchical information. Here, the target-layer layout refers to the layout with the same hierarchical information as the third-layer layout, which can be one of the first-layer layout or the second-layer layout. The system obtains the positions of at least one graphic element in the target-layer layout and the graphic elements in the third-layer layout.
[0038] Step S104, according to the preset association relationship, respectively obtain the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element.
[0039] The preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.
[0040] According to the preset association relationship, the system corresponds the graphic elements of the target-layer layout with the graphic elements of the third-layer layout through the mapping relationship. The preset association relationship stipulates which graphic elements have corresponding relationships, which can be components that interact with each other in different layers. At least one target graphic element and at least one third graphic element will be mapped, that is, their relationships are determined.
[0041] Step S105, according to the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, determine the layout position information of the third-layer layout in the target-layer layout, and import the third-layer layout into the target-layer layout according to the layout position information.
[0042] The system determines how to accurately import the third-layer layout into the target-layer layout according to the mapping relationship. Through the layout position information, that is, the coordinate information of each graphic element, the system imports the third-layer layout into the target-layer layout according to the determined position. This step finally completes the import process of the third-layer layout, ensuring the accurate docking of the layout and meeting the design requirements.
[0043] A method for fusing layout diagrams of semiconductor devices provided by this application reduces the need for manual intervention through an automated fusion process, significantly improving the design and correction efficiency. Compared with traditional manual inspection and modification methods, this method can complete complex layout diagram fusion in a short time. By using preset association relationships, the accuracy of the mapping relationship and position relationship between layout diagram elements is ensured, avoiding position errors or improper splicing that may be caused by manual operations, thereby improving the controllability and reliability of the performance of semiconductor devices. Through reasonable mapping of graphic elements and processing of hierarchical information, the compatibility and consistency between different layout diagrams can be ensured, avoiding fusion problems caused by differences between layers. The precise superposition of layout diagram elements on different layers is ensured, avoiding problems such as interleaving and misalignment.
[0044] In an alternative embodiment, in order to further accurately fuse two layers of layout diagrams, Figure 2 is the second flowchart of the method for fusing layout diagrams of semiconductor devices according to the embodiments of this application, as Figure 2 shown. After obtaining the first simulation engineering file, it further includes:
[0045] Step S201, when receiving a second fusion instruction, obtain the position information of at least one first graphic element and at least one second graphic element, and determine at least one pair of overlapping first graphic elements and second graphic elements, at least one non-overlapping first graphic element, and at least one non-overlapping second graphic element based on the position information of at least one first graphic element and at least one second graphic element.
[0046] In this step, through the second fusion instruction, obtain the position information of graphic elements in the first layer and the second layer of the layout diagram. First, obtain the position information of the first graphic element and the second graphic element, and identify the overlapping and non-overlapping relationships between the two types of elements through this position information. Overlapping graphic elements refer to the situation where the graphic elements in the first layer and the second layer of the layout diagram have overlapping positions. Non-overlapping graphic elements refer to the situation where the graphic elements in the first layer and the second layer of the layout diagram do not overlap.
[0047] Step S202, based on the position information of at least one pair of overlapping first graphic elements and second graphic elements, fuse at least one pair of overlapping first graphic elements and second graphic elements to generate at least one fused graphic element, and the mapping relationship between at least one fused graphic element and at least one pair of overlapping first graphic elements and second graphic elements.
[0048] In this step, a fusion operation is performed based on the overlapping graphic elements. After discovering at least one pair of overlapping first graphic elements and second graphic elements, the system performs the fusion of the graphic elements based on the positional relationship of these graphic elements. This fusion generates fused graphic elements, which are new graphic elements representing the elements extracted and synthesized from the overlapping first graphic elements and second graphic elements. A mapping relationship is generated, that is, the relationship between these fused graphic elements and the original overlapping graphic elements.
[0049] Step S203, based on the mapping relationship and the position information of at least one pair of overlapping first graphic elements and second graphic elements, at least one fused graphic element is added to the first layout or the second layout, and at least one pair of overlapping first graphic elements and second graphic elements are deleted from the first layout and the second layout.
[0050] In this step, the fused graphic elements are added back to the original layout and the overlapping original elements are deleted. The system inserts the fused graphic elements into the first layout or the second layout according to the aforementioned mapping relationship. The original graphic elements that have been merged during the fusion process (i.e., the overlapping first graphic elements and second graphic elements) are deleted.
[0051] The method provided in this embodiment avoids manual operations through an automated graphic element fusion process, reduces errors and time consumption caused by manual intervention. Through the fusion of overlapping elements, redundant designs can be removed, making the layout more concise and clear, and avoiding unnecessary repetitions. Through the precise calculation of position information, it is ensured that the fused graphic elements are accurately added to the original layout, avoiding misalignment or deviation in layout splicing. Ensure that the graphic elements between the first layer and the second layer are effectively docked and merged according to the design requirements, thereby improving the overall consistency of the multi-layer design. Since the system automatically records the mapping relationship of the fused elements, if subsequent adjustments or corrections are needed, it is more convenient to trace and modify the fused elements.
[0052] In an alternative embodiment, step S202 includes:
[0053] Based on the position information of at least one pair of overlapping first graphic elements and second graphic elements, determine the path information of at least one pair of overlapping first graphic elements and second graphic elements. Based on the path information, convert at least one pair of overlapping first graphic elements and second graphic elements into a polygon point set, and the polygon point set includes multiple points. Obtain the coordinates of the multiple points to form a coordinate set of the polygon point set. Perform an OR operation on the coordinates in the coordinate set to obtain a merged polygon point set. Convert the merged polygon point set into at least one fused graphic element.
[0054] In this embodiment, the path information refers to data such as the boundaries, curves, or paths of each graphical element, which can be used to describe the specific shape of the graphical element. The system determines the path information of at least a pair of overlapping first and second graphical elements based on their position information. The path information can be specific to the specific contours, edges, or path point coordinates of each graphical element, and can include straight line segments, curves, closed shapes, etc. Through the path information, the overlapping graphical elements are converted into a polygon point set. A polygon point set is a set composed of multiple coordinate points, and these points describe the boundary of the graph. The path of each overlapping graphical element is converted into a series of points (coordinates), and these points represent the contour of the graph. After obtaining the coordinates of these multiple points, the system performs an OR operation on them. By geometric operations to merge these polygon regions, it is equivalent to performing a union operation on the graph, and merging the regions of two overlapping graphs into one.
[0055] The method provided in this embodiment can accurately fuse overlapping graphical elements through the merging operation based on path information and coordinate point sets, rather than simple superposition. It avoids the splicing errors that may occur and ensures the accuracy of the new graphical element. Since the merged graphical element is calculated based on specific path information and coordinate point sets, the final layout can be guaranteed to be more compact and concise, and the appearance of duplicate elements is avoided. Through the merging of polygons, redundant regions can be removed, and the utilization efficiency of the design space can be improved. Using the path information to convert into a polygon point set and then merge can effectively handle the overlap of complex graphical elements. Especially for elements with complex shapes, traditional merging methods will have errors or be difficult to process.
[0056] In an alternative embodiment, after step S102, it further includes:
[0057] When it is determined that the first fusion instruction indicates importing the third-layer layout in a preset overlapping import mode, the preset import position of the third-layer layout indicated by the overlapping import mode is obtained. Based on the preset import position of the third-layer layout, the third-layer layout is imported into the preset import position in the first simulation engineering file.
[0058] In this embodiment, when performing the import operation, the system first determines the position where the third-layer layout should be imported according to the user's instructions or preset rules. The overlapping import method can indicate this position through a certain automated process or manual setting. Preset import position: This is a fixed position predefined by the system, usually a specific area or coordinate in the design. The determination of the import position can be based on the requirements of the graphic design to ensure the correct alignment and reasonable layout of the graphics in the design layout. According to the obtained preset import position, the third-layer layout will be accurately imported to this position. The import operation not only copies the graphic data into the file but also includes the adjustment of the position to ensure that the third-layer layout is in the correct spatial position in the first simulation engineering file. This step ensures that the relationship between the third-layer layout and the first or second-layer layout is clear and there is no misalignment or overlap, making the hierarchical relationship of the engineering file more standardized.
[0059] The method provided in this embodiment can ensure that there are no unexpected offsets or disorders in the import process of each layer of layout by setting a preset import position, which is particularly important for complex designs. Designers can precisely control the positional relationship of each layer of layout to ensure the final design effect. This method provides an automated process for adjusting the import according to the position indicated by the import method, reducing manual operation errors and complexity. Designers can select different import methods according to needs and quickly and accurately complete the layout import in accordance with the preset rules.
[0060] In an alternative embodiment, the position information of the second graphic element includes: the edge position and the center position of the third-layer layout.
[0061] Step S105 includes: obtaining the edge position and the center position of the target-layer layout, and determining the distance between the first-layer layout and the third-layer layout according to the edge position and the center position of the target-layer layout, as well as the edge position and the center position of the third-layer layout. Determine the position information of the third-layer layout in the target-layer layout according to the edge position and the center position of the target-layer layout and the distance. Import the third-layer layout into the target-layer layout in the first simulation engineering file according to the position information of the third-layer layout in the target-layer layout.
[0062] In this embodiment, the edge position refers to the intersection points of the four edges of the layout with the coordinate system, usually representing the outermost boundary of the layout. The center position is the geometric center point of the layout, usually the midpoint of the length and width of the layout, which is a key reference for layout and alignment. Based on the edge positions and center positions of the target-layer layout and the third-layer layout, the system can calculate the relative positions between these two layouts. Through these position data, the precise distance between the layouts can be determined. This distance can be a horizontal distance, a vertical distance, or a combination of both.
[0063] The method provided in this embodiment can ensure that there is no misalignment during the layout import process and avoid errors caused by manual adjustment by using the edge position and the center position for precise calculation. The accuracy of alignment improves the design precision, enabling the layouts at different layers to be combined in the most reasonable way. Through this method, it can ensure that the hierarchical structure of the layout in the multi-layer design is well maintained. The relative position of each layer can be clear and stable, avoiding design chaos caused by improper import.
[0064] In an alternative embodiment, after obtaining the first simulation engineering file, it further includes:
[0065] When receiving the third fusion instruction, divide the first-layer layout and / or the second-layer layout into N layout segments, where N is a positive integer. After modifying the N layout segments, record the position information of the modified N layout segments. Obtain the preset position information of the modified N layout segments indicated by the overlapping import method. Based on the preset position information of the modified N layout segments, import the modified N layout segments into the third simulation engineering file.
[0066] In this embodiment, when receiving the third fusion instruction, the system divides the previously obtained first-layer layout and / or the second-layer layout into multiple layout segments. These layout segments can be multiple small regions or specific design blocks according to the instruction, and the number of divisions is represented by N (a positive integer). The value of N represents the number of layout divisions. For example, if N = 4, the layout is divided into 4 segments, and each segment has its independent position information and design content. For each divided layout segment, the user or the system can make modifications. These modifications can include geometric adjustment, layout optimization, design changes, etc. Each layout segment can be processed individually, maintaining the flexibility of the modification process. The modified layout segments will be recorded with the modified position information to ensure that the updated position of each layout segment can be accurately traced and located in subsequent operations. The system obtains the preset position information of the modified N layout segments according to the preset import rules or the design requirements of the target project. These position information are set according to the design requirements in the target file to ensure that each layout segment can be accurately placed in the corresponding position of the simulation project.
[0067] In the method provided in this embodiment, after the layout is divided into multiple segments, the user can modify each segment independently, which improves the flexibility of the design. Each modified segment can be adjusted according to specific requirements to flexibly respond to changes occurring during the design process. The system supports independent operations on different layout segments, which not only saves design time but also can quickly respond to changes in design requirements. By recording and using the position information of the modified layout segments and obtaining the preset import position information, it is ensured that each segment can be accurately placed at the target position during import. This precise import process avoids displacement or overlap problems and improves the overall accuracy of import. After importing multiple layout segments into the third simulation engineering file, the management of the layout is more refined and hierarchical. Different design segments can be reasonably positioned and managed in a unified simulation file, which improves the manageability and maintainability of the simulation project.
[0068] In an alternative embodiment, after obtaining the first simulation engineering file, it further includes:
[0069] Receiving an initial fusion instruction. Parsing the initial fusion instruction, when the initial fusion instruction indicates fusing the first-layer layout and the second-layer layout, then determining the initial fusion instruction as the first fusion instruction. Or, when the initial fusion instruction indicates obtaining the second simulation engineering file, determining the initial fusion instruction as the second fusion instruction. Or, when the initial fusion instruction indicates splitting the first-layer layout and / or the second-layer layout, determining the initial fusion instruction as the third fusion instruction.
[0070] In this embodiment, fusing the first-layer layout and the second-layer layout: When the instruction indicates that the first-layer layout and the second-layer layout need to be fused, the system recognizes it as the first fusion instruction and performs the layout fusion operation according to this instruction. Obtaining the second simulation engineering file: If the instruction requires obtaining the second simulation engineering file, the system recognizes it as the second fusion instruction and performs the corresponding operation, which can be merging or loading the content of the second simulation engineering file. Splitting the first-layer layout and / or the second-layer layout: When the instruction requires splitting the existing layout, the system recognizes it as the third fusion instruction and performs the layout splitting operation according to the instruction to generate multiple sub-regions or segments.
[0071] The method provided in this embodiment can flexibly meet various design requirements by parsing and processing different types of fusion instructions (the first, second, and third fusion instructions). This flexibility ensures that different operations can meet various engineering needs, thus supporting more complex design operations. By parsing the initial fusion instructions and automatically performing the corresponding fusion or splitting operations, the complexity of manual operations is reduced, and the automation level is improved. At the same time, since each operation is accurately parsed by the system, the efficiency and accuracy of the operations are ensured. Different types of fusion instructions and splitting instructions can achieve efficient management of the layout. By splitting or fusing the layout, the system can effectively adjust the layout structure, reduce redundancy, and improve the operability and maintainability of the design.
[0072] Figure 3 It is the third flowchart of the layout fusion method of the semiconductor device according to the embodiment of the present application, as Figure 3 shown. After starting the layout fusion process, it is possible to simulate the initial semiconductor device according to parameters such as the expected capacitance value, the maximum width of capacitance error, the maximum height, and the minimum difference of the semiconductor device set, so as to obtain a simulation result, which may be the first simulation engineering file. Then, it is judged whether it is a single-person layout design, a multi-person layout design, or a layout optimization design.
[0073] If it is a single-person layout design, that is, corresponding to the second fusion instruction, then traverse each layer of the layout; perform an intersection detection on the graphic elements of the layout; send a merge operation prompt to the user. After the user confirms the merge, perform an image overlay merge to complete the layout fusion. Then export the simulation engineering file (i.e., the GDS file) of the semiconductor device layout, and end.
[0074] If it is a multi-person layout design, that is, corresponding to the first fusion instruction, then calculate the graphic position and size. If it is judged that the graphics are imported in a non-overlapping manner, then obtain the positioning information of the original graphic object (i.e., the graphic element), send it to the corresponding layer, set the new coordinates, send the new object behind the previous object, set the new relative coordinates, and traverse all objects in the same layer and all layers to complete the layout fusion. Then export the simulation engineering file of the semiconductor device layout and end. If it is judged that the graphics are imported in an overlapping manner, then manually set the coordinate values, set the object as the positioning model (overlap allowed), define the left, right, top, and bottom coordinates of the layout, import and merge the graphics, and then traverse all layers to complete the layout fusion. Then export the simulation engineering file of the semiconductor device layout and end.
[0075] If it is a layout optimization design, that is, corresponding to the third fusion instruction, the layout is divided into small modules, the layout is optimized, and the position information of the small module units is recorded. Then, the coordinate values are set manually, the object is set as the positioning model (overlap allowed), the left, right, top, and bottom coordinates of the layout are defined, the graphics are imported and merged, and then all layers are traversed to complete the layout fusion. Then, the simulation engineering file of the semiconductor device layout is exported, and the process ends.
[0076] In an alternative embodiment, after receiving the initial fusion instruction, it further includes:
[0077] After parsing the initial fusion instruction, if the instruction indicates to perform an interaction operation with an external database or cloud resources, the external database information related to the first simulation engineering file is further obtained.
[0078] Based on the external database information, corresponding data verification, optimization, or operation of supplementing missing information is performed. After that, the requirements for layout import and fusion are re-evaluated, and the content of the first simulation engineering file is updated.
[0079] After ensuring that the content of the updated simulation engineering file complies with the latest design specifications, the operation of the first fusion instruction or the second fusion instruction is performed.
[0080] The method provided in this embodiment ensures that the data in the simulation engineering file is always up-to-date and accurate by obtaining the latest data from an external database or cloud and performing verification, supplementation, and optimization. This avoids design errors or mismatches caused by inconsistent or outdated data, and improves the reliability of the design process. After parsing the initial fusion instruction, steps such as interacting with the external database, data verification, and information supplementation are automatically executed, greatly simplifying the operation process of designers. Automated data optimization and supplementation reduce manual intervention and improve work efficiency.
[0081] An embodiment of the present application also provides a layout fusion device for a semiconductor device, Figure 4 which is a schematic diagram of the layout fusion device for a semiconductor device according to an embodiment of the present application, as Figure 4 shown. The device includes:
[0082] A first acquisition module 401, configured to acquire a first simulation engineering file, where the first simulation engineering file includes a first-layer layout and a second-layer layout, and the first-layer layout includes at least one first graphic element, and the second-layer layout includes at least one second graphic element.
[0083] A second acquisition module 402, configured to acquire a second simulation engineering file when receiving the first fusion instruction, where the second simulation engineering file includes a third-layer layout, and the third-layer layout includes at least one third graphic element.
[0084] A determination module 403, configured to, when determining that the first fusion instruction indicates importing the third-layer layout in a preset non-overlapping import manner, determine the first-layer layout or the second-layer layout as the target-layer layout according to the preset hierarchical information of at least two layers of layouts, and obtain the position information of at least one target graphic element and the position information of at least one third graphic element, where the hierarchical information of the target-layer layout is the same as that of the third-layer layout.
[0085] A third acquisition module 404, configured to respectively obtain the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element from the position information of at least one target graphic element and the position information of at least one third graphic element according to a preset association relationship, where the preset association relationship indicates the mapping relationship between at least one first target graphic element and at least one second target graphic element.
[0086] An import module 405, configured to determine the layout position information of the third-layer layout in the target-layer layout according to the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, and import the third-layer layout into the target-layer layout according to the layout position information.
[0087] In addition, the apparatus further includes a processing module, configured to, when receiving a second fusion instruction, obtain the position information of at least one first graphic element and at least one second graphic element, and determine at least one pair of overlapping first graphic elements and second graphic elements, at least one non-overlapping first graphic element, and at least one non-overlapping second graphic element according to the position information of at least one first graphic element and at least one second graphic element. Based on the position information of at least one pair of overlapping first graphic elements and second graphic elements, fuse at least one pair of overlapping first graphic elements and second graphic elements to generate at least one fused graphic element, and the mapping relationship between at least one fused graphic element and at least one pair of overlapping first graphic elements and second graphic elements. Based on the mapping relationship and the position information of at least one pair of overlapping first graphic elements and second graphic elements, add at least one fused graphic element to the first-layer layout or the second-layer layout, and delete at least one pair of overlapping first graphic elements and second graphic elements from the first-layer layout and the second-layer layout.
[0088] The processing module is further configured to determine the path information of at least one pair of overlapping first graphic elements and second graphic elements based on the position information of at least one pair of overlapping first graphic elements and second graphic elements. Based on the path information, convert at least one pair of overlapping first graphic elements and second graphic elements into a polygon point set, where the polygon point set includes multiple points. Obtain the coordinates of the multiple points to form a coordinate set of the polygon point set. Perform an OR operation on the coordinates in the coordinate set to obtain a merged polygon point set. Convert the merged polygon point set into at least one fused graphic element.
[0089] The processing module is further configured to, when determining that the first fusion instruction indicates importing the third-layer layout in a preset overlapping import mode, obtain the preset import position of the third-layer layout indicated by the overlapping import mode. Based on the preset import position of the third-layer layout, import the third-layer layout into the preset import position in the first simulation engineering file.
[0090] The position information of the second graphic element includes: the edge position and the center position of the third-layer layout. The processing module is further configured to obtain the edge position and the center position of the target-layer layout, and determine the distance between the first-layer layout and the third-layer layout according to the edge position and the center position of the target-layer layout, and the edge position and the center position of the third-layer layout. Determine the position information of the third-layer layout in the target-layer layout according to the edge position and the center position of the target-layer layout and the distance. Import the third-layer layout into the target-layer layout in the first simulation engineering file according to the position information of the third-layer layout in the target-layer layout.
[0091] The processing module is further configured to, when receiving the third fusion instruction, divide the first-layer layout and / or the second-layer layout into N layout segments, where N is a positive integer. After modifying the N layout segments, record the position information of the modified N layout segments. Obtain the preset position information of the modified N layout segments indicated by the overlapping import mode. Based on the preset position information of the modified N layout segments, import the modified N layout segments into the third simulation engineering file.
[0092] The processing module is further configured to receive an initial fusion instruction. Parse the initial fusion instruction. When the initial fusion instruction indicates fusing the first-layer layout and the second-layer layout, determine that the initial fusion instruction is the first fusion instruction. Or, when the initial fusion instruction indicates obtaining the second simulation engineering file, determine that the initial fusion instruction is the second fusion instruction. Or, when the initial fusion instruction indicates splitting the first-layer layout and / or the second-layer layout, determine that the initial fusion instruction is the third fusion instruction.
[0093] A layout fusion device for a semiconductor device provided by the present application reduces the need for manual intervention through an automated fusion process, significantly improving the design and correction efficiency. Compared with traditional manual inspection and modification methods, this method can complete complex layout fusion in a short time. Using the preset association relationship ensures the accuracy of the mapping relationship and the position relationship between layout elements, avoiding position errors or improper splicing that may be caused by manual operations, thereby improving the controllability and reliability of the performance of semiconductor devices. Through reasonable graphic element mapping and processing of hierarchical information, the compatibility and consistency between different layouts can be ensured, avoiding fusion problems caused by differences between layers. Ensures the precise superposition of layout elements on different layers, avoiding problems such as interleaving and misalignment.
[0094] The further function descriptions of the above-mentioned various modules and units are the same as those in the corresponding embodiments above, and will not be elaborated here.
[0095] The layout fusion device of the semiconductor device in this embodiment is presented in the form of functional units. Here, the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and a memory that execute one or more software or fixed programs, and / or other devices that can provide the above functions.
[0096] The embodiment of the present application also provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned embodiments of the method for updating the global model parameters of federated learning.
[0097] The electronic device may be a computer device, having the above Figure 4 layout fusion device of the semiconductor device shown.
[0098] Please refer to Figure 5 , Figure 5 which is a schematic structural diagram of a computer device provided by an optional embodiment of the present application. As Figure 5 shown, the computer device includes: one or more processors 10, a memory 20, and an interface for connecting each component, including a high-speed interface and a low-speed interface. Each component communicates with each other using different buses and can be installed on a common motherboard or installed in other ways as needed. The processor can process instructions executed within the computer device, including instructions stored in the memory or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a set of blade servers, or a multi-processor system). Figure 5 In
[0099]
[0100] Among them, the above-mentioned memory 20 stores instructions that can be executed by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiments.
[0101] The memory 20 may include a program storage area and a data storage area. Among them, the program storage area can store an operating system and application programs required for at least one function; the data storage area can store data created according to the use of the computer device, etc. In addition, the memory 20 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some alternative embodiments, the memory 20 may optionally include a memory remotely disposed relative to the processor 10, and these remote memories can be connected to the computer device through a network.
[0102] The memory 20 may include volatile memory, for example, random access memory; the memory may also include non-volatile memory, for example, flash memory, a hard disk, or a solid-state drive; the memory 20 may further include a combination of the above types of memory.
[0103] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or a communication network.
[0104] The embodiments of the present application also provide a computer-readable storage medium. The method according to the embodiments of the present application can be implemented in hardware, firmware, or can be implemented as computer code that can be recorded on a storage medium, or can be implemented by downloading through a network from an original remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid-state drive, etc.; further, the storage medium may further include a combination of the above types of memory. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code, and when the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method shown in the above embodiments is implemented.
[0105] Although the embodiments of the present application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present application, and such modifications and variations all fall within the scope defined by the appended claims.
Claims
1. A method for fusing a layout of a semiconductor device, characterized in that: The method comprises: Acquire a first simulation engineering file, wherein the first simulation engineering file includes a first layer layout and a second layer layout, wherein the first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element; When the first fusion instruction is received, a second simulation engineering file is acquired, wherein the second simulation engineering file includes a third layer layout, and the third layer layout includes at least one third graphic element; When it is determined that the first fusion instruction instructs to import the third layer layout in a preset non-overlapping import manner, the first layer layout or the second layer layout is determined to be a target layer layout according to the preset level information of at least two layers of layouts, and the position information of at least one target graphic element and the position information of at least one third graphic element are obtained, and the level information of the target layer layout is the same as that of the third layer layout; acquiring, from the position information of the at least one target graphic element and the position information of the at least one third graphic element, the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element respectively according to a preset association relationship, wherein the preset association relationship indicates a mapping relationship between the at least one first target graphic element and the at least one second target graphic element; According to the position information of the at least one mapped target graphic element and the position information of the at least one mapped third graphic element, the layout position information of the third layer layout in the target layer layout is determined, and the third layer layout is imported into the target layer layout according to the layout position information.
2. The method according to claim 1, characterized in that After obtaining the first simulation project file, the method further includes: When receiving the second fusion instruction, obtaining the position information of the at least one first graphic element and the at least one second graphic element, and determining at least one pair of overlapping first graphic elements and second graphic elements, at least one non-overlapping first graphic element and at least one non-overlapping second graphic element according to the position information of the at least one first graphic element and the at least one second graphic element; Based on the position information of the at least one pair of overlapping first graphic elements and second graphic elements, fuse the at least one pair of overlapping first graphic elements and second graphic elements to generate at least one fused graphic element and a mapping relationship between the at least one fused graphic element and the at least one pair of overlapping first graphic elements and second graphic elements; Based on the mapping relationship and the position information of the at least one pair of overlapping first graphic elements and second graphic elements, the at least one fused graphic element is added to the first layer layout or the second layer layout, and the at least one pair of overlapping first graphic elements and second graphic elements is deleted from the first layer layout and the second layer layout.
3. The method according to claim 2, characterized in that The step of fusing the at least one pair of overlapping first graphic elements and second graphic elements based on the position information of the at least one pair of overlapping first graphic elements and second graphic elements to generate at least one fused graphic element comprises: Determining path information of the at least one pair of overlapping first graphic elements and second graphic elements based on position information of the at least one pair of overlapping first graphic elements and second graphic elements; Based on the path information, converting the at least one pair of overlapping first graphic elements and second graphic elements into a polygon point set, the polygon point set comprising a plurality of points; Acquire the coordinates of the plurality of points to form a coordinate set of the polygonal point set; Performing an OR operation on the coordinates in the coordinate set to obtain a merged polygon point set; The merged polygon point set is converted into at least one fused graphic element.
4. The method according to any one of claims 1 to 3, characterized in that: After obtaining the second simulation project file, the method further includes: When it is determined that the first fusion instruction instructs to import the third layer layout in a preset overlapping import mode, obtaining a preset import position of the third layer layout indicated by the overlapping import mode; Based on the preset import position of the third layer layout, the third layer layout is imported into the preset import position in the first simulation project file.
5. The method according to any one of claims 1 to 3, characterized in that: The position information of the second graphic element includes: the edge position and the center position of the third layer layout; The determining, according to the position information of the at least one mapped target graphic element and the position information of the at least one mapped third graphic element, the layout position information of the third layer layout in the target layer layout, and importing the third layer layout into the target layer layout according to the layout position information, comprises: Obtaining the edge position and the center position of the target layer layout, and determining the distance between the first layer layout and the third layer layout according to the edge position and the center position of the target layer layout and the edge position and the center position of the third layer layout; Determine the position information of the third layer layout in the target layer layout according to the edge position and the center position of the target layer layout and the distance; According to the position information of the third layer layout in the target layer layout, the third layer layout is imported into the target layer layout in the first simulation project file.
6. The method according to claim 1, characterized in that After obtaining the first simulation project file, the method further includes: When receiving the third fusion instruction, dividing the first layer layout and / or the second layer layout into N layout segments, where N is a positive integer; After modifying the N layout segments, recording the position information of the modified N layout segments; Obtaining preset position information of the modified N layout segments indicated by the overlapping import mode; Based on the preset position information of the modified N layout segments, the modified N layout segments are imported into a third simulation project file.
7. The method according to any one of claims 1 to 3, characterized in that: After obtaining the first simulation project file, the method further includes: receiving an initial fusion instruction; parsing the initial fusion instruction, and when the initial fusion instruction indicates to fuse the first layer layout and the second layer layout, determining that the initial fusion instruction is the first fusion instruction; Or, when the initial fusion instruction indicates to obtain a second simulation project file, determining the initial fusion instruction as a second fusion instruction; Or, when the initial fusion instruction indicates to split the first layer layout and / or the second layer layout, the initial fusion instruction is determined to be a third fusion instruction.
8. A device for fusing the layout of a semiconductor device, characterized in that: The device comprises: A first acquisition module is used to acquire a first simulation engineering file, wherein the first simulation engineering file includes a first layer layout and a second layer layout, wherein the first layer layout includes at least one first graphic element, and the second layer layout includes at least one second graphic element; A second acquisition module is used to acquire a second simulation engineering file when receiving the first fusion instruction, wherein the second simulation engineering file includes a third layer layout, and the third layer layout includes at least one third graphic element; a determination module, configured to, when determining that the first fusion instruction indicates that the third layer layout is imported in a preset non-overlapping import manner, determine that the first layer layout or the second layer layout is a target layer layout according to preset level information of at least two layers of layouts, and obtain position information of at least one target graphic element and position information of at least one third graphic element, wherein the target layer layout has the same level information as the third layer layout; a third acquisition module, configured to acquire, from the position information of the at least one target graphic element and the position information of the at least one third graphic element, the position information of at least one mapped target graphic element and the position information of at least one mapped third graphic element, respectively, according to a preset association relationship, wherein the preset association relationship indicates a mapping relationship between the at least one first target graphic element and the at least one second target graphic element; An import module is used to determine the layout position information of the third layer layout in the target layer layout based on the position information of the at least one mapped target graphic element and the position information of the at least one mapped third graphic element, and import the third layer layout into the target layer layout according to the layout position information.
9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the method for fusing the layout of a semiconductor device according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method for fusing the layout of a semiconductor device in any one of claims 1 to 7.
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