Semiconductor device and preparation method thereof
By setting grooves through two-dimensional electronic gas in the epitaxial structure and filling high-electron concentration contact medium, the problem of large ohmic contact resistance is solved, and the output current and power of semiconductor devices is improved.
Patent Information
- Application Number
- CN202311842988.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-28
- Publication Date
- 2025-07-08
AI Technical Summary
In the existing gallium nitride high electron mobility transistors, the source and drain formed by the epitaxial structure has a large ohmic contact resistance, resulting in a decrease in the output current and power of the device.
A groove through the two-dimensional electron gas is provided in the epitaxial structure, and a contact medium with an electron concentration higher than that of the epitaxial structure is filled in the groove. By preparing an ohmic contact electrode on the side where the contact medium is away from the substrate, an ohmic contact is formed.
The ohmic contact resistance is reduced and the output current and output power of semiconductor devices are improved.
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Figure CN120282509A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of microelectronics technology, and in particular, to a semiconductor device and a method for manufacturing the same. Background Art
[0002] Gallium nitride high electron mobility transistors (HEMTs) have excellent characteristics such as a high bandgap width and high mobility, and are suitable for manufacturing devices with high temperature, high frequency, high voltage, and high power. They can be widely used in the fields of radio frequency microwave and power electronics, and are one of the research hotspots in the field of semiconductor devices currently.
[0003] Currently, 5G communication has increasingly high requirements for the bandwidth and operating frequency of semiconductor chips. Gallium nitride high electron mobility transistors are a type of high electron mobility device formed by using two-dimensional electron gas (2DEG) at the heterojunction in the epitaxial structure, and can be better applied to the fields of high frequency, high voltage, and high power. Naturally, they are favored by the 5G communication field.
[0004] For gallium nitride radio frequency power amplifiers, achieving an increase in the output current and power of the device is the pursuit of gallium nitride chips. At present, when the source and drain form an ohmic contact with the epitaxial structure, there will be a relatively large ohmic contact resistance, which will further reduce the output current and power of the device. Therefore, how to increase the output current and power of semiconductor devices is an urgent problem to be solved currently. Summary of the Invention
[0005] The present invention provides a semiconductor device and a method for manufacturing the same to reduce the ohmic resistance and increase the output current and output power of the semiconductor device.
[0006] In a first aspect, an embodiment of the present invention provides a semiconductor device, including:
[0007] A substrate;
[0008] An epitaxial structure located on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure;
[0009] A groove located in the epitaxial structure and at least penetrating the two-dimensional electron gas; a contact medium is provided in the groove; the electron concentration of the contact medium is greater than that of the epitaxial structure;
[0010] An ohmic contact electrode located on the side of the contact medium away from the substrate; the ohmic contact electrode forms an ohmic contact with the contact medium.
[0011] Optionally, along the first direction, the maximum opening width of the groove is L1, and the minimum opening width is L2, where (L1 - L2) / L1 ≤ 20%;
[0012] Along the thickness direction of the semiconductor device, the maximum opening depth of the groove is D1, and the minimum opening depth is D2, where (D1 - D2) / D1 ≤ 20%; the first direction intersects with the thickness direction of the semiconductor device.
[0013] Optionally, the contact area between the contact medium and the inner wall of the groove is S1, and the surface area of the inner wall is S2;
[0014] where S1 / S2 ≥ 80%.
[0015] Optionally, the contact medium includes heavily doped gallium nitride; the doping impurity includes silicon;
[0016] The concentration of the doping impurity is 1×10 18 cm -3 -1×10 22 cm -3 .
[0017] Optionally, the epitaxial structure includes:
[0018] A nucleation layer, located on one side of the substrate;
[0019] A buffer layer, located on the side of the nucleation layer away from the substrate;
[0020] A channel layer, located on the side of the buffer layer away from the substrate;
[0021] A barrier layer, located on the side of the channel layer away from the substrate, and the barrier layer and the channel layer form the two-dimensional electron gas.
[0022] Optionally, the groove penetrates through the channel layer.
[0023] In a second aspect, an embodiment of the present invention further provides a method for manufacturing a semiconductor device, including:
[0024] Providing a substrate and preparing an epitaxial structure on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure;
[0025] Preparing a groove in the epitaxial structure, and the groove penetrates at least through the two-dimensional electron gas;
[0026] Filling a contact medium in the groove; the electron concentration of the contact medium is greater than the electron concentration of the epitaxial structure;
[0027] An ohmic contact electrode is prepared on the side of the contact medium away from the substrate, and the ohmic contact electrode forms an ohmic contact with the contact medium.
[0028] Optionally, after preparing a groove in the epitaxial structure, it further includes:
[0029] A surface-active gas is introduced into the metal-organic chemical vapor deposition reaction chamber.
[0030] Optionally, before preparing a groove in the epitaxial structure, it further includes:
[0031] A mask layer is prepared on the side of the epitaxial structure away from the substrate;
[0032] Before preparing an ohmic contact electrode on the side of the contact medium away from the substrate, it further includes:
[0033] Removing the mask layer
[0034] Optionally, after preparing a mask layer on the side of the epitaxial structure away from the substrate, it further includes:
[0035] A mask contact layer is prepared on the side of the mask layer away from the substrate; the binding ability of the mask contact layer to the contact medium is greater than the binding ability of the mask layer to the contact medium;
[0036] Before removing the mask layer, it further includes:
[0037] Removing the mask contact layer.
[0038] In the technical solution of the embodiment of the present invention, by providing a groove in the epitaxial structure, the groove at least penetrates the two-dimensional electron gas, so that the groove setting area can respectively correspond to the source area and the drain area, so as to provide an ohmic contact electrode, and the ohmic contact electrode can be the source electrode and the drain electrode. A contact medium is provided in the groove, and the electron concentration of the contact medium is greater than the electron concentration of the epitaxial structure. Thus, when an ohmic contact electrode is provided on the side of the contact medium away from the substrate, it can ensure that the ohmic contact electrode forms an ohmic contact with the contact medium, thereby reducing the ohmic contact resistance and increasing the output current and output power of the semiconductor device. Description of the Drawings
[0039] Figure 1 It is a top view schematic diagram of a semiconductor device provided by an embodiment of the present invention;
[0040] Figure 2 It is Figure 1 The first cross-sectional structure schematic diagram of a semiconductor device provided along the section line A-A';
[0041] Figure 3 It is Figure 2Enlarged schematic diagram of the middle groove;
[0042] Figure 4 For Figure 1 The second cross-sectional structure schematic diagram of a semiconductor device along the section line A-A';
[0043] Figure 5 The flow schematic diagram of a preparation method of a semiconductor device provided by an embodiment of the present invention;
[0044] Figure 6 For Figure 5 The corresponding preparation process flow chart of a semiconductor device;
[0045] Figure 7 The flow schematic diagram of another preparation method of a semiconductor device provided by an embodiment of the present invention;
[0046] Figure 8 For Figure 7 The corresponding preparation process flow chart of a semiconductor device;
[0047] Figure 9 The flow schematic diagram of yet another preparation method of a semiconductor device provided by an embodiment of the present invention;
[0048] Figure 10 For Figure 9 The corresponding preparation process flow chart of a semiconductor device. Detailed implementation manners
[0049] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0050] Figure 1 The top view schematic diagram of a semiconductor device provided by an embodiment of the present invention, Figure 2 For Figure 1 The first cross-sectional structure schematic diagram of a semiconductor device along the section line A-A' provided, as Figure 1 And Figure 2As shown, the semiconductor device includes: a substrate 10; an epitaxial structure 20 located on one side of the substrate 10; a two-dimensional electron gas formed in the epitaxial structure 20; a groove 30 located in the epitaxial structure 20 and at least penetrating the two-dimensional electron gas; a contact medium 40 disposed in the groove 30; the electron concentration of the contact medium 40 is greater than that of the epitaxial structure 20; an ohmic contact electrode 50, the ohmic contact electrode 50 is located on the side of the contact medium 40 away from the substrate 10; the ohmic contact electrode 50 forms an ohmic contact with the contact medium 40.
[0051] Exemplarily, the substrate 10 can be one or a combination of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, silicon, or any other material capable of growing group-III nitrides. The epitaxial structure 20 located on one side of the substrate 10 can be formed by one or more of group-III-V nitrides such as gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum nitride, or indium aluminum gallium nitride. The two-dimensional electron gas can be understood as being formed in the heterojunction structure between the channel layer 203 and the barrier layer 205.
[0052] Specifically, the groove 30 is located in the epitaxial structure 20 and at least penetrates the two-dimensional electron gas. That is to say, the groove 30 can terminate at the two-dimensional electron gas or can penetrate the entire channel layer 203, that is, the opening depth of the groove 30 is equal to or greater than the distance between the surface of the epitaxial structure 20 away from the substrate 10 and the two-dimensional electron gas. A contact medium 40 is disposed in the groove 30, and the electron concentration of the contact medium 40 is greater than that of the epitaxial structure 20. In this way, it can be ensured that the ohmic contact electrode 50 forms an ohmic contact with the contact medium 40, and the ohmic contact resistance is small. Further, the contact medium 40 can be regrown with heavily doped gallium nitride in the groove 30 by Metal-organic Chemical Vapor Deposition (MOCVD), that is, the contact medium 40 includes heavily doped gallium nitride, and the doping impurity can include silicon. The concentration of the doping impurity silicon is, for example, 1×10 18 cm -3 -1×10 22 cm -3 , realizing the heavy doping of the doping medium silicon. That is, the contact medium 40 is gallium nitride doped with silicon element. Since the contact medium has a high electron concentration and the electron concentration of the contact medium 40 is greater than that of the epitaxial structure 20, when the ohmic contact electrode 50 is prepared on the side of the contact medium 40 away from the substrate 10, it can be ensured that the ohmic contact electrode 50 forms a good ohmic contact with the contact medium 40.
[0053] Compared with directly disposing an ohmic contact electrode on one side of an epitaxial structure in the prior art, such that the ohmic contact electrode forms an ohmic contact with the epitaxial structure, in the embodiments of the present invention, regrowing heavily doped gallium nitride in the groove can reduce the ohmic contact resistance, and further can increase the output current and output power of the semiconductor device.
[0054] Specifically, the ohmic contact electrode 50 may include a source electrode 501 and a drain electrode 502. The semiconductor device may further include a Schottky electrode, and the Schottky electrode may be a gate electrode 60. It can be understood that the position where the groove 30 is disposed corresponds to the source region and the drain region, so as to dispose the source electrode 501 and the drain electrode 502 on the side of the contact medium 40 away from the substrate 10.
[0055] For the semiconductor device provided in the embodiments of the present invention, by disposing a groove in the epitaxial structure, the groove at least penetrates through the two-dimensional electron gas, so that the regions where the groove is disposed can be respectively a source region and a drain region, so as to dispose the ohmic contact electrode. A contact medium is disposed in the groove, and the electron concentration of the contact medium is greater than that of the epitaxial structure. Thus, when the ohmic contact electrode is disposed on the side of the contact medium away from the substrate, it can be ensured that the ohmic contact electrode forms an ohmic contact with the contact medium, and further the ohmic contact resistance can be reduced, and the output current and output power of the semiconductor device can be increased.
[0056] Optionally, Figure 3 For Figure 2 the enlarged schematic diagram of the groove in Figure 2 and Figure 3 , in the first direction (such as the X direction shown in Figure 3 ), the maximum opening width of the groove 30 is L1, and the minimum opening width is L2, where, (L1 - L2) / L1 ≤ 20%; along the thickness direction of the semiconductor device (such as the Y direction shown in Figure 3 ), the maximum opening depth of the groove 30 is D1, and the minimum opening depth is D2, where, (D1 - D2) / D1 ≤ 20%; the first direction X intersects with the thickness direction Y of the semiconductor device.
[0057] It can be understood that by etching the groove 30 in the epitaxial structure 20 through an etching process, the surface roughness of the groove 30 is relatively large. That is to say, when the heavily doped gallium nitride is regrown in the groove 30 subsequently, the contact effect between the contact medium 40 and the epitaxial structure 20 is poor, and further the contact resistance is increased.
[0058] Specifically, after preparing the groove 30 in the embodiments of the present invention, under the treatment of a surfactant atmosphere, the roughness of the surface of the groove 30 is improved, which can improve the diffusion rate of gallium and nitrogen atoms on the surface of the groove 30, promote surface reconstruction on the surface of the groove 30, and further reduce the roughness of the surface of the groove 30. That is to say, along the first direction X, the maximum opening width L1 and the minimum opening width L2 of the groove 30 satisfy (L1 - L2) / L1 ≤ 20%, and along the thickness direction Y of the semiconductor device, the maximum opening depth D1 and the minimum opening depth D2 of the groove 30 satisfy (D1 - D2) / D1 ≤ 20%, that is, the maximum opening width is approximately equal to the minimum opening width, and the maximum opening depth is approximately equal to the minimum opening depth. In this way, it can be ensured that the surface of the groove 30 is relatively smooth, the electron mobility at the interface position between the groove 30 and the contact medium 40 can be improved, and further the contact resistance between the epitaxial structure 20 and the contact medium 40 can be reduced. In this way, the ohmic contact resistance can be further reduced, and the output current and output power of the semiconductor device can be improved.
[0059] Optionally, continue to refer to Figure 2 , the contact area S1 between the contact medium 40 and the inner wall of the groove 30, and the surface area of the inner wall is S2; wherein, S1 / S2 ≥ 80%.
[0060] Specifically, the inner wall of the groove 30 includes a groove side wall and a groove bottom surface. The contact area S1 between the contact medium 40 and the inner wall and the surface area S2 of the inner wall satisfy S1 / S2 ≥ 80%. That is to say, the contact medium 40 has a large contact rate with the inner wall of the groove. Since it is not easy to form a film at the concave position on the side wall of the groove 30 of the contact medium 40, it will cause the contact medium 40 to not cover the concave position. Therefore, in the embodiments of the present invention, by improving the roughness of the surface of the groove 30, it is beneficial to ensure that the groove 30 has a high surface flatness, that is, the maximum opening width of the groove 30 is approximately equal to the minimum opening width, and the maximum opening depth is approximately equal to the minimum opening depth. In this way, the contact area between the contact medium 40 and the groove 30 can be increased, and further the electron mobility at the position between the inner wall surface and the contact medium 40 can be improved, and the contact resistance between the epitaxial structure 20 and the contact medium 40 can be reduced, and the ohmic contact resistance can be further reduced, and the output current and output power of the semiconductor device can be improved.
[0061] Optionally, continue to refer to Figure 2 , the epitaxial structure 20 includes: a nucleation layer 201, located on one side of the substrate 10; a buffer layer 202, located on the side of the nucleation layer 201 away from the substrate 10; a channel layer 203, located on the side of the buffer layer 202 away from the substrate 101; a barrier layer 205, located on the side of the channel layer 203 away from the substrate 10, and the barrier layer 205 and the channel layer 203 form a two-dimensional electron gas.
[0062] Specifically, the semiconductor device includes an active region aa and a passive region bb. The active region aa can be understood as the region where a two-dimensional electron gas, electrons, or holes exist below it. Its working state and characteristics are affected by the external circuit, and it is the active working region of the semiconductor device. The passive region bb participates in the operation of the semiconductor device, but its working state is not affected by the external circuit. For example, the lead-out structure of the electrodes in the active region aa can be set in the passive region bb, and the passive region bb can be arranged around the active region aa.
[0063] Exemplarily, continuing to refer to Figure 2 , the material of the nucleation layer 201 can be aluminum nitride, which is located between the substrate 10 and the buffer layer 202. The nucleation layer 201 affects parameters such as the crystal quality, surface morphology, and electrical properties of the heterojunction material above. The nucleation layer 201 varies with different substrate materials and mainly plays the role of matching the substrate material and the semiconductor material layer in the heterojunction structure.
[0064] Exemplarily, continuing to refer to Figure 2 , the buffer layer 202 is located on one side of the substrate 10. The material of the buffer layer 202 can be gallium nitride, and the buffer layer 202 can include iron atoms, which is beneficial to achieving the high-resistance performance of the buffer layer 202, ensuring that vertical leakage can be blocked and the pinch-off performance of the semiconductor device can be improved. The buffer layer 202 can play the role of bonding the semiconductor material layer to be grown next and can also protect the substrate 10 from being invaded by some metal ions. The material of the buffer layer 202 can be a group III nitride material such as AlGaN, GaN, or AlGaInN.
[0065] Exemplarily, continuing to refer to Figure 2 , the channel layer 203 can be a group III nitride, such as Al x Ga 1-x N, where 0 ≤ x < 1, that is, at the interface between the channel layer 203 and the barrier layer 205, which is the energy of the conduction band edge of the channel layer 203 is less than the energy of the conduction band edge of the barrier layer 205. Exemplarily, x = 0 indicates that the channel layer 203 is GaN. The channel layer 203 can also be other group III nitrides, such as InGaN or AlInGaN. The channel layer 203 can be undoped or unintentionally doped. The channel layer 203 can also be a multi-layer structure, such as a combination of superlattice, GaN, or AlGaN.
[0066] Exemplarily, continuing to refer to Figure 2 , the barrier layer 205 can be AlN, AlInN, AlGaN, or AlInGaN. The barrier layer 205 has a sufficient thickness and a sufficiently high Al component to form a significant carrier concentration at the interface between the channel layer 203 and the barrier layer 205.
[0067] Exemplarily, continuing to refer to Figure 2 , the channel layer 203 may include GaN, and the barrier layer 205 may include AlGaN. That is, the material of the barrier layer 205 has a higher bandgap than the material of the channel layer 203, and the channel layer 203 may also have a greater electron affinity than the barrier layer 205. Due to the bandgap difference between the barrier layer 205 and the channel layer 203 and the piezoelectric polarization effect between the barrier layer 205 and the channel layer 203, a two-dimensional electron gas is formed in the channel layer 203 and the barrier layer 205.
[0068] It can be understood that the epitaxial structure 20 may further include a capping layer 206, and the capping layer 206 is located on the surface of the barrier layer 205 away from the substrate 10. The capping layer can reduce surface states, reduce surface leakage of subsequent semiconductor devices, suppress current collapse, and thus improve the performance and reliability of the epitaxial structure 20 and semiconductor devices.
[0069] Optionally, the epitaxial structure 20 may further include a spacer layer 204 located on the side of the channel layer 203 away from the substrate 10. Exemplarily, continuing to refer to Figure 2 , the spacer layer 204 can raise the barrier to increase the confinement of the two-dimensional electron gas, while reducing alloy scattering and improving the mobility. Exemplarily, the material of the spacer layer 204 can be AlN.
[0070] Optionally, Figure 4 For Figure 1 a second cross-sectional structure schematic diagram of a semiconductor device along the section line A-A', as Figure 4 shown, the groove 30 penetrates through the channel layer 203.
[0071] Specifically, the groove 30 penetrates through the channel layer 203, that is, the opening depth of the groove 30 is greater than or equal to the sum of the thicknesses of the capping layer 206, the barrier layer 205, the spacer layer 204, and the channel layer 203. Compared with the scheme where the groove 30 only penetrates to the two-dimensional electron gas, this will increase the flow of the two-dimensional electron gas in the channel. After applying a voltage, the source electrode 501 will be conducted through the contact medium 40, the channel layer 203, and the drain electrode 502, which can further reduce the ohmic contact resistance and thus increase the output current of the semiconductor device.
[0072] It should be understood that, from the perspective of semiconductor device design, in the embodiments of the present invention, by providing a contact medium in the groove and improving the roughness of the groove surface, the ohmic contact resistance can be reduced, thereby increasing the output current and output power of the semiconductor device. The semiconductor devices include but are not limited to: high-power high electron mobility transistors operating in high-voltage and high-current environments, transistors with a Silicon-On-Insulator (SOI) structure, gallium arsenide (GaAs)-based transistors, and Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), Metal-Semiconductor Field-Effect Transistors (MISFETs), Double Heterojunction Field-Effect Transistors (DHFETs), Junction Field-Effect Transistors (JFETs), Metal-Semiconductor Field-Effect Transistors (MESFETs), Metal-Semiconductor Heterojunction Field-Effect Transistors (MISHFETs), or other field-effect transistors. The grooves and the contact medium filled in the grooves provided in the embodiments of the present invention can be widely used in the manufacturing fields of semiconductor devices such as radio frequency microwave and power electronics. In particular, for gallium nitride electronic devices with a large bandgap, high electron mobility, high breakdown field strength, and good thermal conductivity, the advantages are more obvious, and they can better meet the high-performance requirements of rapidly developing fields such as electronic communication.
[0073] Based on the same inventive concept, the embodiments of the present invention also provide a method for manufacturing a semiconductor device. Figure 5 FIG. is a schematic flow chart of a method for manufacturing a semiconductor device provided by an embodiment of the present invention. Figure 6 is Figure 5 a corresponding process flow chart of a semiconductor device manufacturing process, as Figure 5 and Figure 6 shown. The method for manufacturing the semiconductor device includes:
[0074] S101. Provide a substrate and fabricate an epitaxial structure on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure.
[0075] Specifically, referring to Figure 6 Step a1 in [reference], a heterojunction structure is included between the channel layer and the barrier layer of the epitaxial structure. The two-dimensional electron gas can be understood as being formed in the heterojunction structure between the channel layer 203 and the barrier layer 205.
[0076] S102. Prepare a groove in the epitaxial structure, and the groove penetrates at least the two-dimensional electron gas.
[0077] Specifically, referring to Figure 6 Step b1 in [reference], etch a groove 30 in the epitaxial structure 20 through an etching process. The setting position of the groove 30 corresponds to the source region and the drain region, and the groove 30 penetrates at least the two-dimensional electron gas.
[0078] S103. Fill a contact medium in the groove; the electron concentration of the contact medium is greater than that of the epitaxial structure.
[0079] Specifically, referring to Figure 6 Step c1 in [reference], fill a contact medium 40 in the groove 30, which can be understood as re-growing heavily doped gallium nitride in the groove 30. The electron concentration of the contact medium 40 is greater than that of the epitaxial structure 20. Then, when an ohmic contact electrode 50 is prepared on the side of the contact medium 40 away from the substrate 10, it can ensure that a good ohmic contact is formed between the ohmic contact electrode 50 and the contact medium 40.
[0080] S104. Prepare an ohmic contact electrode on the side of the contact medium away from the substrate, and the ohmic contact electrode forms an ohmic contact with the contact medium.
[0081] Specifically, referring to Figure 6 Step d1 in [reference], the ohmic contact electrode 50 can be the source electrode 501 and the drain electrode 502. Compared with directly setting an ohmic contact electrode on one side of the epitaxial structure in the prior art, such that the ohmic contact electrode forms an ohmic contact with the epitaxial structure, in the embodiment of the present invention, by setting a contact medium 40 in the groove, that is, growing heavily doped gallium nitride in the groove 30, the ohmic contact electrode 50 forms an ohmic contact with the contact medium 40, which can reduce the ohmic contact resistance, and further can increase the output current and output power of the semiconductor device.
[0082] For the method for preparing a semiconductor device provided by the embodiment of the present invention, by setting a groove and filling a contact medium in the groove, the contact medium can enable the ohmic contact electrode to form an ohmic contact with the epitaxial structure, thus reducing the ohmic contact resistance and increasing the output current and output power of the semiconductor device.
[0083] Optionally, Figure 7 is a schematic flowchart of another method for preparing a semiconductor device provided by the embodiment of the present invention. Figure 8 is Figure 7Process flow diagram for manufacturing a corresponding semiconductor device Figure 7 and Figure 8 Based on the above embodiments, the operations after forming the groove in the epitaxial structure are elaborated in detail. For example Figure 7 and Figure 8 As shown, the method for manufacturing the semiconductor device includes:
[0084] S201. Provide a substrate and form an epitaxial structure on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure.
[0085] S202. Form a groove in the epitaxial structure, and the groove penetrates at least the two-dimensional electron gas.
[0086] S203. Introduce a surface-active gas into the metalorganic chemical vapor deposition reaction chamber.
[0087] Specifically, continue to refer to Figure 8 step e1 in Figure 2 and Figure 3 . After forming the groove 30, introduce a surface-active gas into the metalorganic chemical vapor deposition reaction chamber to perform surface treatment on the groove 30 to improve the roughness of the surface of the groove 30. Exemplarily, the surface-active gas can be indium. In an indium atmosphere, the roughness of the surface of the groove 30 is improved. As a surfactant, indium improves the diffusion rate of gallium and nitrogen atoms on the surface of the groove 30, promotes surface reconstruction on the surface of the groove 30, and thus can reduce the roughness of the surface of the groove 30. That is, along the first direction X, the maximum opening width L1 and the minimum opening width L2 of the groove 30 satisfy (L1 - L2) / L1 ≤ 20%, and along the thickness direction Y of the semiconductor device, the maximum opening depth D1 and the minimum opening depth D2 of the groove 30 satisfy (D1 - D2) / D1 ≤ 20%. That is, the maximum opening width is approximately equal to the minimum opening width, and the maximum opening depth is approximately equal to the minimum opening depth. In this way, it can be ensured that the surface of the groove 30 is relatively smooth, the electron mobility at the interface position between the groove 30 and the contact medium 40 can be improved, and thus the contact resistance between the epitaxial structure 20 and the contact medium 40 can be reduced. In this way, the ohmic contact resistance can be further reduced, and the output current and output power of the semiconductor device can be improved.
[0088] Exemplarily, when introducing the surface-active gas, the temperature in the chamber can be 650°C - 950°C. It can be understood that variables such as the flow rate, pressure, and temperature of the introduced surface-active gas can be controlled according to the roughness of the groove surface.
[0089] Exemplarily, the introduction time of the surface active gas can be 3 min - 25 min, and the introduction rate can be 10 ml / min - 1500 ml / min, so as to fully improve the roughness of the surface of the groove 30, further reduce the ohmic contact resistance, and increase the output current and output power of the semiconductor device.
[0090] S204. Fill the groove with a contact medium; the electron concentration of the contact medium is greater than that of the epitaxial structure.
[0091] S205. Prepare an ohmic contact electrode on the side of the contact medium away from the substrate, and the ohmic contact electrode forms an ohmic contact with the contact medium.
[0092] In the manufacturing method of the semiconductor device provided by the embodiment of the present invention, by using the surface active gas, the surface of the groove can be reconstructed, thereby improving the roughness of the surface of the groove, ensuring that the surface of the groove is relatively smooth, increasing the electron mobility at the interface between the groove and the contact medium, and further reducing the contact resistance between the epitaxial structure and the contact medium. In this way, the ohmic contact resistance can be further reduced, and the output current and output power of the semiconductor device can be increased.
[0093] Optionally, Figure 9 is a schematic flowchart of another manufacturing method of the semiconductor device provided by the embodiment of the present invention, Figure 10 is Figure 9 a corresponding process flowchart of the manufacturing process of a semiconductor device, Figure 9 and Figure 10 On the basis of the above embodiment, the operations before preparing the groove in the epitaxial structure are elaborated in detail. Continuing to refer to Figure 9 and Figure 10 , the manufacturing method of the semiconductor device includes:
[0094] S301. Provide a substrate and prepare an epitaxial structure on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure.
[0095] S302. Prepare a mask layer on the side of the epitaxial structure away from the substrate.
[0096] Specifically, continuing to refer to Figure 10 step f1 in, for etching the groove 30 in the subsequent epitaxial structure 20, a mask layer 70 is prepared on the side of the epitaxial structure 20 away from the substrate 10. By setting the mask layer 70, on the one hand, it can protect the underlying film layer in the photolithography and etching processes, and on the other hand, it can prevent impurity diffusion.
[0097] Exemplarily, the material of the mask layer 70 can be silicon dioxide.
[0098] S303. Prepare a mask contact layer on the side of the mask layer away from the substrate; the binding ability of the mask contact layer with the contact medium is greater than that of the mask layer with the contact medium.
[0099] Specifically, continue to refer to Figure 10 Step f1 in. Due to the presence of the mask layer 70, the nucleation rate of gallium nitride on the mask layer 70 is very low, and the MO source above the mask layer 70 cannot be consumed and enter the groove 30, resulting in poor thickness consistency of the contact medium 40, and further leading to poor consistency of the ohmic contact resistance, affecting the performance of the device. Therefore, by preparing the mask contact layer 80, since the binding ability of the mask contact layer 80 with the contact medium 40 is greater than that of the mask layer 70 with the contact medium 40, that is, by depositing a mask contact layer 80 on the mask layer 70, since gallium nitride can nucleate and grow on the mask contact layer 80, most of the MO source above the mask contact layer 80 is consumed during the regrowth of gallium nitride, and thus will not enter the groove 30, making the thickness of the regrown gallium nitride in the groove 30 controllable. In this way, the thickness consistency of the regrown gallium nitride in the groove 30 can be improved, and further the consistency of the contact resistance value in each groove 30 can be ensured, improving the stability and reliability of the semiconductor device.
[0100] Exemplarily, the material of the mask contact layer 80 can be AlN or Si.
[0101] S304. Prepare a groove in the epitaxial structure, and the groove penetrates at least the two-dimensional electron gas.
[0102] Specifically, continue to refer to Figure 10 Step i1 in. The groove 30 penetrates at least the two-dimensional electron gas.
[0103] S305. Fill the groove with a contact medium; the electron concentration of the contact medium is greater than that of the epitaxial structure.
[0104] Specifically, continue to refer to Figure 10 Step j1 in. Fill the groove 30 with the contact medium 40.
[0105] S306. Remove the mask contact layer.
[0106] Specifically, continue to refer to Figure 10 Step c1 in. Remove the mask contact layer 80 through a wet cleaning process.
[0107] S307. Remove the mask layer.
[0108] Specifically, continue to refer to Figure 10 Step c1 in. Remove the mask layer 70 through a wet cleaning process. It can be understood that the mask layer 70 and the mask contact layer 80 can be removed simultaneously by the same process.
[0109] S308. Prepare an ohmic contact electrode on the side of the contact medium away from the substrate, and the ohmic contact electrode forms an ohmic contact with the contact medium.
[0110] The method for manufacturing a semiconductor device provided by the embodiments of the present invention can protect the underlying film layer during the photolithography and etching processes by preparing a mask layer before preparing the groove. By preparing a mask contact layer on the upper surface of the mask layer, it is beneficial to ensure the nucleation rate of gallium nitride, and then ensure that the thickness of the regenerated gallium nitride in the groove is controllable, improve the thickness uniformity of the regenerated gallium nitride in the groove, and further ensure the consistency of the contact resistance values in each groove, thereby improving the stability and reliability of the semiconductor device.
[0111] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A semiconductor device, characterized in that, Comprising: A substrate; An epitaxial structure located on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure; A groove located in the epitaxial structure and at least penetrating the two-dimensional electron gas; a contact medium is disposed in the groove; the electron concentration of the contact medium is greater than the electron concentration of the epitaxial structure; An ohmic contact electrode, the ohmic contact electrode being located on the side of the contact medium away from the substrate; the ohmic contact electrode forms an ohmic contact with the contact medium.
2. The semiconductor device according to claim 1, wherein Along a first direction, the maximum opening width of the groove is L1 and the minimum opening width is L2, wherein, (L1 - L2) / L1 ≤ 20%; Along the thickness direction of the semiconductor device, the maximum opening depth of the groove is D1 and the minimum opening depth is D2, wherein, (D1 - D2) / D1 ≤ 20%; the first direction intersects with the thickness direction of the semiconductor device.
3. The semiconductor device according to claim 1, wherein, The contact area between the contact medium and the inner wall of the groove is S1, and the surface area of the inner wall is S2; Wherein, S1 / S2 ≥ 80%.
4. The semiconductor device according to claim 1, characterized in that, The contact medium includes heavily doped gallium nitride; the doping impurity includes silicon; The concentration of the doped impurity is 1×10 18 cm -3 -1×10 22 cm -3 .
5. The semiconductor device according to claim 1, characterized in that, The epitaxial structure includes: A nucleation layer located on one side of the substrate; A buffer layer located on the side of the nucleation layer away from the substrate; A channel layer located on the side of the buffer layer away from the substrate; A barrier layer located on the side of the channel layer away from the substrate, the barrier layer and the channel layer form the two-dimensional electron gas.
6. The semiconductor device according to claim 5, wherein The groove penetrates the channel layer.
7. A method for manufacturing a semiconductor device, characterized in that, Comprising: Providing a substrate and preparing an epitaxial structure on one side of the substrate; a two-dimensional electron gas is formed in the epitaxial structure; Preparing a groove in the epitaxial structure, the groove at least penetrating the two-dimensional electron gas; Filling a contact medium in the groove; the electron concentration of the contact medium is greater than the electron concentration of the epitaxial structure; Preparing an ohmic contact electrode on the side of the contact medium away from the substrate, the ohmic contact electrode forms an ohmic contact with the contact medium.
8. The preparation method according to claim 7, characterized in that, After preparing the groove in the epitaxial structure, further comprising: Introducing a surface active gas into an organometallic chemical vapor deposition reaction chamber.
9. The preparation method according to claim 7, characterized in that, Before preparing the groove in the epitaxial structure, further comprising: Preparing a mask layer on the side of the epitaxial structure away from the substrate; Before preparing the ohmic contact electrode on the side of the contact medium away from the substrate, further comprising: Removing the mask layer.
10. The preparation method according to claim 9, characterized in that, After preparing the mask layer on the side of the epitaxial structure away from the substrate, further comprising: Preparing a mask contact layer on the side of the mask layer away from the substrate; the binding ability of the mask contact layer with the contact medium is greater than the binding ability of the mask layer with the contact medium; Before removing the mask layer, further comprising: Removing the mask contact layer.
Citation Information
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