Topological structure of partial power processing type ultra-high voltage conversion ratio switched capacitor converter and control method thereof

Abstract

The invention provides a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topological structure and a control method thereof, and the structure comprises a high-voltage side port which is connected with a high-voltage power supply or a load; the high-voltage side filter is used for filtering high-voltage side power input or load output; the magnetic element unit comprises a two-winding and multi-winding transformer, an autotransformer, a center tapped transformer and a coupling inductor; the switched capacitor unit comprises at least two switches and one or more capacitors, and the number of the capacitors is n; the system further comprises a high-frequency rectification inverter and a low-voltage side filter, and the low-voltage side filter is used for filtering low-voltage side power input or load output. According to the technical scheme, the switched capacitor unit and the magnetic element unit are flexibly configured, and electric energy conversion with various high voltage conversion ratios can be realized only by using open-loop control.

Description

Technical Field

[0001] The present invention relates to the technical field of converters, and particularly to a partial power processing type ultra-high voltage conversion ratio switched-capacitor converter topology and its control method. Background Art

[0002] The rapid progress of information technology, especially the breakthrough development in the fields of artificial intelligence and cloud computing, has significantly accelerated the performance innovation of key computing devices in data centers (including GPUs, CPUs, and ASICs). This technological leap has led to an exponential increase in the power supply requirements of computing units, thereby driving the power supply system into a period of profound transformation. Improving the power supply efficiency can not only effectively reduce the energy consumption expenditure, but also have a decisive impact on the power system adaptability of ultra-large-scale data centers. The power supply architecture is undergoing a strategic transformation from the traditional 12V system to the 48V system. As Figure 1 shown, this architecture innovation significantly reduces the transmission loss by increasing the operating voltage. To achieve this technological leap, the industry urgently needs to develop power conversion solutions with ultra-high voltage step-down ratios and compact structures. The core challenge lies in how to complete efficient energy conversion within a limited physical space, especially under the realistic conditions where the volume limitation of passive devices conflicts with the power density requirements. Breaking through these technical barriers will play an important role in promoting the construction of a green computing ecosystem. Aiming at the contradiction between high-voltage input and large-current output in the 48V to 1V power conversion, the new topology adopts a multi-stage conversion strategy: the first stage acts as a DC transformer to achieve fixed step-down, and the secondary stage focuses on dynamic voltage regulation and fast response. This functional decoupling design allows each module to be independently optimized, reduces the system complexity through a collaborative working mechanism, and enhances the power supply reliability and configurability at the same time.

[0003] In the field of electrical energy conversion without magnetic components or with few magnetic components, the conversion numbers based on switched-capacitor converters include a series of topologies. Such solutions can achieve voltage conversion by dozens of times through the combination of a precisely designed switch array and a capacitor matrix, showing significant power density advantages. The currently published high voltage conversion ratio switched-capacitor converter solutions are as Figure 2 shown. Where V in is the input-side voltage, and V o is the output-side voltage.

[0004] The Dickson switched-capacitor converter is as Figure 2 shown in (a). By controlling the switch pairs S1 and S2 in a complementary and symmetric manner, the alternating charging and discharging of multiple-stage capacitors and voltage superposition are realized to achieve a large step-down ratio. However, the Dickson switched-capacitor converter has two major technical bottlenecks: firstly, the hard charging and discharging characteristics of capacitor elements lead to over-stress; secondly, the hard switching of switching devices generates significant losses and electromagnetic interference, restricting its application in high-performance systems. The distributed inductance resonant switched-capacitor converter is as Figure 2As shown in Fig. (b), this solution introduces an inductive element to construct an LC resonant circuit, achieving zero-current switching and soft charge-discharge characteristics, and significantly reducing switching losses. A switched energy storage converter, such as Figure 2 As shown in Fig. (c), each inductor resonates with the corresponding capacitor, which is beneficial to the soft charging of the capacitor. Zero-current turn-off of all switches is achieved, effectively reducing the switching losses of the devices and improving electromagnetic interference. However, the presence of multiple resonant cavities poses strict requirements for the matching of resonant parameters.

[0005] The problems existing in the above solutions are as follows: (1) Soft switching and soft charge-discharge cannot be achieved, or multiple resonant inductors need to be introduced to implement soft switching and soft charge-discharge operations, reducing the power density; (2) To achieve a higher voltage conversion ratio, the number of active and passive devices needs to be increased exponentially, directly resulting in a reduction in efficiency. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology and its control method. By flexibly configuring the switched capacitor unit and the magnetic component unit, and only using open-loop control, power conversion with multiple high voltage conversion ratios can be achieved.

[0007] To achieve the above purpose, the present invention adopts the following technical solutions: A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology, comprising:

[0008] It includes a high-voltage side port, which is connected to a high-voltage power supply or a load;

[0009] A high-voltage side filter for filtering the high-voltage side power input or load output;

[0010] A magnetic component unit, which includes a two-winding and multi-winding transformer, an autotransformer, a center-tapped transformer, and a coupled inductor;

[0011] A switched capacitor unit, which includes at least two switches and one or more capacitors. The capacitors include n capacitors, and multiple capacitors from right to left are alternately connected to one port and another port of the magnetic component unit, that is, the 1st, 3rd,..., n-1th capacitors are connected to one port of the magnetic component unit, and the 2nd, 4th,..., nth capacitors are connected to another port of the magnetic component unit;

[0012] It further includes a high-frequency rectifier inverter and a low-voltage side filter, and the low-voltage side filter is used for filtering the low-voltage side power input or load output.

[0013] In a preferred embodiment, the switched capacitor unit includes four MOSFET switches, namely S1, S2, S3, S4, and three capacitors, namely C1, C2, C3.

[0014] In a preferred embodiment, the magnetic component unit specifically includes an inductor and an n:1 transformer with leakage inductance and its two ends short-circuited.

[0015] In a preferred embodiment, capacitor C1 and capacitor C3 are equal and less than capacitor C2, and the series resonance frequency of inductance Lr and the sum of capacitor C1 and capacitor C3 is equal to the switching frequency f s That is, it satisfies:

[0016]

[0017] In a preferred embodiment, the high-frequency rectifier inverter includes MOSFET switches S5, S6, S7, and S8.

[0018] The present invention also provides a control method for a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology. Based on the above-mentioned partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology, the converter includes 8 switching modes within a switching period t0 - t8. The following is the steady-state analysis of 4 modes within half of the period:

[0019] Mode 1, i.e., t0–t1: At time t0, S1, S3, S5, and S8 are turned on with zero voltage, S2, S4, S6, and S7 remain off, and the converter enters the steady-state stage; there are two power flows. The first one charges from the input side to capacitor C1, and then flows to the output side through the magnetic component unit. The second one charges from capacitor C2 to capacitor C3, and then flows to the output side through the magnetic component unit;

[0020] Mode 2, i.e., t1–t2: At time t1, S1 and S3 are turned off, S5 and S8 are driven to turn off, but the current flows through the body diode; the output capacitors C of S2 and S4 oss start to discharge, and the C of S1 and S3 oss starts to charge, and the current of the resonant circuit remains positive; when i Lm is greater than i Lk , the current of the secondary side winding crosses zero and reverses, and S5 and S8 turn off, and this mode 2 ends.

[0021] Mode 3, i.e., t2–t3: At time t2, S5 and S8 are turned off, and the C of S6 and S7 oss starts to discharge, and the C of S5 and S8 oss starts to charge; this process is faster than the charging and discharging process of the C of S1 - S4 oss , so the body diodes of S6 and S7 start to conduct, and this mode 3 ends.

[0022] Mode 4, i.e., t3–t4: The C of S2 and S4 oss remains in the discharge state, while the C of S1 and S3 ossMaintain the charging state; when this process ends, the body diodes of S2 and S4 start to conduct, and this mode 4 ends.

[0023] In a preferred embodiment, let the time of the first steady-state interval be t0–tA, and the time of the second steady-state interval be tA–tB. By solving the states of the resonant circuits in the two steady-state intervals, the voltage conversion ratio is deduced; in the first steady-state interval, the state equation of the circuit is expressed as:

[0024]

[0025] At the initial moment, the voltages of capacitor C1 and capacitor C3 reach their minimum values vC1min and vC3min respectively, the voltage of capacitor C2 reaches its maximum value vC2max, and the current of inductor Lk is zero; therefore, the initial capacitor voltages and inductor current are expressed as:

[0026]

[0027] In the second steady-state interval, the state equation of the circuit is expressed as

[0028]

[0029] At tA, the voltages of capacitor C1 and capacitor C3 reach their maximum values vC1max and vC3max respectively, the voltage of capacitor C2 reaches its minimum value vC2min, and the current of inductor Lk is zero; therefore, the initial capacitor voltages and inductor current in the second steady-state interval are expressed as

[0030]

[0031] The relationship between the output current and the inductor current within the switching period is expressed as:

[0032]

[0033] By substituting (1)-(4) into (5), it is simplified to:

[0034]

[0035] By juxtaposing (6) with (1)-(4), the simplified time-domain expressions of the inductor current and capacitor voltage within one switching period T s are expressed as follows:

[0036]

[0037] Finally, the voltage conversion ratio of the low voltage side to the high voltage side is:

[0038]

[0039] Compared with the prior art, the present invention has the following beneficial effects:

[0040] (1) Soft switching of all switches and soft charge and discharge of capacitors, higher conversion efficiency

[0041] Through reasonable design of software and hardware parameters, the topology family can achieve soft switching of all switches.

[0042] (2) Expandable voltage conversion ratio, wider application range

[0043] By reasonably configuring the number of modules of the switched-capacitor unit and magnetic components, a series of topology families capable of achieving different voltage conversion ratios can be obtained, realizing a wider application range.

[0044] (3) Magnetic components can be integrated, higher power density

[0045] The resonant inductor can be directly realized in the form of the leakage inductance of the transformer, and the transformer can be implemented as an autotransformer with a common winding for the primary and secondary sides. The volume of the magnetic components is reduced, and the loss of the magnetic components is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 Schematic diagram of a 48V DC bus architecture for a data center using an intermediate bus converter;

[0047] Figure 2 Published high voltage conversion ratio switched-capacitor converter schemes, where (a) is a Dickson switched-capacitor converter; (b) is a distributed inductance resonant switched-capacitor converter; (c) is a switched energy storage converter

[0048] Figure 3 Schematic diagram of the topology structure of a partial power processing type ultra-high voltage conversion ratio switched-capacitor converter according to a preferred embodiment of the present invention;

[0049] Figure 4 Topology diagram of a partial power processing type ultra-high voltage conversion ratio switched-capacitor converter topology structure according to a preferred embodiment of the present invention;

[0050] Figure 5 Schematic diagram of the main control and circuit waveforms of a partial power processing type ultra-high voltage conversion ratio switched-capacitor converter topology structure according to a preferred embodiment of the present invention;

[0051] Figure 6 Circuit time-sharing equivalent schematic diagram of a partial power processing type ultra-high voltage conversion ratio switched-capacitor converter topology structure according to a preferred embodiment of the present invention, where (a) is a time-sharing schematic diagram of mode 1, (b) is a time-sharing schematic diagram of mode 2, (c) is a time-sharing schematic diagram of mode 3, and (d) is a time-sharing schematic diagram of mode 4;

[0052] Figure 7 Six structural schematic diagrams of the magnetic component unit of the preferred embodiment of the present invention;

[0053] Figure 8 Two other topological structural schematic diagrams of a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology of the preferred embodiment of the present invention, wherein (a) is the second topological structural schematic diagram and (b) is the third topological structural schematic diagram. Detailed implementation manners

[0054] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0055] It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which the present application belongs.

[0056] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary embodiments according to the present application; as used herein, unless the context clearly indicates otherwise, the singular forms are also intended to include the plural forms. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0057] A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology, refer to Figure 3-8 , the composition of this topology family includes: a high-voltage side port connected to a high-voltage power supply or load; a high-voltage side filter for filtering the high-voltage side power input or load output, including but not limited to a capacitor filter, a CLC filter, etc.; a switched capacitor unit including two or more switches (including but not limited to MOSFETs, IGBTs, etc.) and one or more capacitors, and multiple capacitors from right to left are alternately connected to one port and another port of the magnetic component unit, that is, the 1st, 3rd, 5th,... capacitors are connected to one port of the magnetic component unit, and the 2nd, 4th, 6th,... capacitors are connected to another port; a magnetic component unit including but not limited to two-winding and multi-winding transformers, autotransformers, center-tapped transformers, coupled inductors, etc., and combinations of the above two; a high-frequency rectifier / inverter including but not limited to half-bridge type, full-bridge type, current-doubling type, and full-wave type rectifier / inverters, etc.; a low-voltage side filter for filtering the low-voltage side power input or load output, including but not limited to a capacitor filter, a CLC filter, etc.; a low-voltage side port connected to a low-voltage power supply or load.

[0058] One of the topological embodiments of this topology family is as Figure 4As shown. The topology includes: a high-voltage side port connected to a high-voltage power supply; a high-voltage side capacitor filter; a switched-capacitor unit including four MOSFET switches and three capacitors; a magnetic component unit, which is an n:1 transformer with a shorted leakage inductance at both ends; a full-bridge high-frequency rectifier / inverter; a low-voltage side capacitor filter; and a low-voltage side port connected to a load.

[0059] The main control and circuit waveforms, and the circuit time-sharing equivalent schematic diagram of the topology embodiment are as Figures 5-6 shown. The configuration and control method of the topology are as follows:

[0060] The high-voltage side port is connected to a voltage source, and the low-voltage side port is connected to a resistive load. The power flow is from the high-voltage side port to the low-voltage side port. The magnetic component unit is an Figure 1 inductor and an n:1 transformer with one side shorted. Capacitors C1 and C3 are equal and less than C2, and the series resonance frequency of inductor Lr and the sum of C1 and C3 is equal to the switching frequency f s i.e., it satisfies:

[0061]

[0062] The converter includes 8 switching modes within a switching period t0 - t8. The following is the steady-state analysis of 4 modes within half of the period:

[0063] Mode 1 (t0–t1): At time t0, S1, S3, S5, and S8 are turned on with zero voltage, S2, S4, S6, and S7 remain off, and the converter enters the steady-state stage. The equivalent circuit is as Figure 6 (a) shown. There are two main power flows. The first is from the input side to charge C1, and then flows to the output side through the magnetic component unit. The second is from C2 to charge C3, and then flows to the output side through the magnetic component unit.

[0064] Mode 2 (t1–t2): At time t1, S1 and S3 are turned off, S5 and S8 are driven to turn off, but the current flows through the body diodes. The equivalent circuit is as Figure 6 (b) shown. The output capacitors C oss of S2 and S4 start to discharge, and the C oss of S1 and S3 starts to charge. The current in the resonant circuit remains positive. When i Lm is greater than i Lk , the current in the secondary winding crosses zero and reverses, and S5 and S8 turn off, and this mode ends.

[0065] Mode 3 (t2–t3): At time t2, S5 and S8 are turned off, and the equivalent circuit is as Figure 6 (c) shown. The C oss of S6 and S7 starts to discharge, and the C ossCharging starts. This process is faster than the charging and discharging processes of S1 - S4, so the body diodes of S6 and S7 start to conduct, and this mode ends. oss The charging and discharging processes of oss are faster, so the body diodes of S6 and S7 start to conduct, and this mode ends.

[0066] Mode 4 (t3–t4): The Cs of S2 and S4 oss remain in the discharging state, while the Cs of S1 and S3 oss remain in the charging state. The equivalent circuit is as shown in Figure 6 (d). When this process ends, the body diodes of S2 and S4 start to conduct, and this mode ends.

[0067] The above intervals cover half of the switching period of the converter. In the next second half - cycle, each resonant circuit will operate with the opposite polarity, and the equivalent circuits will not be analyzed one by one. All switches are soft - switched. Based on the above analysis, the proposed converter operates symmetrically between two steady states and realizes energy conversion with a fixed voltage gain without closed - loop control.

[0068] Taking the above - mentioned topology as an example, ignoring the dead - time, assuming the time of the first steady - state interval is t0–tA and the time of the second steady - state interval is tA–tB, the voltage conversion ratio is derived by solving the states of the resonant circuits in the two steady - state intervals. In the first steady - state interval, the state equations of the circuit can be expressed as:

[0069]

[0070] At the initial moment, the voltages of capacitors C1 and C3 reach their minimum values vC1min and vC3min respectively, the voltage of capacitor C2 reaches its maximum value vC2max, and the current of inductor Lk is zero. Therefore, the initial capacitor voltages and inductor current can be expressed as:

[0071]

[0072] In the second steady - state interval, the state equations of the circuit can be expressed as

[0073]

[0074] At tA, the voltages of capacitors C1 and C3 reach their maximum values vC1max and vC3max respectively, the voltage of capacitor C2 reaches its minimum value vC2min, and the current of inductor Lk is zero. Therefore, the initial capacitor voltages and inductor current in the second steady - state interval can be expressed as

[0075]

[0076] The relationship between the output current and the inductor current within the switching period can be expressed as:

[0077]

[0078] By substituting (1)-(4) into (5), it can be simplified to:

[0079]

[0080] By juxtaposing (6) with (1)-(4), the simplified time-domain expressions of the inductor current and capacitor voltage over a switching period T s can be expressed as follows:

[0081]

[0082] Finally, the voltage conversion ratio of the low voltage side to the high voltage side can be obtained as:

[0083]

[0084] The magnetic component unit has multiple different implementation manners, including but not limited to Figure 7 the 6 structures shown. Among them, the (a) of structure Figure 7 and the (c) of Figure 7 utilize the short-circuit connection of the same-polarity terminals and can be implemented as an autotransformer, enabling the primary and secondary sides to share a winding. Figure 7 The (a) of Figure 7 and the corresponding autotransformer models of the (c) of Figure 7 are shown as the (e) of Figure 7 and the (f) of

[0085]

[0086]

[0087] Figure 8 Shown are two other topological embodiments of the described partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology family. Figure 8 The magnetic component unit in the (a) of Figure 7 adopts the structure of the (b) of Figure 8 to achieve a voltage conversion ratio of 10:1, while the magnetic component unit in the (b) of Figure 7 adopts the structure of the (c) of

[0088] In summary, for the partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology of the present invention, by flexibly configuring the switched capacitor unit and the magnetic component unit and only using open-loop control, the power conversion of multiple high voltage conversion ratios can be achieved.

Claims

1. A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology, characterized in that It includes: A high-voltage side port, which is connected to a high-voltage power supply or load; A high-voltage side filter for filtering the high-voltage side power input or load output; A magnetic component unit, where the magnetic component unit includes a two-winding and multi-winding transformer, an autotransformer, a center-tapped transformer, and a coupled inductor; A switched-capacitor unit, where the switched-capacitor unit includes at least two switches and one or more capacitors. The capacitors include n capacitors, and multiple capacitors from right to left are alternately connected to one port and another port of the magnetic component unit, that is, the 1st, 3rd, …, n-1th capacitors are connected to one port of the magnetic component unit, and the 2nd, 4th, …, nth capacitors are connected to another port of the magnetic component unit; It further includes a high-frequency rectifier inverter and a low-voltage side filter, and the low-voltage side filter is used for filtering the low-voltage side power input or load output.

2. A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology according to claim 1, characterized in that, The switched-capacitor unit includes four MOSFET switches, namely S1, S2, S3, S4, and three capacitors, namely C1, C2, C3.

3. A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology according to claim 2, characterized in that, The magnetic component unit specifically includes an inductor and an n:1 transformer with a leakage inductance and its two ends short-circuited.

4. A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology according to claim 3, characterized in that, The capacitor C1 is equal to the capacitor C3 and smaller than the capacitor C2. The series resonance frequency of the inductor Lr and the sum of the capacitor C1 and the capacitor C3 is equal to the switching frequency f s That is, it satisfies:

5. A partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology according to claim 4, characterized in that, The high-frequency rectifier inverter includes MOSFET switches S5, S6, S7, S8.

6. A control method for a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology, characterized in that, Based on the partial power processing type ultra-high voltage conversion ratio switched-capacitor converter topology structure described in any one of the above claims 1 to 5, the converter includes 8 switching modes within a switching period t0 - t8. The following is the steady-state analysis of 4 modes within half of the period: Mode 1, i.e., t0–t1: At the moment of t0, S1, S3, S5, and S8 are turned on with zero voltage, and S2, S4, S6, and S7 remain off, and the converter enters the steady-state stage; there are two power flows. The first one charges from the input side to capacitor C1, and then flows to the output side through the magnetic component unit. The second one charges from capacitor C2 to capacitor C3, and then flows to the output side through the magnetic component unit; Mode 2, namely t1–t2: At time t1, S1 and S3 are turned off, S5 and S8 are driven to turn off, but current flows through the body diodes; the output capacitors C of S2 and S4 oss begin to discharge, and the C of S1 and S3 oss begin to charge, and the current in the resonant circuit remains positive; when i Lm is greater than i Lk , the current in the secondary winding crosses zero and reverses, S5 and S8 turn off, and this Mode 2 ends; Mode 3, i.e., t2–t3: At time t2, S5 and S8 are turned off, and the C of S6 and S7 oss starts discharging, and the C of S5 and S8 oss starts charging; this process is faster than the charging and discharging process of the C of S1-S4 oss so the body diodes of S6 and S7 start conducting, and this Mode 3 ends; Mode 4, i.e., t3–t4: The Cs of S2 and S4 oss maintain a discharging state, while the Cs of S1 and S3 oss maintain a charging state; when this process ends, the body diodes of S2 and S4 start to conduct, and this Mode 4 ends.

7. The control method of a partial power processing type ultra-high voltage conversion ratio switched capacitor converter topology according to claim 6, characterized in that, Let the time of the first steady-state interval be t0–tA, and the time of the second steady-state interval be tA–tB. By solving the states of the resonant circuits in the two steady-state intervals, the voltage conversion ratio is derived; in the first steady-state interval, the state equation of the circuit is expressed as: At the initial moment, the voltages of capacitor C1 and capacitor C3 reach their minimum values vC1min and vC3min respectively, the voltage of capacitor C2 reaches its maximum value vC2max, and the current of inductor Lk is zero; therefore, the initial capacitor voltages and inductor current are expressed as: In the second steady-state interval, the state equation of the circuit is expressed as At tA, the voltages of capacitor C1 and capacitor C3 reach their maximum values vC1max and vC3max respectively, the voltage of capacitor C2 reaches its minimum value vC2min, and the current of inductor Lk is zero; therefore, the initial capacitor voltages and inductor current in the second steady-state interval are expressed as The relationship between the output current and the inductor current within the switching period is expressed as: By substituting (1)-(4) into (5) and simplifying, it becomes: Place (6) in parallel with (1)-(4), and the simplified time-domain expressions of the inductor current and capacitor voltage in one switching period T s are expressed as follows: Finally, the voltage conversion ratio of the low-voltage side to the high-voltage side is:

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