A method and system for double pulse test voltage current waveform timing deviation calibration

Abstract

The application discloses a method and system for double-pulse test voltage and current waveform time sequence deviation calibration, which comprises signal interception, time domain coarse alignment, periodic oscillation section interception, spectrum decomposition and oscillation frequency phase analysis, and frequency domain fine alignment and waveform reconstruction. The method extracts the inherent phase relationship of the voltage and current oscillation waveform after the switch device is turned off, combines signal preprocessing and frequency domain calculation, and realizes fast and high-precision automatic time sequence alignment. Compared with the hardware method, the method is simple to operate, does not need to make any modification to the circuit in advance, does not affect the reliability of the test result, does not depend on specific probes or test fixtures, has strong universality, and can be realized through software.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor device testing, and particularly relates to a method and system for calibrating timing deviation of voltage and current waveforms in double-pulse testing. BACKGROUND

[0002] In the early design stage of power electronic converters, it is crucial to accurately evaluate the losses of semiconductor switching devices (such as MOSFETs), and the double pulse test (DPT) is the most widely accepted and adopted method for measuring switching losses. In the double pulse test, engineers can accurately measure the switching losses by measuring the switching waveforms of the device under different conditions. Specifically, taking MOSFET as an example, only the gate-source voltage v gs (t), the drain-source voltage v ds (t), and the drain current i d (t) waveforms under predetermined conditions (turn-off voltage, current at switching time, driving speed, etc.) need to be measured, and the product of v ds (t) and i d (t), i.e. the instantaneous loss p(t) = v ds (t)i d (t), is integrated, and the corresponding switching loss energy parameters (such as turn-on energy E on and turn-off energy E off ) can be obtained.

[0003] The accurate measurement of switching losses not only requires that the voltage and current probes used have a high enough bandwidth, but also requires that the measured v ds (t) and i d(t) need to have consistent conversion time, that is, the timing of both appearing on the oscilloscope is consistent with the true situation. Therefore, before DPT testing, the voltage probe and the current probe used for measuring both need to be calibrated for timing skew. At present, generally, a timing skew calibration jig provided by the probe manufacturer is used to calibrate both, however, this method is not universal, and is only suitable for timing skew calibration of the specific probe of the manufacturer. If the voltage and current probes use products of different brands, this scheme cannot be used for calibration. In addition, this method can only ensure that both signals achieve good timing skew calibration under small signals, while actual DPT waveforms are large signal waveforms. If the timing skew calibration result completed under the small signal condition is still likely to cause tens to hundreds of ps of timing shift. Another commonly used scheme is to use single pulse testing (SPT), that is, after the inductor in DPT is replaced by a non-inductive resistor, the voltage and current waveforms are measured and aligned and calibrated at the same time. This method has universality and is completed under large signals, but needs to make many modifications to the DPT test platform. Once the mainboard and device used for DPT testing change, it needs to be re-performed. Generally, each implementation needs to consume several hours of time, which is very high in time cost, and has a high requirement for the professionalism of the implementer. It can be seen that there are many difficulties and challenges in the accurate hardware timing skew calibration operation before DPT testing through hardware means.

[0004] Therefore, another type of method is to calibrate the timing skew of DPT voltage and current waveforms through data post-processing. This type of method does not need to perform timing skew calibration operation before testing, but processes the obtained data, calculates the timing skew amount by using the specific physical relationship of the voltage and current signals, and performs software compensation. For example, due to the existence of the equivalent inductance L eff of the power circuit, the opening moment i d of the measured tube will produce a voltage drop on L eff , thereby causing a drop in v ds (t). The timing skew calibration can be achieved by aligning the rising edge of i d (t) with the falling edge of v ds (t), however, this method needs manual intervention, and cannot guarantee the reliability of the calibration result. Some oscilloscope manufacturers reconstruct the current and voltage waveforms by repeatedly trying and correcting the value of L eff based on this method, and compare them with the measured data, so as to iteratively calculate the accurate value of L eff and further obtain the corresponding timing skew amount. This method is relatively effective but has high implementation complexity, and the iterative process still needs to consume tens of minutes of calculation time, which is still not fast enough. SUMMARY

[0005] To solve the problems in the prior art, the present application provides a method and system for calibrating timing deviation of voltage and current waveform in double-pulse test.

[0006] The technical solutions of the present application are as follows:

[0007] A method for calibrating timing deviation of voltage and current waveform in double-pulse test, which is performed after the first pulse ends and the original voltage signal and the original current signal after the off of the measured device are obtained, the method comprising:

[0008] Cutting the combined waveform segment composed of the switch transient edge segment and the periodic oscillation segment of the measured device with the original voltage signal and the original current signal as the preprocessed signal;

[0009] Taking the time difference between the peak time of the original voltage signal and the first zero-crossing time of the original current signal in the preprocessed signal as the time-domain coarse alignment offset, performing time-domain coarse alignment compensation on the original current signal to obtain a coarse alignment current signal;

[0010] Removing the switch transient edge segment of the original voltage signal and the coarse alignment current signal and retaining the periodic oscillation segment to form a fine alignment input signal;

[0011] Obtaining the voltage spectrum and the current spectrum corresponding to the fine alignment input signal, extracting the frequency with the largest amplitude as the actual oscillation frequency, and calculating the original phase difference at the actual oscillation frequency;

[0012] Based on the actual oscillation frequency and the original phase difference, calculating the timing offset calibration time as the frequency-domain fine alignment offset, and performing frequency-domain fine alignment compensation on the original current signal in the preprocessed signal to complete the calibration of the timing deviation of the voltage and current waveform in double-pulse test.

[0013] Further, the specific method of cutting the combined waveform segment composed of the switch transient edge segment and the periodic oscillation segment of the measured device with the original voltage signal and the original current signal as the preprocessed signal comprises:

[0014] Identifying the off time of the measured device according to the rising edge of the original voltage signal, and cutting the combined waveform segment composed of the switch transient edge segment and the periodic oscillation segment of the measured device with the original voltage signal and the original current signal before and after the off time within a preset time window as the preprocessed signal.

[0015] Further, the measured device comprises MOSFET / HEMT, IGBT / BJT.

[0016] Further, the calculation method of the time-domain coarse alignment offset is as follows:

[0017] Δt coarse = t vds_pk - t id_zcd

[0018] wherein, Δt coarse is the time-domain coarse alignment offset; t vds_pk is the peak time of the original voltage signal; t id_zcd is the first zero-crossing time of the original current signal;

[0019] Further, the specific steps of obtaining the voltage spectrum and the current spectrum of the fine alignment input signal, extracting the frequency with the largest amplitude as the actual oscillation frequency, and calculating the original phase difference at the actual oscillation frequency include:

[0020] performing fast Fourier transform on the original voltage signal v ds_dsk (t) and the coarse alignment current signal i d_dsk (t) in the fine alignment input signal to obtain the corresponding voltage spectrum V ds_dsk (jω) and current spectrum I d_dsk (jω), and extracting the amplitude and phase of each frequency from the voltage spectrum V ds_dsk (jω) and current spectrum I d_dsk (jω), respectively;

[0021] obtaining the frequency f ds_dsk with the largest amplitude in the voltage spectrum V osc_vds (jω) and the frequency f d_dsk with the largest amplitude in the current spectrum I osc_id (jω) as the actual oscillation frequency f osc , wherein the actual oscillation frequency f osc satisfies the following formula:

[0022] f osc_vds = f ose_ip = f osc

[0023] calculating the original phase difference at the actual oscillation frequency f osc based on the actual oscillation frequency f align according to the following formula, and adjusting it to the range of [-π, π] through modulo 2π operation:

[0024] φ d__dsk = ∠I osc (jω2πf ds_dsk )- ∠V ose (jω2πf align )

[0025] wherein, φ d_dsk is the original phase difference; ∠I osc) is the phase corresponding to the actual oscillation frequency in the voltage signal. ds_dsk (jω2πf osc ) is the phase corresponding to the actual oscillation frequency in the voltage signal.

[0026] Further, the calculation method of the timing offset calibration time amount is as follows:

[0027] Based on the actual oscillation frequency and the original phase difference, the timing offset calibration time amount t is calculated according to the following formula: dsk

[0028]

[0029] Further, the specific method for compensating the original current signal in the preprocessed signal in the frequency domain fine alignment to complete the double-pulse test voltage and current waveform timing deviation calibration is as follows:

[0030] The original current signal in the preprocessed signal is compensated in the frequency domain fine alignment according to the following formula to complete the double-pulse test voltage and current waveform timing deviation calibration:

[0031] i′ d (t)=i d (t-t dsk )

[0032] In the formula, i d ′(t) is the original current signal after frequency domain fine alignment compensation; i d (t-t dsk ) is the process of compensating the original current signal in the preprocessed signal in the frequency domain fine alignment.

[0033] A system for double-pulse test voltage and current waveform timing deviation calibration is used to execute the method for double-pulse test voltage and current waveform timing deviation calibration described in any of the above, and the system comprises a signal intercepting module, a time domain coarse alignment module, a periodic oscillation segment intercepting module, a spectrum decomposition and oscillation frequency phase analysis module, and an offset amount calculation and waveform reconstruction module.

[0034] The signal intercepting module is used to intercept the combined waveform segment of the measured device having the original voltage signal and the original current signal composed of the switching transient edge segment and the periodic oscillation segment as a preprocessed signal.

[0035] The time domain coarse alignment module is used to take the time difference between the peak time of the original voltage signal and the first zero-crossing time of the original current signal in the preprocessed signal as the time domain coarse alignment offset amount, to compensate the original current signal in the time domain coarse alignment, and to obtain a coarse alignment current signal.

[0036] ​The periodic oscillation segment cutting module is configured to remove the switching transient edge segment of the original voltage signal and the coarse alignment current signal, retain the periodic oscillation segment, and form a fine alignment input signal.

[0037] The spectrum decomposition and oscillation frequency phase analysis module is configured to obtain voltage spectrum and current spectrum corresponding to the fine alignment input signal, extract a frequency with the largest amplitude as an actual oscillation frequency, and calculate an original phase difference at the actual oscillation frequency.

[0038] The frequency domain fine alignment and waveform reconstruction module is configured to calculate a time sequence offset calibration time based on the actual oscillation frequency and the original phase difference, take the time sequence offset calibration time as a frequency domain fine alignment offset, compensate the original current signal in the preprocessed signal in the frequency domain, and complete calibration of the time sequence deviation of the double-pulse test voltage and current waveform.

[0039] An electronic device includes a memory and a processor, the memory stores a computer program, and the processor is configured to call and run the computer program stored in the memory to execute the method according to any one of the preceding method.

[0040] A computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of the method according to any one of the preceding method.

[0041] Compared with the prior art, the present application has the following beneficial effects:

[0042] The present application provides a method and system for calibrating the time sequence deviation of a double-pulse test voltage and current waveform. The method extracts the inherent phase relationship of the voltage and current oscillation waveform after the switching device is turned off, combines signal preprocessing and frequency domain calculation, and realizes fast and high-precision automatic time sequence alignment. Compared with the hardware method, the present application is simple to operate, does not require any modification of the circuit in advance, does not affect the reliability of the test results, and does not depend on specific probes or test fixtures, and has strong universality and can be realized by software.

[0043] The present application has clear physical principles and is easy to program and implement. Through the two-level calibration mechanism of time domain coarse alignment and frequency domain fine alignment, the calibration of the DPT voltage and current signal can be completed within a few seconds without human intervention, and the results are reliable, credible and repeatable. In addition, the algorithm of the present application does not require repeated iteration and trial and error, and compared with the existing algorithm based on iteration, the calculation time can be greatly reduced, and the algorithm has the advantages of high efficiency and precision.

[0044] The present application uses frequency domain phase difference analysis instead of traditional time domain feature point matching, has strong anti-interference ability, and can still realize accurate time sequence offset calibration stably in the case of strong noise and DC bias error in the test data.

[0045] The method of the present application can be integrated into an oscilloscope post-processing software or as an independent analysis tool, and the whole process does not need manual experience, technical level and other factors interference, significantly reducing the professional threshold of the operator. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 A method flowchart for calibrating the timing deviation of voltage and current waveforms in double pulse testing;

[0047] Figure 2 A double pulse testing (DPT) circuit schematic diagram;

[0048] Figure 3 A DPT off-moment voltage and current oscillation waveform schematic diagram;

[0049] Figure 4 A step schematic diagram of intercepting waveform segments before and after the off-moment;

[0050] Figure 5 A time domain coarse alignment schematic diagram

[0051] Figure 6 A periodic oscillation segment intercepting schematic diagram

[0052] Figure 7 A frequency domain fine alignment schematic diagram

[0053] Figure 8(a) is one of the test result diagrams;

[0054] Figure 8(b) is the second of the test result diagrams. DETAILED DESCRIPTION

[0055] The present application will be further illustrated below in conjunction with the drawings and specific embodiments, and it should be understood that these embodiments are only used to illustrate the present application and not to limit the scope of the present application, and after reading the present application, those skilled in the art can make various modifications to the present application, which fall within the scope defined by the appended claims.

[0056] Example 1:

[0057] A method for calibrating the timing deviation of voltage and current waveforms in double pulse testing of the present application is performed after the first pulse ends and the original voltage signal and the original current signal after the off-moment of the measured device are obtained, and the method comprises:

[0058] S1, signal interception: intercepting the combined waveform segment of the measured device having original voltage signal and original current signal composed of switch transient edge segment and periodic oscillation segment as pre-processing signal; the switch transient edge segment includes the rising edge and the falling edge of the signal;

[0059] S2. Time-domain coarse alignment: The time difference between the peak time of the original voltage signal and the first zero crossing time of the original current signal in the preprocessed signal is used as the time-domain coarse alignment offset. The original current signal is then compensated for in the time domain coarse alignment to eliminate large-scale timing deviations and obtain a coarse-aligned current signal.

[0060] S3. Periodic oscillation segment extraction: Remove the switching transient edge segments of the original voltage signal and coarsely aligned current signal, retain the periodic oscillation segment, and form a finely aligned input signal;

[0061] S4. Spectrum decomposition and oscillation frequency phase analysis: Obtain the voltage spectrum and current spectrum corresponding to the finely aligned input signal, extract the frequency component with the largest amplitude as the actual oscillation frequency, and calculate the original phase difference at the actual oscillation frequency;

[0062] S5. Frequency Domain Fine Alignment and Waveform Reconstruction: Based on the actual oscillation frequency and the original phase difference, the timing offset calibration time is calculated and used as the frequency domain fine alignment offset. The original current signal in the preprocessed signal is then compensated for in the frequency domain fine alignment to complete the timing deviation calibration of the dual-pulse test voltage and current waveform.

[0063] Furthermore, the method of the present invention can also be used in the timing deviation calibration of voltage and current waveforms in multi-pulse testing. The steps of the method of the present invention only need to be performed after any one pulse of the multi-pulse test ends and the original voltage signal and original current signal of the device under test are obtained after being turned off.

[0064] Example 2:

[0065] This embodiment, based on Embodiment 1, further designs the following: In this example, a combined waveform segment consisting of a switching transient edge segment and a periodic oscillation segment, representing the original voltage and current signals of the device under test, is extracted as the preprocessed signal. Specific methods for this include:

[0066] The off-time during the measured period is identified by the rising edge of the original voltage signal, and a combined waveform segment consisting of the transient edge segment and the periodic oscillation segment with the original voltage signal and the original current signal is extracted before and after the off-time by shifting a preset time window as the preprocessed signal.

[0067] Furthermore, the time window should be able to cover the rising edge of the voltage signal, the falling edge of the current signal, and the oscillation waveforms of both. Generally, 300ns-1us is sufficient. An excessively long time window will not affect the processing results of this algorithm.

[0068] Example 3:

[0069] The embodiment is further designed on the basis of embodiment one, wherein the device under test comprises MOSFET / HEMT, IGBT / BJT or other switching devices, when the device under test is MOSFET or HEMT, the original voltage signal is drain-source voltage v ds , and the original current signal is drain current i d ; when the device under test is IGBT or BJT, the original voltage signal is collector-emitter voltage v ce , and the original current signal is collector current i c .

[0070] Embodiment four

[0071] The embodiment is further designed on the basis of embodiment one, wherein the calculation method of the time-domain coarse alignment offset in the embodiment is as follows:

[0072] Δt coarse = t vds_pk -t id_zcd

[0073] In the formula, Δt coarse is the time-domain coarse alignment offset; t vds_pk is the peak time of the original voltage signal; t id_zcd is the first zero-crossing time of the original current signal.

[0074] Embodiment five

[0075] The embodiment is further designed on the basis of embodiment one, wherein the specific steps for obtaining the voltage spectrum and the current spectrum of the fine alignment input signal, extracting the frequency component with the largest amplitude as the actual oscillation frequency, and calculating the original phase difference at the actual oscillation frequency include:

[0076] Performing fast Fourier transform on the original voltage signal v ds_dsk (t) and the coarse alignment current signal i d_dsk (t) in the fine alignment input signal to obtain the corresponding voltage spectrum V ds_dsk (jω) and current spectrum I d_dsk (jω), and extracting the amplitude and phase of each frequency from the voltage spectrum V ds_dsk (jω) and the current spectrum I d_dsk (jω), respectively.

[0077] Obtaining the frequency f osc_vds with the largest amplitude in the voltage spectrum V ds_dsk (jω) and the frequency f osc_id with the largest amplitude in the current spectrum I d_dsk (jω) as the actual oscillation frequency f osc , wherein the actual oscillation frequency f oscSatisfy the following formula:

[0078] f osc_vds = f osc_ip = f asc

[0079] Based on the actual oscillation frequency f osc The original phase difference at the actual oscillation frequency is calculated as follows, and it is adjusted to the range of [-π, π] by modulo 2π operation:

[0080] φ align = ∠I d_dsk (jω2πf osc )- ∠V ds_dsk (jω2πf osc )

[0081] In the formula, φ align is the original phase difference; ∠I d_dsk (jω2πf osc ) is the corresponding phase at the actual oscillation frequency in the current signal; and ∠V ds_dsk (jω2πf osc ) is the corresponding phase at the actual oscillation frequency in the voltage signal.

[0082] Example six:

[0083] The embodiment is further designed on the basis of example five, and the calculation method of the time offset calibration time amount in this example is as follows:

[0084] Based on the actual oscillation frequency phase difference and the theoretical 90° phase relationship, based on the actual oscillation frequency and the original phase difference, the time offset calibration time amount t dsk is calculated according to the following formula:

[0085]

[0086] Example seven:

[0087] The embodiment is further designed on the basis of example five, and the specific method for completing the time sequence deviation calibration of the double-pulse test voltage and current waveform by performing frequency domain fine alignment compensation on the original current signal in the preprocessed signal in this example is as follows:

[0088] The original current signal in the preprocessed signal is compensated by frequency domain fine alignment according to the following formula, and the time sequence deviation calibration of the double-pulse test voltage and current waveform is completed:

[0089] i′ d (t) = i d (t-t dsk )

[0090] In the formula, i′ d(t) is the original current signal after frequency domain fine alignment compensation; i d (t-t dsk ) is the process of frequency domain fine alignment compensation on the original current signal in the preprocessed signal.

[0091] Embodiment eight:

[0092] A system for double-pulse test voltage and current waveform timing deviation calibration of the application is used to execute the method for double-pulse test voltage and current waveform timing deviation calibration of any of the above embodiments, and the system comprises a signal intercepting module, a time domain coarse alignment module, a periodic oscillation segment intercepting module, a spectrum decomposition and oscillation frequency phase analysis module, and an offset calculation and waveform reconstruction module.

[0093] The signal intercepting module is used to intercept the combined waveform segment composed of the original voltage signal and the original current signal of the device under test, which is composed of the switching transient edge segment and the periodic oscillation segment, as the preprocessed signal.

[0094] The time domain coarse alignment module is used to take the time difference between the peak time of the original voltage signal and the first zero-crossing time of the original current signal in the preprocessed signal as the time domain coarse alignment offset, and compensate the original current signal in the time domain to eliminate large-scale timing deviation and obtain the coarse alignment current signal.

[0095] The periodic oscillation segment intercepting module is used to eliminate the switching transient edge segment of the original voltage signal and the coarse alignment current signal, and retain the periodic oscillation segment to form the fine alignment input signal.

[0096] The spectrum decomposition and oscillation frequency phase analysis module is used to obtain the voltage spectrum and current spectrum corresponding to the fine alignment input signal, extract the frequency with the largest amplitude as the actual oscillation frequency, and calculate the original phase difference at the actual oscillation frequency.

[0097] The frequency domain fine alignment and waveform reconstruction module is used to calculate the timing offset calibration time as the frequency domain fine alignment offset based on the actual oscillation frequency and the original phase difference, compensate the original current signal in the preprocessed signal in the frequency domain, and complete the double-pulse test voltage and current waveform timing deviation calibration.

[0098] Embodiment nine:

[0099] An electronic device of the application comprises a memory and a processor, the memory stores a computer program, and the processor is used to call and run the computer program stored in the memory to execute the method of any of the above embodiments.

[0100] A computer readable storage medium of the application stores a computer program, and the computer program is executed by a processor to realize the steps of any of the above embodiments.

[0101] Application Example 1:

[0102] This example, based on the DPT test circuit and using MOSFET as an example, further illustrates the principle of the method of this invention. Figure 2 This is the circuit schematic for DPT testing. Generally, the DPT test circuit consists of the transistor under test (Q). L It consists of a load inductor L and a test diode D (which can also be replaced with a switching transistor). Two pulses are used to achieve "current pre-charge" and "device testing," ultimately measuring the switching dynamic characteristics of the transistor under test under specific voltage and current conditions. During the test, a pulse is sent to Q... L Two pulses are applied to the gate. Q L During the initial turn-on period, the current in inductor L increases linearly, and V bus The voltage will charge the inductor current to the target value, and then Q L Turn off, capture the test tube Q at the moment of turn-off. L Gate-source voltage v gs (t), drain-source voltage v ds (t) and drain current i d The waveform (t) can be used to analyze the turn-off characteristics of the transistor under test (TDT) under target voltage and current conditions. Before the second pulse arrives, the inductor current freewheels through the accompanying diode. At the turn-on moment of the second pulse, the inductor current flows from the accompanying diode to the TDT Q. L Stream switching, capturing the V value at the activation time. gs (t), v ds (t) and i d The waveform (t) can be used to analyze the turn-on characteristics of the tube under test under target voltage and current conditions.

[0103] After the switching transistor is turned off, the equivalent inductance L of the power circuit eff It will resonate with parasitic capacitances, including the parasitic junction capacitance, thus v ds (t) and i d (t) The waveforms all exhibit significant oscillations. According to circuit theory, v ds (t) and i d The oscillation of (t) should have a 90° phase difference, and v ds (t) lags behind i d (t). In other words, theoretically, after the tested tube is turned off, i d (t) at the zero-crossing time, v ds (t) will reach its peak. This process is as follows: Figure 3 As shown.

[0104] The method of the present application relies on the above-mentioned 90° phase difference relationship, i.e. by identifying and extracting the original phase difference at the oscillation frequency of the measured voltage and current signals, the time offset amount that can force the 90° phase alignment is calculated and the waveforms are shifted accordingly to achieve accurate timing offset calibration. The specific operation steps of the method of the present application are as follows:

[0105] Algorithm input: i d (t), v ds (t) original waveform sequence data, i.e. the original voltage signal and the original current signal of the measured device after being turned off;

[0106] Step 1) intercept waveform segments before and after the off time, from the original v ds (t) and i d (t), a short period (combined waveform segment) containing the switching transient edge segment and the periodic oscillation segment is intercepted and taken as the input signal v ds_dsk_pre1 (t) and i d_dsk_pre1 (t) of the next step (coarse alignment), also as the preprocessed signal; the off time of the measured tube can be roughly identified according to the rising edge of the v ds (t) signal, and the waveform within hundreds of ns before and after the identified off transient is intercepted, which is shown in Figure 4 ;

[0107] Step 2) time domain coarse alignment, identify the time t ds_dsk_pre1 at which the peak value of v vds_pk (t) appears and the time t d_dsk_pre1 at which i vds_zcd (t) first crosses zero, and use their difference to force a coarse alignment, i.e.:

[0108] Δt coarse = t vds_pk -t id_zcd

[0109] The signals v ds_dsk_pre2 (t) and i d_dsk_pre2 (t) obtained in this step are roughly consistent with the above-mentioned 90° phase difference relationship, i.e. timing offset calibration has been initially achieved, and are taken as the input signals of step 3, as shown in Figure 5 ;

[0110] Step 3) intercept the periodic oscillation segment, only intercept and retain the waveform of the coarse alignment signal v ds_dsk_pre2 (t) and i d_dsk_pre2 (t) after the time t vds_pk , i.e. do not retain the part of the signal with the fast voltage rising edge and the current falling edge, but only retain the oscillation part; the retained signal is denoted as v ds_dsk (t) and i d_dsk (t) as the input signal of the subsequent fine alignment, as shown inFigure 6 ;

[0111] Step 4) Fast Fourier Transform (FFT) is applied to the input signal v ds_dsk (t) and i d_dsk (t) to obtain the corresponding frequency spectrum V ds_dsk (jω) and I d_dsk (jω). The amplitude and phase information of each frequency component are extracted from the two frequency spectra.

[0112] Step 5) Find the frequency components with the maximum amplitude in the frequency spectrum of V ds_dsk (jω) and I d_dsk (jω) respectively, and record the corresponding frequencies as f osc_vds and f osc_id . At this time, it should satisfy:

[0113] f ose_vds = f osc_ip = f osc

[0114] where f osc is the actual parasitic oscillation frequency detected from the voltage and current signals.

[0115] Step 6) Calculate the original phase difference φ osc at frequency f align using the following formula and adjust it to the range [-π, π] by modulo 2π operation:

[0116] φ align = ∠I dsk (jω2πf osc ) - ∠V ds_dsk (jω2πf osc )

[0117] Step 7) Calculate the timing offset calibration time t dsk by the following formula:

[0118]

[0119] Step 8) Time shift the original current waveform i d (t) by the following formula to complete the timing offset calibration of the voltage and current waveforms:

[0120] i′ d (t) = i d (t-t dsk )

[0121] After adjustment, v ds (t) and i d ′(t) are a set of correctly aligned signals, which can be used for further switching dynamic analysis such as switching loss calculation. Here tdsk The meaning of each component, Δt coarse is the time offset obtained by coarse alignment, the voltage and current signals can be roughly aligned, and the coefficient is -φ align / 2π can eliminate the original phase difference, so that the two signals are in phase, and the coefficient of 1 / 4 corresponds to a quarter of the period (90° phase shift), which forces i d Lead v ds to meet the theoretical phase relationship. This step is performed by Figure 7 Note that, as mentioned above, due to the coarse alignment step, the phase difference between the voltage and current waveforms should be close to 90°, Figure 7 The phase difference between the two waveforms is amplified, which is only used to illustrate the principle.

[0122] It is necessary to supplement the necessity of steps 2 and 3 of the above-mentioned steps. First, step 2 performs a coarse alignment, and the signals obtained by the coarse alignment have preliminarily achieved time offset calibration. However, due to significant noise, DC bias, DC drop and other disturbances in actual testing, these factors will seriously affect the accuracy of the time offset calibration, and the coarse alignment cannot identify and exclude these disturbances, so further calibration is required by the subsequent steps of the present application. Step 3 is to cut off the fast edge waveform of the switch transient on the basis of step 2, because the subsequent fine alignment is based on fast Fourier transform to convert the time domain signal to the frequency domain, and the switch edge contains rich high harmonic components, if retained, it cannot guarantee that the subsequent step can accurately identify the oscillation frequency component. Therefore, the correct implementation of steps 2 and 3 is an important guarantee for the subsequent steps of the present application to achieve accurate time offset calibration.

[0123] Application Example Two:

[0124] To verify the method of the present application, this example is tested on a DPT experimental platform. The device under test is a Navitas G3R40MT12J type silicon carbide MOSFET. The test equipment includes: Tek MDO3054 oscilloscope (bandwidth 500MHz, sampling rate 2.5GS / s), equipped with two TPP0500B type passive probes (bandwidth 500MHz) to measure the gate-source voltage vgs and the drain-source voltage vds respectively; the measurement of the drain current id uses a T&M company SSDN-015 coaxial shunt resistor. The calibration implementation process is as follows:

[0125] Original time offset detection: as shown in Figure 8(a), without calibration, the peak value of the drain-source voltage v ds The peak value of the drain current i d The time difference of the first zero crossing point, the initial time offset is about 4.6ns.

[0126] Algorithm implementation: the method of the present application is written as a MATLAB program, and the original vds (t) and i d (t) waveform data. The program automatically performs steps such as intercepting the oscillation segment, coarse alignment, and spectral analysis, and finally calculates the timing offset calibration amount t dsk = 4.678 ns.

[0127] Waveform compensation and verification: After time shift compensation of the original i d (t) according to formula (4), the calibration effect is shown in Fig. 8(a), v ds peak and i d zero-crossing point to achieve visual alignment. It is worth noting that the dashed line marked v ds peak and i d There is a slight offset between the first zero-crossing point, which is caused by the DC bias error of i d signal, but the algorithm effectively suppresses such interference through frequency domain phase analysis.

[0128] Side verification: Further observation of the opening transient process shown in Fig. 8(b) shows that the voltage drop segment of calibrated v ds is completely aligned with the current rise rate (di / dt) period of i d , indicating that the timing calibration result is accurate and reliable.

[0129] Effect analysis: The method of the present application can still accurately calculate the timing offset under real noise environment, and the calculation result can be verified by multiple aspects. The entire software processing process takes less than 1 second, without the need for manual intervention or hardware circuit adjustment, verifying the efficiency and robustness of the present application.

[0130] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed by the present application can be easily thought of by those skilled in the art, and should be covered within the protection scope of the present application.

Claims

1. A method for calibrating timing deviations of voltage and current waveforms in a dual-pulse test, performed after the first pulse ends and the original voltage and current signals of the device under test are acquired after it is turned off, characterized in that... The method includes: A combined waveform segment consisting of a switching transient edge segment and a periodic oscillation segment is extracted from the device under test, which contains the original voltage signal and the original current signal, and used as a preprocessed signal; The time difference between the peak time of the original voltage signal and the first zero crossing time of the original current signal in the preprocessed signal is used as the time-domain coarse alignment offset. The original current signal is then coarsely aligned in the time domain to obtain the coarsely aligned current signal. The switching transient edge segments of the original voltage signal and the coarsely aligned current signal are removed, and the periodic oscillation segment is retained to form the finely aligned input signal; Obtain the voltage spectrum and current spectrum corresponding to the finely aligned input signal, extract the frequency with the largest amplitude as the actual oscillation frequency, and calculate the original phase difference at the actual oscillation frequency; Based on the actual oscillation frequency and the original phase difference, the timing offset calibration time is calculated and used as the frequency domain fine alignment offset. The original current signal in the preprocessed signal is then compensated for frequency domain fine alignment to complete the timing deviation calibration of the dual-pulse test voltage and current waveform. The method for calculating the temporal coarse alignment offset is as follows: In the formula, Δt coarse t is the coarse alignment offset in the time domain; vds_pk The peak value of the original voltage signal; t id_zcd This is the moment when the original current signal first crosses zero; The specific steps of obtaining the voltage and current spectra corresponding to the finely aligned input signal, extracting the frequency component with the largest amplitude as the actual oscillation frequency, and calculating the original phase difference at the actual oscillation frequency include: For the original voltage signal v in the finely aligned input signal ds_dsk (t) and coarse-aligned current signal i d_dsk (t), perform a Fast Fourier Transform to obtain the corresponding voltage spectrum V. ds_dsk (jω) and current spectrum I d_dsk (jω), from the voltage spectrum V ds_dsk (jω) and current spectrum I d_dsk (jω) extracts the amplitude and phase of each frequency respectively; Obtain the voltage spectrum V ds_dsk (jω) The frequency f with the largest amplitude osc_vds and current spectrum I d_dsk The frequency f with the largest amplitude in (jω) osc_id As the actual oscillation frequency f osc Among them, the actual oscillation frequency f osc Satisfy the following formula: Based on the actual oscillation frequency f osc Calculate the original phase difference at the actual oscillation frequency using the following formula, and adjust it to the range [−π,π] using modulo 2π operations: In the formula, This represents the original phase difference; This is the phase corresponding to the actual oscillation frequency in the current signal; This represents the phase corresponding to the actual oscillation frequency in the voltage signal. The calculation method for the timing offset calibration time is as follows: Based on the actual oscillation frequency and the original phase difference, the timing offset calibration time t is calculated using the following formula. dsk : .

2. The method for calibrating timing deviations of voltage and current waveforms in a dual-pulse test according to claim 1, characterized in that, The specific method for extracting a combined waveform segment consisting of a switching transient edge segment and a periodic oscillation segment from the device under test, which contains the original voltage signal and the original current signal, as a preprocessed signal includes: The off-time during the measured period is identified based on the rising edge of the original voltage signal, and a combined waveform segment consisting of the original voltage signal and the original current signal, which is taken before and after the off-time and consists of the transient edge segment of the switch and the periodic oscillation segment, is extracted by shifting a preset time window as a preprocessed signal.

3. The method for calibrating timing deviations of voltage and current waveforms in a dual-pulse test according to claim 1, characterized in that, The devices under test include MOSFET / HEMT and IGBT / BJT.

4. The method for calibrating timing deviations of voltage and current waveforms in a dual-pulse test according to claim 1, characterized in that, The specific method for performing frequency domain fine alignment compensation on the original current signal in the preprocessed signal to complete the timing deviation calibration of the dual-pulse test voltage and current waveform is as follows: The timing deviation calibration of the dual-pulse test voltage and current waveforms is completed by performing frequency domain fine alignment compensation on the original current signal in the preprocessed signal using the following formula: ； In the formula, This is the original current signal after frequency domain fine alignment compensation; This is a process of performing frequency domain fine alignment compensation on the original current signal in the preprocessed signal.

5. A system for calibrating timing deviations of voltage and current waveforms in a dual-pulse test, used to perform the method for calibrating timing deviations of voltage and current waveforms in a dual-pulse test as described in any one of steps 1 to 4, characterized in that, The system includes a signal truncation module, a time-domain coarse alignment module, a periodic oscillation segment truncation module, a spectrum decomposition and oscillation frequency phase analysis module, and a frequency-domain fine alignment and waveform reconstruction module. The signal interception module is used to intercept the combined waveform segment consisting of the transient edge segment of switching and the periodic oscillation segment of the device under test, which has the original voltage signal and the original current signal, as the preprocessed signal; The time-domain coarse alignment module is used to perform time-domain coarse alignment compensation on the original current signal by using the time difference between the peak time of the original voltage signal and the first zero crossing time of the original current signal in the preprocessed signal as the time-domain coarse alignment offset, and to obtain the coarse-aligned current signal. The periodic oscillation segment extraction module is used to remove the switching transient edge segments of the original voltage signal and the coarsely aligned current signal, retaining the periodic oscillation segment to form a finely aligned input signal; The spectrum decomposition and oscillation frequency phase analysis module is used to obtain the voltage spectrum and current spectrum corresponding to the finely aligned input signal, extract the frequency with the largest amplitude as the actual oscillation frequency, and calculate the original phase difference at the actual oscillation frequency. The frequency domain fine alignment and waveform reconstruction module is used to calculate the timing offset calibration time based on the actual oscillation frequency and the original phase difference, and use it as the frequency domain fine alignment offset to perform frequency domain fine alignment compensation on the original current signal in the preprocessed signal, thus completing the timing deviation calibration of the dual-pulse test voltage and current waveform.

6. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor being configured to invoke and run the computer program stored in the memory to perform the method as described in any one of claims 1 to 4.

7. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 4 above.

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