Four-core F23 type millimeter wave voltage-controlled oscillator based on intra-core common mode technology

Abstract

The invention discloses a four-core F23 type millimeter wave voltage-controlled oscillator based on an intra-core common mode technology. The voltage-controlled oscillator comprises a three-coil coupling four-core class-F inductor and four voltage-controlled oscillator cores. The three-coil coupling quad-core class-F inductor comprises eight differential ports, four ports are connected with a grid electrode of a core negative resistance tube of the voltage-controlled oscillator, and the other four ports are connected with a drain electrode of the core negative resistance tube of the voltage-controlled oscillator. The negative resistance tubes of the four voltage-controlled oscillator cores are formed by NMOS tubes and PMOS tubes in an alternating mode. The voltage-controlled oscillator is in an F-type working state for differential mode current so as to improve phase noise; noise filtering is performed on the common-mode current through an intra-core natural common-mode path. According to the invention, millimeter wave frequency output with low phase noise can be realized in a compact layout.

Description

Technical Field

[0001] The present invention belongs to the field of millimeter wave front-end circuits of electronic communication technology, and in particular relates to a quad-core F23-type millimeter wave voltage-controlled oscillator based on intra-core common-mode technology. Background Art

[0002] Mobile communications technology has experienced rapid development over the past few decades and has now entered the era of fifth-generation mobile communications. This new generation of mobile communications offers faster speeds, wider bandwidth, and higher reliability. Simultaneously, mobile communications application scenarios are evolving rapidly, with industries such as autonomous driving and telemedicine booming. The significant increase in data rates has led to increasing spectrum constraints in the traditional sub-6 GHz band, hindering the development of high-performance communication systems. Currently, the international community has established a 14.75 GHz bandwidth allocation for 5G millimeter-wave communications, encompassing frequency bands such as 24.25-27.5 GHz, 37-43.5 GHz, and 66-71 GHz. Millimeter-wave communications place higher demands on the performance of frequency sources. Emerging communication scenarios require frequency sources to provide high-speed, low-latency, and high-spectral-purity signals. As a core component of a frequency source, the oscillator's phase noise directly determines its out-of-band noise, impacting the performance of the entire communication system.

[0003] In existing technology, common oscillator structures include ring oscillators and LC oscillators. LC oscillators have become the mainstream structure for millimeter-wave oscillator designs due to their stable output frequency and excellent phase noise performance. The passive components of an LC oscillator are solely inductors and capacitors. In traditional RF bands, existing CMOS processes provide on-chip inductors and capacitors with high quality factors, making it possible to design a voltage-controlled oscillator with good phase noise performance using only a single oscillator core. However, as oscillation frequencies increase to millimeter waves, the shrinking dimensions of inductors and capacitors lead to a significant decrease in quality factor and a sharp deterioration in noise performance. To improve the phase noise of millimeter-wave voltage-controlled oscillators, multi-core technology has been widely used in recent years. Multi-core technology can significantly reduce phase noise. Although this comes at the expense of increased area and power consumption, the overall performance indicator, FoM, remains unchanged, making it an excellent choice for millimeter-wave oscillator design. Common-mode second-harmonic and class-F third-harmonic tuning techniques also effectively reduce the impact of noise on the resonant cavity by modifying the harmonic components of the noise current and altering the oscillator's output waveform.

[0004] Among the existing technologies, the first existing document proposes a distributed coupled quad-core F23-type voltage-controlled oscillator (ALow Phase Noise and High FoM Distributed-Swing-Boosting Multi-Core Oscillator Using Harmonic-Impedance-Expanding Technique), which increases the output voltage amplitude and expands the harmonic impedance bandwidth by designing distributed coupled inductors. However, this distributed coupling requires the design of a three-stage coil, and the inductor occupies too large an area, making it difficult to expand to high frequencies. The second existing document proposes a quad-core voltage-controlled oscillator with intra-core shaping (Scalable Inter-Core-Shaping Multi-Core Oscillator With Canceled Common-Mode Destructive Coupling and Robust Common-Mode Resonance), which uses the different common-mode current flows of transistors to construct an intra-core common-mode resonant cavity, achieving good phase noise performance. However, it lacks tuning of the third harmonic, and the overall circuit performance still has room for improvement. Third, existing literature uses intra-core common-mode technology to design a dual-core F23 class voltage-controlled oscillator (A9.9-11.8GHz CMOS Dual-Core Class-F23 VCO Achieving 190.4dBc / Hz FoM With Inter-Core-Shaping), but the output frequency is only 10GHz. Due to the limitations of the inductor layout, this structure is difficult to directly expand to the millimeter wave frequency band. Summary of the Invention

[0005] To at least partially address one of the problems existing in the prior art, the present invention provides a quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology. This oscillator utilizes class F inductors within the quad-core structure to tune the third harmonic of the noise current and employs intra-core common-mode technology to tune the second harmonic, effectively reducing phase noise. The designed quad-core inductor and switched capacitor arrays offer high Q and excellent resonant cavity impedance performance. The millimeter-wave voltage-controlled oscillator provided by this invention features a clear and intuitive structure, while occupying a relatively small chip footprint.

[0006] The purpose of the present invention is achieved by at least one of the following technical solutions.

[0007] A quad-core F23 class millimeter wave voltage-controlled oscillator based on intra-core common-mode technology, comprising a three-coil coupled quad-core F class inductor and four voltage-controlled oscillator cores;

[0008] The three-coil coupled quad-core Class F inductor is a sixteen-terminal model, including eight differential ports;

[0009] The first port P1 and the second port P2 constitute a first differential port; the third port P3 and the fourth port P4 constitute a second differential port; the fifth port P5 and the sixth port P6 constitute a third differential port; the seventh port P7 and the eighth port P8 constitute a fourth differential port; the ninth port P9 and the tenth port P10 constitute a fifth differential port; the eleventh port P11 and the twelfth port P12 constitute a sixth differential port; the thirteenth port P13 and the fourteenth port P14 constitute a seventh differential port; the fifteenth port P15 and the sixteenth port P16 constitute an eighth differential port;

[0010] The four voltage-controlled oscillator cores are the first core, the second core, the third core and the fourth core; the first core is connected to the first differential port and the second differential port, the second core is connected to the third differential port and the fourth differential port, the third core is connected to the fifth differential port and the sixth differential port, and the fourth core is connected to the seventh differential port and the eighth differential port.

[0011] Furthermore, the three-coil coupled quad-core F-type inductor includes sixteen segments of inductors, and the sixteen segments of inductors include eight drain inductors and eight gate inductors;

[0012] The first drain inductor L D1 The opposite end and the eighth drain inductor L D8 The first drain inductor L D1 The same-name terminal is used as the first port P1, and the eighth drain inductor L D8 The opposite-name end of the 14th port P14;

[0013] The second drain inductor L D2 The opposite end and the third drain inductor L D3 The second drain inductor L D2 The same-name terminal is used as the second port P2, and the third drain inductor L D3 The opposite-name end of the jack is used as the fifth port P5;

[0014] Fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The opposite end is connected to the fourth drain inductor L D4 The opposite end of the terminal is used as the sixth port P6, and the fifth drain inductor L D5 The end with the same name is used as the ninth port P9;

[0015] Sixth drain inductor L D6 The opposite end and the seventh drain inductor L D7 The sixth drain inductor L D6The same-name terminal is used as the tenth port P10, and the seventh drain inductor L D7 The synonym end of the 13th port P13;

[0016] The first gate inductor L G1 The opposite end and the sixth gate inductor L G6 The opposite end is connected to the first gate inductor L G1 and the sixth gate inductor L G6 The same-named ends of the 200 pins are used as the third port P3 and the twelfth port P12 respectively;

[0017] The second gate inductor L G2 The opposite end and the fifth gate inductor L G5 The opposite end is connected to the second gate inductor L G2 and the fifth gate inductor L G5 The same-named terminals are used as the fourth port P4 and the eleventh port P11 respectively;

[0018] Fourth gate inductor L G4 The opposite end and the seventh gate inductor L G7 The opposite end is connected to the fourth gate inductor L G4 and the seventh gate inductor L G7 The same-named terminals are used as the eighth port P8 and the fifteenth port P15 respectively;

[0019] Eighth gate inductor L G8 The opposite end and the third gate inductor L G3 The opposite end is connected to the eighth gate inductor L G8 and the third gate inductor L G3 The same-named terminals serve as the sixteenth port P16 and the seventh port P7 respectively.

[0020] Furthermore, the three-coil coupled quad-core F-class inductor further includes eight isolation resistors, and the eight isolation resistors include four gate isolation resistors and four drain isolation resistors;

[0021] The first gate isolation resistor R G1 One end of the eighth gate inductor L G8 The same-name terminal and the third gate inductor L G3 The other end is connected to the third gate isolation resistor R G3 one end;

[0022] The second gate isolation resistor R G2 One end of the second gate inductor L G2 The opposite end and the fifth gate inductor L G5 The other end is connected to the fourth gate isolation resistor R G4 one end;

[0023] The third gate isolation resistor R G3 One end of the fourth gate inductor L G4 The same-name terminal and the seventh gate inductor L G7 The other end is connected to the first gate isolation resistor R G1 one end;

[0024] The fourth gate isolation resistor R G4 One end of the sixth gate inductor L is connected G6 The opposite end and the first gate inductor L G1 The other end is connected to the second gate isolation resistor R G2 one end;

[0025] The first drain isolation resistor R D1 One end of the second drain inductor L D2 The opposite end and the third drain inductor L D3 The other end is connected to the third drain isolation resistor R D3 one end;

[0026] The second drain isolation resistor R D2 One end of the fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The other end is connected to the fourth drain isolation resistor R D4 one end;

[0027] The third drain isolation resistor R D3 One end of the sixth drain inductor L is connected to D6 The opposite end and the seventh drain inductor L D7 The other end is connected to the first drain isolation resistor R D1 one end;

[0028] The fourth drain isolation resistor R D4 One end of the eighth drain inductor L D8 The same-name terminal and the first drain inductor L D1 The other end is connected to the second drain isolation resistor R D2 one end;

[0029] R G1 =R G2 =R G3 =R G4 , R D1 =R D2 =R D3 =R D4 .

[0030] L in the three-coil coupled quad-core F-type inductor D1 ~L D8 and LG1 ~L G8 The F-type inductor used to form the oscillator is the basis for building the F-type differential mode resonant cavity; R G1 ~R G4 and R D1 ~R D4 Positioning the connections relative to the center of the inductor is used to avoid multimode resonance and prevent the oscillator from oscillating in undesired modes.

[0031] Furthermore, the first gate inductor L G1 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D1 ;

[0032] The second gate inductor L G2 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D3 ;

[0033] The third gate inductor L G3 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D2 ;

[0034] Fourth gate inductor L G4 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D4 ;

[0035] Fifth gate inductor L G5 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D5 ;

[0036] Sixth gate inductor L G6 At the same time, the sixth drain inductor L D6 and the seventh drain inductor L D7 Coupling, coupling coefficient is K D6 ;

[0037] Seventh gate inductor L G7 At the same time, the sixth drain inductor L D6 and the seventh drain inductor L D7 Coupling, coupling coefficient is K D7 ;

[0038] Eighth gate inductor LG8 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D8 ;

[0039] The first drain inductor L G1 and the eighth drain inductor L G8 The coupling coefficient between them is K G1 ;

[0040] The second drain inductor L G2 and the third drain inductor L G3 The coupling coefficient between them is K G2 ;

[0041] Fourth drain inductor L G4 and the fifth drain inductor L G5 The coupling coefficient between them is K G3 ;

[0042] Sixth drain inductor L G6 and the seventh drain inductor L G7 The coupling coefficient between them is K G4 .

[0043] Furthermore, K D1 =K D2 =K D3 =K D4 =K D5 =K D6 =K D7 =K D8 , K G1 =K G2 =K G3 =K G4 .

[0044] Furthermore, among the four voltage controlled oscillator cores, the first core includes a first gate switch capacitor array C G1 , a first PMOS transistor M1 and a second PMOS transistor M2;

[0045] The first gate switch capacitor array C G1 One end of the transistor M1 is connected to the third port P3, and the other end is connected to the fourth port P4; the source ends of the first PMOS transistor M1 and the second PMOS transistor M2 are connected and connected to the control voltage, the drain end of the first PMOS transistor M1 is connected to the first port P1, and the gate end is connected to the fourth port P4; the drain end of the second PMOS transistor M2 is connected to the second port P2, and the gate end is connected to the fourth port P4;

[0046] The second core includes a second gate switch capacitor array C G2, a first NMOS transistor M3 and a second NMOS transistor M4;

[0047] The second gate switch capacitor array C G2 One end of the first NMOS transistor M3 is connected to the seventh port P7, and the other end is connected to the eighth port P8; the source terminals of the first NMOS transistor M3 and the second NMOS transistor M4 are connected to the ground, the drain terminal of the first NMOS transistor M3 is connected to the fifth port P5, and the gate terminal is connected to the eighth port P8, the drain terminal of the second NMOS transistor M4 is connected to the sixth port P6, and the gate terminal is connected to the seventh port P7;

[0048] The third core includes a third gate switch capacitor array C G3 , a third PMOS transistor M5 and a fourth PMOS transistor M6;

[0049] The third gate switch capacitor array C G3 One end of the third PMOS transistor M5 is connected to the eleventh port P11, and the other end is connected to the twelfth port P12; the source ends of the third PMOS transistor M5 and the fourth PMOS transistor M6 are connected to the control voltage, the drain end of the third PMOS transistor M5 is connected to the ninth port P9, and the gate end is connected to the twelfth port P12; the drain end of the fourth PMOS transistor M6 is connected to the tenth port P10, and the gate end is connected to the eleventh port P11;

[0050] The fourth core includes a fourth gate switch capacitor array C G4 , a third NMOS transistor M7 and a fourth NMOS transistor M8;

[0051] The fourth gate switch capacitor array C G4 One end of the third NMOS transistor M7 is connected to the fifteenth port P15, and the other end is connected to the sixteenth port P16; the source terminals of the third NMOS transistor M7 and the fourth NMOS transistor M8 are connected to the ground, the drain terminal of the third NMOS transistor M7 is connected to the thirteenth port P13, the gate terminal is connected to the sixteenth port P16, the drain terminal of the fourth NMOS transistor M8 is connected to the fourteenth port P14, and the gate terminal is connected to the fifteenth port P15.

[0052] Furthermore, the first core and the second core share the first drain switch capacitor array C D1 , the first drain switch capacitor array C D1 One end is connected to the second port P2, and the other end is connected to the fifth port P5;

[0053] The second core and the third core share the second drain switch capacitor array C D2 , the second drain switch capacitor array C D2 One end is connected to the sixth port P6, and the other end is connected to the ninth port P9;

[0054] The third core and the fourth core share the third drain switch capacitor array C D3 , the third drain switch capacitor array C D3 One end is connected to the tenth port P10, and the other end is connected to the thirteenth port P13;

[0055] The fourth core and the first core share the fourth drain switch capacitor array C D4 , the fourth drain switch capacitor array C D4 One end of the MOSFET is connected to the fourteenth port P14, and the other end of the MOSFET is connected to the first port P1.

[0056] The transistors M1 to M8 in the four voltage-controlled oscillator cores are used to provide negative resistance to supplement the resonant cavity loss and maintain oscillation; the gate switch capacitor arrays C in the four voltage-controlled oscillator cores G1 ~C G4 and drain switch capacitor array C D1 ~C D4 Used for frequency tuning.

[0057] Furthermore, L D1 =L D2 =L D3 =L D4 =L D5 =L D6 =L D7 =L D8 =L1;

[0058] L G1 =L G2 =L G3 =L G4 =L G5 =L G6 =L G7 =L G8 =L2.

[0059] Furthermore, C D1 =C D2 =C D3 =C D4 =C1;

[0060] C G1 =C G2 =C G3 =C G4 =C2.

[0061] Furthermore, L1, L2, C1, and C2 need to satisfy the proportional relationship of (L2*C2) / (L1*C1)=3, and must satisfy L2>L1, C2>C1.

[0062] The quad-core F23 type millimeter wave voltage-controlled oscillator naturally has differential-mode current and common-mode current when working. The differential-mode current will flow through 8 gate inductors, 8 drain inductors, 4 gate switch capacitor arrays and 4 drain switch capacitor arrays, and the common-mode current will only flow through 8 drain inductors and 4 drain switch capacitor arrays. When the differential-mode current flows, the quad-core F23 type millimeter wave voltage-controlled oscillator is in the differential-mode working state. When the common-mode current flows, the quad-core F23 type millimeter wave voltage-controlled oscillator is in the common-mode working state.

[0063] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0064] This invention achieves low phase noise in the millimeter-wave frequency band by constructing a quad-core Class-F inductor, applying intra-core common-mode technology, and leveraging the advantages of multi-core coupling and harmonic tuning techniques in reducing phase noise. The resulting quad-core inductor coupling is compact, occupying a small footprint. The resulting harmonic tuning structure simultaneously creates high-quality second- and third-harmonic resonant cavities, resulting in low circuit complexity and high harmonic tuning efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] Figure 1 This is an overall circuit diagram of a quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology in an embodiment of the present invention.

[0066] Figure 2 Schematic diagram of a quad-core F23-type inductor according to an embodiment of the present invention.

[0067] Figure 3 Schematic diagram of the differential mode and common mode operating principles of a half-circuit in an embodiment of the present invention.

[0068] Figure 4 Schematic diagram of differential mode and common mode impedance in an embodiment of the present invention. DETAILED DESCRIPTION

[0069] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. The drawings are only for illustrative purposes and should not be understood as limiting this patent. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0070] In one embodiment, a quad-core F23 type millimeter wave voltage controlled oscillator based on intra-core common mode technology, such as Figure 1 As shown, it includes a three-coil coupled quad-core F-type inductor and four voltage-controlled oscillator cores;

[0071] like Figure 2 As shown, the three-coil coupled quad-core F-type inductor is a sixteen-terminal model, including eight differential ports;

[0072] The first port P1 and the second port P2 constitute a first differential port; the third port P3 and the fourth port P4 constitute a second differential port; the fifth port P5 and the sixth port P6 constitute a third differential port; the seventh port P7 and the eighth port P8 constitute a fourth differential port; the ninth port P9 and the tenth port P10 constitute a fifth differential port; the eleventh port P11 and the twelfth port P12 constitute a sixth differential port; the thirteenth port P13 and the fourteenth port P14 constitute a seventh differential port; the fifteenth port P15 and the sixteenth port P16 constitute an eighth differential port;

[0073] The four voltage-controlled oscillator cores are the first core 1, the second core 2, the third core 3 and the fourth core 4; the first core 1 is connected to the first differential port and the second differential port, the second core 2 is connected to the third differential port and the fourth differential port, the third core 3 is connected to the fifth differential port and the sixth differential port, and the fourth core 4 is connected to the seventh differential port and the eighth differential port.

[0074] like Figure 2 As shown, the three-coil coupled quad-core F-type inductor includes sixteen segments of inductors, and the sixteen segments of inductors include eight drain inductors and eight gate inductors;

[0075] The first drain inductor L D1 The opposite end and the eighth drain inductor L D8 The first drain inductor L D1 The same-name terminal is used as the first port P1, and the eighth drain inductor L D8 The opposite-name end of the 14th port P14;

[0076] The second drain inductor L D2 The opposite end and the third drain inductor L D3 The second drain inductor L D2 The same-name terminal is used as the second port P2, and the third drain inductor L D3 The opposite-name end of the jack is used as the fifth port P5;

[0077] Fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The opposite end is connected to the fourth drain inductor L D4 The opposite end of the terminal is used as the sixth port P6, and the fifth drain inductor L D5 The end with the same name is used as the ninth port P9;

[0078] Sixth drain inductor L D6 The opposite end and the seventh drain inductor LD7 The sixth drain inductor L D6 The same-name terminal is used as the tenth port P10, and the seventh drain inductor L D7 The synonym end of the 13th port P13;

[0079] The first gate inductor L G1 The opposite end and the sixth gate inductor L G6 The opposite end is connected to the first gate inductor L G1 and the sixth gate inductor L G6 The same-named ends of the 200 pins are used as the third port P3 and the twelfth port P12 respectively;

[0080] The second gate inductor L G2 The opposite end and the fifth gate inductor L G5 The opposite end is connected to the second gate inductor L G2 and the fifth gate inductor L G5 The same-named terminals are used as the fourth port P4 and the eleventh port P11 respectively;

[0081] Fourth gate inductor L G4 The opposite end and the seventh gate inductor L G7 The opposite end is connected to the fourth gate inductor L G4 and the seventh gate inductor L G7 The same-named terminals are used as the eighth port P8 and the fifteenth port P15 respectively;

[0082] Eighth gate inductor L G8 The opposite end and the third gate inductor L G3 The opposite end is connected to the eighth gate inductor L G8 and the third gate inductor L G3 The same-named terminals are used as the sixteenth port P16 and the seventh port P7 respectively;

[0083] like Figure 2 As shown, the three-coil coupled quad-core F-class inductor further includes eight isolation resistors, and the eight isolation resistors include four gate isolation resistors and four drain isolation resistors;

[0084] The first gate isolation resistor R G1 One end of the eighth gate inductor L G8 The same-name terminal and the third gate inductor L G3 The other end is connected to the third gate isolation resistor R G3 one end;

[0085] The second gate isolation resistor R G2 One end of the second gate inductor L G2 The opposite end and the fifth gate inductor L G5The other end is connected to the fourth gate isolation resistor R G4 one end;

[0086] The third gate isolation resistor R G3 One end of the fourth gate inductor L G4 The same-name terminal and the seventh gate inductor L G7 The other end is connected to the first gate isolation resistor R G1 one end;

[0087] The fourth gate isolation resistor R G4 One end of the sixth gate inductor L is connected G6 The opposite end and the first gate inductor L G1 The other end is connected to the second gate isolation resistor R G2 one end;

[0088] The first drain isolation resistor R D1 One end of the second drain inductor L D2 The opposite end and the third drain inductor L D3 The other end is connected to the third drain isolation resistor R D3 one end;

[0089] The second drain isolation resistor R D2 One end of the fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The other end is connected to the fourth drain isolation resistor R D4 one end;

[0090] The third drain isolation resistor R D3 One end of the sixth drain inductor L is connected to D6 The opposite end and the seventh drain inductor L D7 The other end is connected to the first drain isolation resistor R D1 one end;

[0091] The fourth drain isolation resistor R D4 One end of the eighth drain inductor L D8 The same-name terminal and the first drain inductor L D1 The other end is connected to the second drain isolation resistor R D2 one end;

[0092] In one embodiment, R G1 =R G2 =R G3 =R G4 , R D1 =R D2 =R D3 =R D4 .

[0093] L in the three-coil coupled quad-core F-type inductor D1 ~L D8 and L G1 ~L G8 The F-type inductor used to form the oscillator is the basis for building the F-type differential mode resonant cavity; R G1 ~R G4 and R D1 ~R D4 Positioning the connections relative to the center of the inductor is used to avoid multimode resonance and prevent the oscillator from oscillating in undesired modes.

[0094] like Figure 2 As shown, the first gate inductor L G1 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D1 ;

[0095] The second gate inductor L G2 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D3 ;

[0096] The third gate inductor L G3 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D2 ;

[0097] Fourth gate inductor L G4 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D4 ;

[0098] Fifth gate inductor L G5 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D5 ;

[0099] Sixth gate inductor L G6 At the same time, the sixth drain inductor L D6 and the seventh drain inductor L D7 Coupling, coupling coefficient is K D6 ;

[0100] Seventh gate inductor L G7 At the same time, the sixth drain inductor L D6and the seventh drain inductor L D7 Coupling, coupling coefficient is K D7 ;

[0101] Eighth gate inductor L G8 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D8 ;

[0102] The first drain inductor L G1 and the eighth drain inductor L G8 The coupling coefficient between them is K G1 ;

[0103] The second drain inductor L G2 and the third drain inductor L G3 The coupling coefficient between them is K G2 ;

[0104] Fourth drain inductor L G4 and the fifth drain inductor L G5 The coupling coefficient between them is K G3 ;

[0105] Sixth drain inductor L G6 and the seventh drain inductor L G7 The coupling coefficient between them is K G4 .

[0106] In one embodiment, K D1 =K D2 =K D3 =K D4 =K D5 =K D6 =K D7 =K D8 , K G1 =K G2 =K G3 =K G4 .

[0107] In one embodiment, the components and parameters of the switch capacitor arrays inside the four voltage-controlled oscillator cores are consistent, and the types and sizes of transistors inside the four voltage-controlled oscillator cores are different from each other.

[0108] Among the four voltage controlled oscillator cores, the first core 1 includes a first gate switch capacitor array C G1 , a first PMOS transistor M1 and a second PMOS transistor M2;

[0109] The first gate switch capacitor array C G1One end of the transistor M1 is connected to the third port P3, and the other end is connected to the fourth port P4; the source ends of the first PMOS transistor M1 and the second PMOS transistor M2 are connected and connected to the control voltage, the drain end of the first PMOS transistor M1 is connected to the first port P1, and the gate end is connected to the fourth port P4; the drain end of the second PMOS transistor M2 is connected to the second port P2, and the gate end is connected to the fourth port P4;

[0110] The second core 2 includes a second gate switch capacitor array C G2 , a first NMOS transistor M3 and a second NMOS transistor M4;

[0111] The second gate switch capacitor array C G2 One end of the first NMOS transistor M3 is connected to the seventh port P7, and the other end is connected to the eighth port P8; the source terminals of the first NMOS transistor M3 and the second NMOS transistor M4 are connected to the ground, the drain terminal of the first NMOS transistor M3 is connected to the fifth port P5, and the gate terminal is connected to the eighth port P8, the drain terminal of the second NMOS transistor M4 is connected to the sixth port P6, and the gate terminal is connected to the seventh port P7;

[0112] The third core 3 includes a third gate switch capacitor array C G3 , a third PMOS transistor M5 and a fourth PMOS transistor M6;

[0113] The third gate switch capacitor array C G3 One end of the third PMOS transistor M5 is connected to the eleventh port P11, and the other end is connected to the twelfth port P12; the source ends of the third PMOS transistor M5 and the fourth PMOS transistor M6 are connected to the control voltage, the drain end of the third PMOS transistor M5 is connected to the ninth port P9, and the gate end is connected to the twelfth port P12; the drain end of the fourth PMOS transistor M6 is connected to the tenth port P10, and the gate end is connected to the eleventh port P11;

[0114] The fourth core 4 includes a fourth gate switch capacitor array C G4 , a third NMOS transistor M7 and a fourth NMOS transistor M8;

[0115] The fourth gate switch capacitor array C G4 One end of the third NMOS transistor M7 is connected to the fifteenth port P15, and the other end is connected to the sixteenth port P16; the source terminals of the third NMOS transistor M7 and the fourth NMOS transistor M8 are connected to the ground, the drain terminal of the third NMOS transistor M7 is connected to the thirteenth port P13, the gate terminal is connected to the sixteenth port P16, the drain terminal of the fourth NMOS transistor M8 is connected to the fourteenth port P14, and the gate terminal is connected to the fifteenth port P15.

[0116] Furthermore, the first core 1 and the second core 2 share the first drain switch capacitor array CD1 , the first drain switch capacitor array C D1 One end is connected to the second port P2, and the other end is connected to the fifth port P5;

[0117] The second core 2 and the third core 3 share the second drain switch capacitor array C D2 , the second drain switch capacitor array C D2 One end is connected to the sixth port P6, and the other end is connected to the ninth port P9;

[0118] The third core 3 and the fourth core 4 share the third drain switch capacitor array C D3 , the third drain switch capacitor array C D3 One end is connected to the tenth port P10, and the other end is connected to the thirteenth port P13;

[0119] The fourth core 4 and the first core 1 share the fourth drain switch capacitor array C D4 , the fourth drain switch capacitor array C D4 One end of the MOSFET is connected to the fourteenth port P14, and the other end of the MOSFET is connected to the first port P1.

[0120] The transistors M1 to M8 in the four voltage-controlled oscillator cores are used to provide negative resistance to supplement the resonant cavity loss and maintain oscillation; the gate switch capacitor arrays C in the four voltage-controlled oscillator cores G1 ~C G4 and drain switch capacitor array C D1 ~C D4 Used for frequency tuning.

[0121] Furthermore, L D1 =L D2 =L D3 =L D4 =L D5 =L D6 =L D7 =L D8 =L1;

[0122] L G1 =L G2 =L G3 =L G4 =L G5 =L G6 =L G7 =L G8 =L2.

[0123] Furthermore, C D1 =C D2 =C D3 =C D4 =C1;

[0124] CG1 =C G2 =C G3 =C G4 =C2.

[0125] Furthermore, L1, L2, C1, and C2 need to satisfy the proportional relationship of (L2*C2) / (L1*C1)=3, and must satisfy L2>L1, C2>C1.

[0126] The quad-core F23 class millimeter wave voltage-controlled oscillator naturally has differential-mode current and common-mode current during operation. The differential-mode current will flow through 8 gate inductors, 8 drain inductors, 4 gate switch capacitor arrays, and 4 drain switch capacitor arrays, while the common-mode current will only flow through 8 drain inductors and 4 drain switch capacitor arrays. When the differential-mode current flows, the quad-core F23 class millimeter wave voltage-controlled oscillator is in a differential-mode operating state, and when the common-mode current flows, the quad-core F23 class millimeter wave voltage-controlled oscillator is in a common-mode operating state.

[0127] In one embodiment, Figure 3 As shown, the voltage controlled oscillator core has the following two working states:

[0128] In differential mode operation, taking the first core 1 and the second core 2 as an example, the current flows from the drain end to the source end of the first PMOS transistor M1 of the first core 1, and from the source end to the drain end of the second PMOS transistor M2. The current flows from the drain end to the source end of the first NMOS transistor M3 of the second core 2, and from the source end to the drain end of the second NMOS transistor M4. Therefore, the second port P2 and the fifth port P5 are in anti-phase, and the differential mode current flows from the second drain inductor L D2 Flows to the third drain inductor L D3 , flows through the first drain switch capacitor array C D1 The first port P1 and the second port P2 are in anti-phase, and the differential mode current flows through the first gate switch capacitor array C G1 The fifth port P5 and the sixth port P6 are in antiphase, and the differential mode current flows through the second gate switch capacitor array C G2 The fourth port P4 and the eleventh port P11 are in anti-phase, and the differential mode current flows from the second gate inductor L G2 Flowing to the fifth gate inductor L G5 The sixteenth port P16 and the seventh port P7 are in antiphase, and the differential mode current flows from the eighth gate inductor L G8 Flowing to the third gate inductor L G3 All the inductors have currents in the same direction flowing through their ends, and are in-phase coupled, forming a differential mode resonant cavity that tunes to the third harmonic.

[0129] During common mode operation, taking the first core 1 and the second core 2 as an example, the current flows from the source end to the drain end of the first PMOS transistor M1 of the first core 1, and from the source end to the drain end of the second PMOS transistor M2. The current flows from the drain end to the source end of the first NMOS transistor M3 of the second core 2, and from the drain end to the source end of the second NMOS transistor M4. Therefore, the second port P2 and the fifth port P5 are in anti-phase, and the common mode current flows from the second drain inductor L D2 Flows to the third drain inductor L D3 , flows through the first drain switch capacitor array C D1 The first port P1 and the second port P2 are in phase, and the common mode current cannot flow through the first gate switch capacitor array C G1 The fifth port P5 and the sixth port P6 are in phase, and the common mode current cannot flow through the second gate switch capacitor array C G2 ; Only the second drain inductance L D2 , the third drain inductor L D3 and the first drain switch capacitor array C D1 A common-mode resonant cavity is formed to tune the second harmonic.

[0130] Through the above analysis, the quad-core F-type inductor and four voltage-controlled oscillator cores are used to construct different resonant cavities in differential mode and common mode working states, respectively, to achieve tuning of the third harmonic and the second harmonic; in one embodiment, the differential mode and common mode resonant impedances are as follows Figure 4 shown.

[0131] Based on the above principles, the present invention ultimately realizes a quad-core F23-type millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology. By utilizing the different directions of differential-mode and common-mode currents in PMOS transistors and NMOS transistors, common-mode and differential-mode resonant cavities are constructed through intra-core components without occupying additional area, effectively tuning the second and third harmonics, thereby achieving the purpose of reducing the phase noise of the millimeter-wave oscillator.

[0132] Anything not described in detail in the present invention is well known to those skilled in the art.

[0133] The above describes in detail the preferred embodiments of the present invention. It should be understood that those skilled in the art can make numerous modifications and variations based on the concepts of the invention without inventive effort. Therefore, any technical solution that can be derived from the concepts of the invention by those skilled in the art through logical analysis, reasoning, or limited experimentation based on the existing technology should be within the scope of protection defined by the claims.

Claims

1. A quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology, characterized in that: It includes a three-coil coupled quad-core Class F inductor and four voltage-controlled oscillator cores; The three-coil coupled quad-core Class F inductor is a sixteen-terminal model, including eight differential ports; The first port P1 and the second port P2 constitute a first differential port; The third port P3 and the fourth port P4 constitute a second differential port; The fifth port P5 and the sixth port P6 constitute a third differential port; the seventh port P7 and the eighth port P8 constitute a fourth differential port; the ninth port P9 and the tenth port P10 constitute a fifth differential port; the eleventh port P11 and the twelfth port P12 constitute a sixth differential port; the thirteenth port P13 and the fourteenth port P14 constitute a seventh differential port; the fifteenth port P15 and the sixteenth port P16 constitute an eighth differential port; The four voltage-controlled oscillator cores are respectively a first core (1), a second core (2), a third core (3) and a fourth core (4); the first core (1) is connected to the first differential port and the second differential port, the second core (2) is connected to the third differential port and the fourth differential port, the third core (3) is connected to the fifth differential port and the sixth differential port, and the fourth core (4) is connected to the seventh differential port and the eighth differential port.

2. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 1, characterized in that: The three-coil coupled quad-core F-type inductor includes sixteen segments of inductors, each of which includes eight drain inductors and eight gate inductors. The first drain inductor L D1 The opposite end and the eighth drain inductor L D8 The first drain inductor L D1 The same-name terminal is used as the first port P1, and the eighth drain inductor L D8 The opposite-name end of the 14th port P14; The second drain inductor L D2 The opposite end and the third drain inductor L D3 The second drain inductor L D2 The same-name terminal is used as the second port P2, and the third drain inductor L D3 The opposite-name end of the jack is used as the fifth port P5; Fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The opposite end is connected to the fourth drain inductor L D4 The opposite end of the terminal is used as the sixth port P6, and the fifth drain inductor L D5 The end with the same name is used as the ninth port P9; Sixth drain inductor L D6 The opposite end and the seventh drain inductor L D7 The sixth drain inductor L D6 The same-name terminal is used as the tenth port P10, and the seventh drain inductor L D7 The synonym end of the 13th port P13; The first gate inductor L G1 The opposite end and the sixth gate inductor L G6 The opposite end is connected to the first gate inductor L G1 and the sixth gate inductor L G6 The same-named ends of the 200 pins are used as the third port P3 and the twelfth port P12 respectively; The second gate inductor L G2 The opposite end and the fifth gate inductor L G5 The opposite end is connected to the second gate inductor L G2 and the fifth gate inductor L G5 The same-named terminals are used as the fourth port P4 and the eleventh port P11 respectively; Fourth gate inductor L G4 The opposite end and the seventh gate inductor L G7 The opposite end is connected to the fourth gate inductor L G4 and the seventh gate inductor L G7 The same-named terminals are used as the eighth port P8 and the fifteenth port P15 respectively; Eighth gate inductor L G8 The opposite end and the third gate inductor L G3 The opposite end is connected to the eighth gate inductor L G8 and the third gate inductor L G3 The same-named terminals serve as the sixteenth port P16 and the seventh port P7 respectively.

3. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 2, characterized in that: The three-coil coupled quad-core F-type inductor further includes eight isolation resistors, and the eight isolation resistors include four gate isolation resistors and four drain isolation resistors; The first gate isolation resistor R G1 One end of the eighth gate inductor L G8 The same-name terminal and the third gate inductor L G3 The other end is connected to the third gate isolation resistor R G3 one end; The second gate isolation resistor R G2 One end of the second gate inductor L G2 The opposite end and the fifth gate inductor L G5 The other end is connected to the fourth gate isolation resistor R G4 one end; The third gate isolation resistor R G3 One end of the fourth gate inductor L G4 The same-name terminal and the seventh gate inductor L G7 The other end is connected to the first gate isolation resistor R G1 one end; The fourth gate isolation resistor R G4 One end of the sixth gate inductor L is connected G6 The opposite end and the first gate inductor L G1 The other end is connected to the second gate isolation resistor R G2 one end; The first drain isolation resistor R D1 One end of the second drain inductor L D2 The opposite end and the third drain inductor L D3 The other end is connected to the third drain isolation resistor R D3 one end; The second drain isolation resistor R D2 One end of the fourth drain inductor L D4 The same-name terminal and the fifth drain inductor L D5 The other end is connected to the fourth drain isolation resistor R D4 one end; The third drain isolation resistor R D3 One end of the sixth drain inductor L is connected to D6 The opposite end and the seventh drain inductor L D7 The other end is connected to the first drain isolation resistor R D1 one end; The fourth drain isolation resistor R D4 One end of the eighth drain inductor L D8 The same-name terminal and the first drain inductor L D1 The other end is connected to the second drain isolation resistor R D2 one end; R G1 =R G2 =R G3 =R G4 ,R D1 =R D2 =R D3 =R D4 。 4. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common mode technology according to claim 2, characterized in that: The first gate inductor L G1 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D1 ; The second gate inductor L G2 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D3 ; The third gate inductor L G3 At the same time, the second drain inductance L D2 and the third drain inductor L D3 Coupling, coupling coefficient is K D2 ; Fourth gate inductor L G4 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D4 ; Fifth gate inductor L G5 At the same time, the fourth drain inductor L D4 and the fifth drain inductor L D5 Coupling, coupling coefficient is K D5 ; Sixth gate inductor L G6 At the same time, the sixth drain inductor L D6 and the seventh drain inductor L D7 Coupling, coupling coefficient is K D6 ; Seventh gate inductor L G7 At the same time, the sixth drain inductor L D6 and the seventh drain inductor L D7 Coupling, coupling coefficient is K D7 ; Eighth gate inductor L G8 At the same time, the first drain inductor L D1 and the eighth drain inductor L D8 Coupling, coupling coefficient is K D8 ; The first drain inductor L G1 and the eighth drain inductor L G8 The coupling coefficient between them is K G1 ; The second drain inductor L G2 and the third drain inductor L G3 The coupling coefficient between them is K G2 ; Fourth drain inductor L G4 and the fifth drain inductor L G5 The coupling coefficient between them is K G3 ; Sixth drain inductor L G6 and the seventh drain inductor L G7 The coupling coefficient between them is K G4 .

5. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 4, characterized in that: K D1 =K D2 =K D3 =K D4 =K D5 =K D6 =K D7 =K D8 ,K G1 =K G2 =K G3 =K G4 。 6. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 1, characterized in that: Among the four voltage controlled oscillator cores, the first core (1) includes a first gate switch capacitor array C G1 , a first PMOS transistor M1 and a second PMOS transistor M2; The first gate switch capacitor array C G1 One end of the transistor M1 is connected to the third port P3, and the other end is connected to the fourth port P4; the source ends of the first PMOS transistor M1 and the second PMOS transistor M2 are connected and connected to the control voltage, the drain end of the first PMOS transistor M1 is connected to the first port P1, and the gate end is connected to the fourth port P4; the drain end of the second PMOS transistor M2 is connected to the second port P2, and the gate end is connected to the fourth port P4; The second core (2) includes a second gate switch capacitor array C G2 , a first NMOS transistor M3 and a second NMOS transistor M4; The second gate switch capacitor array C G2 One end of the first NMOS transistor M3 is connected to the seventh port P7, and the other end is connected to the eighth port P8; the source terminals of the first NMOS transistor M3 and the second NMOS transistor M4 are connected to the ground, the drain terminal of the first NMOS transistor M3 is connected to the fifth port P5, and the gate terminal is connected to the eighth port P8, the drain terminal of the second NMOS transistor M4 is connected to the sixth port P6, and the gate terminal is connected to the seventh port P7; The third core (3) includes a third gate switch capacitor array C G3 , a third PMOS transistor M5 and a fourth PMOS transistor M6; The third gate switch capacitor array C G3 One end of the third PMOS transistor M5 is connected to the eleventh port P11, and the other end is connected to the twelfth port P12; the source ends of the third PMOS transistor M5 and the fourth PMOS transistor M6 are connected to the control voltage, the drain end of the third PMOS transistor M5 is connected to the ninth port P9, and the gate end is connected to the twelfth port P12; the drain end of the fourth PMOS transistor M6 is connected to the tenth port P10, and the gate end is connected to the eleventh port P11; The fourth core (4) includes a fourth gate switch capacitor array C G4 , a third NMOS transistor M7 and a fourth NMOS transistor M8; The fourth gate switch capacitor array C G4 One end of the third NMOS transistor M7 is connected to the fifteenth port P15, and the other end is connected to the sixteenth port P16; the source terminals of the third NMOS transistor M7 and the fourth NMOS transistor M8 are connected to the ground, the drain terminal of the third NMOS transistor M7 is connected to the thirteenth port P13, the gate terminal is connected to the sixteenth port P16, the drain terminal of the fourth NMOS transistor M8 is connected to the fourteenth port P14, and the gate terminal is connected to the fifteenth port P15.

7. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 6, characterized in that: The first core (1) and the second core (2) share a first drain switch capacitor array C D1 , the first drain switch capacitor array C D1 One end is connected to the second port P2, and the other end is connected to the fifth port P5; The second core (2) and the third core (3) share the second drain switch capacitor array C D2 , the second drain switch capacitor array C D2 One end is connected to the sixth port P6, and the other end is connected to the ninth port P9; The third core (3) and the fourth core (4) share the third drain switch capacitor array C D3 , the third drain switch capacitor array C D3 One end is connected to the tenth port P10, and the other end is connected to the thirteenth port P13; The fourth core (4) and the first core (1) share the fourth drain switch capacitor array C D4 , the fourth drain switch capacitor array C D4 One end of the MOSFET is connected to the fourteenth port P14, and the other end of the MOSFET is connected to the first port P1.

8. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 5, characterized in that: L D1 =L D2 =L D3 =L D4 =L D5 =L D6 =L D7 =L D8 =L1; L G1 =L G2 =L G3 =L G4 =L G5 =L G6 =L G7 =L G8 =L2。 9. The quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 7, characterized in that: C D1 =C D2 =C D3 =C D4 =C1; C G1 =C G2 =C G3 =C G4 =C2。 10. A quad-core F23-class millimeter-wave voltage-controlled oscillator based on intra-core common-mode technology according to claim 8 or 9, characterized in that: L1, L2, C1, and C2 must satisfy the proportional relationship of (L2*C2) / (L1*C1)=3, and must satisfy L2>L1, C2>C1.

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