Multi-layer spiral inductor structure based on RDL technology and preparation method

Abstract

The invention relates to the technical field of radio frequency integrated circuits and advanced semiconductor packaging, in particular to a multilayer spiral inductor structure based on an RDL process and a preparation method. The preparation method comprises the steps of seed layer deposition, gradient line width coil formation through photoetching and electroplating, alternate dielectric layer deposition, through hole etching to form vertical interconnection copper columns, air bridge forming through a photoresist sacrificial layer process and silicon nitride passivation packaging. Through fan-shaped topological layout, dielectric material collaborative optimization and three-dimensional interconnection structure design, the self-resonant frequency bandwidth is effectively improved, conductor and dielectric loss is reduced, and miniaturization integration and high reliability of high-frequency inductance elements are achieved.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency integrated circuits and advanced semiconductor packaging technology, and in particular to a multi-layer spiral inductor structure based on an RDL process and a preparation method thereof. Background Art

[0002] The RDL (Redistribution Layer) process is a key technology for achieving high-density interconnection in semiconductor packaging. It forms a metal wiring layer on the chip surface through steps such as photolithography, electroplating, and etching, redistributing the original pad locations to a layout more suitable for package connection, thereby increasing packaging density and optimizing signal integrity. This process often uses copper as the conductive material, combined with a polymer dielectric layer to achieve multi-layer stacking. The multi-layer spiral inductor structure is a three-dimensional integrated passive component based on the RDL process. It consists of multiple concentric metal coils stacked vertically. It uses magnetic flux coupling between adjacent layers to enhance the equivalent inductance. Its inductance value is determined by the number of coil turns, line width, layer spacing, and dielectric constant. It can effectively reduce parasitic capacitance and improve the quality factor in high-frequency circuits, making it suitable for scenarios with strict requirements for miniaturization and high-frequency performance, such as RF front-end modules. The two work together to achieve high-performance electromagnetic integration within a limited packaging space, driving the evolution of advanced packaging towards system-level functional integration.

[0003] Existing planar spiral inductors, when stacked in multiple layers, generate significant parasitic capacitance due to the large overlap between layers, reducing the applicable bandwidth of the self-resonant frequency. Conductor losses caused by skin effect and proximity effect are particularly prominent in the submillimeter wave band, while the dielectric loss of conventional dielectric materials further exacerbates energy dissipation. For example, when multilayer inductors manufactured using existing processes operate at high frequencies, interlayer capacitive coupling causes an offset in effective inductance, uneven current distribution causes a sharp increase in conductor impedance, and polarization relaxation losses in the dielectric layers significantly reduce energy transmission efficiency. Summary of the Invention

[0004] In response to the shortcomings of the existing technology, the present invention provides a multilayer spiral inductor structure and preparation method based on the RDL process, which solves the problems of parasitic capacitance coupling caused by excessive interlayer overlap area, conductor loss accumulation caused by skin effect and proximity effect, and dielectric loss superposition caused by polarization relaxation of conventional dielectric materials in high-frequency multilayer spiral inductor structures, thereby resulting in limited applicable bandwidth of self-resonance frequency, nonlinear steep increase of conductor impedance and deterioration of energy transmission efficiency.

[0005] In order to solve the above technical problems, the specific technical solutions of the present invention are as follows: In a first aspect, the present invention provides a multi-layer spiral inductor structure based on an RDL process, comprising: Vertically stacked copper coil layers, each layer of copper coils adopts a fan-shaped topology layout, the radial overlap area of ​​the copper coils between adjacent layers is less than a preset threshold for the area of ​​a single layer of copper coils, and the fan arc length and interval angle are optimized using an electromagnetic field simulation model to optimize the magnetic field distribution of the copper coil layers, so that the magnetic flux is concentrated in the center area of ​​the coil; Alternately deposited low-loss dielectric layers include a low-dielectric-constant polymer material layer filling the gaps in the copper coil, and a low-loss inorganic dielectric layer covering the surface of the copper coil and serving as a mechanical support layer; The air bridge interconnection structure is located at the connection node between the top copper coil and the lower copper coil. The adjacent copper coils are connected by a suspended electroplated copper bridge. The pier of the air bridge is supported by electroplated copper columns, and the bridge body is formed in the air through a photoresist sacrificial layer process. The copper coil layer has a sub-micron line width, with a radial gradient decreasing in line width. This gradient is achieved through a critical dimension compensation algorithm in the photolithography process, and the edges of the copper coil are chamfered to suppress the high-frequency current crowding effect. The passivation packaging layer covers the surface of the multi-layer spiral inductor structure and is made of silicon nitride material.

[0006] In a second aspect, the present invention provides a method for preparing a multi-layer spiral inductor structure based on an RDL process, which is applied to the multi-layer spiral inductor structure based on an RDL process, and includes the following steps: forming a titanium or copper composite seed layer on a silicon substrate or an organic packaging substrate by physical vapor deposition; Defining a first layer of fan-shaped copper coil patterns on the seed layer by photolithography, and filling the photoresist opening area by electroplating copper to form a copper coil layer with controllable thickness, with line width accuracy controlled within ±0.1 μm; Spin coating a low dielectric constant polymer dielectric on the surface of the copper coil layer and curing the dielectric, and then growing a low loss inorganic dielectric layer by plasma enhanced chemical vapor deposition; forming a through hole in the low-loss inorganic dielectric layer by a dry etching process to expose the connection end of the underlying copper coil; Electroplating copper pillars at the through-hole locations to form vertical interconnect channels, repeating the photolithography process to define patterns, electroplating copper filling, and dielectric layer deposition steps, stacking fan-shaped copper coil layers layer by layer, wherein the fan-shaped angle and radius of each layer of copper coils are increased according to a preset gradient optimized by the electromagnetic field simulation model; Spin-coating photoresist as a sacrificial layer at the top copper coil connection node, photolithographically defining the air bridge body pattern, and then electroplating copper to form the bridge body, and removing the sacrificial layer by wet etching to form the suspended air bridge structure; Copper is electroplated at the ends of the top copper coil to form external connection electrodes, the surface is flattened by chemical mechanical polishing, and a silicon nitride passivation layer is deposited to cover the entire structure.

[0007] Furthermore, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the low dielectric constant polymer material layer is a polyimide layer, and the low-loss inorganic dielectric layer is a silicon dioxide layer. In the alternating deposition step, the thickness of the polymer dielectric layer is 1-5 μm, and the thickness of the inorganic dielectric layer is 0.5-2 μm.

[0008] Furthermore, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the radial overlapping area of ​​the fan-shaped copper coil layer is formed by adjusting the decreasing ratio of the fan-shaped arc lengths of adjacent layers, and the decreasing ratio of the arc length of each layer is adjusted by a preset gradient.

[0009] Furthermore, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the copper coil layer with submicron line width realizes a radial gradient decrease in line width through a critical dimension compensation algorithm of the photolithography process, and the gradient decrease rate is a line width reduction of 0.05-0.1μm per turn.

[0010] Furthermore, in the RDL process-based multi-layer spiral inductor structure preparation method described in the present invention, the pier portion of the air bridge structure is supported by electroplated copper pillars, and the height of the electroplated copper pillars is 5-10 μm and the diameter is 3-5 μm.

[0011] Furthermore, in the RDL process-based multi-layer spiral inductor structure preparation method described in the present invention, the copper pillars of the vertical interconnection channels and the connecting ends of the copper coils of the adjacent layers are formed into an integrated structure through a copper electroplating process, and the diameter of the copper pillars is 2-4 μm and the height is 3-6 μm.

[0012] Beneficial effects of the present invention: The present invention optimizes the overlapping area and magnetic field distribution of adjacent layers through the vertically stacked fan-shaped topology copper coil layer and the radial gradient decreasing line width design, combined with the electromagnetic field simulation model, significantly reducing the parasitic capacitance coupling between layers and widening the applicable bandwidth of the self-resonance frequency. The alternatingly deposited low dielectric constant polymer dielectric layers and low loss inorganic dielectric layers synergistically suppress polarization relaxation losses and reduce the degradation of energy transmission efficiency; the chamfered edge structure with submicron line width disperses the high-frequency current density distribution and suppresses the accumulation of conductor losses caused by skin effect and proximity effect. The air bridge interconnect structure reduces parasitic capacitance and improves conductive stability through the design of a suspended bridge body and an integrated electroplated copper column. Combined with the packaging protection of the silicon nitride passivation layer, it ultimately achieves miniaturized integration, low-loss transmission and high reliability of high-frequency inductor components, meeting the performance requirements of radio frequency integrated circuits for high-frequency passive components. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, for ordinary technicians in this field, other drawings can be obtained based on the drawings without paying any creative labor.

[0014] Figure 1 A flow chart of a method for preparing a multi-layer spiral inductor structure based on an RDL process provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The technical solutions provided by each embodiment of the present invention are described in detail below in conjunction with the drawings. In order to better understand the purpose of the present invention, the present invention is further described in detail below.

[0016] In a first aspect, the present invention provides a multi-layer spiral inductor structure based on an RDL process, comprising: Vertically stacked copper coil layers, each layer of copper coils adopts a fan-shaped topology layout, the radial overlap area of ​​the copper coils between adjacent layers is less than a preset threshold for the area of ​​a single layer of copper coils, and the fan arc length and interval angle are optimized using an electromagnetic field simulation model to optimize the magnetic field distribution of the copper coil layers, so that the magnetic flux is concentrated in the center area of ​​the coil; Alternately deposited low-loss dielectric layers include a low-dielectric-constant polymer material layer filling the gaps in the copper coil, and a low-loss inorganic dielectric layer covering the surface of the copper coil and serving as a mechanical support layer; The air bridge interconnection structure is located at the connection node between the top copper coil and the lower copper coil. The adjacent copper coils are connected by a suspended electroplated copper bridge. The pier of the air bridge is supported by electroplated copper columns, and the bridge body is formed in the air through a photoresist sacrificial layer process. The copper coil layer has a sub-micron line width, with a radial gradient decreasing in line width. This gradient is achieved through a critical dimension compensation algorithm in the photolithography process, and the edges of the copper coil are chamfered to suppress the high-frequency current crowding effect. The passivation packaging layer covers the surface of the multi-layer spiral inductor structure and is made of silicon nitride material.

[0017] In a multilayer spiral inductor structure based on the RDL process, the vertically stacked copper coil layers adopt a fan-shaped topology. The radial overlap area of ​​the copper coils between adjacent layers is optimized by adjusting the geometric parameters of the fan arc length and spacing angle to achieve interlayer magnetic flux coupling. An electromagnetic field simulation model analyzes the magnetic field distribution characteristics by setting different combinations of fan arc lengths and spacing angles, selecting a configuration that concentrates the magnetic flux in the center of the coil. This solution reduces parasitic capacitance coupling between adjacent coil layers and minimizes energy loss during high-frequency signal transmission.

[0018] Layers of low-k dielectric polymer and low-loss inorganic dielectric are deposited alternately between the copper coil layers. The polymer layer is spin-coated to fill the gaps between the copper coils. After curing, it forms a uniform insulating layer, reducing dielectric loss. The inorganic dielectric layer is deposited onto the copper coil surface using a plasma-enhanced chemical vapor deposition process, enhancing the mechanical stability of the structure while mitigating the risk of delamination due to differences in thermal expansion coefficients. This alternating stacking of the two dielectric layers balances dielectric performance with mechanical support requirements.

[0019] The air bridge interconnect structure is located at the junction between the top and lower copper coils. A photoresist sacrificial layer is used to form the suspended electroplated copper bridge. Electroplated copper pillars serve as bridge support structures, with their location and number designed based on the distribution density of the bridge nodes. After electroplating, the photoresist sacrificial layer is selectively removed through wet etching to form the suspended bridge body. This reduces parasitic capacitance between the bridge body and the dielectric layer, improving high-frequency signal transmission efficiency.

[0020] The copper coil layer features a submicron linewidth design with a radially decreasing linewidth gradient. A critical dimension compensation algorithm is incorporated into the photolithography process. By adjusting the mask pattern size, linewidth deviations during the photoresist exposure and development processes are compensated for, enabling precise control of the gradient linewidth. Dry etching creates chamfers at the edges of the copper coil, smoothing the conductor surface morphology. This suppresses high-frequency current concentration at the conductor edges and reduces excess losses due to the skin effect.

[0021] The passivation encapsulation layer forms a protective silicon nitride layer on the surface of the multilayer spiral inductor structure via chemical vapor deposition. This layer covers the copper coil and dielectric layer, blocking the intrusion of ambient moisture and contaminants while also providing mechanical protection. The encapsulation layer thickness must meet dielectric strength requirements and maintain a flat surface after chemical mechanical polishing to facilitate interconnection and integration with other components during subsequent packaging steps.

[0022] Through the coordinated design of dielectric layer deposition, patterning, and interconnect structures, the aforementioned steps achieve three-dimensional integration of multilayer spiral inductors. The combination of a fan-shaped topology and gradient linewidth optimizes magnetic field distribution and current paths. The low-loss dielectric layer and air bridge interconnects reduce parasitic effects, ultimately improving the inductor's high-frequency performance and reliability within a limited packaging space.

[0023] Second, see Figure 1 The method for preparing a multilayer spiral inductor structure based on the RDL process provided by the present invention is applied to the multilayer spiral inductor structure based on the RDL process, and includes the following steps: Step 1, forming a titanium or copper composite seed layer on a silicon substrate or an organic packaging substrate by physical vapor deposition; Step 2: defining a first layer of fan-shaped copper coil patterns on the seed layer by a photolithography process, and filling the photoresist opening area by electroplating copper to form a copper coil layer with controllable thickness, with a line width accuracy controlled within ±0.1 μm; Step 3, spin coating a low dielectric constant polymer dielectric on the surface of the copper coil layer and curing it, and then growing a low-loss inorganic dielectric layer by plasma enhanced chemical vapor deposition; Step 4: forming a through hole in the low-loss inorganic dielectric layer using a dry etching process to expose the connection end of the underlying copper coil; Step 5: Electroplating copper pillars at the through-hole locations to form vertical interconnect channels, repeating the photolithography process to define the pattern, electroplating copper filling, and dielectric layer deposition steps, stacking fan-shaped copper coil layers layer by layer, wherein the fan-shaped angle and radius of each layer of copper coils are increased according to a preset gradient optimized by the electromagnetic field simulation model; Step 6: Spin-coat photoresist as a sacrificial layer at the top copper coil connection node, photolithographically define the air bridge body pattern, and then electroplate copper to form the bridge body. Remove the sacrificial layer by wet etching to form the suspended air bridge structure. In step 7, copper is electroplated at the end of the top copper coil to form an external connection electrode, the surface is flattened by chemical mechanical polishing, and a silicon nitride passivation layer is deposited to cover the entire structure.

[0024] In the RDL-based method for fabricating a multilayer spiral inductor structure, a titanium or copper composite seed layer is first formed on a silicon substrate or organic packaging substrate using physical vapor deposition (PVD). This seed layer serves as a conductive base for copper electroplating, and its material selection must balance adhesion to the substrate and compatibility with the electroplating process. PVD forms a uniform thin film through sputtering or evaporation, providing an initial interface for the electrochemical reaction of the subsequent patterned copper coil layer.

[0025] The photolithography process defines the first layer of fan-shaped copper coils on the seed layer surface. Spin-coating photoresist, mask alignment, exposure, and development steps create openings, which are then filled with copper electroplating. During the electroplating process, the copper layer thickness is controlled by current density and time, maintaining a line width accuracy within ±0.1μm. This step achieves precise patterning of the copper coils, laying the foundation for multilayer stacking.

[0026] A low-k dielectric polymer is spin-coated on the copper coil layer and cured. The polymer fills the gaps between the copper coils through the spin-coating process and, after curing, forms a continuous insulating layer, reducing inter-coil capacitive coupling. A low-loss inorganic dielectric layer is then grown on the polymer layer using plasma-enhanced chemical vapor deposition. The inorganic dielectric layer covers the copper coil surface, providing mechanical support and reducing interlayer deformation caused by thermal stress, while maintaining low dielectric loss characteristics.

[0027] A dry etching process forms vias in the inorganic dielectric layer, exposing the connection terminals of the underlying copper coils. Dry etching utilizes reactive ion etching to create high-aspect-ratio vias, while precisely controlling the etching endpoint to avoid damaging the underlying copper coils. The via locations and dimensions must match the interconnect nodes optimized by the electromagnetic field simulation model to ensure conductive continuity across the vertical interconnects.

[0028] Copper pillars are electroplated within the through-holes to form vertical interconnects. Electroplating then integrates the copper pillars with the underlying copper coils to form an integrated structure. Photolithography, electroplating, and dielectric deposition are repeated layer by layer to create a stack of fan-shaped copper coils. The fan-shaped angle and radius of each layer of copper coils increase according to a preset gradient, optimized based on electromagnetic field simulation models to concentrate magnetic flux distribution and reduce eddy current losses between adjacent layers.

[0029] A sacrificial layer of photoresist is spin-coated at the junctions of the top copper coils. The air bridge pattern is defined by photolithography, and copper is then electroplated to form the bridge body. After wet etching removes the sacrificial layer, a suspended electroplated copper bridge spans the adjacent copper coils, with the bridge piers supported by electroplated copper columns. The air bridge structure reduces the contact area between the bridge body and the dielectric layer, thereby minimizing the impact of parasitic capacitance on high-frequency signal transmission.

[0030] Copper is electroplated at the ends of the top copper coil to form the external connection electrodes. Chemical mechanical polishing flattens the surface and eliminates height differences between layers. A silicon nitride passivation layer is deposited over the entire structure via chemical vapor deposition, providing moisture and mechanical protection while maintaining surface insulation. The passivation layer thickness must meet packaging process requirements to avoid the risk of short circuits during subsequent interconnection steps.

[0031] The aforementioned steps, through seed layer preparation, patterned electroplating, alternating dielectric layer deposition, and interconnect structure optimization, achieve three-dimensional integration of multilayer spiral inductors. The gradient layout of the sector-shaped copper coils and the low-loss dielectric layers synergistically reduce parasitic effects, while the air bridge interconnect structure enhances high-frequency performance, ultimately meeting the RFIC's requirements for miniaturization and high-frequency response.

[0032] Specifically, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the low dielectric constant polymer material layer is a polyimide layer, and the low-loss inorganic dielectric layer is a silicon dioxide layer. In the alternating deposition step, the thickness of the polymer dielectric layer is 1-5 μm, and the thickness of the inorganic dielectric layer is 0.5-2 μm.

[0033] The low-dielectric-constant polymer material layer, made of polyimide, is spin-coated to cover the copper coil surface and fill the gaps between the coils. The polyimide precursor solution is spin-coated using a spin coater and then cured by a stepwise temperature ramp to form a dense insulating layer. The curing temperature and time are set based on the thermal decomposition characteristics of the polyimide to avoid carbonization of the material due to high temperatures. The thickness of this layer is controlled within the 1-5μm range. Too thin may cause insulation breakdown, while too thick increases dielectric loss and affects subsequent patterning accuracy.

[0034] The low-loss inorganic dielectric layer is made of silicon dioxide, grown on the polyimide surface via plasma-enhanced chemical vapor deposition. During the deposition process, the reactant gases are ionized in an RF field to form a plasma, which induces a chemical reaction between the silicon and oxygen sources on the substrate surface, forming a film. The deposition rate and the reactant gas pressure are coordinated to maintain a stable silicon dioxide layer thickness of 0.5-2μm. If the thickness is too thin, the mechanical support is insufficient, while if it is too thick, additional stress is introduced, leading to interlayer cracking.

[0035] During the alternating deposition of polyimide and silicon dioxide layers, the polymer dielectric preferentially fills the sidewall gaps of the copper coil, reducing inter-coil capacitive coupling. The silicon dioxide layer then covers the polyimide surface, suppressing thermal expansion and deformation of the copper coil through its high Young's modulus, thereby reducing the risk of interlayer misalignment. The thickness ratio of the two dielectric layers is adjusted based on the parasitic capacitance optimization results from electromagnetic field simulation models to achieve a balance between overall dielectric constant and mechanical strength.

[0036] During the alternating deposition process, the spin-coating step of the polyimide layer must be performed in a clean environment to avoid particle contamination that could cause dielectric layer defects. The silicon dioxide layer must be annealed after deposition to eliminate dangling bond defects introduced by the plasma process and improve dielectric layer insulation reliability. The annealing temperature must be below the glass transition temperature of the polyimide to prevent thermal degradation of the polymer layer.

[0037] The above steps achieve a synergistic effect of low dielectric constant and low-loss dielectric by matching material properties with process parameters. The polyimide layer reduces parasitic capacitance between coils, while the silicon dioxide layer enhances structural rigidity. The alternating stacking of the two supports the high-frequency performance and long-term reliability of the multilayer spiral inductor, meeting the technical requirements of 3D integrated passive components for RF integrated circuit packaging.

[0038] Specifically, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the radial overlapping area of ​​the fan-shaped copper coil layer is formed by adjusting the decreasing ratio of the fan-shaped arc lengths of adjacent layers, and the decreasing ratio of the arc length of each layer is a preset gradient adjustment.

[0039] The radial overlap of the sector-shaped copper coil layers is achieved by adjusting the decreasing ratio of the sector arc lengths of adjacent layers. The sector arc lengths of adjacent layers decrease layer by layer according to a preset gradient parameter output by the electromagnetic field simulation model. The decreasing ratio is related to the number of coil layers and the target inductance. The specific value of the arc length decreasing ratio is determined by the balance between the magnetic field distribution characteristics and the parasitic capacitance coupling strength in the electromagnetic field simulation model. This optimizes the concentration of magnetic flux in the center of the coil and suppresses the electric field coupling between layers.

[0040] During the photolithography process, the mask pattern adjusts the geometric parameters of each layer's fan-shaped arc length according to a preset gradient. By modifying the central angle and radius parameters of the mask's fan-shaped openings, the arc length reduction ratio of the electroplated copper coils is controlled. The central angles of the fan-shaped openings of adjacent layers of copper coils gradually decrease, while the radius increases in a gradient, forming a spirally expanding coil layout. This layout reduces the radial overlap area of ​​adjacent layers of coils, thereby minimizing the interference of interlayer capacitance on high-frequency signal transmission.

[0041] The electromagnetic field simulation model uses preset gradient parameters as input variables to analyze the axial distribution of the magnetic field and the eddy current loss characteristics at different arc length reduction ratios. The simulation results identify an arc length reduction scheme that maximizes the magnetic flux density in the central region while simultaneously constraining the overlap area to be below a preset threshold for the area of ​​a single copper coil. This threshold is dynamically adjusted based on the coil material resistivity and the operating frequency range to avoid additional losses caused by the high-frequency skin effect.

[0042] During the layer-by-layer stacking process, the arc length reduction ratio of each copper coil sector is designed in tandem with the dielectric layer thickness. The thickness of the low-k dielectric layer varies with this arc length reduction ratio, compensating for the electric field distortion caused by the reduced overlap area. The inorganic dielectric layer serves as a mechanical support layer, with its thickness matching the copper coil line width gradient reduction rate to maintain uniform stress distribution between layers.

[0043] The above steps achieve a gradient stacking of fan-shaped copper coil layers through photolithography mask design, electromagnetic field simulation optimization, and coordinated adjustment of dielectric layer parameters. Precise control of the arc length reduction ratio and overlap area reduces parasitic capacitance and eddy current losses while maintaining inductance stability, meeting the integration requirements of high-frequency passive components in RF integrated circuits.

[0044] Specifically, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the copper coil layer with submicron line width realizes a radial gradient decrease in line width through the critical dimension compensation algorithm of the photolithography process, and the gradient decrease rate is 0.05-0.1μm per turn of line width.

[0045] The submicron copper coil layer achieves a radially gradient line width reduction through the critical dimension compensation algorithm of the photolithography process. This algorithm, based on the need to correct for the optical proximity effect during the photoresist exposure process, performs a reverse pre-compensation design on the mask pattern dimensions. The line width geometric parameters of the fan-shaped copper coil on the mask are preset to decrease by a predetermined amount based on radial position. During the mask design stage, the line width of each coil is reduced by a gradient of 0.05-0.1μm to compensate for the actual line width shrinkage after development.

[0046] During the photolithography process, the mask pattern is converted into a photoresist exposure pattern by setting linewidth compensation values ​​for each region. The exposure equipment dynamically adjusts the exposure dose or depth of focus based on radial position, ensuring that the width of the developed photoresist opening precisely matches the preset gradient. The trapezoidal sidewalls formed after photoresist development are transferred to the underlying seed layer through a dry etching process, forming a copper coil electroplating substrate with gradient linewidth characteristics.

[0047] During the copper electroplating process, the plating solution deposits a copper layer on the seed layer surface through the photoresist openings. The gradient linewidth structure results in different current density distributions at different radial positions. By adjusting the electroplating time and current parameters, the copper layer thickness uniformity is controlled within the process window. The chamfered edges of the copper coils are achieved through a dry etching process. The etching gas anisotropically etches the copper surface, forming a smooth conductor edge profile and reducing the accumulation of high-frequency current at the conductor edges.

[0048] The gradient reduction rate is based on the optimization results of skin depth and current density distribution using electromagnetic field simulation models. The line width decreases by 0.05-0.1μm per turn, balancing the relationship between conductor cross-sectional area and high-frequency losses. The line width reduction rate is coordinated with the decreasing ratio of the fan-shaped arc length to achieve a spiral distribution with a sparse outer layer and dense inner layer in the copper coil, optimizing magnetic field coupling efficiency while reducing eddy current interference between adjacent layers.

[0049] Through mask compensation design, dynamic adjustment of lithography process parameters, and coordinated control of electroplating and etching, these steps enable the precise formation of submicron-scale gradient copper coils. The combination of the decreasing line width gradient and the chamfered corner structure effectively suppresses high-frequency current crowding, improves the inductor quality factor, and meets the technical requirements of RF integrated circuits for miniaturization and high-performance integration of high-frequency passive components.

[0050] Specifically, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the pier part of the air bridge structure is supported by electroplated copper pillars, and the height of the electroplated copper pillars is 5-10 μm and the diameter is 3-5 μm.

[0051] The pier part of the air bridge structure is supported by electroplated copper pillars. The height of the electroplated copper pillars is designed to be 5-10μm, and the diameter is controlled within the range of 3-5μm. The electroplated copper pillars are formed by through-hole lithography and electroplating processes. The through-hole position is determined according to the connection node distribution optimized by the electromagnetic field simulation model. After the photoresist mask defines the through-hole pattern, the electroplated copper grows vertically in the through-hole. Its height is precisely controlled by the coordinated adjustment of the electroplating time and current density, and the diameter is determined by the through-hole opening size. This size range takes into account the requirements of minimizing mechanical support strength and parasitic capacitance. Copper pillars that are too high are prone to introduce stress concentration, while too low a diameter may reduce conductive stability.

[0052] A photoresist sacrificial layer process is used to create the suspended air bridge structure. A sacrificial layer of photoresist is spin-coated at the top copper coil connection nodes, and a mask is used to expose the defined bridge pattern. Electroplated copper is deposited on the sacrificial layer to form the bridge structure. The electroplating parameters must be aligned with the process conditions for the copper pillars of the bridge piers to avoid gaps or cracks at the interface between the bridge and the piers. After selectively removing the sacrificial photoresist layer using a wet etch process, the bridge is connected to the underlying copper coils solely through the copper pillars, forming a suspended interconnect structure. The etching solution composition and etching time must be precisely controlled to prevent over-etching and damage to the copper bridge or dielectric layer.

[0053] The connection between the electroplated copper pillar and the adjacent copper coil is formed through an integrated electroplating process. During the through-hole electroplating stage, the bottom of the copper pillar directly contacts the surface of the underlying copper coil. During the electroplating process, copper ions are uniformly deposited on the surface of the seed layer, forming a metallurgical bond without interface defects. The top of the copper pillar and the electroplated copper layer on the bridge are continuously deposited through the same electroplating step, reducing contact resistance and improving interconnect reliability. The ratio of the copper pillar diameter to height must be coordinated with the line width gradient reduction rate of the sector-shaped copper coil to avoid uneven stress distribution between layers due to size mismatch.

[0054] The above steps achieve reliable formation of the air bridge structure through the coordinated processes of through-hole photolithography, electroplating parameter optimization, and sacrificial layer etching. The dimensional design of the bridge pier copper pillars and the integrated electroplating process ensure the stability of mechanical support and electrical connection. The suspended bridge structure improves high-frequency signal transmission efficiency by reducing parasitic capacitance, meeting the low-loss and high-integration requirements of 3D interconnect structures required by RF integrated circuit packaging.

[0055] Specifically, in the method for preparing a multi-layer spiral inductor structure based on the RDL process described in the present invention, the copper pillars of the vertical interconnection channels and the connecting ends of the copper coils of the adjacent layers are formed into an integrated structure through a copper electroplating process, and the diameter of the copper pillars is 2-4 μm and the height is 3-6 μm.

[0056] The copper pillars of the vertical interconnect channels and the connecting ends of the copper coils in the adjacent layers are formed into an integrated structure through copper electroplating. The copper pillars are designed to have a diameter of 2-4μm and a height controlled within the range of 3-6μm. The through-hole etching process forms vertical channels in the low-loss inorganic dielectric layer. The etching endpoint is accurately determined using optical endpoint detection technology to avoid damaging the surface of the underlying copper coils. The through-hole sidewall morphology must maintain verticality to adapt to the subsequent electroplating process. The gas ratio and RF power parameters of the reactive ion etching are optimized based on the material properties of the dielectric layer.

[0057] During the copper electroplating process, a seed layer is deposited on the inner wall of the through-hole via physical vapor deposition, serving as a conductive substrate for copper ion deposition. The plating solution fills the through-hole through diffusion and electric field-driven action. The current density and plating time are coordinated to adjust the copper pillar height and diameter to within a preset range. Low current density slows the copper deposition rate, facilitating the filling of high-aspect-ratio through-holes and reducing void defects. A continuous metallurgical bond is formed between the top of the copper pillar and the connection end of the adjacent copper coil, eliminating sudden changes in contact resistance.

[0058] The ratio of copper pillar diameter to height must match the line width gradient of the sector-shaped copper coil. A diameter that is too small may lead to current density concentration and electromigration risk, while a diameter that is too large may increase interlayer capacitive coupling. The ratio of copper pillar height to dielectric layer thickness is optimized using electromagnetic field simulation models to balance the conductivity of vertical interconnects with interlayer insulation requirements. The top surface of the copper pillar is flattened using a chemical mechanical polishing process to eliminate microscopic bumps on the electroplated layer and provide a smooth base for patterning the upper copper coil.

[0059] The integrated electroplating process achieves seamless connection between the copper pillar and the adjacent copper coil. During the electroplating process, copper ions uniformly nucleate on the seed layer surface and grow vertically along the sidewalls of the through-hole, ultimately conforming to the seed layer of the upper copper coil. The natural ductility of the electroplating process eliminates grain boundary defects at the interface between the copper pillar and the connector, enhancing the mechanical strength of the interconnect structure and the stability of high-frequency signal transmission.

[0060] The aforementioned steps achieve low resistance and high reliability in the vertical interconnect channels through precision control of through-hole etching, optimized electroplating parameters, and integrated interface design. The coordinated matching of copper pillar size and process parameters reduces parasitic capacitance and electromigration risks, providing structural support for the high-frequency performance and three-dimensional integration of the multilayer spiral inductor, meeting the technical requirements of semiconductor packaging processes for miniaturized interconnect components.

[0061] This invention utilizes a vertically stacked, fan-shaped topology copper coil layer design to control the radial overlap area of ​​adjacent layers of copper coils below a preset threshold for a single layer. The fan arc length and spacing angle are optimized based on an electromagnetic field simulation model, concentrating the magnetic field distribution in the center of the coil and reducing the interlayer electric field coupling path. The fan arc lengths of adjacent layers of copper coils decrease according to a preset gradient, combined with a spiral expansion layout with increasing radius, effectively reducing the fringe field strength in the interlayer overlap area and suppressing the parasitic capacitance's limitation on the self-resonant frequency bandwidth.

[0062] Alternating layers of low-k dielectric polymer and low-loss inorganic dielectric synergistically optimize dielectric properties. A polyimide layer fills the gaps between the copper coils, reducing inter-coil capacitive coupling through its low k dielectric constant. A silicon dioxide layer covers the copper coil surface, providing mechanical support and reducing polarization relaxation losses. The dielectric layer thickness ratio is dynamically adjusted based on parasitic capacitance optimization results from electromagnetic field simulation models to balance the dielectric constant and thermal stress distribution, thereby minimizing degradation in energy transmission efficiency.

[0063] The submicron copper coil layer utilizes a radially gradient-decreasing design, achieving precise linewidth control through critical dimension compensation algorithms in the photolithography process. Chamfered edges smooth the conductor surface morphology, distributing high-frequency current density and reducing conductor loss accumulation caused by skin and proximity effects. The air bridge interconnect structure bridges adjacent layers of copper coils via suspended electroplated copper bridges. The integrated electroplating process of the bridge piers and vertical interconnect channels reduces contact resistance. Combined with the suspended bridge design, parasitic capacitance is reduced, ultimately improving high-frequency signal transmission efficiency and the inductor quality factor.

Claims

1. A multi-layer spiral inductor structure based on RDL technology, characterized in that: include: Vertically stacked copper coil layers, each layer of copper coils adopts a fan-shaped topology layout, the radial overlap area of ​​the copper coils between adjacent layers is less than a preset threshold for the area of ​​a single layer of copper coils, and the fan arc length and interval angle are optimized using an electromagnetic field simulation model to optimize the magnetic field distribution of the copper coil layers, so that the magnetic flux is concentrated in the center area of ​​the coil; Alternately deposited low-loss dielectric layers include a low-dielectric-constant polymer material layer filling the gaps in the copper coil, and a low-loss inorganic dielectric layer covering the surface of the copper coil and serving as a mechanical support layer; The air bridge interconnection structure is located at the connection node between the top copper coil and the lower copper coil. The adjacent copper coils are connected by a suspended electroplated copper bridge. The pier of the air bridge is supported by electroplated copper columns, and the bridge body is formed in the air through a photoresist sacrificial layer process. The copper coil layer has a sub-micron line width, with a radial gradient decreasing in line width. This gradient is achieved through a critical dimension compensation algorithm in the photolithography process, and the edges of the copper coil are chamfered to suppress the high-frequency current crowding effect. The passivation packaging layer covers the surface of the multi-layer spiral inductor structure and is made of silicon nitride material.

2. A method for preparing a multi-layer spiral inductor structure based on an RDL process, applied to the multi-layer spiral inductor structure based on an RDL process as claimed in claim 1, characterized in that: The following steps are involved: forming a titanium or copper composite seed layer on a silicon substrate or an organic packaging substrate by physical vapor deposition; Defining a first layer of fan-shaped copper coil patterns on the seed layer by photolithography, and filling the photoresist opening area by electroplating copper to form a copper coil layer with controllable thickness, with line width accuracy controlled within ±0.1 μm; Spin coating a low dielectric constant polymer dielectric on the surface of the copper coil layer and curing the dielectric, and then growing a low loss inorganic dielectric layer by plasma enhanced chemical vapor deposition; forming a through hole in the low-loss inorganic dielectric layer by a dry etching process to expose the connection end of the underlying copper coil; Electroplating copper pillars at the through-hole locations to form vertical interconnect channels, repeating the photolithography process to define patterns, electroplating copper filling, and dielectric layer deposition steps, stacking fan-shaped copper coil layers layer by layer, wherein the fan-shaped angle and radius of each layer of copper coils are increased according to a preset gradient optimized by the electromagnetic field simulation model; Spin-coating photoresist as a sacrificial layer at the top copper coil connection node, photolithographically defining the air bridge body pattern, and then electroplating copper to form the bridge body, and removing the sacrificial layer by wet etching to form the suspended air bridge structure; Copper is electroplated at the ends of the top copper coil to form external connection electrodes, the surface is flattened by chemical mechanical polishing, and a silicon nitride passivation layer is deposited to cover the entire structure.

3. The method for preparing a multi-layer spiral inductor structure based on RDL process according to claim 2, characterized in that: The low dielectric constant polymer material layer is a polyimide layer, and the low loss inorganic dielectric layer is a silicon dioxide layer. In the alternating deposition step, the thickness of the polymer dielectric layer is 1-5 μm, and the thickness of the inorganic dielectric layer is 0.5-2 μm.

4. The method for preparing a multi-layer spiral inductor structure based on RDL process according to claim 2, wherein: The radial overlapping area of ​​the sector-shaped copper coil layers is formed by adjusting the decreasing ratio of the sector arc lengths of adjacent layers, and the decreasing ratio of the arc length of each layer is adjusted by a preset gradient.

5. The method for preparing a multi-layer spiral inductor structure based on RDL process according to claim 2, characterized in that: The copper coil layer with submicron line width realizes radial gradient reduction of line width through critical dimension compensation algorithm of photolithography process, and the gradient reduction rate is 0.05-0.1 μm per line width circle.

6. The method for preparing a multi-layer spiral inductor structure based on RDL process according to claim 2, wherein: The pier portion of the air bridge structure is supported by electroplated copper columns, and the height of the electroplated copper columns is 5-10 μm and the diameter is 3-5 μm.

7. The method for preparing a multi-layer spiral inductor structure based on RDL process according to claim 2, wherein: The copper pillars of the vertical interconnection channel and the connecting ends of the copper coils of the adjacent layers are formed into an integrated structure through a copper electroplating process. The diameter of the copper pillars is 2-4 μm and the height is 3-6 μm.

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