Configurable peripheral interface and controller system

Abstract

The invention discloses a configurable peripheral interface and controller system, the interface comprises an APB bus interface and a PSC controller, and a UART module, an SPI module and an IIC module are connected between the APB bus interface and the PSC controller; according to the received control signal, the pin, connected with the PSC controller, of the UART module is controlled to be communicated with the external pin of the PSC controller, the pin, connected with the PSC controller, of the SPI module is controlled to be communicated with the external pin of the PSC controller, or the pin, connected with the PSC controller, of the IIC module is controlled to be communicated with the external pin of the PSC controller. According to the invention, UART, SPI and IIC functions can be realized through the configuration of the PSC controller, an independent UART module, an independent SPI module and an independent IIC module do not need to be integrated, and pins are greatly reduced.

Description

Technical Field

[0001] The present invention relates to a configurable peripheral interface and controller system, belonging to the field of IP design in semiconductor integrated circuits. Background Art

[0002] UART, SPI, and IIC are commonly used peripheral interfaces in current microcontrollers and SoC (System on Chip) systems. UART (Universal Asynchronous Receiver / Transmitter) is a universal serial data bus used for asynchronous communication. This bidirectional bus can be used to communicate with a PC, including with a monitoring debugger and EEPROM memory. SPI (Serial Peripheral Interface) is a synchronous serial interface technology primarily used for serial communication and data exchange with various peripheral devices, such as FLASH RAM, A / D converters, network controllers, and MCUs. SPI is a high-speed, full-duplex, synchronous communication bus. IIC (Inter-Integrated Circuit) is a serial communication bus that uses a multi-master-slave architecture. IIC minimizes signal lines and features automatic addressing, multi-master clock synchronization, and arbitration. It is very convenient and flexible and can be used to control devices such as motors and storage.

[0003] Peripheral interfaces such as UART, SPI, and IIC are widely used, but their pins are independent. If the three peripheral interfaces are independently led out, more pins will be occupied for microcontroller and SoC system design. Summary of the Invention

[0004] The present invention provides a configurable peripheral interface and controller system, which solves the problems disclosed in the background technology.

[0005] According to one aspect of the present application, a configurable peripheral interface is provided, including an APB bus interface and a PSC controller, wherein a UART module, an SPI module and an IIC module are connected between the APB bus interface and the PSC controller; the PSC controller controls the pin of the UART module connected to the PSC controller to connect to the external pin of the PSC controller, the pin of the SPI module connected to the PSC controller to connect to the external pin of the PSC controller, or the pin of the IIC module connected to the PSC controller to connect to the external pin of the PSC controller according to the received control signal.

[0006] Furthermore, the UART module integrates an APB control port, a request to send pin, a permission to send pin, a data receive pin, a data send pin and a control signal pin for data carrier detection. The APB control port of the UART module is connected to the APB bus interface, and the request to send pin, the permission to send pin, the data receive pin, the data send pin and the control signal pin for data carrier detection of the UART module are connected to the PSC controller.

[0007] Furthermore, when the PSC controller receives the first control signal, the control signal pin of the data carrier detection of the UART module is connected to the first external pin of the PSC controller, the request sending pin of the UART module is connected to the second external pin of the PSC controller, the permission sending pin of the UART module is connected to the third external pin of the PSC controller, the data receiving pin of the UART module is connected to the fourth external pin of the PSC controller, and the data sending pin of the UART module is connected to the fifth external pin of the PSC controller.

[0008] Furthermore, the SPI module integrates an APB control port, a clock control pin, an enable pin, a data output pin and a data input pin. The APB control port of the SPI module is connected to the APB bus interface, and the clock control pin, enable pin, data output pin and data input pin of the SPI module are connected to the PSC controller.

[0009] Furthermore, when the PSC controller receives a second control signal, the clock control pin of the SPI module is controlled to be connected to the first external pin of the PSC controller, the enable pin of the SPI module is controlled to be connected to the second external pin of the PSC controller, the data output pin of the SPI module is controlled to be connected to the fourth external pin of the PSC controller, and the data input pin of the SPI module is controlled to be connected to the fifth external pin of the PSC controller.

[0010] Furthermore, the IIC module integrates an APB control port, a serial data pin, and a serial clock pin. The APB control port of the IIC module is connected to the APB bus interface, and the serial data pin and serial clock pin of the IIC module are connected to the PSC controller.

[0011] Furthermore, when the PSC controller receives the third control signal, it controls the serial clock pin of the IIC module to be connected to the first external pin of the PSC controller, and controls the serial data pin of the IIC module to be connected to the fourth external pin of the PSC controller.

[0012] According to another aspect of the present application, a controller system is provided, comprising the above-mentioned configurable peripheral interface.

[0013] The beneficial effects achieved by the present invention are as follows: the PSC controller of the present invention controls the pin of the UART module connected to the PSC controller to connect to the external pin of the PSC controller, the pin of the SPI module connected to the PSC controller to connect to the external pin of the PSC controller, or the pin of the IIC module connected to the PSC controller to connect to the external pin of the PSC controller according to the received control signal. The UART, SPI, and IIC functions can be realized by configuring the PSC controller without integrating independent UART modules, SPI modules, and IIC modules, thereby greatly reducing the number of pins. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a structural block diagram of the configurable peripheral interface; Figure 2 This is the internal block diagram of the UART module; Figure 3 This is the internal block diagram of the SPI module; Figure 4 This is the internal block diagram of the IIC module; Figure 5 This is the internal block diagram of the PSC controller; Figure 6 Schematic diagram of the controller system. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. It is obvious that the embodiments described are only part of the embodiments of the present application, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is in no way intended to limit the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0016] Unless specifically stated otherwise, the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application.

[0017] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0018] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0019] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0020] It should be noted that like symbols and letters refer to like items in the following figures, so once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0021] At the same time, in the description of the embodiments of this application, the terms "first" and "second" are used only to distinguish the description and should not be understood as indicating or implying relative importance. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features.

[0022] See also Figure 1 , Figure 1 This is a structural block diagram of a configurable peripheral interface provided in an embodiment of the present application. The interface can be designed as a standard IP module, which may include at least an APB bus interface and a PSC controller. A UART module, an SPI module, and an IIC module are connected between the APB bus interface and the PSC controller. The PSC controller controls the pin of the UART module connected to the PSC controller to connect to the external pin of the PSC controller, the pin of the SPI module connected to the PSC controller to connect to the external pin of the PSC controller, or the pin of the IIC module connected to the PSC controller to connect to the external pin of the PSC controller according to the received control signal.

[0023] It should be noted that the APB bus interface is an AMBA bus structure proposed by ARM. It is a standard bus interface that can be directly interconnected with microcontrollers and SoC chip systems. Figure 1 The pins of the APB bus interface include the clock PCLK, address line PADDR, enable signal PENABLE, select signal PSEL, data lines PWDATA and PRDATA, write signal PWRITE, and reset signal PRESETN. The description of each pin is shown in Table 1.

[0024] Table 1 APB bus interface pin description

[0025] The APB bus interface supports a maximum data width of 32 bits and has two independent data channels: a read channel and a write channel. Since the two channels of the bus interface do not have independent handshake signals, the two channels cannot be used simultaneously.

[0026] It should be noted that the UART module, SPI module, and IIC module are standard serial bus interface modules. In order to adapt to the APB bus interface and the PSC controller, in some embodiments, the UART module integrates an APB control port, a request to send pin, a permission to send pin, a data receive pin, a data send pin, and a control signal pin for data carrier detection. The APB control port of the UART module is connected to the APB bus interface, and the request to send pin, permission to send pin, data receive pin, data send pin, and control signal pin for data carrier detection of the UART module are connected to the PSC controller.

[0027] See also Figure 2 In the figure, UART_RTS is the request to send pin, which is an output signal; UART_CTS is the clear to send pin, which is an input signal; UART_TXD is the data receive pin, used to receive data from the other device; UART_RXD is the data transmit pin, used to send data to the other device; UART_DCD is the control signal pin for data carrier detection.

[0028] The UART (Universal Asynchronous Receiver / Transmitter) module is a universal asynchronous receiver / transmitter used for serial data communication. Its basic function is to receive data from peripheral devices and perform serial-to-parallel conversion. It can also receive data from the CPU and perform parallel-to-serial conversion. The UART module is a standard function module and has no specific model number.

[0029] Similarly, in some embodiments, the SPI module integrates an APB control port, a clock control pin, an enable pin, a data output pin, and a data input pin. The APB control port of the SPI module is connected to the APB bus interface, and the clock control pin, enable pin, data output pin, and data input pin of the SPI module are connected to the PSC controller.

[0030] See also Figure 3 In the figure, SPI_SCK is the clock control pin, which is used to synchronize data transmission; SPI_SN is the enable pin, which is used to activate the device for communication; SPI_DOUT is the data output pin; and SPI_DIN is the data input pin.

[0031] The SPI (Serial Peripheral Interface) module is a synchronous serial interface that can communicate with other peripherals or a host computer. It is controlled by configuring internal serial port registers. The SPI module is a standard functional module and has no specific model.

[0032] Similarly, in some embodiments, the IIC module integrates an APB control port, a serial data pin, and a serial clock pin, the APB control port of the IIC module is connected to the APB bus interface, and the serial data pin and serial clock pin of the IIC module are connected to the PSC controller.

[0033] See also Figure 4 In the figure, IIC_SDA is the serial data pin, which is used to transmit data between the device and the host controller; IIC_SCL is the serial clock pin, which is used to synchronize data transmission on the IIC_SDA line.

[0034] The IIC module, or IIC bus (Inter IC BUS), is a bidirectional two-wire serial communication standard introduced by Philips. The IIC module is a standard functional module with no specific model.

[0035] It should be noted that the PSC controller is mainly used to configure registers and implement programmable peripheral interface functions through software. Its internal structure can be found in Figure 5 .

[0036] The PSC controller combines functional pins such as the UART module, SPI module, and IIC module on a set of interface signals, and selects different functional modules through control signals. Specifically, when the PSC controller receives a first control signal, the control signal pin for controlling the data carrier detection of the UART module is connected to the first external pin of the PSC controller, the request sending pin of the UART module is connected to the second external pin of the PSC controller, the permission sending pin of the UART module is connected to the third external pin of the PSC controller, the data receiving pin of the UART module is connected to the fourth external pin of the PSC controller, and the data sending pin of the UART module is connected to the fourth external pin of the PSC controller. Connect the fifth external pin of the PSC controller; when the PSC controller receives a second control signal, control the clock control pin of the SPI module to be connected to the first external pin of the PSC controller, control the enable pin of the SPI module to be connected to the second external pin of the PSC controller, control the data output pin of the SPI module to be connected to the fourth external pin of the PSC controller, and control the data input pin of the SPI module to be connected to the fifth external pin of the PSC controller; when the PSC controller receives a third control signal, control the serial clock pin of the IIC module to be connected to the first external pin of the PSC controller, and control the serial data pin of the IIC module to be connected to the fourth external pin of the PSC controller.

[0037] Assume that the control signal is represented by PSC_MODE. When the PSC_MODE signal is 2b00, it represents the first control signal and selects the UART function. When the PSC_MODE signal is 2b01, it represents the second control signal and selects the SPI function. When the PSC_MODE signal is 2b10, it represents the third control signal and selects the IIC function. For details, see Table 2.

[0038] Table 2 Selection table

[0039] When configured as UART function, PSC_BIT0 is used to generate the UART_DCD signal, PSC_BIT1 is used to generate the UART_RTS signal, PSC_BIT2 is used to generate the UART_CTS signal, PSC_BIT3 is used to generate the UART_TXD signal, and PSC_BIT4 is used to generate the UART_RXD signal.

[0040] When configured as SPI, PSC_BIT0 is used to generate the SPI_SCK signal, PSC_BIT1 is used to generate the SPI_SN signal, PSC_BIT3 is used to generate the SPI_DOUT signal, and PSC_BIT4 is used to generate the SPI_DIN signal.

[0041] When configured as IIC, PSC_BIT0 is used to generate the IIC_SCL signal and PSC_BIT3 is used to generate the IIC_SDA signal.

[0042] The above-mentioned configurable PSC controller controls the pin of the UART module connected to the PSC controller to connect to the external pin of the PSC controller, the pin of the SPI module connected to the PSC controller to connect to the external pin of the PSC controller, or the pin of the IIC module connected to the PSC controller to connect to the external pin of the PSC controller according to the received control signal. The UART, SPI, and IIC functions can be realized through the configuration of the PSC controller without the need to integrate independent UART modules, SPI modules, and IIC modules, which greatly reduces the number of pins.

[0043] The above-mentioned configurable peripheral interface can form a standard IP, which can be directly connected to the APB bus in the microcontroller and SoC system-on-chip. UART, SPI, and IIC functions can be realized through software configuration. When used, the IP can be attached to the circuit design based on the APB bus, and there is no need to integrate independent UART, SPI, and IIC modules, which greatly reduces the number of pins and can reduce the size.

[0044] This application also discloses a controller system, see Figure 6 , the controller system includes the above-mentioned configurable peripheral interface.

[0045] The above is only a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A configurable peripheral interface, characterized in that: It includes an APB bus interface and a PSC controller, and a UART module, an SPI module and an IIC module are connected between the APB bus interface and the PSC controller; the PSC controller controls the pin of the UART module connected to the PSC controller to connect to the external pin of the PSC controller, the pin of the SPI module connected to the PSC controller to connect to the external pin of the PSC controller, or the pin of the IIC module connected to the PSC controller to connect to the external pin of the PSC controller according to the control signal received.

2. The interface according to claim 1, characterized in that The UART module integrates an APB control port, a request to send pin, a clear to send pin, a data receive pin, a data send pin, and a control signal pin for data carrier detection. The APB control port of the UART module is connected to the APB bus interface, and the request to send pin, clear to send pin, data receive pin, data send pin, and the control signal pin for data carrier detection of the UART module are connected to the PSC controller.

3. The interface according to claim 2, characterized in that When the PSC controller receives the first control signal, the control signal pin of the data carrier detection of the UART module is connected to the first external pin of the PSC controller, the request sending pin of the UART module is connected to the second external pin of the PSC controller, the permission sending pin of the UART module is connected to the third external pin of the PSC controller, the data receiving pin of the UART module is connected to the fourth external pin of the PSC controller, and the data sending pin of the UART module is connected to the fifth external pin of the PSC controller.

4. The interface according to claim 1, wherein: The SPI module integrates an APB control port, a clock control pin, an enable pin, a data output pin, and a data input pin. The APB control port of the SPI module is connected to the APB bus interface, and the clock control pin, enable pin, data output pin, and data input pin of the SPI module are connected to the PSC controller.

5. The interface according to claim 4, characterized in that When the PSC controller receives the second control signal, the clock control pin of the SPI module is controlled to be connected to the first external pin of the PSC controller, the enable pin of the SPI module is controlled to be connected to the second external pin of the PSC controller, the data output pin of the SPI module is controlled to be connected to the fourth external pin of the PSC controller, and the data input pin of the SPI module is controlled to be connected to the fifth external pin of the PSC controller.

6. The interface according to claim 1, wherein: The IIC module integrates an APB control port, a serial data pin, and a serial clock pin. The APB control port of the IIC module is connected to the APB bus interface, and the serial data pin and serial clock pin of the IIC module are connected to the PSC controller.

7. The interface according to claim 6, characterized in that When the PSC controller receives the third control signal, it controls the serial clock pin of the IIC module to be connected to the first external pin of the PSC controller, and controls the serial data pin of the IIC module to be connected to the fourth external pin of the PSC controller.

8. A controller system, characterized in that: The invention comprises the interface according to any one of claims 1 to 7.

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