ATE equipment calibration method and system, computer equipment and readable storage medium

Abstract

The invention relates to the technical field of integrated circuit ATE testing, and provides a calibration method and system of ATE equipment, computer equipment and a readable storage medium, the ATE equipment is provided with at least two test stations, the test stations are configured to test parameters of a chip, and the method comprises the following steps: obtaining a reference input signal and a reference output signal of a reference chip, the reference input signal and the reference output signal meet a preset signal mapping relation; the control signal source applies a reference input signal to the reference chip; controlling the measuring unit to measure an actual output signal of the reference chip; and generating a control signal according to the deviation between the actual output signal and the reference input signal so as to adjust the input signal applied to the reference chip by the signal source, so that the actual output signal approaches or is equal to the reference output signal. In the scheme, the calibration process of multiple test stations eliminates the measurement deviation caused by hardware difference between different test stations, and ensures the consistency of the parameter test results of the chip in the subsequent mass production test.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit ATE testing technology, and in particular to a calibration method, system, computer device, and readable storage medium for ATE equipment. Background Art

[0002] ATE equipment (Automatic Test Equipment) is used to accurately measure the functions and performance of semiconductor chips. It can automatically execute complex test procedures to verify whether the chip meets the design specifications.

[0003] ATE equipment has multiple sites (test stations), and a site can be understood as a position or configuration on the ATE equipment for placing and testing a single chip. Multi-site testing allows ATE equipment to test multiple chips in parallel at the same time to improve chip testing efficiency and chip throughput. However, when testing chips in a multi-site test scenario, there are many differences between different sites, including but not limited to differences in hardware configuration, such as differences in the selection of test hardware equipment and differences in impedance characteristics, as well as changes in environmental conditions, such as fluctuations in cleanliness, temperature, and humidity. Some test parameters of the chip are extremely sensitive to changes in hardware or the environment and are easily interfered with, resulting in inconsistent output results for the same chip when tested at different sites, affecting the efficiency and yield of subsequent mass production tests.

[0004] Therefore, how to provide an ATE equipment calibration method that can improve the consistency of test results is a technical problem that those skilled in the art urgently need to solve. Summary of the Invention

[0005] The present application provides a calibration method, system, computer device and readable storage medium for ATE equipment, which eliminates measurement deviations caused by hardware differences between different test stations and ensures the consistency of parameter test results of chips in subsequent mass production tests.

[0006] The technical solution adopted in this application is:

[0007] In a first aspect, a calibration method for ATE equipment is provided, which is applied to a main control module of the ATE equipment. The ATE equipment has at least two test stations, each of which is configured to test chip parameters. Each of the test stations is configured with a calibration module, each of which includes a signal source and a measurement unit. The method includes:

[0008] Acquire a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship;

[0009] Controlling a signal source to apply the reference input signal to the reference chip;

[0010] Controlling the measuring unit to measure the actual output signal of the reference chip;

[0011] A control signal is generated according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

[0012] Preferably, the calibration module further comprises a storage unit, and the method further comprises:

[0013] The control storage unit stores calibration data of each of the test stations, wherein the calibration data includes the name of the test station, the parameter name of the reference chip, the reference input signal and the reference output signal of the reference chip, the actual output signal of the reference chip at the test station, and the input signal applied by the signal source to the reference chip when the actual output signal approaches or is equal to the reference output signal.

[0014] Preferably, the calibration data is stored in a CSV file format.

[0015] Preferably, after the actual output signal approaches the reference output signal, the method further comprises:

[0016] Controlling the measuring unit to sample the actual output signal of the reference chip multiple times;

[0017] Calculating a standard deviation of the actual output signal based on all actual output signals;

[0018] If the standard deviation is less than a preset threshold, the calibration is determined to be successful.

[0019] Preferably, the tested parameter of the chip is an ADC parameter, and the reference chip includes an ADC core, and the ADC core is configured to process the analog input signal provided by the signal source and then output a digital output signal to the measurement unit;

[0020] Generating a control signal according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal includes:

[0021] A control signal is generated based on a digital code difference between the digital output signal and a reference digital signal, and a voltage of an analog input signal applied by the signal source to the ADC core is adjusted so that the digital output signal has the same digital code as the reference digital signal, wherein the reference digital signal is a digital code form of the reference output signal.

[0022] Preferably, adjusting the voltage of the analog input signal applied by the signal source to the ADC core comprises:

[0023] The voltage of the analog input signal applied by the signal source to the ADC core is dynamically adjusted using a PID algorithm.

[0024] Preferably, the preset signal mapping relationship is a proportional function relationship, and the analog input signal V in The digital output signal D satisfies the formula D = k·V in +b, k is a gain parameter, and b is a bias term.

[0025] In a second aspect, a calibration system for ATE equipment is provided, comprising:

[0026] Benchmark chip;

[0027] A main control module applied to the ATE device, configured to obtain a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship;

[0028] Controlling a signal source to apply the reference input signal to the reference chip;

[0029] Controlling the measuring unit to measure the actual output signal of the reference chip;

[0030] A control signal is generated according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

[0031] In a third aspect, a computer device is provided, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in the first aspect when executing the computer program.

[0032] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described in the first aspect are implemented.

[0033] According to the specific embodiments provided in this application, the following technical effects are disclosed:

[0034] The technical solution of the present application provides a calibration method, system, computer device and readable storage medium for ATE equipment, wherein the method is applied to a main control module of the ATE equipment, the ATE equipment having at least two test stations, the test stations being configured to test the parameters of a chip, the test stations having a signal source and a measurement unit, the method comprising: obtaining a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship; controlling the signal source to apply the reference input signal to the reference chip; controlling the measurement unit to measure the actual output signal of the reference chip; generating a control signal based on the deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal. In the solution, under ideal conditions at all test stations, the reference chip outputs the reference output signal after processing the reference input signal. However, due to hardware differences between different test stations, the actual output signal output by the reference chip after processing the reference input signal deviates from the reference output signal. Therefore, the input signal applied by the signal source to the reference chip is adjusted based on the deviation to form a closed-loop feedback system so that the actual output signal is consistent with the reference output signal. The multi-test station calibration process eliminates measurement deviations caused by hardware differences between different test stations, ensuring the consistency of chip parameter test results in subsequent mass production tests. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 This is a general flow chart of the calibration method of the ATE equipment provided in the embodiment of the present application;

[0037] Figure 2 This is a flow chart of a calibration method for an ATE device when the tested parameters of a chip provided in an embodiment of the present application are ADC parameters;

[0038] Figure 3 This is a schematic diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0040] As described in the background technology, the ATE equipment has multiple sites (test stations), and a site can be understood as a position or configuration on the ATE equipment for placing and testing a single chip. Multi-site testing allows the ATE equipment to test multiple chips in parallel at the same time to improve chip testing efficiency and chip throughput. However, when testing chips in a multi-site testing scenario, there are many differences between different sites, including but not limited to differences in hardware configuration, such as differences in the selection of test hardware equipment and differences in impedance characteristics, as well as changes in environmental conditions, such as fluctuations in cleanliness, temperature, and humidity. Some test parameters of the chip are extremely sensitive to changes in hardware or the environment and are easily interfered with, resulting in inconsistent output results when the same chip is tested at different sites, affecting the efficiency and yield of subsequent mass production tests.

[0041] Based on this, the present application provides a calibration method, system, computer device and readable storage medium for ATE equipment, aiming to solve the measurement deviation caused by hardware differences between different test stations in the prior art.

[0042] The present application will be described in detail below through examples.

[0043] Example 1

[0044] A calibration method for ATE equipment is applied to the main control module of the ATE equipment. The ATE equipment has at least two test stations, and the test stations are configured to test the parameters of the chip. Each test station is configured with a calibration module, and the calibration module includes a signal source and a measurement unit. Figure 1 , calibration methods for ATE equipment include:

[0045] S1: Obtain a reference input signal and a reference output signal of a reference chip, where the reference input signal and the reference output signal satisfy a preset signal mapping relationship;

[0046] S2: Control the signal source to apply a reference input signal to the reference chip;

[0047] S3: Control the measurement unit to measure the actual output signal of the reference chip;

[0048] S4: Generate a control signal according to the deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

[0049] The chip parameters include but are not limited to the chip's sensor parameters, filter parameters, amplifier parameters, and ADC parameters.

[0050] In step S1, the reference chip is a component that can provide a stable and accurate reference signal (such as voltage or current) for the electronic system. It has a reference parameter value (such as a reference input signal and a reference output signal) that is not affected by external hardware or the environment, and provides a standardized measurement or control reference for the ATE equipment. The preset signal mapping relationship can be a linear relationship to be applicable to a simple voltage division scenario or a proportional adjustment scenario, or a nonlinear relationship to be applicable to a complex nonlinear compensation scenario. The reference input signal and the reference output signal of the reference chip can be expressed in the form of voltage or current. For example, the reference input signal is a voltage to drive the reference chip to work, and the reference output signal is a voltage to serve as a standardized reference voltage for the calibration system. Alternatively, the reference input signal is a current to drive the reference chip to start quickly, and the reference output signal is a current to serve as a standardized reference current for the calibration system.

[0051] In step S2, illustratively, the hardware corresponding to the signal source can use a programmable DC power supply that supports voltage / current regulation, set the power output to 1V, 2V or 3.3V, and output the supply voltage to the reference chip as the reference input signal of the reference chip.

[0052] In step S3, the hardware corresponding to the measurement unit can, for example, be a digital multimeter, which directly measures the voltage value at the output terminal of the reference chip as the actual input signal of the reference chip. It should be noted that under ideal conditions at all test stations, the reference chip processes the reference input signal and outputs a reference output signal. However, due to hardware differences between different test stations, the actual output signal output by the reference chip after processing the reference input signal may deviate from the reference output signal. Therefore, it is necessary to first obtain the current actual output signal of the reference chip for subsequent determination.

[0053] Exemplarily, the reference input signal and the reference output signal of the reference chip satisfy a linear relationship. When the reference input signal is 1V, the reference output signal is 3V; when the reference input signal is 2V, the reference output signal is 6V; when the reference input signal is 3.3V, the reference output signal is 9.9V.

[0054] In step S4, when the actual output signal of the reference chip is equal to the reference output signal, it indicates that the parameter measurement results of the test station where the current reference chip is located are normal, and the reference chip is then placed at the next test station for calibration. When the actual output signal of the reference chip is not equal to the reference output signal, the deviation between the actual output signal and the reference output signal is calculated. For example, at the first test station, the reference input signal of the reference chip is 3.3V, the reference output signal is 9.9V, and the actual output signal is 8.6V. The absolute value of the deviation between the two is 1.2V. This deviation is caused by the hardware properties of the test station. The main control module then fine-tunes the input signal of the signal source based on the mathematical model and the deviation until the actual output signal approaches or equals the reference output signal. There is no specific mapping relationship between the regulated input signal of the signal source and the reference output signal. For example, after calibration, the actual output signal is equal to the reference output signal of 9.9V, and the regulated input signal is 2.7V; or, after calibration, the actual output signal approaches the reference output signal of 9.899V, and the regulated input signal is 2.71V. At the second test station, the reference chip's reference input signal is 3.3V, the reference output signal is 9.9V, and the actual output signal is 10.5V. The absolute value of the deviation between the two is 0.6V. This deviation is also caused by the hardware properties of the test station. The main control module then fine-tunes the input signal of the signal source based on the mathematical model and the deviation until the actual output signal approaches or equals the reference output signal. This shows that due to the hardware differences between the first and second test stations, the two measured actual output signals do not match the reference output signal. To this end, the two test stations are calibrated in sequence using the reference chip to achieve consistent test results.

[0055] In summary, under ideal conditions at all test stations, the reference chip processes the reference input signal and outputs the reference output signal. However, due to hardware differences between different test stations, the actual output signal output by the reference chip after processing the reference input signal deviates from the reference output signal. Therefore, the input signal applied to the reference chip by the signal source is adjusted based on this deviation, forming a closed-loop feedback system to ensure that the actual output signal matches the reference output signal. The multi-test station calibration process eliminates measurement deviations caused by hardware differences between test stations, ensuring the consistency of chip parameter test results in subsequent mass production testing.

[0056] Preferably, the calibration module further comprises a storage unit, reference Figure 1 , the method further comprises:

[0057] S5: Control the storage unit to store calibration data for each test station, wherein the calibration data includes the name of the test station, the parameter name of the reference chip, the reference input signal and the reference output signal of the reference chip, the actual output signal of the reference chip at the test station, and the input signal applied by the signal source to the reference chip when the actual output signal approaches or is equal to the reference output signal.

[0058] In step S5, the calibration data for each test station is stored to trace hardware differences and the calibration process, facilitating subsequent troubleshooting and process optimization. Furthermore, long-term stored calibration data can be used to analyze ATE equipment performance trends to guide preventive maintenance or process improvements.

[0059] Exemplarily, as shown in Table 1 below, the calibration data is stored in a CSV file format.

[0060] Table 1 Storage of calibration data

[0061]

[0062] Among them, CSV is a common text file format suitable for storing structured data.

[0063] Preferably, after the actual output signal approaches the reference output signal, the method further comprises:

[0064] Controlling the measuring unit to sample the actual output signal of the reference chip multiple times;

[0065] Calculate the standard deviation of the actual output signal based on all the actual output signals;

[0066] If the standard deviation is less than the preset threshold, the calibration is considered successful.

[0067] The fact that the actual output signal approaches the reference output signal does not necessarily mean that the actual output signal is equal to the reference output signal. For example, if the reference output signal is 9.9V, the actual output signal is 9.89x, where x can be any number between 0 and 9. Considering that even if the actual output signal approaches the actual output signal, there is still an error, it is necessary to minimize the error. Multiple sampling is used to calculate the standard deviation to ensure the minimum error.

[0068] For example, multiple sampling is first performed, and the control measurement unit samples the actual output signal of the reference chip N times, where N can be 10 to 100, and the sampling value of each time is recorded. The reference output signal is 9.9V, and the actual output signal may be 9.895V, 9.898V, 9.893V, etc. Next, the standard deviation is calculated, and the standard deviation of all sampled values ​​is calculated as an indicator of the volatility of the actual output signal. Then, if the calculated standard deviation is less than the preset threshold, such as 0.005V, the calibration is determined to be successful, otherwise the calibration fails. Finally, if the standard deviation does not meet the standard, the input signal of the signal source is further adjusted, and the above steps are repeated until the standard deviation meets the preset threshold requirement.

[0069] In a specific embodiment of testing chip parameters, the chip parameters being tested are ADC parameters, the reference chip includes an ADC core, and the ADC core is configured to process an analog input signal provided by a signal source and then output a digital output signal to the measurement unit;

[0070] S4: generating a control signal according to the deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal, including:

[0071] S40: Generate a control signal based on the digital code difference between the digital output signal and the reference digital signal, and adjust the voltage of the analog input signal applied by the signal source to the ADC core so that the digital code of the digital output signal is the same as that of the reference digital signal, wherein the reference digital signal is the digital code form of the reference output signal.

[0072] In step S40, for example, the ADC core is 12-bit and the goal is to achieve a digital output signal code of 4095 when its analog input voltage is 3.3V. In actual testing, the ADC core outputs a digital code of 4080 due to hardware process variations. The analog input voltage of the signal source needs to be adjusted to match the output digital code to a reference value of 4095, where 4095 corresponds to a full-scale output voltage of 3.3V. When the difference between the digital output signal and the reference digital signal is greater than 0, the analog input voltage is increased to increase the digital output signal code to the reference value. When the difference between the digital output signal and the reference digital signal is less than 0, the analog input voltage is decreased to decrease the digital output signal code to the reference value.

[0073] Preferably, adjusting the voltage of the analog input signal applied by the signal source to the ADC core includes:

[0074] The PID algorithm is used to dynamically adjust the voltage of the analog input signal applied by the signal source to the ADC core.

[0075] Among them, in the PID algorithm, P (proportional) can directly adjust the analog input voltage according to the deviation between the digital code of the digital output signal and the digital code of the reference digital signal, quickly reducing the deviation. D (differential) can predict the error change trend and make adjustments in advance before the error significantly expands to avoid excessive adjustment. I (integral) can eliminate steady-state errors and ensure that the digital code of the final digital output signal completely matches the digital code of the reference digital signal.

[0076] Preferably, the preset signal mapping relationship is a proportional function relationship, and the analog input signal V in The digital output signal D satisfies the formula D=k·V in +b, k is the gain parameter, and b is the bias term.

[0077] In a specific embodiment, k takes a value of 3, b takes a value of 0, and the analog input signal V in The digital output signal D satisfies the formula D=3·V in Since the digital output signal D is related to the analog input signal V in Since the relationship is linear, there is no need for complex nonlinear fitting algorithms, which avoids excessive computing resources when solving equations.

[0078] Example 2

[0079] A second embodiment of the present application provides a calibration system for ATE equipment, including:

[0080] Benchmark chip;

[0081] A main control module applied to ATE equipment is configured to obtain a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship;

[0082] The control signal source applies a reference input signal to the reference chip;

[0083] The control measurement unit measures the actual output signal of the reference chip;

[0084] A control signal is generated according to the deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

[0085] In this scheme, under ideal conditions at all test stations, the reference chip processes the reference input signal and outputs the reference output signal. However, due to hardware differences between different test stations, the actual output signal output by the reference chip after processing the reference input signal deviates from the reference output signal. Therefore, the input signal applied to the reference chip by the signal source is adjusted based on this deviation, forming a closed-loop feedback system to ensure that the actual output signal matches the reference output signal. This multi-test station calibration process eliminates measurement deviations caused by hardware differences between test stations, ensuring the consistency of chip parameter test results in subsequent mass production testing.

[0086] In a specific embodiment, the number of test stations of the ATE equipment is at least four, which are named SITE1, SITE2, SITE3, and SITE4 respectively, and the remaining test stations are named similarly.

[0087] Example 3

[0088] Embodiment 3 of the present application provides a computer device, including a memory and a processor; the memory stores a computer program that can be run on the processor, and when the computer program is executed by the processor, the calibration method of the ATE device provided in the above embodiment 1 is executed.

[0089] Among them, reference Figure 3 , which exemplarily illustrates the computer device of this embodiment, may include a processor 1510, a video display adapter 1511, a disk drive 1512, an input / output interface 1513, a network interface 1514, and a memory 1520. The processor 1510, video display adapter 1511, disk drive 1512, input / output interface 1513, network interface 1514, and memory 1520 may be communicatively connected via a communication bus 1530.

[0090] Among them, the processor 1510 can be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in this application.

[0091] The memory 1520 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1520 can store an operating system 1521 for controlling the operation of the computer device and a basic input and output system 1522 for controlling the low-level operation of the computer device. In addition, a web browser 1523, a data storage management system 1524, and a device identification information processing system 1525, etc. can also be stored. The above-mentioned device identification information processing system 1525 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided by the present application is implemented by software or firmware, the relevant program code is stored in the memory 1520 and is called and executed by the processor 1510.

[0092] The input / output interface 1513 is used to connect input / output modules to implement information input and output. The input / output modules can be configured as components within the device (not shown in the figure) or can be externally connected to the device to provide corresponding functions. Input devices may include a keyboard, mouse, touch screen, microphone, various sensors, etc., and output devices may include a display, speaker, vibrator, indicator light, etc.

[0093] The network interface 1514 is used to connect to a communication module (not shown) to enable communication between the device and other devices. The communication module can communicate via a wired method (such as USB, network cable, etc.) or a wireless method (such as mobile network, WIFI, Bluetooth, etc.).

[0094] The communication bus 1530 comprises a pathway for transmitting information between the various components of the device (eg, the processor 1510 , the video display adapter 1511 , the disk drive 1512 , the input / output interface 1513 , the network interface 1514 , and the memory 1520 ).

[0095] In addition, the device can also obtain information on specific collection conditions from the virtual resource object collection condition information database for use in condition judgment, etc.

[0096] It should be noted that although the above device only shows a processor 1510, a video display adapter 1511, a disk drive 1512, an input / output interface 1513, a network interface 1514, a memory 1520, a communication bus 1530, etc., in a specific implementation, the device may also include other components necessary for normal operation. In addition, it will be understood by those skilled in the art that the above device may also include only the components necessary to implement the solution of the present application, and does not necessarily include all the components shown in the figure.

[0097] Example 4

[0098] A fourth embodiment of the present application provides a computer-readable storage medium storing a computer program. When the computer program is executed, the calibration method of the ATE device provided in the first embodiment is implemented.

[0099] Through the description of the above embodiments, it can be seen that those skilled in the art can clearly understand that the present application can be implemented by means of software plus the necessary general hardware platform. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment of the present application or certain parts of the embodiments.

[0100] The above is a detailed introduction to the technical solutions provided by this application. Specific examples are used herein to illustrate the principles and implementation methods of this application. The description of the above embodiments is intended only to help understand the method and core concept of this application. At the same time, those skilled in the art will appreciate that variations in the specific implementation methods and scope of application are possible based on the concepts of this application. In summary, the contents of this specification should not be construed as limiting this application.

Claims

1. A calibration method for ATE equipment, applied to a main control module of the ATE equipment, wherein the ATE equipment has at least two test stations, each of which is configured to test chip parameters, and each of the test stations is configured with a calibration module, wherein the calibration module includes a signal source and a measurement unit, and is characterized in that: The method comprises: Acquire a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship; controlling the signal source to apply the reference input signal to the reference chip; controlling the measuring unit to measure an actual output signal of the reference chip; A control signal is generated according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

2. The calibration method of ATE equipment according to claim 1, characterized in that: The calibration module further comprises a storage unit, and the method further comprises: Control the storage unit to store calibration data for each of the test stations, wherein the calibration data includes the name of the test station, the parameter name of the reference chip, the reference input signal and the reference output signal of the reference chip, the actual output signal of the reference chip at the test station, and the input signal applied by the signal source to the reference chip when the actual output signal approaches or is equal to the reference output signal.

3. The calibration method of ATE equipment according to claim 2, characterized in that: The calibration data is stored in CSV file format.

4. The calibration method of ATE equipment according to claim 1, characterized in that: After the actual output signal approaches the reference output signal, the method further includes: Controlling the measuring unit to sample the actual output signal of the reference chip multiple times; Calculating a standard deviation of the actual output signal based on all actual output signals; If the standard deviation is less than a preset threshold, the calibration is determined to be successful.

5. The calibration method of ATE equipment according to claim 1, characterized in that: The tested parameters of the chip are ADC parameters, the reference chip includes an ADC core, and the ADC core is configured to process the analog input signal provided by the signal source and then output a digital output signal to the measurement unit; Generating a control signal according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal includes: A control signal is generated based on a digital code difference between the digital output signal and a reference digital signal, and a voltage of an analog input signal applied by the signal source to the ADC core is adjusted so that the digital output signal has the same digital code as the reference digital signal, wherein the reference digital signal is a digital code form of the reference output signal.

6. The calibration method of ATE equipment according to claim 5, characterized in that: The adjusting the voltage of the analog input signal applied by the signal source to the ADC core includes: The voltage of the analog input signal applied by the signal source to the ADC core is dynamically adjusted using a PID algorithm.

7. The calibration method of ATE equipment according to claim 5, characterized in that: The preset signal mapping relationship is a proportional function relationship, and the analog input signal V in The digital output signal D satisfies the formula D = k·V in +b, k is a gain parameter, and b is a bias term.

8. A calibration system for ATE equipment, characterized in that: The system comprises: Benchmark chip; A main control module applied to the ATE device, configured to obtain a reference input signal and a reference output signal of a reference chip, wherein the reference input signal and the reference output signal satisfy a preset signal mapping relationship; Controlling a signal source to apply the reference input signal to the reference chip; Controlling the measuring unit to measure the actual output signal of the reference chip; A control signal is generated according to a deviation between the actual output signal and the reference input signal to adjust the input signal applied by the signal source to the reference chip so that the actual output signal approaches or is equal to the reference output signal.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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