Board-level packaging method with high heat dissipation performance and product thereof

Abstract

The invention discloses a board-level packaging method with high heat dissipation performance and a product thereof. The board-level packaging method comprises the following steps: bonding a copper plate and a substrate together; etching a groove and a chip mounting alignment mark on the copper plate; mounting the back surfaces of a plurality of chips on the copper plate; performing plastic packaging on the chip and the copper plate; opening a hole in the surface of the chip; manufacturing a redistribution structure with interconnected chips; separating the obtained structure from the substrate to expose the copper plate; etching the exposed copper plate; carrying out polishing anti-oxidation treatment on the exposed copper plate; and cutting the obtained structure into single packaging units. The copper plate is attached to the back surface of the chip, so that the heat dissipation interface thermal resistance of the chip is effectively reduced, the chip is not completely wrapped by a packaging material, and a heat dissipation channel is opened, so that the heat dissipation efficiency of the chip is improved, and the performance stability and reliability of the chip in high-load operation are improved; and the stability of the packaging structure is effectively improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor packaging, and in particular relates to a board-level packaging method with high heat dissipation performance and a product thereof. Background Art

[0002] With the rapid increase in chip computing power, the chip packaging density and the power consumption and heat generation per unit area are getting higher and higher. Chips are often encapsulated in organic materials such as resins with poor thermal conductivity. A large amount of heat will accumulate in the package, which cannot be dissipated quickly to maintain the optimal operating temperature range of the chip, resulting in performance degradation. In severe cases, it may even cause the internal chip or packaging circuit to melt and fail completely.

[0003] Existing methods for cooling high-density chips mostly use external cold plates or heat sinks. However, this method uses packaging materials, thermal grease, and other materials between the external heat dissipation structure and the chip, resulting in high interface thermal resistance and low thermal conductivity, resulting in low overall chip heat dissipation efficiency, affecting its performance and reliability. Summary of the Invention

[0004] In order to solve the technical problems of low heat dissipation efficiency of high-density chips in the prior art, the purpose of the present invention is to provide a board-level packaging method and product with high heat dissipation performance.

[0005] In order to achieve the above-mentioned purpose and the above-mentioned technical effect, the technical solution adopted by the present invention is:

[0006] A board-level packaging method with high heat dissipation performance comprises the following steps:

[0007] First, a copper plate is attached to the back of the chip, and then the copper plate and the chip are plastic-sealed. Then, a redistribution structure is made on the front of the chip, and then it is cut to obtain a single packaging unit.

[0008] Furthermore, a board-level packaging method with high heat dissipation performance includes the following steps:

[0009] Step 1: Bond the copper plate to the substrate;

[0010] Step 2: Etch the copper plate to form grooves and chip placement alignment marks;

[0011] Step 3: Align several chips using the chip placement alignment mark and mount the back of the chips on the copper plate;

[0012] Step 4: Plastic seal the above chip and copper plate;

[0013] Step 5: Drill holes on the chip surface;

[0014] Step 6: Make a redistribution structure for chip interconnection;

[0015] Step 7: Separate the structure obtained in step 6 from the substrate to expose the copper plate;

[0016] Step 8: Etch the exposed copper plate to reveal the groove made in step 2;

[0017] Step 9: Polish and anti-oxidation treatment on the exposed copper plate;

[0018] Step 10: Cut the structure obtained in step 9 into individual packaging units.

[0019] Furthermore, in step one, the copper plate is bonded to the substrate via a temporary bonding material, and the temporary bonding material includes a temporary bonding glue and a temporary bonding film.

[0020] Furthermore, the copper plate has a thickness of 100-300 microns.

[0021] Furthermore, in step three, the back sides of several chips are mounted on the chip mounting alignment mark through a high thermal conductivity DAF film or bonding adhesive.

[0022] Furthermore, in step four, the chip and the copper plate are covered with a packaging material to fill the groove formed in step two to form a plastic package body, wherein the plastic package material is a plastic film or a plastic package material, and the plastic package material is in powder, granular or cake form.

[0023] Furthermore, in step five, holes are opened on the chip surface by laser drilling or dry etching.

[0024] Furthermore, in step seven, the structure obtained in step six is ​​separated from the substrate, the temporary bonding material is removed, and the side of the copper plate facing away from the chip is exposed.

[0025] The present invention also discloses a board-level packaging structure prepared by a board-level packaging method with high heat dissipation performance, including a copper plate, which is attached to the back of a chip. The chip is provided with several copper plates, and the copper plates and the chip are jointly coated in a plastic package. A redistribution structure is provided on the chip.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] The present invention discloses a board-level packaging method and product with high heat dissipation performance. A copper plate is attached to the back of a chip, thereby effectively reducing the interface thermal resistance of the chip heat dissipation. The chip is not completely covered by the packaging material, and the heat dissipation channel is open, thereby improving the heat dissipation efficiency of the chip and improving the performance stability and reliability of the chip under high-load operation; the chip and the copper plate are covered by the packaging material, which effectively improves the stability of the packaging structure; the preparation method is simple, efficient, and low-cost, and solves the technical problems of low heat dissipation efficiency of high-density chips in the prior art, and has great promotion and application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a schematic structural diagram of step 1 of the present invention;

[0029] Figure 2-3 This is a schematic structural diagram of step 2 of the present invention;

[0030] Figure 4-5 This is a schematic structural diagram of step three of the present invention;

[0031] Figure 6 This is a schematic structural diagram of step four of the present invention;

[0032] Figure 7 This is a schematic structural diagram of step five of the present invention;

[0033] Figure 8 This is a schematic structural diagram of step six of the present invention;

[0034] Figure 9 This is a schematic structural diagram of step seven of the present invention;

[0035] Figure 10 This is a schematic structural diagram of step eight of the present invention;

[0036] Figure 11 This is a schematic structural diagram of step nine of the present invention;

[0037] Figure 12 This is a structural diagram of step ten of the present invention. DETAILED DESCRIPTION

[0038] The present invention is described in detail below so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more precise definition of the protection scope of the present invention.

[0039] The following is a brief summary of one or more aspects to provide a basic understanding of these aspects. This summary is not an exhaustive overview of all conceivable aspects and is neither intended to identify key or critical elements of all aspects nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that will be provided later.

[0040] like Figure 1-12 As shown, the present invention discloses a board-level packaging method with high heat dissipation performance, in which a copper plate 1 is attached to the back of a chip 4, thereby effectively reducing the interface thermal resistance of the chip heat dissipation. The chip 4 is not completely covered by the packaging material, and the heat dissipation channel is opened, thereby improving the heat dissipation efficiency of the chip 4, and improving the performance stability and reliability of the chip 4 under high-load operation. At the same time, the chip 4 and the copper plate 1 are covered by the packaging material, effectively improving the stability of the packaging structure.

[0041] The present invention discloses a board-level packaging method with high heat dissipation performance, comprising the following steps:

[0042] Step 1: If Figure 1 As shown, the copper plate 1 is bonded to the substrate 2 through a temporary bonding material, wherein the temporary bonding material includes but is not limited to a temporary bonding glue, a temporary bonding film, etc.;

[0043] Step 2: If Figure 2-3 As shown, a groove 3 and a chip placement alignment mark are etched on the copper plate 1. The thickness of the copper plate 1 can be flexibly adjusted according to the package thickness and is 100-300 microns. The size of the groove 3 should include the cutting path and the thickness of the organic packaging material on the side of the chip and copper block. The chip placement alignment mark includes but is not limited to a circle, a ring, a cross, a field, etc.

[0044] Step 3: If Figure 4-5 As shown, several chips 4 are aligned by chip mounting alignment marks, and the backs of the chips 4 are mounted on the copper plate 1 through high thermal conductivity DAF film or bonding glue;

[0045] Step 4: If Figure 6 As shown, the chip 4 is covered with a packaging material (plastic packaging material (powder, granular, cake-shaped) or plastic film) to fill the groove 3 formed in step 2 to form a plastic packaging body 5, wherein the packaging material is an organic resin or an inorganic filler;

[0046] Step 5: If Figure 7 As shown, a hole 6 is opened on the chip surface by laser drilling or dry etching;

[0047] Step 6: If Figure 8 As shown, a redistribution structure 7 for chip interconnection is made;

[0048] Step 7: If Figure 9 As shown, the structure obtained in step six is ​​separated from the substrate 2, the temporary bonding material is removed, and the copper plate 1 is exposed;

[0049] Step 8: If Figure 10 As shown, the exposed copper plate 1 is etched to expose the groove 3 made in step 2;

[0050] Step 9: If Figure 11 As shown, the exposed copper plate 1 is polished and anti-oxidation treated;

[0051] Step 10: If Figure 12 As shown, the structure obtained in step nine is cut into individual packaging units.

[0052] The present invention also discloses a board-level packaging structure prepared by a board-level packaging method with high heat dissipation performance as described above, including a copper plate 1, which is attached to the back of a chip 4, and there are several chips 4. The copper plate 1 and the chip 4 are jointly encapsulated in a plastic package 5, and a redistribution structure 7 is provided on the chip 4.

[0053] Example 1

[0054] like Figure 1-12 As shown, a board-level packaging method with high heat dissipation performance includes the following steps:

[0055] Step 1: If Figure 1 As shown, the copper plate 1 is bonded to the substrate 2 by a temporary bonding adhesive;

[0056] Step 2: If Figure 2-3 As shown, a groove 3 and a chip placement alignment mark are etched on the copper plate 1. The thickness of the copper plate 1 is 100 microns. The size of the groove 3 should include the cutting path and the thickness of the organic packaging material on the side of the chip and copper block. The chip placement alignment mark adopts a field design.

[0057] Step 3: If Figure 4-5 As shown, several chips 4 are aligned by chip mounting alignment marks, and the backs of the chips 4 are mounted on the copper plate 1 through high thermal conductivity DAF film or bonding glue. In this embodiment, four chips 4 are packaged together.

[0058] Step 4: If Figure 6 As shown, the chip 4 is coated with powdered molding compound to fill the groove 3 formed in step 2 to form a molding body 5;

[0059] Step 5: If Figure 7 As shown, a hole 6 is opened on the chip surface by laser drilling;

[0060] Step 6: If Figure 8 As shown, a redistribution structure 7 for chip interconnection is made;

[0061] Step 7: If Figure 9 As shown, the structure obtained in step 6 is separated from the substrate 2, the temporary bonding adhesive is removed, and the copper plate 1 is exposed;

[0062] Step 8: If Figure 10 As shown, the exposed copper plate 1 is etched to expose the groove 3 made in step 2;

[0063] Step 9: If Figure 11 As shown, the exposed copper plate 1 is polished and subjected to anti-oxidation treatment, wherein the polishing process is grinding, and the anti-oxidation process is treated with a conventional anti-oxidation liquid;

[0064] Step 10: If Figure 12 As shown, the structure obtained in step nine is cut into individual packaging units.

[0065] A board-level packaging structure with high heat dissipation performance is prepared by a board-level packaging method, including a copper plate 1, which is attached to the back of a chip 4. Several chips 4 are provided. The copper plate 1 and the chip 4 are jointly encapsulated in a plastic package 5, and a redistribution structure 7 is provided on the chip 4.

[0066] Parts or structures not specifically described in the present invention may adopt existing technologies or existing products and will not be described in detail here.

[0067] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A board-level packaging method with high heat dissipation performance, characterized in that: The following steps are involved: First, a copper plate is attached to the back of the chip, and then the copper plate and the chip are plastic-sealed. Then, a redistribution structure is made on the front of the chip, and then it is cut to obtain a single packaging unit.

2. A board-level packaging method with high heat dissipation performance according to claim 1, characterized in that: The following steps are involved: Step 1: Bond the copper plate to the substrate; Step 2: Etch the copper plate to form grooves and chip placement alignment marks; Step 3: Align several chips using the chip placement alignment mark and mount the back of the chips on the copper plate; Step 4: Plastic seal the above chip and copper plate; Step 5: Drill holes on the chip surface; Step 6: Make a redistribution structure for chip interconnection; Step 7: Separate the structure obtained in step 6 from the substrate to expose the copper plate; Step 8: Etch the exposed copper plate to reveal the groove made in step 2; Step 9: Polish and anti-oxidation treatment on the exposed copper plate; Step 10: Cut the structure obtained in step 9 into individual packaging units.

3. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: In step 1, the copper plate is bonded to the substrate via a temporary bonding material, and the temporary bonding material includes a temporary bonding glue and a temporary bonding film.

4. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: The thickness of the copper plate is 100-300 microns.

5. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: In step three, the back sides of several chips are mounted on the chip mounting alignment mark through a high thermal conductivity DAF film or bonding glue.

6. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: In step 4, the chip and the copper plate are covered with a packaging material to fill the groove formed in step 2 to form a plastic package body. The plastic package material is a plastic film or a plastic package material, and the plastic package material is in powder, granular or cake form.

7. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: In step five, holes are opened on the chip surface by laser drilling or dry etching.

8. The board-level packaging method with high heat dissipation performance according to claim 2, characterized in that: In step seven, the structure obtained in step six is ​​separated from the substrate, the temporary bonding material is removed, and the side of the copper plate facing away from the chip is exposed.

9. The board-level packaging structure prepared by the board-level packaging method with high heat dissipation performance according to any one of claims 1 to 8, characterized in that: It includes a copper plate, which is attached to the back of the chip. The chip is provided with several copper plates. The copper plates and the chip are wrapped together in a plastic package. A redistribution structure is provided on the chip.

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