Master-slave distributed multi-machine asynchronous system sampling synchronization method and system

Abstract

The invention relates to the technical field of industrial automation, and provides a master-slave distributed multi-machine asynchronous system sampling synchronization method and system, and the method comprises the steps: after a host device is powered on and started, a synchronous time synchronization message is sent to a slave device through a gigabit Ethernet optical port at the whole second moment; the slave devices are responsible for data sampling and receiving synchronous time synchronization messages from the host device, and the second starting time recorded by each slave device is synchronized with the second starting time of the host device after being subjected to delay compensation processing; the sampling CPU module of each slave device packs and frames the sampling data and the corresponding relative time mark to form a sampling data frame, and the sampling data frame is sent to the slave device of the previous node in real time through a gigabit Ethernet optical port; the CPU module of the host device receives the sampling data frames sent by the slave devices, and the sampling data of the slave devices are synchronously aligned through the relative time marks of the sampling data frames, so that the data sampling synchronization of the multi-machine asynchronous system is realized. The method is high in universality, and synchronization of sampling data of the slaves can be guaranteed.

Description

Technical Field

[0001] The present invention relates to the technical field of industrial automation, and in particular to a sampling synchronization method and system for a master-slave distributed multi-machine asynchronous system. Background Art

[0002] Devices like bus differentials and fault recorders collect numerous analog and digital signals. With the continuous development and maturity of digital substation communication technology, these devices are increasingly separating their collection functions and moving some of these functions upfront, installing them close to primary equipment. These slave devices communicate with master devices like bus differentials and fault recorders via optical fiber. Due to the large number of signals collected at the front end and the widely spaced layout of primary equipment, multiple slave signal collection devices are deployed at the front end. If synchronization of the sampling of slave devices is achieved by running synchronization cables between each slave in the substation, in addition to the complex and labor-intensive on-site construction, a large number of synchronization sources would be required. Generally, substations have a limited number of synchronization sources available, making it impossible to provide synchronization signals for numerous slave devices. Summary of the Invention

[0003] The purpose of the present invention is to solve at least one technical problem in the background technology and to provide a sampling synchronization method and system for a master-slave distributed multi-machine asynchronous system.

[0004] To achieve the above object, the present invention provides a master-slave distributed multi-machine asynchronous system sampling synchronization method, comprising:

[0005] After the master device is powered on, it sends the synchronization message to the slave device through the Gigabit Ethernet optical port at the exact second.

[0006] The slave device is responsible for data sampling and receiving synchronization messages from the master device. After receiving the synchronization messages, the FPGA in the sampling CPU module of the slave device transmits them to the slave device of the next node in real time through the Gigabit Ethernet optical port. The synchronization messages are analyzed in real time and the second start time is recorded. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing.

[0007] After collecting data from the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered until the data of the slave device of the node is sent.

[0008] The CPU module of the host device receives the sampling data frames sent by the slave devices, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frames to achieve data sampling synchronization of the multi-machine asynchronous system.

[0009] According to one aspect of the present invention, after the host device is powered on, it sends a synchronization message to the slave device through the Gigabit Ethernet optical port at the second:

[0010] The CPU module of the host device sends a synchronization message to the sampling CPU module of the first slave device through a Gigabit Ethernet optical port. After receiving the synchronization message, the first slave device immediately transmits it to the second slave device through a Gigabit Ethernet optical port, and so on, until the Nth slave device receives the synchronization message.

[0011] According to one aspect of the present invention, the synchronization message sent by the host device to the slave device includes a synchronization pulse signal and a 32-bit second counter. The synchronization pulse signal is sent once per second, and the count value of the 32-bit second counter is accumulated by 1 per second.

[0012] According to one aspect of the present invention, there is a delay time in the synchronization message sent by the master device to the slave device, and the delay time includes the transmission delay of the optical Ethernet link and the delay of each slave device in transparently forwarding the synchronization message in real time;

[0013] The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing is performed on the optical Ethernet link transmission delay and the message delay of each slave device during real-time transparent forwarding synchronization.

[0014] According to one aspect of the present invention, the FPGA in the sampling CPU module of the slave device obtains the second start time and the 32-bit second count value through the received synchronization message, and the sampling CPU determines the sampling time according to the time offset relative to the second start time.

[0015] According to one aspect of the present invention, the time offset of the sampling moment of the sampling CPU module of the slave device relative to the second start moment is calculated by the following formula:

[0016] The sampling rate of the slave device per second is N, then the time interval of each sampling point Δt tick for:

[0017] Δt tick =ΔT 1S / N;

[0018] The time offset Δt between the mth sampling point and the start time of the synchronization second offset_m for:

[0019] Δt offset_m=Δt tick *m;

[0020] Where, ΔT 1S is the 1S time interval of the synchronization clock, N is the number of sampling points in 1 second of the synchronization clock, and m is the mth sampling point in 1 second;

[0021] According to one aspect of the present invention, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a data frame and sends it to the slave device of the previous node in real time through the Gigabit Ethernet optical port:

[0022] Each frame header sent by the sampling CPU module of each slave device adds a 32-bit second count value and the time offset Δt of the sampling point offset_m , and packaged together with the sampling data to form a sampling data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port.

[0023] According to one aspect of the present invention, the CPU module of the host device aligns the sampled data of each slave device by comparing the relative time stamps in the sampled data frames received from each slave device, thereby achieving sampled data synchronization of a multi-machine asynchronous system. The relative time stamp includes a 32-bit second count value and a time offset Δt of the second starting time of the current sampling point. offset_m .

[0024] According to one aspect of the present invention, the present invention further comprises: a CPU module of the host device receives an external photoelectric B-code timing signal, the B-code timing signal is decoded in real time by an FPGA in the CPU module of the host device and processed for time keeping to serve as an absolute time scale of the host device;

[0025] The CPU module of the host device adds the absolute time stamp to each sampled data, which serves as the time stamp for data communication between the host device and each slave device.

[0026] To achieve the above object, the present invention further provides a master-slave distributed multi-machine asynchronous system sampling synchronization system, comprising:

[0027] Synchronous synchronization message sending module, after the master device is powered on, it sends the synchronous synchronization message to the slave device through the Gigabit Ethernet optical port at the whole second;

[0028] The master-slave time synchronization module: The slave device is responsible for data sampling and receives synchronization messages from the master device. After receiving the synchronization message, the FPGA in the sampling CPU module of the slave device transmits it to the slave device of the next node in real time through the Gigabit Ethernet optical port. It also parses the synchronization message in real time and records the second start time. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing;

[0029] The sampling data frame transmission module: after collecting the data of the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the current node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered first until the data of the slave device of the current node is sent.

[0030] The sampling data synchronization module, the CPU module of the host device receives the sampling data frame sent by the slave device, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frame to achieve data sampling synchronization of the multi-machine asynchronous system.

[0031] To achieve the above-mentioned objectives, the present invention also provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the above-mentioned master-slave distributed multi-machine asynchronous system sampling synchronization method.

[0032] To achieve the above object, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the above-mentioned master-slave distributed multi-machine asynchronous system sampling synchronization method.

[0033] According to the solution of the present invention, the master-slave distributed multi-machine asynchronous system sampling synchronization system proposed by the present invention does not rely on a strong real-time operating system and an additional time synchronization clock source. The method is highly versatile and can ensure the synchronization of sampling data of each slave.

[0034] The present invention's implementation is simple, reliable, and cost-effective, requiring minimal on-site wiring and construction. Communication between the master and slave devices utilizes a set of optical transceiver modules, with independent communication channels for uplink sampling data and downlink synchronization messages. This fully utilizes the optical module's transceiver capabilities, prevents uplink and downlink data conflicts, and ensures stable and reliable data communication. The master and slave devices synchronize sampling data using a relative time stamp, a simple and reliable method that is unaffected by the timing quality of the external B-code. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A flowchart schematically illustrates a sampling synchronization method for a master-slave distributed multi-machine asynchronous system according to an embodiment of the present invention;

[0036] Figure 2 The schematic diagram shows a principle block diagram of a master-slave distributed multi-machine asynchronous system sampling synchronization method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present invention will now be discussed with reference to exemplary embodiments. It should be understood that the embodiments discussed are only intended to enable those skilled in the art to better understand and implement the present invention, rather than to imply any limitation on the scope of the present invention.

[0038] As used herein, the term "including" and variations thereof are to be interpreted as open-ended terms meaning "including, but not limited to." The term "based on" is to be interpreted as "based, at least in part, on." The terms "one embodiment" and "an embodiment" are to be interpreted as "at least one embodiment."

[0039] Figure 1 A flowchart schematically illustrates a sampling synchronization method for a master-slave distributed multi-machine asynchronous system according to an embodiment of the present invention; Figure 2 The schematic diagram shows a principle block diagram of a master-slave distributed multi-machine asynchronous system sampling synchronization method according to an embodiment of the present invention. Figure 1 and Figure 2 As shown, in this embodiment, the master-slave distributed multi-machine asynchronous system sampling synchronization method includes:

[0040] After the master device is powered on, it sends the synchronization message to the slave device through the Gigabit Ethernet optical port at the exact second.

[0041] The slave device is responsible for data sampling and receiving synchronization messages from the master device. After receiving the synchronization messages, the FPGA in the sampling CPU module of the slave device transmits them to the slave device of the next node in real time through the Gigabit Ethernet optical port. The synchronization messages are analyzed in real time and the second start time is recorded. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing.

[0042] After collecting data from the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered until the data of the slave device of the node is sent.

[0043] The CPU module of the host device receives the sampling data frames sent by the slave devices, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frames to achieve data sampling synchronization of the multi-machine asynchronous system.

[0044] In this embodiment, the number of slave devices is one or more.

[0045] The host device receives the sampling data sent by multiple slave devices through the Gigabit Ethernet optical port and is responsible for the centralized processing and calculation of all the sampling data.

[0046] The sampling data that can be collected by the sampling CPU module of the slave device include data signals such as switching quantity, DC quantity, temperature, and AC voltage and current.

[0047] Furthermore, according to an embodiment of the present invention, after the host device is powered on, it sends a synchronization message to the slave device via the Gigabit Ethernet optical port at the exact second:

[0048] The CPU module of the host device sends a synchronization message to the sampling CPU module of the first slave device through a Gigabit Ethernet optical port. After receiving the synchronization message, the first slave device immediately transmits it to the second slave device through a Gigabit Ethernet optical port, and so on, until the Nth slave device receives the synchronization message.

[0049] Furthermore, according to one embodiment of the present invention, the synchronization message sent by the master device to the slave device includes a synchronization pulse signal and a 32-bit second counter. The synchronization pulse signal is transmitted once per second, and the 32-bit second counter increments by 1 per second. In this embodiment, the 32-bit synchronization message sent by the master device to the slave device is not affected by jitter or loss of synchronization of the external B-code synchronization signal, providing a reliable relative time scale for each slave device.

[0050] Furthermore, according to one embodiment of the present invention, there is a delay time in the synchronization message sent by the master device to the slave device, and the delay time includes the transmission delay of the optical Ethernet link and the delay of each slave device in transparently forwarding the synchronization message in real time;

[0051] The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing is performed on the optical Ethernet link transmission delay and the message delay of each slave device during real-time transparent forwarding synchronization.

[0052] Furthermore, according to one embodiment of the present invention, the FPGA in the sampling CPU module of the slave device obtains the second start time and the 32-bit second count value through the received synchronization message, and the sampling CPU determines the sampling time according to the time offset relative to the second start time.

[0053] Furthermore, according to one embodiment of the present invention, the time offset of the sampling moment of the sampling CPU module of the slave device relative to the second start moment is calculated by the following formula:

[0054] The sampling rate of the slave device per second is N, then the time interval of each sampling point Δt tick for:

[0055] Δt tick =ΔT 1S / N;

[0056] The time offset Δt between the mth sampling point and the start time of the synchronization second offset_m for:

[0057] Δt offset_m =Δt tick *m;

[0058] Where ΔT 1S is the 1S time interval of the synchronization clock, N is the number of sampling points in 1 second of the synchronization clock, and m is the mth sampling point in 1 second;

[0059] Furthermore, according to an embodiment of the present invention, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a data frame and sends it to the slave device of the previous node in real time through the Gigabit Ethernet optical port:

[0060] Each frame header sent by the sampling CPU module of each slave device adds a 32-bit second count value and the time offset Δt of the sampling point offset_m , and packaged together with the sampling data to form a sampling data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port.

[0061] Furthermore, according to one embodiment of the present invention, the CPU module of the host device aligns the sampled data of each slave device by comparing the relative time stamps in the sampled data frames received from each slave device, thereby achieving sampled data synchronization of the multi-machine asynchronous system. The relative time stamp includes a 32-bit second count value and a time offset Δt of the second start time of the current sampling point. offset_m .

[0062] Furthermore, according to one embodiment of the present invention, the Gigabit Ethernet optical port downstream ports of the host device and the slave device send synchronization messages, and the upstream ports send sampling data messages (sampling data frames). The synchronous clock and sampling data are sent and received completely independently, which can avoid data conflicts and ensure the accuracy of clock synchronization between the master and slave devices.

[0063] Furthermore, according to one embodiment of the present invention, the method further includes: a CPU module of the host device receives an external photoelectric B-code timing signal, the B-code timing signal is decoded in real time by an FPGA in the CPU module of the host device and processed for timekeeping before being used as an absolute time scale of the host device;

[0064] The CPU module of the host device adds the absolute time stamp to each sampled data, which serves as the time stamp for data communication between the host device and each slave device.

[0065] According to the above scheme of the present invention, the master-slave distributed multi-machine asynchronous system sampling synchronization method proposed by the present invention does not rely on a strong real-time operating system and an additional time synchronization clock source. The method is highly versatile and can ensure the synchronization of sampling data of each slave machine.

[0066] The above-described solution of the present invention is simple, reliable, and low-cost to implement, requiring minimal on-site wiring and construction. Communication between the master and slave devices utilizes a set of optical transceiver modules, with independent communication channels for uplink sampling data and downlink synchronization messages. This fully utilizes the optical module's transceiver capabilities, prevents uplink and downlink data conflicts, and ensures stable and reliable data communication. The master and slave devices synchronize sampling data using a relative time stamp, a simple and reliable method that is unaffected by the timing quality of the external B-code.

[0067] Furthermore, to achieve the above-mentioned object, the present invention also provides a master-slave distributed multi-machine asynchronous system sampling synchronization system, comprising:

[0068] Synchronous synchronization message sending module, after the master device is powered on, it sends the synchronous synchronization message to the slave device through the Gigabit Ethernet optical port at the whole second;

[0069] The master-slave time synchronization module: The slave device is responsible for data sampling and receives synchronization messages from the master device. After receiving the synchronization message, the FPGA in the sampling CPU module of the slave device transmits it to the slave device of the next node in real time through the Gigabit Ethernet optical port. It also parses the synchronization message in real time and records the second start time. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing;

[0070] The sampling data frame transmission module: after collecting the data of the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the current node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered first until the data of the slave device of the current node is sent.

[0071] The sampling data synchronization module, the CPU module of the host device receives the sampling data frame sent by the slave device, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frame to achieve data sampling synchronization of the multi-machine asynchronous system.

[0072] In this embodiment, the number of slave devices is one or more.

[0073] The host device receives the sampling data sent by multiple slave devices through the Gigabit Ethernet optical port and is responsible for the centralized processing and calculation of all the sampling data.

[0074] The sampling data that can be collected by the sampling CPU module of the slave device include data signals such as switching quantity, DC quantity, temperature, and AC voltage and current.

[0075] Furthermore, according to an embodiment of the present invention, after the host device is powered on, it sends a synchronization message to the slave device via the Gigabit Ethernet optical port at the exact second:

[0076] The CPU module of the host device sends a synchronization message to the sampling CPU module of the first slave device through a Gigabit Ethernet optical port. After receiving the synchronization message, the first slave device immediately transmits it to the second slave device through a Gigabit Ethernet optical port, and so on, until the Nth slave device receives the synchronization message.

[0077] Furthermore, according to one embodiment of the present invention, the synchronization message sent by the master device to the slave device includes a synchronization pulse signal and a 32-bit second counter. The synchronization pulse signal is transmitted once per second, and the 32-bit second counter increments by 1 per second. In this embodiment, the 32-bit synchronization message sent by the master device to the slave device is not affected by jitter or loss of synchronization of the external B-code synchronization signal, providing a reliable relative time scale for each slave device.

[0078] Furthermore, according to one embodiment of the present invention, there is a delay time in the synchronization message sent by the master device to the slave device, and the delay time includes the transmission delay of the optical Ethernet link and the delay of each slave device in transparently forwarding the synchronization message in real time;

[0079] The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing is performed on the optical Ethernet link transmission delay and the message delay of each slave device during real-time transparent forwarding synchronization.

[0080] Furthermore, according to one embodiment of the present invention, the FPGA in the sampling CPU module of the slave device obtains the second start time and the 32-bit second count value through the received synchronization message, and the sampling CPU determines the sampling time according to the time offset relative to the second start time.

[0081] Furthermore, according to one embodiment of the present invention, the time offset of the sampling moment of the sampling CPU module of the slave device relative to the second start moment is calculated by the following formula:

[0082] The sampling rate of the slave device per second is N, then the time interval of each sampling point Δt tick for:

[0083] Δt tick =ΔT 1S / N;

[0084] The time offset Δt between the mth sampling point and the start time of the synchronization second offset_m for:

[0085] Δt offset_m =Δt tick *m;

[0086] Where ΔT 1S is the 1S time interval of the synchronization clock, N is the number of sampling points in 1 second of the synchronization clock, and m is the mth sampling point in 1 second;

[0087] Furthermore, according to an embodiment of the present invention, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a data frame and sends it to the slave device of the previous node in real time through the Gigabit Ethernet optical port:

[0088] Each frame header sent by the sampling CPU module of each slave device adds a 32-bit second count value and the time offset Δt of the sampling point offset_m , and packaged together with the sampling data to form a sampling data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port.

[0089] Furthermore, according to one embodiment of the present invention, the CPU module of the host device aligns the sampled data of each slave device by comparing the relative time stamps in the sampled data frames received from each slave device, thereby achieving sampled data synchronization of the multi-machine asynchronous system. The relative time stamp includes a 32-bit second count value and a time offset Δt of the second start time of the current sampling point. offset_m .

[0090] Furthermore, according to one embodiment of the present invention, the Gigabit Ethernet optical port downstream ports of the host device and the slave device send synchronization messages, and the upstream ports send sampling data messages (sampling data frames). The synchronous clock and sampling data are sent and received completely independently, which can avoid data conflicts and ensure the accuracy of clock synchronization between the master and slave devices.

[0091] Furthermore, according to one embodiment of the present invention, the method further includes: a CPU module of the host device receives an external photoelectric B-code timing signal, the B-code timing signal is decoded in real time by an FPGA in the CPU module of the host device and processed for timekeeping before being used as an absolute time scale of the host device;

[0092] The CPU module of the host device adds the absolute time stamp to each sampled data, which serves as the time stamp for data communication between the host device and each slave device.

[0093] According to the above scheme of the present invention, the master-slave distributed multi-machine asynchronous system sampling synchronization system proposed by the present invention does not rely on a strong real-time operating system and an additional time synchronization clock source. The method is highly versatile and can ensure the synchronization of sampling data of each slave machine.

[0094] The above-described solution of the present invention is simple, reliable, and low-cost to implement, requiring minimal on-site wiring and construction. Communication between the master and slave devices utilizes a set of optical transceiver modules, with independent communication channels for uplink sampling data and downlink synchronization messages. This fully utilizes the optical module's transceiver capabilities, prevents uplink and downlink data conflicts, and ensures stable and reliable data communication. The master and slave devices synchronize sampling data using a relative time stamp, a simple and reliable method that is unaffected by the timing quality of the external B-code.

[0095] Furthermore, to achieve the above-mentioned purpose, the present invention also provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the master-slave distributed multi-machine asynchronous system sampling synchronization method as described above is implemented.

[0096] Furthermore, to achieve the above-mentioned purpose, the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the above-mentioned master-slave distributed multi-machine asynchronous system sampling synchronization method is implemented.

[0097] Those skilled in the art will appreciate that the modules and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0098] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and equipment can refer to the corresponding processes in the aforementioned method implementation methods and will not be repeated here.

[0099] In the embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0100] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the objectives of the embodiments of the present invention.

[0101] In addition, each functional module in the embodiment of the present invention may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0102] If the functions are implemented as software modules and sold or used as standalone products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the energy-saving signal transmission / reception method according to various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a mobile hard drive, ROM, RAM, a magnetic disk, or an optical disk.

[0103] The above description is merely a preferred embodiment of the present application and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also encompasses other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the inventive concept. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in this application.

[0104] It should be understood that the size of the serial numbers of each step in the content of the invention and the implementation methods of the present invention does not absolutely mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the implementation methods of the present invention.

Claims

1. A master-slave distributed multi-machine asynchronous system sampling synchronization method, characterized in that: include: After the master device is powered on, it sends the synchronization message to the slave device through the Gigabit Ethernet optical port at the exact second. The slave device is responsible for data sampling and receiving synchronization messages from the master device. After receiving the synchronization messages, the FPGA in the sampling CPU module of the slave device transmits them to the slave device of the next node in real time through the Gigabit Ethernet optical port. The synchronization messages are analyzed in real time and the second start time is recorded. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing. After collecting data from the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered until the data of the slave device of the node is sent. The CPU module of the host device receives the sampling data frames sent by the slave devices, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frames to achieve data sampling synchronization of the multi-machine asynchronous system.

2. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: After the host device is powered on, it sends the synchronization message to the slave device through the Gigabit Ethernet optical port at the exact second: The CPU module of the host device sends a synchronization message to the sampling CPU module of the first slave device through a Gigabit Ethernet optical port. After receiving the synchronization message, the first slave device immediately transmits it to the second slave device through a Gigabit Ethernet optical port, and so on, until the Nth slave device receives the synchronization message.

3. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: The synchronization message sent by the master device to the slave device includes a synchronization pulse signal and a 32-bit second counter. The synchronization pulse signal is sent once per second, and the count value of the 32-bit second counter is accumulated by 1 per second.

4. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: There is a delay time for the synchronization message sent by the master device to the slave device, which includes the transmission delay of the optical Ethernet link and the delay of the real-time transparent transmission of the synchronization message by each slave device; The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing is performed on the optical Ethernet link transmission delay and the message delay of each slave device during real-time transparent forwarding synchronization.

5. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: The FPGA in the sampling CPU module of the slave device obtains the second start time and the 32-bit second count value through the received synchronization message, and the sampling CPU determines the sampling time according to the time offset relative to the second start time.

6. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: The time offset of the sampling time of the sampling CPU module of the slave device relative to the start time of the second is calculated by the following formula: The sampling rate of the slave device per second is N, then the time interval of each sampling point Δt tick for: Δt tick =ΔT 1S / N; The time offset Δt between the mth sampling point and the start time of the synchronization second offset_m for: Δt offset_m =Δt tick *m; Where ΔT 1S is the 1S time interval of the synchronization clock, N is the number of sampling points in 1 second of the synchronization clock, and m is the mth sampling point in 1 second.

7. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: The sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a data frame and sends it to the slave device of the previous node in real time through the Gigabit Ethernet optical port: Each frame header sent by the sampling CPU module of each slave device adds a 32-bit second count value and the time offset Δt of the sampling point offset_m , and packaged together with the sampling data to form a sampling data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port.

8. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to claim 1, characterized in that: The host device CPU module aligns the sampling data of each slave device by comparing the relative time stamps in the sampling data frames received from each slave device, realizing the sampling data synchronization of the multi-machine asynchronous system. The relative time stamp includes the 32-bit second count value and the time offset Δt of the second starting time of the current sampling point. offset_m .

9. The master-slave distributed multi-machine asynchronous system sampling synchronization method according to any one of claims 1 to 8, characterized in that: Also includes: The CPU module of the host device receives the external photoelectric B-code timing signal. This B-code timing signal is decoded in real time by the FPGA in the CPU module of the host device and processed as the absolute time scale of the host device after being processed by the punctuality. The CPU module of the host device adds the absolute time stamp to each sampled data, which serves as the time stamp for data communication between the host device and each slave device.

10. Master-slave distributed multi-machine asynchronous system sampling synchronization system, characterized by: include: Synchronous synchronization message sending module, after the master device is powered on, it sends the synchronous synchronization message to the slave device through the Gigabit Ethernet optical port at the whole second; The master-slave time synchronization module: The slave device is responsible for data sampling and receives synchronization messages from the master device. After receiving the synchronization message, the FPGA in the sampling CPU module of the slave device transmits it to the slave device of the next node in real time through the Gigabit Ethernet optical port. It also parses the synchronization message in real time and records the second start time. This time is used as the relative time scale of the slave device. The second start time recorded by each slave device is synchronized with the second start time of the master device after delay compensation processing; The sampling data frame transmission module: after collecting the data of the slave device, the sampling CPU module of each slave device packages the sampled data and the corresponding relative time stamp into a frame to form a sampled data frame, which is sent to the slave device of the previous node in real time through the Gigabit Ethernet optical port. If the slave device of the current node is currently sending a data frame, the data frame sent by the slave device of the next node will be buffered first until the data of the slave device of the current node is sent. The sampling data synchronization module, the CPU module of the host device receives the sampling data frame sent by the slave device, and synchronizes the sampling data of each slave device through the relative time stamp of the sampling data frame to achieve data sampling synchronization of the multi-machine asynchronous system.

11. An electronic device, characterized in that The invention comprises a processor, a memory and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the sampling synchronization method for a master-slave distributed multi-machine asynchronous system according to any one of claims 1 to 9 is implemented.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the sampling synchronization method for a master-slave distributed multi-machine asynchronous system according to any one of claims 1 to 9 is implemented.

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