Method for improving silicon residue

Abstract

The invention discloses a method for improving silicon residue, which comprises the following steps of: 1, providing a semiconductor substrate, and etching on the semiconductor substrate to form a deep trench with a deep trench isolation structure; step 2, performing a deep trench filling process of the deep trench isolation structure, and filling the deep trench with oxide; step 3, removing the isolation region hard mask layer, performing a wet etching process of oxide once, and then depositing an active region hard mask layer etched in an active region; and 4, etching and forming a shallow trench isolation structure on the periphery of the deep trench isolation structure. According to the method disclosed by the invention, after the silicon nitride hard mask layer is etched and removed, the wet etching process of the oxide is immediately carried out once to reduce the thickness of the oxide film layer at the top of the deep trench, and the thinned oxide film layer at the corner in the subsequent STI trench etching does not block the silicon etching; and the problem of wall-shaped residue of silicon formed after the STI groove is etched in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor device and process manufacturing, and in particular to a method for improving silicon residue. Background Art

[0002] Deep trench isolation (DTI) is a commonly used isolation structure in semiconductor devices. Generally, an insulating dielectric layer is filled in a trench with a depth-to-width ratio greater than 20 to form an isolation structure. The DTI structure is generally used in combination with the shallow trench isolation (STI), that is, the DTI structure is located within the range of the STI structure. In a semiconductor process, the DTI trench is made first and then the STI trench is made. Figure 1 As shown in FIG, after the DTI trench etching is completed, the dielectric layer is filled with thermal silicon oxide. Figure 2 As shown, the silicon oxide layer at the top corner of the DTI deep trench will be raised and thicker than the film layer in other areas. After the subsequent removal of the silicon nitride film layer and the deposition of the active area hard mask layer, since the DTI trench is in the STI area, the silicon oxide at the corner will block the etching of silicon in the subsequent etching process of the STI area, thereby forming a silicon wall-like residual defect. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a method for improving silicon residues and improving morphology defects in the DTI process.

[0004] To solve the above problems, the present invention provides a method for improving silicon residue: Step 1: providing a semiconductor substrate, depositing an isolation region hard mask layer on the semiconductor substrate and patterning the layer, and etching to form a deep trench isolation structure using the isolation region hard mask layer as a shield; Step 2: Perform a deep trench filling process for the deep trench isolation structure, fill the deep trench with a certain thickness of oxide, and then fill the remaining space of the deep trench with polysilicon; Step 3, removing the isolation area hard mask layer, performing a wet etching process of oxide and nitride, and then depositing an active area hard mask layer for active area etching; Step 4: etching and forming a shallow trench isolation structure around the deep trench isolation structure.

[0005] Furthermore, in the step 1, the hard mask layer of the isolation region is silicon oxide / silicon nitride / silicon oxide.

[0006] Furthermore, in the step 2, the oxide filling in the deep trench is performed by thermal oxidation to form an oxide with a certain thickness, and then polysilicon is deposited to fill the remaining space in the deep trench.

[0007] Furthermore, in the step three, the oxide formed by the thermal oxidation method has a thicker film thickness in the area at the top opening of the deep trench; after the wet etching process, a portion of the oxide film thickness in the area at the top opening of the deep trench is etched away, reducing the oxide film thickness in the area at the top opening of the deep trench.

[0008] Furthermore, in the step three, the wet etching process etches an oxide film thickness of 500 to 1000 Å.

[0009] The method for improving silicon residue described in the present invention is to immediately perform an oxide wet etching process to reduce the thickness of the oxide film layer at the top of the deep trench after the existing silicon nitride hard mask layer is etched and removed. In the subsequent STI trench etching, the thinned oxide film layer at the corner does not hinder the etching of silicon, thereby improving the problem of silicon wall residue formed after STI trench etching in the existing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a schematic diagram of deep trench etching of a DTI deep trench isolation structure using an existing process method.

[0011] Figure 2 This is a schematic diagram of the existing process method, a DTI deep trench isolation structure after deep trench oxide filling.

[0012] Figure 3 This is a schematic diagram of the existing process method, which is after the hard mask of the isolation area of ​​the DTI deep trench isolation structure is removed and the hard mask of the active area is deposited.

[0013] Figure 4 This is a schematic diagram of the silicon residue after STI trench etching in the existing process method.

[0014] Figure 5 This is a schematic diagram of the morphology of the process method of the present invention after etching and removing the silicon nitride hard mask layer of DTI, wet etching of oxide, and deposition of the active area hard mask layer.

[0015] Figure 6 This is the topography of the trench after STI etching in the process method of the present invention.

[0016] Figure 7 yes Figure 6 Magnified view of the top of the groove.

[0017] Figure 8 It is a flow chart of the process of the present invention. DETAILED DESCRIPTION

[0018] The specific embodiments of the present application are described below with reference to the accompanying drawings, which are used to clearly and completely describe the technical solutions in the present application, but the present application is not limited to the following embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The advantages and features of the present application will be clearer according to the following description and claims. It should be noted that the drawings are very simplified and non-precise ratios are used, only for the purpose of facilitating and clearly assisting the description of the embodiments of the present application. All other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0019] The present application can be implemented in different forms, and should not be interpreted as being limited to the embodiments presented here. On the contrary, these embodiments are provided to make the disclosure complete and complete, and to fully convey the scope of the present application to those skilled in the art. In the drawings, the size and relative size of the layers and regions may be exaggerated for clarity, and the same reference signs represent the same elements throughout. In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0020] The present application is directed to the problem of silicon etching residue causing defects in the DTI process. The new process includes: Step one, providing a semiconductor substrate, depositing an isolation region hard mask layer on the semiconductor substrate and patterning, and etching a deep trench isolation structure deep trench with the isolation region hard mask layer as a shield; Step two, deep trench isolation structure deep trench filling process, filling a certain thickness of oxide in the deep trench, and then depositing polysilicon to fill the remaining space in the deep trench; Step three, removing the isolation region hard mask layer, performing a wet etching process of the oxide, and then depositing an active region hard mask layer for active region etching; Step four, etching and forming a shallow trench isolation structure around the deep trench isolation structure.

[0021] Taking a BCD process 120V DTI 1st process as an example, continuing to refer to Figure 1First, a silicon nitride layer is deposited on the silicon substrate as a hard mask layer for DTI trench etching, namely the isolation region hard mask layer. After the hard mask layer is patterned, the DTI trench etching window is opened, and the silicon substrate is etched using the hard mask layer as a barrier layer to form the deep trench of the DTI structure.

[0022] The DTI trench is filled with a thermal oxidation process. First, a certain thickness of silicon oxide layer is deposited, and then the remaining space inside the deep polysilicon trench is filled. Due to the 90-degree corner at the top of the DTI trench, the silicon oxide film here is prone to thicker film thickness or even warping. Please refer to Figure 2 Since the DTI trench is in the STI region, the silicon oxide at the corners of the subsequent STI shallow trench will block the etching of the substrate silicon, which will lead to the problem of silicon residue, and the residual silicon will form a sidewall structure.

[0023] The isolation region hard mask layer is then removed. The ONO layer can be removed by any method, including a wet etching process. After the isolation region hard mask layer is completely removed, a supplementary wet etching process is immediately performed on the silicon oxide film layer. This wet etching process partially reduces the thickness of the silicon oxide at the top corners of the DTI trenches, thinning the silicon oxide film there. This allows the thickness of the thinned silicon oxide layer to be more uniform during the subsequent STI silicon etching. Although silicon oxide is also etched during the ONO hard mask layer removal process, due to the relatively thin oxide film thickness and the small amount of etching, it is difficult to effectively reduce the thickness of the silicon oxide film at the corners using only the ONO hard mask layer wet etching process. Therefore, a supplementary wet etching process for silicon oxide is added to significantly modify the silicon oxide film at the corners. After the silicon oxide film is partially etched at the corners, the film layer is free of warping, acting as a barrier to silicon etching, and no silicon residue is left during the subsequent STI etching. The etching depth of silicon oxide film is generally 500-1000Å, such as 500Å, 600Å, 700Å, 800Å, 900Å, and 1000Å. The specific etching depth is determined by the thickness of the film layer or the film thickness at the corners.

[0024] After wet etching of silicon oxide film, the morphology formed is as follows Figure 5 shown.

[0025] After the silicon oxide film is wet-etched, a hard mask layer is deposited again in the active area.

[0026] Perform subsequent STI trench etching to produce the STI structure. Figure 6 and Figure 7 As shown, Figure 7 yes Figure 6 From the local enlarged image, it can be seen that after wet etching of the oxide film, the morphology of the top of the trench is significantly improved, and no silicon residue occurs.

[0027] The STI structure is located outside the DTI structure and includes the DTI structure.

[0028] By adopting the new process method of the present invention, after removing the silicon nitride hard mask layer of the original DTI trench etching, a wet etching process for silicon oxide is added to thin the oxide film thickness at the top corner of the DTI trench, thereby improving the morphological defects of silicon sidewalls formed by silicon residue during STI silicon etching.

[0029] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Those skilled in the art will appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for improving silicon residue, characterized in that: Step 1: providing a semiconductor substrate, depositing an isolation region hard mask layer on the semiconductor substrate and patterning the layer, and etching to form a deep trench isolation structure using the isolation region hard mask layer as a shield; Step 2: performing a deep trench filling process for a deep trench isolation structure, filling the deep trench with oxide and polysilicon until the deep trench is completely filled; Step 3, removing the isolation area hard mask layer, performing a wet etching process for oxide and nitride, and then depositing an active area hard mask layer for active area etching; Step 4: etching and forming a shallow trench isolation structure around the deep trench isolation structure.

2. The method for improving silicon residue according to claim 1, wherein: In the step 1, the isolation region hard mask layer is a silicon oxide / silicon nitride / silicon oxide layer, namely, an ONO layer.

3. The method for improving silicon residue according to claim 1, wherein: In the above-mentioned step 2, the oxide filling in the deep trench is first formed into an oxide with a certain thickness by a thermal oxidation method, which will result in a thicker oxide film layer at the top corner.

4. The method for improving silicon residue according to claim 1, wherein: In the step three, the oxide formed by the thermal oxidation method has a thicker film thickness in the area at the top opening of the deep trench; after the wet etching process, a portion of the oxide film thickness in the area at the top opening of the deep trench is etched away, reducing the oxide film thickness in the area at the top opening of the deep trench.

5. The method for improving silicon residue according to claim 1, wherein: In the step 3, the wet etching process etches the oxide film to a thickness of 500 to 1000 Å.

6. The method for improving silicon residue according to claim 1, wherein: The semiconductor substrate is a silicon substrate.

7. The method for improving silicon residue according to claim 1, wherein: The deep trench isolation structure is located within the shallow trench isolation structure, and the shallow trench isolation structure includes the deep trench isolation structure.

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