Level conversion circuit and chip
The combination of a dual-output unit, a voltage-limiting processing unit, and a voltage conversion unit solves the problem of limited voltage variation range in traditional level conversion circuits, enables signal conversion over a wide voltage range, and direct connection of differential/common-mode operational amplifiers, reduces power consumption, and improves circuit flexibility and integration.
Patent Information
- Application Number
- CN202510692701.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-27
- Publication Date
- 2025-10-10
AI Technical Summary
Traditional level conversion circuits can only adapt to a very limited voltage variation range and cannot be directly connected to differential/common-mode op amps, resulting in limited circuit functionality and high power consumption.
It adopts a combined structure of dual-channel output unit, voltage limiting processing unit and voltage conversion unit. Through voltage limiting protection and voltage division conversion, it realizes compression of large dynamic range of input signal and fine logic conversion, and supports direct connection to differential/common mode operational amplifiers.
The voltage variation range of the level conversion circuit is expanded, the fluctuation of the high-voltage conversion process is reduced, the power consumption is reduced, and the direct connection of differential/common-mode operational amplifiers is supported, thereby improving the flexibility and integration of the circuit.
Smart Images

Figure CN120768334A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of circuit, in particular to a level conversion circuit and a chip. BACKGROUND
[0002] With the vigorous development of information technology and intelligent technology, various devices with different functions are highly integrated. Due to the different working characteristics of these devices, the signal level and current demand show the characteristics of diversity. Therefore, a circuit for converting between different signal levels is needed.
[0003] As shown in Figure 2 , Figure 2 a traditional low-to-high level conversion circuit is shown, which is mainly used to realize level conversion between fixed voltage domains. However, the working range of this level conversion circuit is strictly limited by the voltage withstand characteristics of the device and the logic working interval. Once the circuit design is completed, the level conversion range is fixed and cannot be changed. This leads to the fact that it can only adapt to a very limited voltage variation range. Once this range is exceeded, the circuit function may be affected, and this level conversion circuit cannot be directly connected to a differential / common-mode operational amplifier. SUMMARY
[0004] The purpose of the embodiments of the present application is to provide a level conversion circuit and a chip to solve the defects that the traditional level conversion circuit can only adapt to a very limited voltage variation range and cannot be directly connected to a differential / common-mode operational amplifier.
[0005] In order to achieve the above-mentioned purpose, the embodiments of the present application provide a level conversion circuit, comprising:
[0006] A dual-path output unit is configured to provide a first output end and a second output end, respectively;
[0007] A voltage limiting processing unit is electrically connected to the first output end and the second output end, respectively, configured to determine the on-off state of the first output end and the ground end based on the voltage value of the first output end, so that the voltage value of the first output end changes within a first threshold range, and determine the on-off state of the second output end and the ground end based on the voltage value of the second output end, so that the voltage value of the second output end changes within a second threshold range;
[0008] A first voltage conversion unit is electrically connected to the first output end, configured to convert the first input voltage to output a first converted voltage to the first output end;
[0009] A second voltage conversion unit is electrically connected to the second output end, configured to convert the second input voltage to output a second converted voltage to the second output end.
[0010] Optionally, the voltage limiting processing unit includes a first voltage limiting device and a second voltage limiting device, wherein a first end of the first voltage limiting device is electrically connected to the first output end, and a second end of the first voltage limiting device is grounded; a first end of the second voltage limiting device is electrically connected to the second output end, and a second end of the second voltage limiting device is grounded;
[0011] The first voltage limiting device is used to connect the first output terminal to the ground terminal when the voltage value of the first output terminal is greater than a set threshold, and disconnect the first output terminal from the ground terminal when the voltage value of the first output terminal is less than or equal to the set threshold; the second voltage limiting device is used to connect the second output terminal to the ground terminal when the voltage value of the second output terminal is greater than a set threshold, and disconnect the second output terminal from the ground terminal when the voltage value of the second output terminal is less than or equal to the set threshold.
[0012] Optionally, the first voltage limiting device is a Zener diode or a limiter; the second voltage limiting device is a Zener diode or a limiter.
[0013] Optionally, the first voltage conversion unit includes: a first voltage divider device, a third voltage divider device, and a fifth voltage divider device; the first end of the third voltage divider device is electrically connected to the first energy supply module, the first end of the fifth voltage divider device is electrically connected to the second end of the third voltage divider device, the second end of the fifth voltage divider device is grounded, the first end of the first voltage divider device is electrically connected to the second end of the third voltage divider device, the second end of the first voltage divider device is electrically connected to the third energy supply module, and a common end of the first voltage divider device, the third voltage divider device, and the fifth voltage divider device are connected to each other as the output end of the first voltage conversion unit and is electrically connected to the first output end;
[0014] The second voltage conversion unit includes: a second voltage divider device, a fourth voltage divider device and a sixth voltage divider device; the first end of the fourth voltage divider device is electrically connected to the second energy supply module, the first end of the sixth voltage divider device is electrically connected to the second end of the fourth voltage divider device, the second end of the sixth voltage divider device is grounded, the first end of the second voltage divider device is electrically connected to the second end of the fourth voltage divider device, the second end of the second voltage divider device is electrically connected to the third energy supply module, and the common end of the second voltage divider device, the fourth voltage divider device and the sixth voltage divider device connected to each other is electrically connected to the second output end as the output end of the second voltage conversion unit.
[0015] Optionally, the first voltage divider device, the second voltage divider device, the third voltage divider device, the fourth voltage divider device, the fifth voltage divider device and the sixth voltage divider device are respectively resistors.
[0016] Optionally, the resistance value of the first voltage divider device is the same as the resistance value of the second voltage divider device; the resistance value of the third voltage divider device is the same as the resistance value of the fourth voltage divider device; and the resistance value of the fifth voltage divider device is the same as the resistance value of the sixth voltage divider device.
[0017] Optionally, the resistance value of the third voltage divider device is respectively greater than the resistance value of the first voltage divider device and the resistance value of the fifth voltage divider device; the resistance value of the fourth voltage divider device is respectively greater than the resistance value of the second voltage divider device and the resistance value of the sixth voltage divider device.
[0018] Optionally, the level conversion circuit further includes a bias unit;
[0019] The bias unit includes a three-terminal switch device and a voltage clamping component connected in series; the control terminal of the three-terminal switch device is electrically connected to the fourth energy supply module, and the common terminal of the voltage clamping component is electrically connected to the output terminal of the first voltage conversion unit and the output terminal of the second voltage conversion unit respectively;
[0020] The voltage clamping assembly includes a plurality of voltage clamping devices connected in series.
[0021] Optionally, the voltage clamping device is any one of a diode, a transistor with a base and a collector electrically connected, and a MOS transistor with a gate and a drain electrically connected.
[0022] On the other hand, the present invention further provides a chip including the above-mentioned level conversion circuit.
[0023] Through the above technical solution, the embodiment of the present invention uses the voltage limiting processing unit to compress the large dynamic range of the input signal through the voltage limiting protection structure of the dual output ends, and then further compresses the large dynamic range of the dual-end input signal through the first voltage conversion unit and the second voltage conversion unit, and realizes the fine logic conversion of the level signal, solving the problem that the traditional level conversion circuit can only adapt to a very limited voltage variation range; and the embodiment of the present invention also realizes direct connection to the differential / common mode operational amplifier through the dual-end output of the dual-channel output unit.
[0024] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the following detailed description, they are used to explain the embodiments of the present invention, but do not constitute a limitation of the embodiments of the present invention. In the accompanying drawings:
[0026] Figure 1 is a circuit schematic diagram of the level conversion circuit provided by the present invention;
[0027] Figure 2 This is the circuit schematic diagram of a traditional level conversion circuit;
[0028] Figure 3 It is a schematic diagram comparing two input voltages and two output voltages of the level conversion circuit provided by the present invention. DETAILED DESCRIPTION
[0029] The following describes the specific implementation of the embodiment of the present invention in detail with reference to the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the embodiment of the present invention and is not used to limit the embodiment of the present invention.
[0030] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.
[0031] Conventional low-level to high-level conversion circuits, such as Figure 2 As shown, this circuit is primarily used to achieve level conversion between fixed voltage domains. However, the operating range of this level conversion circuit is strictly limited by the device's voltage resistance characteristics and the logical operating range. Once the circuit design is completed, its level conversion range is fixed. This results in it being able to adapt to only a very limited voltage fluctuation range. Once this range is exceeded, the circuit function may be affected. Furthermore, the traditional differential feedback structure requires the input to provide logically opposite differential signals, which greatly limits the circuit's input application range. Furthermore, the differential signal may cause significant power loss due to phase errors during the high-voltage conversion process. Furthermore, the excessive number of transistors and dual-supply VDD design in the level conversion circuit not only increase circuit complexity but also increase manufacturing costs.
[0032] In view of this, embodiments of the present invention provide a level conversion circuit and a chip to at least address the defects of traditional level conversion circuits that can only adapt to a very limited voltage variation range and cannot be directly connected to differential / common mode operational amplifiers.
[0033] Circuit Example
[0034] Please refer to Figure 1An embodiment of the present invention provides a level conversion circuit, including: a dual-channel output unit 10, a voltage limiting processing unit 20, a first voltage conversion unit 30 and a second voltage conversion unit 40.
[0035] The dual output unit 10 is used to provide a first output terminal and a second output terminal, respectively. The voltage at the first output terminal is Vout1, and the voltage at the second output terminal is Vout2. The dual output of the dual output unit 10 enables a direct connection structure for dual-input devices (such as differential / common-mode op amps). This allows the output voltage to be directly connected to subsequent dual-input amplifiers, comparators, and other components, thereby improving flexibility, reducing the need for excessive cascading of multiple components, simplifying the design, and increasing integration.
[0036] The voltage limiting processing unit 20 is electrically connected to the first output terminal and the second output terminal, respectively, and is configured to determine the on / off state of the first output terminal and the ground terminal based on the voltage value of the first output terminal, so that the voltage value of the first output terminal varies within a first threshold range, and to determine the on / off state of the second output terminal and the ground terminal based on the voltage value of the second output terminal, so that the voltage value of the second output terminal varies within a second threshold range. Specifically, the voltage limiting processing unit 20 primarily provides voltage limiting protection for the first output terminal voltage Vout1 and for the second output terminal voltage Vout2. Its characteristic is that when the first output terminal voltage Vout1 is greater than a set threshold value (VT), the first output terminal is connected to the ground terminal; when the first output terminal voltage Vout1 is less than or equal to the set value (VT), the first output terminal is disconnected from the ground terminal, thereby converting a large voltage variation range of the input signal into a variation range of the first output terminal voltage of (0, VT). Similarly, when the second output terminal voltage Vout2 is greater than the set threshold (VT), the second output terminal is connected to the ground terminal; when the second output terminal voltage Vout2 is less than or equal to the set value (VT), the second output terminal is disconnected from the ground terminal, thereby converting the large voltage variation range of the input signal into the second output terminal voltage variation range of (0, VT). This embodiment of the present invention uses a two-terminal voltage limiting protection structure to compress the large dynamic range of the input signal.
[0037] The first voltage conversion unit 30 is electrically connected to the first output terminal, and is used to perform voltage conversion on the first input voltage and output the first converted voltage to the first output terminal. The second voltage conversion unit 40 is electrically connected to the second output terminal, and is used to perform voltage conversion on the second input voltage and output the second converted voltage to the second output terminal. In one embodiment, the first voltage conversion unit 30 and the second voltage conversion unit 40 can respectively use a voltage divider structure to perform voltage conversion on the first input voltage and output the first converted voltage to the first output terminal. The second input voltage is converted by the voltage divider structure and output the second converted voltage to the first output terminal. The first voltage conversion unit 30 and the second voltage conversion unit 40 are used to further compress the large dynamic range of the input signal and realize fine logic conversion of the level signal to adapt to a wide input voltage range.
[0038] This embodiment of the present invention utilizes a voltage-limiting protection structure at both output terminals, using a voltage-limiting processing unit 20, to compress the wide dynamic range of the input signal. This wide dynamic range is further compressed by the first and second voltage conversion units 30 and 40, enabling precise logic conversion of the level signal. This addresses the issue of conventional level conversion circuits being limited to a very limited voltage range. Furthermore, this embodiment of the present invention utilizes the dual-terminal outputs of the dual-output unit 10 to directly connect to differential / common-mode operational amplifiers.
[0039] For other aspects of the present invention, please refer to Figure 1 The first voltage conversion unit 30 includes: a first voltage divider device R1, a third voltage divider device R3 and a fifth voltage divider device R5; the first end of the third voltage divider device R3 is electrically connected to the first energy supply module, the first end of the fifth voltage divider device R5 is electrically connected to the second end of the third voltage divider device R3, the second end of the fifth voltage divider device R5 is grounded, the first end of the first voltage divider device R1 is electrically connected to the second end of the third voltage divider device R3, the second end of the first voltage divider device R1 is electrically connected to the third energy supply module, and the common end of the first voltage divider device R1, the third voltage divider device R3 and the fifth voltage divider device R5 connected to each other serves as the output end of the first voltage conversion unit 30 and is electrically connected to the first output end; wherein the first energy supply module can be a power supply for providing a stable first input voltage Vin1.
[0040] The second voltage conversion unit 40 includes: a second voltage divider device R2, a fourth voltage divider device R4, and a sixth voltage divider device R6; the first end of the fourth voltage divider device R4 is electrically connected to the second energy supply module, the first end of the sixth voltage divider device R6 is electrically connected to the second end of the fourth voltage divider device R4, and the second end of the sixth voltage divider device R6 is grounded; the first end of the second voltage divider device R2 is electrically connected to the second end of the fourth voltage divider device R4, and the second end of the second voltage divider device R2 is electrically connected to the third energy supply module; the common end of the second voltage divider device R2, the fourth voltage divider device R4, and the sixth voltage divider device R6, which are connected to each other, serves as the output end of the second voltage conversion unit 40 and is electrically connected to the second output end. The second energy supply module can be a power supply for providing a stable second input voltage Vin2. The third energy supply module provides a third input voltage Vh to the second end of the first voltage divider device R1 and the second end of the second voltage divider device R2.
[0041] In one embodiment, the first voltage divider R1, the second voltage divider R2, the third voltage divider R3, the fourth voltage divider R4, the fifth voltage divider R5, and the sixth voltage divider R6 are each configured as a resistor. The first voltage divider R1, the third voltage divider R3, and the fifth voltage divider R5 determine the voltage variation range of the first output terminal voltage Vout1; the second voltage divider R2, the fourth voltage divider R4, and the sixth voltage divider R6 determine the voltage variation range of the second output terminal voltage Vout2; the first voltage divider R1, the third voltage divider R3, and the fifth voltage divider R5 function as voltage dividers to convert the first input voltage Vin1 to the potential of the first output terminal Vout1. The second voltage divider R2, the fourth voltage divider R4, and the sixth voltage divider R6 function as voltage dividers to convert the second input voltage Vin2 to the potential of the second output terminal Vout2.
[0042] The voltage Vout1 at the first output terminal is formed by superimposing the voltages applied at the points Vin1 and Vh.
[0043] At point Vh, Vout1 = (R3 / / R5) / (R1+R3 / / R5)*Vh;
[0044] At point Vin1, Vout1 = [(R1 / / R3) / (R1 / / R3+R5)]*Vin1;
[0045] Therefore, Vout1 = [(R1 / / R3) / (R1 / / R3+R5)]*Vin1+(R3 / / R5) / (R1+R3 / / R5)*Vh.
[0046] Similarly, Vout2 = [(R2 / / R4) / (R2 / / R4+R6)]*Vin2+(R4 / / R6) / (R2+R4 / / R6)*Vh.
[0047] In one embodiment, the resistance value of the first voltage divider R1 is the same as the resistance value of the second voltage divider R2; the resistance value of the third voltage divider R3 is the same as the resistance value of the fourth voltage divider R4; and the resistance value of the fifth voltage divider R5 is the same as the resistance value of the sixth voltage divider R6. For example, R1 = R2, R3 = R4, R5 = R6, and R1:R3:R5 = 1:1:7. During the layout design, the matching between the resistors is fully considered. In addition, the power supply passes through T1 and T2 so that Vh = Vdd - Vbe1 - Vbe2.
[0048] Thus:
[0049] Vout1=(1 / 15)*Vin1+(7 / 15)*(VCC-Vbe1-Vbe2),
[0050] Vout2=(1 / 15)*Vin2+(7 / 15)*(VCC-Vbe1-Vbe2),
[0051] Vout1-Vout2=(1 / 15)*(Vin1-Vin2),
[0052] From the above three equations, it can be seen that the difference between Vin1 / Vin2 is equivalently converted to the difference between nodes Vout1 / Vout2. That is, by selecting appropriate resistance values, the voltage difference between the first output terminal voltage Vout1 and the second output terminal voltage Vout2 can be controlled to correlate with the voltage difference between the first input terminal voltage Vin1 and the second input terminal voltage Vin2. Therefore, by selecting an appropriate resistance ratio in the embodiment of the present invention, the conversion voltage, power consumption, and other factors of the first voltage conversion unit 30 and the second voltage conversion unit 40 can be flexibly adjusted to meet the functional requirements of the overall circuit.
[0053] In one embodiment, the resistance value of the third voltage divider device R3 is respectively greater than the resistance value of the first voltage divider device R1 and the resistance value of the fifth voltage divider device R5; the resistance value of the fourth voltage divider device R4 is respectively greater than the resistance value of the second voltage divider device R2 and the resistance value of the sixth voltage divider device R6.
[0054] In addition, the embodiment of the present invention can set the first voltage divider device R1, the second voltage divider device R2, the fifth voltage divider device R5 and the sixth voltage divider device R6 to fixed values. The first voltage divider device R1, the second voltage divider device R2, the fifth voltage divider device R5 and the sixth voltage divider device R6 set to fixed values can be any one of a polysilicon resistor, a MOS resistor, etc. By appropriately increasing the resistance value of the third voltage divider device R3 and the fourth voltage divider device R4, the power consumption and current of the input end can be reduced, thereby reducing the voltage fluctuation of the first output terminal voltage Vout1 and the second output terminal voltage Vout2. Specifically, the method of increasing the resistance value of the third voltage divider device R3 and the method of increasing the resistance value of the fourth voltage divider device R4 include but are not limited to using a large resistor, using an inverse ratio MOS tube and increasing the impedance through a cascode structure. The embodiment of the present invention reduces the number of MOS tubes and the number of power supplies by selecting fixed value resistors and using a symmetrical proportional structure.
[0055] In the embodiment of the present invention, the third voltage divider R3 and the fourth voltage divider R4 in the first voltage conversion unit 30 and the second voltage conversion unit 40 are set to have larger resistance values, and the first voltage divider R1, the second voltage divider R2, the fifth voltage divider R5 and the sixth voltage divider R6 are set to have smaller resistance values, thereby limiting the current of the lower output node, achieving fine control of the level conversion point, and reducing the fluctuation of the high-voltage conversion process. At this point, the embodiment of the present invention forms a voltage conversion unit for input voltage through dual-path resistor voltage division, and by utilizing the current-voltage conduction properties of the resistors, the input dynamic range is compressed through amplitude limiting, current limiting, and voltage division conversion, thereby achieving high-voltage difference and low-fluctuation reception of dual-end input signals. In addition, by selecting an appropriate resistance value ratio, the embodiment of the present invention can flexibly adjust the conversion voltage, power consumption, etc. of the circuit to meet the functional requirements of the overall circuit.
[0056] The first voltage conversion unit 30 and the second voltage conversion unit 40 of the embodiment of the present invention use a resistor voltage divider circuit and select a suitable voltage divider node, so that the output level can be flexibly set to a high and low level interval according to the requirements of the operational amplifier to meet the output bipolar high voltage difference. By selecting a suitable resistance value, the current power consumption is controlled and the voltage fluctuation is reduced.
[0057] For other aspects of the present invention, please refer to Figure 1 The voltage limiting processing unit 20 includes a first voltage limiting device D1 and a second voltage limiting device D2, wherein the first end of the first voltage limiting device D1 is electrically connected to the first output end, and the second end of the first voltage limiting device D1 is grounded; the first end of the second voltage limiting device D2 is electrically connected to the second output end, and the second end of the second voltage limiting device D2 is grounded.
[0058] The first voltage limiting device D1 is used to connect the first output terminal to the ground terminal when the voltage value of the first output terminal is greater than a set threshold, and disconnect the first output terminal from the ground terminal when the voltage value of the first output terminal is less than or equal to the set threshold; the second voltage limiting device D2 is used to connect the second output terminal to the ground terminal when the voltage value of the second output terminal is greater than a set threshold, and disconnect the second output terminal from the ground terminal when the voltage value of the second output terminal is less than or equal to the set threshold.
[0059] Specifically, in an embodiment of the present invention, the first voltage limiting device D1 primarily serves to limit the voltage of the first output voltage node Vout1. Similarly, the second voltage limiting device D2 primarily serves to limit the voltage of the second output voltage node Vout2. The characteristic of the first voltage limiting device D1 is that when the voltage at the first output voltage node Vout1 is greater than a set value (VT), the first voltage limiting device D1 conducts, allowing a large current to flow. Through the action of the first voltage divider R1, the voltage drop of the input signal (the first input voltage) is concentrated across the first voltage divider R1. When the voltage at the first output voltage node Vout1 is less than the set value (VT), the first voltage limiting device D1 is non-conductive, allowing very little current to flow. At this point, the voltage at the first output voltage node Vout1 is primarily generated by the first voltage divider R1, the third voltage divider R3, and the fifth voltage divider R5. By rationally adjusting the values of the first voltage divider R1 and the first voltage limiting device D1 based on the voltage and current driving range of the input signal, the large voltage variation range of the input signal can be converted to a variation range of 0 to VT (the first output voltage node Vout1). Thus, the large dynamic range of the input signal is compressed by the voltage limiting protection structure of the dual output terminals of the voltage limiting processing unit 20. It should be noted that the working principle of the first voltage limiting device D2 can refer to the working principle of the first voltage limiting device D1 and will not be repeated here.
[0060] Furthermore, the first voltage-limiting device D1 can be a Zener diode or a limiter; the second voltage-limiting device D2 can be a Zener diode or a limiter. The first voltage-limiting device D1 uses a Zener diode or a limiter to implement fixed-value voltage detection, and a current leakage function maintains small voltage fluctuations when the voltage exceeds a set threshold. The second voltage-limiting device D2 uses a Zener diode or a limiter to implement fixed-value voltage detection, and a current leakage function maintains small voltage fluctuations when the voltage exceeds a set threshold. Thus, this embodiment of the present invention compresses the voltage range of the dual-path high voltage difference of the input signal through a pressure measurement and current leakage method.
[0061] For other aspects of the present invention, please refer to Figure 1The level conversion circuit further includes a bias unit 50; the bias unit 50 includes a three-terminal switch device 51 and a voltage clamping component 52 connected in series. The control terminal of the three-terminal switch device 51 is electrically connected to the fourth energy supply module, and the common terminal of the voltage clamping component 52 is electrically connected to the output terminal of the first voltage conversion unit 30 and the output terminal of the second voltage conversion unit 40, respectively. The voltage clamping component 52 includes multiple voltage clamping components connected in series. The fourth energy supply module can be a power supply for providing a stable input voltage VDD. By electrically connecting the common terminal of the voltage clamping component 52 to the output terminal of the first voltage conversion unit 30 and the output terminal of the second voltage conversion unit 40, respectively, the power supply in this embodiment of the present invention is simplified to a single VDD, reducing circuit complexity and power consumption. The three-terminal switch device 51 serves as an enabling element to control the on and off of the entire circuit. The three-terminal switch device 51 can be a MOS transistor. The voltage clamping device can be any of a diode, a transistor with the base and collector electrically connected, and a MOS transistor with the gate and drain electrically connected. In the embodiment of the present invention, the voltage clamp device is an NPN transistor ( Figure 1 The voltage clamping assembly 52 may include two voltage clamping devices connected in series, three voltage clamping devices connected in series in sequence, or more than three voltage clamping devices connected in series in sequence.
[0062] In an embodiment of the present invention, base-collector-connected NPN transistors (T1, T2) serve as voltage clamping devices, which function equivalently to connecting the gate and drain of a MOS transistor to function as a diode. The equivalent IV curve of the base-collector-connected NPN transistor is equivalent to a diode curve with a negative temperature coefficient and exhibits good linearity. By using base-collector-connected NPN transistors as voltage clamping devices, Vh is set to VDD - Vbe1 - Vbe2, clamping the voltage between Vh and VDD. This ensures that the comparator inputs (VOUT1, VOUT2) are within their normal operating range, preventing circuit failure caused by excessively high Vh voltage and chip temperature. This improves the stability of the level output and is suitable for signal transmission between different system levels.
[0063] Please refer to Figure 3 , Figure 3 A schematic diagram comparing the two input voltages and two output voltages of a level shifter circuit according to an embodiment of the present invention. Vin1 represents the first input voltage, Vin2 represents the second input voltage, Vout1 represents the first output voltage, and Vout2 represents the second output voltage. This shows that the embodiment of the present invention achieves compression limiting of input voltages within a bipolar high-voltage differential range and precise control of the level shift point, reducing fluctuations during the high-voltage conversion process.
[0064] In summary, the embodiment of the present invention compresses the large dynamic range of the input signal through the dual-path voltage limiting protection structure of the voltage limiting processing unit 20, and further compresses the large dynamic range of the input signal through the first voltage conversion unit 30 and the second voltage conversion unit 40, and realizes the fine logic conversion of the level signal, reduces the fluctuation of the high-voltage conversion process and adapts to a wide range of input voltages, and realizes the bipolar high-voltage difference and low-fluctuation transfer from input to output through the dual-path output unit 10, and finally provides the switching function according to the demand through the bias unit 50, and provides high temperature and high voltage protection for the circuit.
[0065] In other words, the input and level conversion sections of this embodiment of the present invention achieve low-power, precise control of the level conversion point through the use of a resistor divider and Zener diode clamping structure. The output section also uses a voltage divider circuit and selects appropriate voltage divider nodes, allowing the output level to be flexibly set between high and low levels according to the requirements of the op amp, meeting the output bipolar high voltage difference. By selecting appropriate resistance values, current consumption is controlled and voltage fluctuations are reduced. This embodiment of the present invention uses a dual-path voltage divider structure to achieve a wide bipolar signal swing, meeting a wider range of differential / common-mode signal input applications.
[0066] Chip Example
[0067] Another embodiment of the present invention further provides a chip (not shown) including the aforementioned level conversion circuit. The specific structure of the level conversion circuit is similar to that of the aforementioned embodiments. Since this chip utilizes all of the technical solutions of all of the aforementioned embodiments, it at least has all of the beneficial effects brought about by the technical solutions of the aforementioned embodiments, and therefore will not be further elaborated here.
[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A level conversion circuit, characterized in that: include: A dual output unit, configured to provide a first output terminal and a second output terminal respectively; a voltage limiting processing unit, electrically connected to the first output terminal and the second output terminal, respectively, configured to determine the on-off state between the first output terminal and the ground terminal based on the voltage value of the first output terminal, so that the voltage value of the first output terminal varies within a first threshold range, and to determine the on-off state between the second output terminal and the ground terminal based on the voltage value of the second output terminal, so that the voltage value of the second output terminal varies within a second threshold range; a first voltage conversion unit, electrically connected to the first output terminal, configured to perform voltage conversion on the first input voltage and output a first converted voltage to the first output terminal; The second voltage conversion unit is electrically connected to the second output end, and is used to perform voltage conversion on the second input voltage and output a second converted voltage to the second output end.
2. The level conversion circuit according to claim 1, wherein: The voltage limiting processing unit includes a first voltage limiting device and a second voltage limiting device, wherein a first end of the first voltage limiting device is electrically connected to the first output end, and a second end of the first voltage limiting device is grounded; a first end of the second voltage limiting device is electrically connected to the second output end, and a second end of the second voltage limiting device is grounded; The first voltage limiting device is used to connect the first output terminal to the ground terminal when the voltage value of the first output terminal is greater than a set threshold, and disconnect the first output terminal from the ground terminal when the voltage value of the first output terminal is less than or equal to the set threshold; the second voltage limiting device is used to connect the second output terminal to the ground terminal when the voltage value of the second output terminal is greater than a set threshold, and disconnect the second output terminal from the ground terminal when the voltage value of the second output terminal is less than or equal to the set threshold.
3. The level conversion circuit according to claim 2, wherein: The first voltage limiting device is a Zener diode or a limiter; the second voltage limiting device is a Zener diode or a limiter.
4. The level conversion circuit according to claim 1, wherein: The first voltage conversion unit includes: a first voltage divider device, a third voltage divider device, and a fifth voltage divider device; the first end of the third voltage divider device is electrically connected to the first energy supply module, the first end of the fifth voltage divider device is electrically connected to the second end of the third voltage divider device, the second end of the fifth voltage divider device is grounded, the first end of the first voltage divider device is electrically connected to the second end of the third voltage divider device, the second end of the first voltage divider device is electrically connected to the third energy supply module, and the common end of the first voltage divider device, the third voltage divider device, and the fifth voltage divider device is electrically connected to the first output end as the output end of the first voltage conversion unit; The second voltage conversion unit includes: a second voltage divider device, a fourth voltage divider device and a sixth voltage divider device; the first end of the fourth voltage divider device is electrically connected to the second energy supply module, the first end of the sixth voltage divider device is electrically connected to the second end of the fourth voltage divider device, the second end of the sixth voltage divider device is grounded, the first end of the second voltage divider device is electrically connected to the second end of the fourth voltage divider device, the second end of the second voltage divider device is electrically connected to the third energy supply module, and the common end of the second voltage divider device, the fourth voltage divider device and the sixth voltage divider device connected to each other is electrically connected to the second output end as the output end of the second voltage conversion unit.
5. The level conversion circuit according to claim 4, wherein: The first voltage divider device, the second voltage divider device, the third voltage divider device, the fourth voltage divider device, the fifth voltage divider device and the sixth voltage divider device are respectively made of resistors.
6. The level conversion circuit according to claim 4 or 5, characterized in that: The resistance value of the first voltage divider is the same as the resistance value of the second voltage divider; the resistance value of the third voltage divider is the same as the resistance value of the fourth voltage divider; and the resistance value of the fifth voltage divider is the same as the resistance value of the sixth voltage divider.
7. The level conversion circuit according to claim 4 or 5, characterized in that: The resistance value of the third voltage divider device is respectively greater than the resistance value of the first voltage divider device and the resistance value of the fifth voltage divider device; the resistance value of the fourth voltage divider device is respectively greater than the resistance value of the second voltage divider device and the resistance value of the sixth voltage divider device.
8. The level conversion circuit according to claim 1, wherein: The level conversion circuit further includes a bias unit; The bias unit includes a three-terminal switch device and a voltage clamping component connected in series; the control terminal of the three-terminal switch device is electrically connected to the fourth energy supply module, and the common terminal of the voltage clamping component is electrically connected to the output terminal of the first voltage conversion unit and the output terminal of the second voltage conversion unit respectively; The voltage clamping assembly includes a plurality of voltage clamping devices connected in series.
9. The level conversion circuit according to claim 8, wherein: The voltage clamping device is selected from any one of a diode, a transistor with a base and a collector electrically connected, and a MOS transistor with a gate and a drain electrically connected.
10. A chip, characterized in that: The level conversion circuit comprises the level conversion circuit according to any one of claims 1 to 9.