Current-limiting protection method and system of controller

Abstract

The invention relates to a current-limiting protection method and system for a controller, belongs to the technical field of controllers, and solves the problems of complex control, inflexibility, low efficiency and higher cost caused by the need of adding an additional CPLD (Complex Programmable Logic Device) chip or selecting a main control chip with a CBC mode function in the existing current-limiting method. Comprising the following steps: in the working process of a controller, continuously detecting a hardware overcurrent signal of the controller; if the hardware overcurrent signal is detected to be effective, triggering an interrupt service program; and the interrupt service program carries out overcurrent control on the controller and outputs an overcurrent fault signal, if the overcurrent fault signal is effective, the interrupt service program enters a fault mode, and otherwise, the interrupt service program continues to wait for triggering.

Description

Technical Field

[0001] The present invention relates to the technical field of controllers, and in particular to a current limiting protection method and system for a controller. Background Art

[0002] Existing controllers require a cycle-by-cycle current limiting function to ensure that the current does not exceed a specified maximum value. This function monitors the current in real time during the controller's power supply operation. If the current exceeds a set threshold, the associated PWM (pulse width modulation) driver is temporarily disabled and automatically enabled again until the next PWM cycle. This current limiting function protects the converter circuit from damage.

[0003] At present, there are mainly two methods of wave-by-wave current limiting. One is that the main control chip itself has the wave-by-wave current limiting function. The chip pin connected to the external hardware overcurrent fault signal is configured into CBC mode through software. When overcurrent occurs and the overcurrent fault hardware pin signal is valid, the chip automatically turns off the PWM drive; when the current decreases due to the closure of the PWM drive and the overcurrent fault hardware signal becomes invalid, the chip automatically turns on the PWM drive, and all chip operations are automatically completed. The development difficulty is small and the development cycle is short, but the chip with CBC mode function needs to be selected, which will increase the cost. In addition, it is difficult to implement the wave-by-wave current limiting counting protection logic, and the software control is not flexible. The second is to implement the PWM control logic of wave-by-wave current limiting through CPLD. Because CPLD can control PWM within each clock cycle, it can realize the instantaneous shutdown or opening of PWM, but it is necessary to add an independent CPLD chip, which increases the product cost.

[0004] Therefore, a simple, flexible, efficient and low-cost current limiting method is urgently needed. Summary of the Invention

[0005] In view of the above analysis, the embodiments of the present invention aim to provide a current limiting protection method and system for a controller, so as to solve the problems of complex control, inflexibility, low efficiency and high cost caused by the need to add an additional CPLD chip or select a main control chip with CBC mode function in existing current limiting methods.

[0006] In one aspect, an embodiment of the present invention provides a current limiting protection method for a controller, comprising the following steps:

[0007] During the operation of the controller, the hardware overcurrent signal of the controller is continuously detected;

[0008] If the hardware overcurrent signal is detected to be valid, the interrupt service routine is triggered;

[0009] The interrupt service program performs overcurrent control on the controller and outputs an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode, otherwise it continues to wait for triggering.

[0010] Furthermore, the interrupt service program performs overcurrent control on the controller by executing the following steps:

[0011] When the interrupt service routine is triggered, the first current limiting protection is started;

[0012] Determine whether the hardware overcurrent signal is valid after the first current limiting protection, and if it is still valid, perform the second current limiting protection;

[0013] Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

[0014] Furthermore, the first current limiting protection is performed by executing the following steps:

[0015] Turn off PWM drive;

[0016] Wait for the set first waiting time;

[0017] Turn on PWM drive;

[0018] Wait for the set second waiting time;

[0019] The second current limiting protection is performed by performing the following steps:

[0020] Turn off PWM drive;

[0021] Wait for the set third waiting time;

[0022] Turn on PWM drive;

[0023] Wait for the set fourth waiting time.

[0024] Furthermore, the overcurrent fault is determined by:

[0025] Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold within a set first comparison time length. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

[0026] Furthermore, if the hardware overcurrent signal is invalid after the first current limiting protection or the second current limiting protection, then

[0027] Determine whether the number of wave-by-wave current limiting times is less than a set second counting threshold within a set second comparison time length. If so, set the number of wave-by-wave current limiting times to 0 and then perform an overcurrent fault judgment and output an overcurrent fault signal; otherwise, directly perform an overcurrent fault judgment and output an overcurrent fault signal.

[0028] Furthermore, the first waiting time and the third waiting time are set according to the amplitude of the current drop in the AC power circuit after the controller turns off the drive; the second waiting time and the fourth waiting time are set according to the amplitude of the abnormal increase in current in the AC power circuit after the controller turns on the PWM drive.

[0029] On the other hand, an embodiment of the present invention provides a current limiting protection system for a controller, comprising:

[0030] The detection module is used to detect the hardware overcurrent signal of the controller during the operation of the controller;

[0031] A trigger module is used to trigger an interrupt service routine if a hardware overcurrent signal is detected to be valid;

[0032] The interrupt service module is used to, when the interrupt service program is triggered, control the overcurrent of the controller and output an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode, otherwise it continues to wait for triggering.

[0033] Furthermore, the interrupt service program performs overcurrent control on the controller by executing the following steps:

[0034] When the interrupt service routine is triggered, the first current limiting protection is started;

[0035] Determine whether the hardware overcurrent signal is valid after the first current limiting protection, and if it is still valid, perform the second current limiting protection;

[0036] Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

[0037] Furthermore, the first current limiting protection is performed by executing the following steps:

[0038] Turn off PWM drive;

[0039] Wait for the set first waiting time;

[0040] Turn on PWM drive;

[0041] Wait for the set second waiting time;

[0042] The second current limiting protection is performed by performing the following steps:

[0043] Turn off PWM drive;

[0044] Wait for the set third waiting time;

[0045] Turn on PWM drive;

[0046] Wait for the set fourth waiting time.

[0047] Furthermore, the overcurrent fault is determined by:

[0048] Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold within a set first comparison time length. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

[0049] Compared with the prior art, the present invention can achieve at least the following beneficial effects:

[0050] The present invention provides a controller current limiting protection method and system. During the operation of the controller, a hardware overcurrent signal is continuously detected. If the hardware overcurrent signal is detected to be valid, an interrupt service program is triggered. The interrupt service program performs overcurrent control on the controller and outputs an overcurrent fault signal. If the overcurrent fault signal is valid, a fault mode is entered; otherwise, the system continues to wait for triggering. There is no need to add an additional CPLD chip or select a main control chip with a CBC mode function. The control logic of wave-by-wave current limiting is implemented through software. The system can be flexibly adjusted according to the application scenario of the product or the special needs of the customer, making the product simpler, more flexible, and more efficient. The system is not restricted by hardware and is more suitable for platform-based product development.

[0051] In the present invention, the above-mentioned technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of the present invention will be described in the following description, and some advantages will become apparent from the description or be learned through practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the contents particularly pointed out in the description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings are only for the purpose of illustrating particular embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like parts throughout the drawings.

[0053] Figure 1 A schematic flow chart of a current limiting protection method for a controller provided in Example 1 of the present invention;

[0054] Figure 2This is a schematic diagram of a specific flow of the interrupt service routine provided in Example 1 of the present invention. DETAILED DESCRIPTION

[0055] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, and are not used to limit the scope of the present invention.

[0056] Example 1

[0057] A specific embodiment of the present invention discloses a current limiting protection method for a controller, such as Figure 1 As shown, the following steps are included:

[0058] S1. During the operation of the controller, the hardware overcurrent signal of the controller is continuously detected.

[0059] Specifically, the current is continuously detected by an overcurrent detection circuit provided in the controller. When an overcurrent occurs in the AC power circuit in the controller, a hardware overcurrent signal is valid.

[0060] Specifically, the controller is a photovoltaic energy storage controller or a digital power supply controller.

[0061] Illustratively, the photovoltaic energy storage controller includes an energy storage battery, a bidirectional energy storage inverter, and a photovoltaic panel, and has AC power supply and battery charging functions; in the AC power supply mode, the energy storage inverter operates in the inverter state, converting DC power into AC power output; in the battery charging mode, the energy storage inverter operates in the rectification state, converting AC mains power into DC power to charge the battery.

[0062] S2. If the hardware overcurrent signal is detected to be valid, the interrupt service routine is triggered.

[0063] Specifically, when the hardware overcurrent signal is 1, it is valid, and when it is 0, it is invalid.

[0064] S3. The interrupt service program performs overcurrent control on the controller and outputs an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode; otherwise, the controller continues to wait for triggering.

[0065] Specifically, the fault mode is a mode state of the controller, in which the controller does not control the power electronic device and reports a fault code.

[0066] When implementing, if Figure 2 As shown, the interrupt service routine performs overcurrent control on the controller by executing the following steps:

[0067] S31, when the interrupt service program is triggered, starting to execute the first current limiting protection;

[0068] In a specific implementation, the first current limiting protection is performed by executing the following steps:

[0069] S311, turn off PWM drive;

[0070] S312, waiting for a set first waiting time;

[0071] S313, turn on PWM drive;

[0072] S314: Wait for the set second waiting time.

[0073] Specifically, the PWM is turned on and off through the PWM port of the controller main control ECU.

[0074] S32, determining whether the hardware overcurrent signal is valid after the first current limiting protection, and if still valid, executing the second current limiting protection;

[0075] In specific implementation, the second current limiting protection is performed by executing the following steps:

[0076] S321, turn off PWM drive;

[0077] S322, waiting for a set third waiting time;

[0078] S323, turn on PWM drive;

[0079] S324: Wait for the set fourth waiting time.

[0080] Specifically, the first waiting time and the third waiting time are set according to the amplitude of the current drop in the AC power circuit after the controller turns off the drive; the second waiting time and the fourth waiting time are set according to the amplitude of the abnormal increase in current in the AC power circuit after the controller turns on the PWM drive; the waiting time is generally set to several us and needs to be adapted according to the actual controller.

[0081] It is understandable that the purpose of the shutdown wait time is to allow the current to drop so as not to damage the power electronic devices, and the purpose of the open wait time is to try to open the power electronic devices for a short time to determine whether overcurrent will still occur after the power electronic devices are turned on; the double judgment of the first and second current limiting protections can improve the accuracy of overcurrent fault confirmation.

[0082] S33. Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform an overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

[0083] In specific implementation, the overcurrent fault is determined by the following method:

[0084] Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold within a set first comparison time length. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

[0085] It can be understood that the number of wave-by-wave current limiting is a prediction of the cumulative number of overcurrent faults. When the number of overcurrent faults accumulates to a certain value, it is judged that multiple overcurrents have actually occurred. At this time, it is confirmed that the system has multiple consecutive overcurrent faults, which exceeds the system's tolerance range. It is finally diagnosed as a system fault and shut down to prevent irreversible damage to the system.

[0086] Specifically, the first comparison duration and the first counting threshold are set according to the actual situation of the system; preferably, the first comparison duration is set to 1s, and the first counting threshold is 20, that is, the number of gradual current limiting occurs 20 times within the duration of 1s.

[0087] Specifically, the overcurrent fault signal is set to 1 to indicate a valid signal, and is set to 0 to indicate an invalid signal.

[0088] Preferably, if the hardware overcurrent signal is invalid after the first current limiting protection or the second current limiting protection, then

[0089] A determination is made as to whether the number of wave-by-wave current limiting times is less than a set second counting threshold within a set second comparison time period. If so, the number of wave-by-wave current limiting times is set to 0, and an overcurrent fault determination is performed, outputting an overcurrent fault signal. Otherwise, an overcurrent fault determination is directly performed, and an overcurrent fault signal is output. It should be noted that the PWM drive will be turned on again during the overcurrent fault determination, which does not affect the overall process. The turning-on operation can be performed; if the PWM drive is already turned on, it can be kept on.

[0090] Specifically, the second comparison duration and the second counting threshold are set according to actual conditions; more specifically, the second comparison duration and the second counting threshold are set the same as the first comparison duration and the first counting threshold.

[0091] It can be understood that the accumulated number of wave-by-wave current limiting times is used to determine whether the overcurrent protection is entered multiple times in a short period of time. When this happens, the controller enters the fault mode, which plays a role in protecting the controller.

[0092] Compared with the prior art, this embodiment provides a current limiting protection method for a controller. During the operation of the controller, the hardware overcurrent signal of the current is continuously detected. If the hardware overcurrent signal is detected to be valid, the interrupt service program is triggered. The interrupt service program controls the overcurrent of the controller and outputs an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode; otherwise, it continues to wait for the trigger. There is no need to add an additional CPLD chip or select a main control chip with CBC mode function. The control logic of wave-by-wave current limiting is implemented through software, which can be flexibly adjusted according to the application scenario of the product or the special needs of the customer, making the product simpler, more flexible, and more efficient. It is not restricted by hardware and is more suitable for platform-based product development.

[0093] Example 2

[0094] A specific embodiment of the present invention discloses a current limiting protection system for a controller, comprising:

[0095] The detection module is used to detect the hardware overcurrent signal of the current during the operation of the controller;

[0096] A trigger module is used to trigger an interrupt service routine if a hardware overcurrent signal is detected to be valid;

[0097] The interrupt service module is used to, when the interrupt service program is triggered, control the overcurrent of the controller and output an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode, otherwise it continues to wait for triggering.

[0098] During implementation, the interrupt service program in the interrupt service module performs overcurrent control on the controller by executing the following steps:

[0099] When the interrupt service routine is triggered, the first current limiting protection is started;

[0100] Determine whether the hardware overcurrent signal is valid after the first current limiting protection, and if it is still valid, perform the second current limiting protection;

[0101] Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

[0102] In a specific implementation, the first current limiting protection is performed by executing the following steps:

[0103] Turn off PWM drive;

[0104] Wait for the set first waiting time;

[0105] Turn on PWM drive;

[0106] Wait for the set second waiting time;

[0107] The second current limiting protection is performed by performing the following steps:

[0108] Turn off PWM drive;

[0109] Wait for the set third waiting time;

[0110] Turn on PWM drive;

[0111] Wait for the set fourth waiting time.

[0112] In specific implementation, the overcurrent fault is determined by the following method:

[0113] Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

[0114] The specific implementation process of the embodiment of the present invention can be found in the above method embodiment, which will not be described in detail in this embodiment.

[0115] Since the principles of this embodiment are the same as those of the above method embodiment, this system also has the corresponding technical effects of the above method embodiment.

[0116] Those skilled in the art will appreciate that all or part of the process steps of the above-described embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, such as a magnetic disk, an optical disk, a read-only memory, or a random access memory.

[0117] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed by the present invention should be covered by the scope of protection of the present invention.

Claims

1. A current limiting protection method for a controller, characterized in that: The following steps are involved: During the operation of the controller, the hardware overcurrent signal of the controller is continuously detected; If the hardware overcurrent signal is detected to be valid, the interrupt service routine is triggered; The interrupt service program performs overcurrent control on the controller and outputs an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode, otherwise it continues to wait for triggering.

2. The controller current limiting protection method according to claim 1, characterized in that: The interrupt service routine performs overcurrent control on the controller by executing the following steps: When the interrupt service routine is triggered, the first current limiting protection is started; Determine whether the hardware overcurrent signal is valid after the first current limiting protection, and if it is still valid, perform the second current limiting protection; Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

3. The current limiting protection method of the controller according to claim 2, characterized in that: The first current limiting protection is performed by performing the following steps: Turn off PWM drive; Wait for the set first waiting time; Turn on PWM drive; Wait for the set second waiting time; The second current limiting protection is performed by performing the following steps: Turn off PWM drive; Wait for the set third waiting time; Turn on PWM drive; Wait for the set fourth waiting time.

4. The controller current limiting protection method according to claim 3, characterized in that: The overcurrent fault is judged in the following way: Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold within a set first comparison time length. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

5. The controller current limiting protection method according to claim 3, characterized in that: If the hardware overcurrent signal is invalid after the first current limiting protection or the second current limiting protection, then Determine whether the number of wave-by-wave current limiting times is less than a set second counting threshold within a set second comparison time length. If so, set the number of wave-by-wave current limiting times to 0 and then perform an overcurrent fault judgment and output an overcurrent fault signal; otherwise, directly perform an overcurrent fault judgment and output an overcurrent fault signal.

6. The controller current limiting protection method according to claim 3, characterized in that: The first waiting time and the third waiting time are set according to the amplitude of the current drop in the AC power circuit after the controller turns off the drive; the second waiting time and the fourth waiting time are set according to the amplitude of the abnormal increase in current in the AC power circuit after the controller turns on the PWM drive.

7. A current limiting protection system for a controller, characterized in that: include: The detection module is used to detect the hardware overcurrent signal of the controller during the operation of the controller; A trigger module is used to trigger an interrupt service routine if a hardware overcurrent signal is detected to be valid; The interrupt service module is used to, when the interrupt service program is triggered, control the overcurrent of the controller and output an overcurrent fault signal. If the overcurrent fault signal is valid, the controller enters the fault mode, otherwise it continues to wait for triggering.

8. The current limiting protection system of the controller according to claim 7, characterized in that: The interrupt service routine performs overcurrent control on the controller by executing the following steps: When the interrupt service routine is triggered, the first current limiting protection is started; Determine whether the hardware overcurrent signal is valid after the first current limiting protection, and if it is still valid, perform the second current limiting protection; Determine whether the hardware overcurrent signal is valid after the second current limiting protection. If it is still valid, turn off the PWM drive, increase the number of wave-by-wave current limiting times by 1, and perform overcurrent fault judgment to output an overcurrent fault signal; wherein, the initial value of the wave-by-wave current limiting times is 0.

9. The current limiting protection system of the controller according to claim 8, characterized in that: The first current limiting protection is performed by performing the following steps: Turn off PWM drive; Wait for the set first waiting time; Turn on PWM drive; Wait for the set second waiting time; The second current limiting protection is performed by performing the following steps: Turn off PWM drive; Wait for the set third waiting time; Turn on PWM drive; Wait for the set fourth waiting time.

10. The current limiting protection system of the controller according to claim 9, characterized in that: The overcurrent fault is judged in the following way: Determine whether the number of wave-by-wave current limiting times is less than a set first counting threshold within a set first comparison time length. If so, turn on the PWM drive and set the overcurrent fault signal to an invalid signal; otherwise, set the overcurrent fault signal to a valid signal.

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